Circuit structure for improving flatness of passband of switch notch assembly

By using a combination of notch selection circuit and flatness enhancement circuit in the switching notch assembly, the mirror-placed single-pole double-throw switch pair and matching circuit and equalization circuit are used to solve the problem of in-band fluctuations caused by mismatch and loss, and the improvement of passband flatness is achieved.

CN119519658APending Publication Date: 2025-02-25CHINA ELECTRONICS TECH GRP NO 26 RES INST
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Patent Information

Application Number
CN202411565365.9
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-11-05
Publication Date
2025-02-25

AI Technical Summary

Technical Problem

The switching notch component has large fluctuations in the passband range due to mismatch in the RF circuit, component loss, dielectric loss and other factors, making it difficult to achieve performance indicators of wide passband coverage and small passband flatness.

Method used

The circuit structure including a notch selection circuit and a flatness enhancement circuit is adopted. The flatness of the through-pass and notch paths is improved through the mirror-placed single-pole double-throw switch pair and the matching circuit and the equalization circuit.

Benefits of technology

It effectively solves the problem of large in-band fluctuations in the passband range of the switching notch component, improves the passband flatness of the component, and ensures the consistency of the signal in the working frequency band.

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Abstract

The invention belongs to the technical field of communication, and particularly relates to a circuit structure for improving the passband flatness of a switch notch assembly. Comprising a trap filter selection circuit and a flatness improving circuit. The wave trap selection circuit comprises a single-pole double-throw switch pair and a wave trap which are connected in series, the single-pole double-throw switch pair comprises two single-pole double-throw switches which are arranged in a mirror image manner, and the single-pole double-throw switch pair can select a through path or a wave trap path through a control code; the flatness improving circuit comprises a plurality of matching circuits and a plurality of equalization circuits which are introduced into a trap filter selection circuit, the matching circuits are located at the two ends of a trap filter and the input end and the output end of a single-pole double-throw switch pair main path signal, and the equalization circuits are located in a single-pole double-throw switch pair main path and a trap filter path. The problem of large in-band fluctuation in an assembly passband range caused by factors such as mismatch, component loss and dielectric loss in a radio frequency circuit is solved, and the circuit is simple in structure and easy to implement.
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Description

Technical Field

[0001] The present application relates to a circuit structure for improving passband flatness of a switch notch component, and in particular to research on a circuit structure for improving passband flatness within a wide frequency band, and belongs to the field of communication technology. Background Art

[0002] The switch notch component is composed of several notches and RF switches that suppress signals in different frequency bands. It can select the number of required working notches by controlling the code, and combine the selected notches to achieve the effect of suppressing signals in a specific frequency band. In recent years, with the advancement of microwave communication technology, microwave components are developing in the direction of wide working frequency bands. Except for the signal suppressed frequency band, the rest of the working frequency band of the switch notch component is all passband. Therefore, for this type of component, it is extremely challenging to achieve the performance indicators of wide passband coverage and small passband flatness (small in-band fluctuation). In order to ensure that the microwave system transmits or receives the same signal strength at each frequency point in the working frequency band, it is a very important measure to control the in-band fluctuation in the passband of the component.

[0003] Generally, the factors that deteriorate the intra-band fluctuation of the switch notch component can be roughly divided into two categories. The first category is loss, and the second category is mismatch. Signal transmission is mostly based on printed circuits. Complex printed circuits will cause energy loss due to factors such as the inherent characteristics of the medium, and the loss varies with frequency. When the frequency span is wide, the loss is low at low frequencies and high at high frequencies. In addition to printed circuits, the loss of RF switches also changes with frequency with a negative slope. The superposition of these two influencing factors makes the component have low loss at low frequencies and high loss at high frequencies, resulting in large intra-band fluctuations. In the printed circuit routing, the inconsistency between the routing width and the pad width can easily cause impedance discontinuity. Severe impedance discontinuities can easily cause the signal to be reflected and superimposed back and forth multiple times between the port and the impedance discontinuity point, causing the amplitude of the signal's forward transmission coefficient curve to fluctuate, resulting in ripples. Summary of the invention

[0004] In view of this, the present application provides a circuit structure for improving the passband flatness of a switch notch component to solve the problem of large in-band fluctuations within the component passband caused by mismatch, component loss, dielectric loss and other factors in the RF circuit. This circuit structure is simple and easy to implement.

[0005] A circuit structure for improving the flatness of a switch notch component, comprising a notch selection circuit and a flatness improvement circuit;

[0006] The trap selection circuit comprises a single-pole double-throw switch pair and a trap, wherein the single-pole double-throw switch pair comprises a first single-pole double-throw switch and a second single-pole double-throw switch placed in a mirror image, and the single-pole double-throw switch pair selects a through path or a trap path through a control code;

[0007] The flatness improvement circuit includes a plurality of matching circuits and a plurality of equalizing circuits, the output end of the first single-pole double-throw switch and the input end of the second single-pole double-throw switch are connected through a second matching circuit, a wave trap, a third matching circuit and a first equalizing circuit, and the two ends of the wave trap are respectively connected to the second matching circuit and the third matching circuit; the input end of the first single-pole double-throw switch is connected to the output end of the first matching circuit; the output end of the second single-pole double-throw switch is connected to the input end of the fourth matching circuit;

[0008] The first equalizing circuit is located at the input end of the second matching circuit or the output end of the third matching circuit, and the second equalizing circuit is located at the input end of the first matching circuit or the output end of the fourth matching circuit.

[0009] Furthermore, the trap selection circuit includes multiple stages of single-pole double-throw switch pairs and traps connected in series.

[0010] Furthermore, the output end of the second single-pole double-throw switch of the trap filter selection circuit of the previous stage is connected to the input end of the first single-pole double-throw switch of the trap filter selection circuit of the next stage.

[0011] Furthermore, the flatness improvement circuit includes a plurality of matching circuits corresponding to the plurality of stages connected in series and a plurality of equalizing circuits corresponding to the plurality of stages; or a plurality of matching circuits corresponding to the plurality of stages connected in series and a plurality of equalizing circuits less than the plurality of stages.

[0012] Furthermore, the through paths of the single-pole double-throw switch pair are directly connected via a coaxial cable.

[0013] Furthermore, the first balancing circuit and the second balancing circuit both include an inductor and a capacitor connected in parallel, and a resistor connected in parallel and then in series.

[0014] Furthermore, the inductance, the capacitance and the resistance are adjustable.

[0015] Beneficial effects of this application:

[0016] The present application introduces a direct series layout, in which two single-pole double-throw switches are placed in mirror images at both ends of the wave trap in the wave trap selection circuit. In addition to the advantages of simplicity and small space occupation, this layout can also avoid problems such as large losses and easy mismatch caused by long microstrip lines. At the same time, in order to improve the passband flatness of the wave trap selection circuit, the present application combines the equalization circuit and the matching circuit in the flatness improvement circuit with the wave trap selection circuit, which not only solves the mismatch problem between the single-pole double-throw switch pairs and the standing wave problem at both ends of the wave trap, but also improves the passband flatness of the component. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1A schematic diagram of a circuit structure for improving the flatness of a switch trap component in an embodiment of the present invention;

[0018] Figure 2 A schematic diagram of a trap selection circuit in an embodiment of the present invention;

[0019] Figure 3 A schematic diagram of a plurality of trap filter selection circuits in an embodiment of the present invention;

[0020] Figure 4 A schematic diagram of the structure of an equalizing circuit in an embodiment of the present invention;

[0021] Figure 5 Schematic diagram of a two-stage circuit structure without an equalizing circuit in an embodiment of the present invention;

[0022] Figure 6 Schematic diagram of a two-stage circuit structure of a first-stage equalization circuit in an embodiment of the present invention;

[0023] Figure 7 Schematic diagram of a two-stage circuit structure of a second-stage equalization circuit in an embodiment of the present invention;

[0024] Figure 8 Schematic diagram of a two-stage circuit structure of a two-stage equalization circuit in an embodiment of the present invention;

[0025] Fig. 9 This is a simulation diagram comparing S parameters before and after the flatness of the through-channel is improved in an embodiment of the present invention;

[0026] Fig.10 FIG. 4 is an S parameter diagram of the equalization circuit in an embodiment of the present invention. DETAILED DESCRIPTION

[0027] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0028] It should be noted that, since the embodiments of the present invention focus on the connection relationship of devices, the input / output relationship of each module / unit / device is used for explanation herein. It should be understood by those skilled in the art that, in fact, each module / unit / device inputs / outputs a signal, and the signal flow represents the input / output relationship. In order to make the technical means and creative features realized by the present invention easy to understand, the present invention is further explained in conjunction with the accompanying drawings.

[0029] It should be understood that although the terms first, second, third, fourth, etc. can be used to describe various elements, components, regions, layers and / or parts, these elements, components, regions, layers and / or parts should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or part from another element, component, region, layer or part. Therefore, without departing from the teachings of the present invention, the first element, component, region, layer or part discussed below can be represented as a second element, component, region, layer or part.

[0030] In an embodiment of the present invention, the present invention relates to a circuit structure for improving the passband flatness of a switch trap assembly; including a trap selection circuit and a flatness improvement circuit; the trap selection circuit includes a single-pole double-throw switch pair and a trap connected in series, the single-pole double-throw switch pair includes two single-pole double-throw switches placed in a mirror image, and the single-pole double-throw switch pair can select a straight-through path or a trap path through a control code; the flatness improvement circuit includes multiple matching circuits and multiple equalizing circuits introduced on the trap selection circuit, multiple matching circuits are located at both ends of the trap and the input and output ends of the single-pole double-throw switch pair total signal, and multiple equalizing circuits are located in the single-pole double-throw switch pair total and the trap path. The present application solves the problem of large in-band fluctuations within the passband range of the component caused by factors such as mismatch, component loss, and dielectric loss in the radio frequency circuit, and the circuit structure is simple and easy to implement.

[0031] The technical solution adopted by the present invention is as follows:

[0032] A circuit structure for improving the flatness of a switch trap component, such as Figure 1 As shown, it includes a notch filter selection circuit and a flatness improvement circuit; wherein the notch filter selection circuit is a circuit structure within the dotted line frame, and the flatness improvement circuit is a circuit structure outside the dotted line frame.

[0033] The trap selection circuit comprises a single-pole double-throw switch pair and a trap, wherein the single-pole double-throw switch pair comprises a first single-pole double-throw switch and a second single-pole double-throw switch placed in a mirror image, and the single-pole double-throw switch pair selects a through path or a trap path through a control code;

[0034] The flatness improvement circuit includes a plurality of matching circuits and a plurality of equalizing circuits, the output end of the first single-pole double-throw switch and the input end of the second single-pole double-throw switch are connected through a second matching circuit, a wave trap, a third matching circuit and a first equalizing circuit, and the two ends of the wave trap are respectively connected to the second matching circuit and the third matching circuit; the input end of the first single-pole double-throw switch is connected to the output end of the first matching circuit; the output end of the second single-pole double-throw switch is connected to the input end of the fourth matching circuit;

[0035] The first equalizing circuit is located at the input end of the second matching circuit or the output end of the third matching circuit, and the second equalizing circuit is located at the input end of the first matching circuit or the output end of the fourth matching circuit.

[0036] In some embodiments, the trap selection circuit adopts a method of connecting two single-pole double-throw switches and a trap in series, wherein the two single-pole double-throw switches are respectively a first single-pole double-throw switch and a second single-pole double-throw switch, wherein an RF output end of the first single-pole double-throw switch is connected to one end of the trap, and the other end of the trap is connected to an RF input end of the second single-pole double-throw switch, and the first single-pole double-throw switch and the second single-pole double-throw switch each have one remaining RF pin, and the two pins are interconnected to form a straight-through path.

[0037] In some embodiments of the present application, in order to improve the passband flatness of the notch filter selection circuit, the present embodiment combines the selection circuit with the equalization and matching circuit to form a switch notch component passband flatness improvement circuit. The flatness improvement circuit is implemented by four matching circuits and two equalization circuits, and the four matching circuits are respectively named as the first matching circuit, the second matching circuit, the third matching circuit and the fourth matching circuit; the two equalization circuits are respectively named as the first equalization circuit and the second equalization circuit.

[0038] Among them, one end of the first matching circuit serves as the circuit input end, and the other end is connected to an RF input end of the first single-pole double-throw switch; one end of the second matching circuit is connected to an RF output end of the first single-pole double-throw switch, and the other end is connected to one end of the trap; one end of the third matching circuit is connected to one end of the trap, and the other end is connected to the input end of the first equalizing circuit, the other end of the first equalizing circuit is connected to the RF input end of the second single-pole double-throw switch, the RF output end of the second single-pole double-throw switch is connected to the input end of the second equalizing circuit, the output end of the second equalizing circuit is connected to the input end of the fourth matching circuit, and the output end of the fourth matching circuit serves as the circuit output end.

[0039] For ease of explanation, the flatness improvement circuit includes four matching circuits and two equalizing circuit modules, wherein the first matching circuit and the fourth matching circuit respectively solve the mismatch problem between the RF input and output ports and the first single-pole double-throw switch and the second single-pole double-throw switch, and the second matching circuit and the third matching circuit improve the standing waves at the two ports of the trap. When the circuit selects the direct-through path, the second equalizing circuit compensates for the loss in the direct-through path caused by the switch and the coaxial line; when the circuit selects the trap path, the first equalizing circuit improves the passband flatness of this path. Therefore, when the switch selects the direct-through or trap path, the passband flatness on both paths is improved. In some embodiments of the present application, the trap selection circuit in the present invention is as follows: Figure 2As shown, two single-pole double-throw switches form a group of single-pole double-throw switch pairs, the single-pole double-throw switch on the left is the first single-pole double-throw switch of the present invention, and the single-pole double-throw switch on the right is the second single-pole double-throw switch of the present invention. A group of single-pole double-throw switches are connected through a trap filter or a direct connection; a group of single-pole double-throw switch pairs are all controlled by the same control signal, the input end of one single-pole double-throw switch is used as the circuit input end, and the output end of the other single-pole double-throw switch is used as the circuit output end.

[0040] In some embodiments of the present application, when n notch filters need to be selected to work individually or simultaneously in the circuit, a single notch filter selection circuit can be expanded to n notch filter selection circuits, such as Figure 3 As shown. Usually, the frequency range that the notch filter needs to suppress is wide, the number of orders is large, and the volume is large, which makes the straight-through pins between each pair of single-pole double-throw switches far apart. When the length of the microstrip line is greater than 1 / 10λ, the effect of the microstrip line length on the impedance cannot be ignored. Usually, the matching of capacitance, resistance and inductance is suitable for narrow-band matching. The passband frequency band of the switch notch component is wide, so it is difficult to achieve matching within the entire passband. The present invention introduces a direct multi-stage series layout method. Two single-pole double-throw switches are placed in mirror images at both ends of the notch filter, and the straight-through uses coaxial cables instead of microstrip lines. In addition to the advantages of simplicity and small space occupation, this layout method can also avoid problems such as large losses and easy mismatch caused by long microstrip lines.

[0041] In some embodiments of the present application, the control code can be implemented by an external control signal, for example, there are n groups of control signals corresponding to K0, K1, ..., Kn-1, each group of control signals can control the single-pole double-throw switch pair to select access to the direct path or the notch filter path, for example, K0 = 0 means that the single-pole double-throw switch pair of the first group is directly connected. In some embodiments of the present application, the first equalization circuit can adjust the passband flatness in the notch filter path, so the first equalization circuit is set in the notch filter path to achieve frequency balance, improve filtering effect, optimize signal quality and enhance circuit stability; the second equalization circuit can compensate for the loss caused by the direct connection between the switch and the coaxial line in the direct path, so the second equalization circuit has a significant effect on improving the flatness of the single-pole double-throw switch pair in the total path.

[0042] It should be noted that the purpose of setting the second matching circuit and the third matching circuit at both ends of the notch filter is to improve the standing waves at the two ports of the notch filter to achieve impedance matching, improve the stability of the notch filter and optimize the signal quality. In order to ensure impedance matching with the input and output ends of the notch filter, the first equalizing circuit needs to be arranged outside the second matching circuit and the third matching circuit. Therefore, the first equalizing circuit can be arranged before the input end of the second matching circuit or after the output end of the third matching circuit.

[0043] In some embodiments, Figure 4 As shown, the first equalization circuit and the second equalization circuit both include parallel inductors and capacitors, and resistors connected in parallel and then in series. The parallel L and C are connected in series with a resistor R. By adjusting the resistor value R, the low frequency with low loss can be adjusted to the same as the high frequency loss, and then L and C are adjusted to make the fluctuation in the entire passband smooth; the passband flatness of the through path is adjusted by the first equalization subcircuit, which is similar to the through path passband flatness debugging method, and the passband flatness of the notch filter path is adjusted by the second equalization subcircuit. This embodiment shows that this circuit structure can systematically optimize and improve the in-band fluctuation of the switch notch component.

[0044] Of course, it can be understood that the trap selection circuit includes multiple stages of single-pole double-throw switch pairs and traps connected in series, that is, the trap selection circuit can be composed of multiple stages of single-pole double-throw switch pairs and traps connected in series; similarly, the flatness improvement circuit includes multiple matching circuits and multiple equalizing circuits corresponding to the multiple stages connected in series; or multiple matching circuits corresponding to the multiple stages connected in series and multiple equalizing circuits less than the corresponding multiple stages.

[0045] In some embodiments, the single-pole double-throw switch is connected to the input end and the output end through respective matching circuits such as the first matching circuit and the fourth matching circuit; the single-pole double-throw switch is connected to the two ends of the wave trap through respective matching circuits such as the second matching circuit and the third matching circuit. The first matching circuit and the fourth matching circuit are mainly used to solve the mismatch problem between the single-pole double-throw switch pairs, and the second matching circuit and the third matching circuit are mainly used to solve the standing wave problem at both ends of the wave trap. Those skilled in the art can use existing matching circuits that can solve the above problems; therefore, the present invention does not specifically limit the matching circuit.

[0046] It can be understood that in the main circuit of the single-pole double-throw switch pair, when the straight-through path is selected for signal transmission, the equalization circuit will play a key role to compensate for the loss introduced by the switch and the coaxial line in the straight-through path. This design is intended to ensure the quality and integrity of the signal during transmission. Through the adjustment of the second equalization circuit, the signal attenuation caused by the switch switching and the coaxial line transmission can be effectively compensated, thereby maintaining the stable transmission of the signal in the straight-through path. Therefore, the second equalization circuit can be set at the input end or output end of the main circuit signal of the single-pole double-throw switch pair; considering the mismatch between the RF input and output ports in the main circuit of the single-pole double-throw switch pair and the first single-pole double-throw switch and the second single-pole double-throw switch. By setting the first matching circuit or / and the fourth matching circuit, it can be ensured that a good matching relationship is always maintained under different paths; in order to maintain this good matching relationship, the second equalization circuit is set at the input end of the first matching circuit or the output end of the fourth matching circuit.

[0047] In some embodiments of the present application, in order to further demonstrate the feasibility of the circuit structure in actual debugging and the improvement of the passband flatness of the component after debugging, Figure 1 The two flatness improvement circuits are cascaded to form a switch notch component that can select two notch filters to work, such as Figure 5-8 As shown, they correspond to a circuit structure without an equalizing circuit, a circuit structure with an equalizing circuit added to the first stage, a circuit structure with an equalizing circuit added to the second stage, and a circuit structure with equalizing circuits added to both the first stage and the second stage.

[0048] Take the through path in the circuit as an example. Fig. 9 The parameter diagrams of the two-stage notch filter component without equalization when selecting the direct pass, equalization of the first and second stages respectively, and equalization circuits of both stages are compared. In the cascade circuit, part of the matching circuit can be omitted. It can be seen from the figure that according to the circuit structure of the present invention, the passband flatness of the direct pass of the component can be controlled to about 1dB by finding the appropriate capacitance, resistance and inductance values. Similar to the direct pass theory, the notch filter path can also improve the flatness in the passband in the same way.

[0049] In a preferred embodiment of the present invention, Fig.10 This is the S parameter diagram of the equalizing circuit; it shows the influence of different R, L, and C values ​​on the equalizing circuit. The S21 parameter of the equalizing circuit has high loss at low frequencies and low loss at high frequencies. The resistance value R mainly affects the loss value at low frequencies. The larger the resistance value, the greater the low-frequency loss. The inductance value L affects the slope of change from low frequency to high frequency. The smaller the L value, the slower the change. The capacitance value C has the same influence as L. There is also a broken line in the figure, which is the fluctuation value within the range of 0 to 2dB after the S parameter of the second-level un-equalized circuit is shifted upward by 8dB. The figure shows that the fluctuation of the component is opposite to the change trend of the equalizing circuit. Therefore, the superposition of the two can reduce the in-band fluctuation of the component.

[0050] In order to find the appropriate capacitance, resistance and inductance, this embodiment selects the appropriate resistance value R according to the high-frequency loss of the circuit structure, so that the low-frequency loss is roughly equal to the high-frequency loss, and then adjusts the inductance and capacitance of the equalization circuit to minimize the high-frequency loss. Since the microstrip line is capacitive with the ground, and the capacitance and inductance have the same influence on the equalization circuit, the present invention designs a priority, by first adjusting the resistance, then adjusting the inductance, and finally adjusting the capacitance, if necessary, the capacitance does not need to be adjusted, so as to achieve the purpose of quickly determining the optimal resistance, inductance and capacitance as much as possible, and the circuit structure corresponding to the optimal resistance, inductance and capacitance to improve the passband flatness of the switch notch component has a relatively small in-band fluctuation.

[0051] In the description of the present invention, it is necessary to understand that the terms "coaxial", "bottom", "one end", "top", "middle", "the other end", "upper", "one side", "top", "inside", "outside", "front", "center", "both ends" and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the referred device or element must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present invention.

[0052] Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present invention, and that the scope of the present invention is defined by the appended claims and their equivalents.

Claims

1. A circuit structure for improving the flatness of a switch trap component, characterized in that: Including notch filter selection circuit and flatness improvement circuit; The trap selection circuit comprises a single-pole double-throw switch pair and a trap, wherein the single-pole double-throw switch pair comprises a first single-pole double-throw switch and a second single-pole double-throw switch placed in a mirror image, and the single-pole double-throw switch pair selects a through path or a trap path through a control code; The flatness improvement circuit includes a plurality of matching circuits and a plurality of equalizing circuits, the output end of the first single-pole double-throw switch and the input end of the second single-pole double-throw switch are connected through a second matching circuit, a wave trap, a third matching circuit and a first equalizing circuit, and the two ends of the wave trap are respectively connected to the second matching circuit and the third matching circuit; the input end of the first single-pole double-throw switch is connected to the output end of the first matching circuit; the output end of the second single-pole double-throw switch is connected to the input end of the fourth matching circuit; The first equalizing circuit is located at the input end of the second matching circuit or the output end of the third matching circuit, and the second equalizing circuit is located at the input end of the first matching circuit or the output end of the fourth matching circuit.

2. A circuit structure for improving the flatness of a switch trap component according to claim 1, characterized in that: The trap selection circuit includes multiple stages of single-pole double-throw switch pairs and traps connected in series.

3. A circuit structure for improving the flatness of a switch trap component according to claim 2, characterized in that: The output end of the second single-pole double-throw switch of the trap filter selection circuit of the previous stage is connected to the input end of the first single-pole double-throw switch of the trap filter selection circuit of the next stage.

4. A circuit structure for improving the flatness of a switch trap component according to claim 2, characterized in that: The flatness improvement circuit includes a plurality of matching circuits connected in series corresponding to the multiple stages and a plurality of equalizing circuits connected in series corresponding to the multiple stages; or a plurality of matching circuits connected in series corresponding to the multiple stages and a plurality of equalizing circuits less than the corresponding multiple stages.

5. A circuit structure for improving the flatness of a switch trap component according to claim 1, characterized in that: The through paths of the single-pole double-throw switch pair are directly connected via a coaxial cable.

6. A circuit structure for improving the flatness of a switch trap component according to claim 1, characterized in that: The first equalizing circuit and the second equalizing circuit both include an inductor and a capacitor connected in parallel, and a resistor connected in parallel and then in series.

7. A circuit structure for improving the flatness of a switch trap component according to claim 6, characterized in that: The inductance, the capacitance and the resistance are adjustable.