Integrated photoelectric relay and manufacturing method thereof

Abstract

The invention relates to an integrated photoelectric relay and a manufacturing method thereof. The manufacturing method of the integrated photoelectric relay comprises the steps that a low-doping substrate is used, a first P-N structure, a second P-N structure and an N-P-N structure are formed on an epitaxial layer, and the epitaxial layer is divided into a high-voltage area and a low-voltage area which are electrically isolated from each other through dry etching. Next, an isolation layer is deposited on the epitaxial layer, mask etching is performed to generate a plurality of patterns, a metal layer is deposited, a light emitting diode is formed on the first P-N structure based on the patterns, a photodiode is formed on the second P-N structure, and at least one metal oxide semiconductor field effect transistor is formed on the N-P-N structure. All elements of the integrated photoelectric relay are manufactured on the same substrate by using the same manufacturing process, the withstand voltage of the alternating current switch can be greatly improved without additional elements, the chip area is reduced, and meanwhile, the module cost is reduced.

Description

Technical Field

[0001] The present invention relates to an integrated photoelectric relay and a manufacturing method thereof. Specifically, the present invention uses the same manufacturing process to manufacture the components of the integrated photoelectric relay on the same low-doped silicon carbide substrate. Background Art

[0002] Currently, MOS relays are mostly made of silicon substrates, and the light-emitting end, i.e., the light-emitting diode (LED), is made through the GaAs manufacturing process, while the light-receiving end, i.e., the photodiode (PD) and the metal-oxide-semiconductor field-effect transistor (MOSFET), are optical sensors and AC switches made of silicon. Therefore, two separate chips need to be used, and two different manufacturing processes are combined, which will lead to packaging complexity and low efficiency.

[0003] In addition, the voltage withstand capability of the output end of a conventional silicon photogate is limited. Without the addition of an additional silicon carbide component, the output end can only withstand a voltage of about 800 volts to 900 volts at most.

[0004] In view of this, the present invention provides an integrated silicon carbide photoelectric relay to improve the withstand voltage and simplify the manufacturing process. Summary of the invention

[0005] The purpose of the present invention is to provide an integrated photoelectric relay and a manufacturing method thereof. The integrated photoelectric relay uses a low-doped silicon carbide substrate, and the light-emitting element (i.e., light-emitting diode) and the light-receiving element (i.e., photodiode) required for the integrated photoelectric relay are manufactured on the same silicon carbide substrate to simplify the manufacturing process. Therefore, the withstand voltage of the AC switch can be greatly increased to 1700 volts without the need for additional components, and the chip area can be reduced, while reducing the module cost.

[0006] To achieve the above-mentioned purpose, the present invention discloses an integrated photoelectric relay, which is connected to an input circuit and an output circuit, and includes a substrate, an epitaxial layer, an isolation layer, a light emitting diode (LED), a blue-ultraviolet light reflecting film, a photodiode (PD), a first metal oxide semiconductor field effect transistor (MOSFET) and a second metal oxide semiconductor field effect transistor. The epitaxial layer is formed on the substrate. The epitaxial layer forms a groove to divide the epitaxial layer into a high voltage area and a low voltage area. The high voltage area and the low voltage area are electrically isolated from each other. The isolation layer is formed on the epitaxial layer. The light emitting diode is formed in the low voltage area of ​​the epitaxial layer to receive an input signal from the input circuit and generate a light in response to the input signal. The blue-ultraviolet light reflecting film is used to reflect the light to form a reflected light. The photodiode is formed in the high voltage area of ​​the epitaxial layer to sense the reflected light and generate an induced voltage. The first metal oxide semiconductor field effect transistor is formed in the high voltage region of the epitaxial layer and is electrically connected to the photodiode, so as to be driven in response to the induced voltage and generate a first output current to the output circuit. The second metal oxide semiconductor field effect transistor is formed in the high voltage region of the epitaxial layer and is electrically connected to the photodiode, so as to be driven in response to the induced voltage and generate a second output current to the output circuit. The light emitting diode, the photodiode, the first metal oxide semiconductor field effect transistor and the second metal oxide semiconductor field effect transistor are formed adjacent to each other above the substrate.

[0007] In one embodiment, the substrate is made of silicon carbide (SiC), and the substrate is doped with a low ion concentration.

[0008] In one embodiment, the blue-ultraviolet light reflecting film is plated on the isolation layer, and the integrated photoelectric relay is encapsulated by a packaging glue. The light is transmitted to the blue-ultraviolet light reflecting film through the isolation layer, and is reflected to the photodiode by the blue-ultraviolet light reflecting film.

[0009] In one embodiment, the integrated photoelectric relay is packaged with a packaging glue, and the blue-ultraviolet light reflecting film is plated on an outer surface of the packaging glue. The light is transmitted to the blue-ultraviolet light reflecting film through the packaging glue, and is reflected to the photodiode by the blue-ultraviolet light reflecting film.

[0010] In one embodiment, the integrated photoelectric relay is packaged in a metal shell, and the blue-ultraviolet light reflecting film is plated on an inner surface of the metal shell. The light is transmitted to the blue-ultraviolet light reflecting film through air inside the metal shell, and is reflected to the photodiode by the blue-ultraviolet light reflecting film.

[0011] In one embodiment, the epitaxial layer is N-type doped.

[0012] In one embodiment, a wavelength of the light is between 300 nanometers and 500 nanometers.

[0013] In one embodiment, the integrated photoelectric relay further includes a control circuit electrically connected to the photodiode and a first gate of the first metal oxide semiconductor field effect transistor and a second gate of the second metal oxide semiconductor field effect transistor, for controlling a first voltage response time of the first metal oxide semiconductor field effect transistor and a second voltage response time of the second metal oxide semiconductor field effect transistor.

[0014] In addition, the present invention also discloses a method for manufacturing an integrated photoelectric relay, comprising: growing an epitaxial layer on a substrate; injecting a plurality of ions into the epitaxial layer to form a first PN structure, a second PN structure and an NPN structure in the epitaxial layer; performing a dry etching to form a groove in the epitaxial layer, wherein the groove divides the epitaxial layer into a high-voltage region and a low-voltage region, wherein the high-voltage region and the low-voltage region are electrically isolated from each other; depositing an isolation layer on the epitaxial layer and the groove; performing a mask etching to generate a plurality of patterns; and depositing a metal layer to form a light emitting diode (LED) in the first PN structure based on the pattern, a photodiode (PD) in the second PN structure, and a first metal oxide semiconductor field effect transistor (MOSFET) and a second metal oxide semiconductor field effect transistor in the NPN structure.

[0015] In one embodiment, the integrated photoelectric relay manufacturing method further comprises: coating the isolation layer with a blue-ultraviolet light reflecting film; and packaging the integrated photoelectric relay with a packaging glue.

[0016] In one embodiment, the light is transmitted to the blue-ultraviolet light reflecting film through the isolation layer, and is reflected by the blue-ultraviolet light reflecting film to the photodiode.

[0017] In one embodiment, the integrated photoelectric relay manufacturing method further comprises: encapsulating the integrated photoelectric relay with a packaging glue; and coating a blue-ultraviolet light reflecting film on an outer surface of the packaging glue.

[0018] In one embodiment, the light is transmitted to the blue-ultraviolet light reflecting film through the packaging glue, and is reflected by the blue-ultraviolet light reflecting film to the photodiode.

[0019] In one embodiment, the integrated photoelectric relay manufacturing method further includes: encapsulating the integrated photoelectric relay with a metal shell; and coating a blue-ultraviolet light reflecting film on an inner surface of the metal shell.

[0020] In one embodiment, the light is transmitted to the blue-ultraviolet light reflecting film through air inside the metal shell, and is reflected to the photodiode by the blue-ultraviolet light reflecting film.

[0021] In one embodiment, the substrate is made of silicon carbide (SiC), and the substrate is doped with a low ion concentration.

[0022] In one embodiment, the integrated photoelectric relay manufacturing method further includes: electrically connecting a control circuit to the photodiode and a first gate of the first metal oxide semiconductor field effect transistor and a second gate of the second metal oxide semiconductor field effect transistor; and when the photodiode generates an induced voltage, controlling a first voltage response time of the first metal oxide semiconductor field effect transistor and a second voltage response time of the second metal oxide semiconductor field effect transistor through the control circuit.

[0023] After referring to the accompanying drawings and the embodiments described below, a person skilled in the art will be able to understand other objects of the present invention, as well as the technical means and implementation schemes of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] Figure 1 It is a circuit diagram of the integrated photoelectric relay of the present invention;

[0025] Figure 2 A cross-sectional view of the manufacturing process of the integrated photoelectric relay of the present invention;

[0026] Figure 3 A cross-sectional view of the manufacturing process of the integrated photoelectric relay of the present invention;

[0027] Figure 4 A cross-sectional view of the manufacturing process of the integrated photoelectric relay of the present invention;

[0028] Figure 5 A cross-sectional view of the manufacturing process of the integrated photoelectric relay of the present invention;

[0029] Figure 6 A cross-sectional view of the manufacturing process of the integrated photoelectric relay of the present invention;

[0030] Figure 7 A cross-sectional view of the manufacturing process of the integrated photoelectric relay of the present invention;

[0031] Figure 8 A top view of the integrated photoelectric relay circuit layout of the present invention;

[0032] Fig. 9 It is a cross-sectional view of the integrated photoelectric relay of the present invention after packaging;

[0033] Fig.10 It is a cross-sectional view of the integrated photoelectric relay of the present invention after packaging;

[0034] Fig.11 It is a cross-sectional view of the integrated photoelectric relay of the present invention after packaging;

[0035] Fig.12 is a schematic diagram of a control circuit for an integrated photoelectric relay of the present invention; and

[0036] Fig.13 The figure is a flow chart of the manufacturing method of the integrated photoelectric relay of the present invention.

[0037] Description of Reference Numerals

[0038] 100: Integrated photoelectric relay

[0039] 110: Light Emitting Diode

[0040] 111: Light

[0041] 113: Reflected Light

[0042] 130: Photodiode

[0043] 150: First metal oxide semiconductor field effect transistor

[0044] 151: First gate

[0045] 153: First Source

[0046] 155: First drain

[0047] 170: Second metal oxide semiconductor field effect transistor

[0048] 171: Second gate

[0049] 173: Second source

[0050] 175: Second drain

[0051] 191: Substrate

[0052] 192: Epitaxial layer

[0053] 1921: First PN structure

[0054] 1922: Second PN structure

[0055] 1923: NPN structure

[0056] 1924: Grooves

[0057] 1925: Low Pressure Area

[0058] 1926: High Pressure Area

[0059] 194: Isolation layer

[0060] 195: Metal layer

[0061] 200: Input circuit

[0062] 300: Output circuit

[0063] 400: Packaging glue

[0064] 500: Blue UV reflective film

[0065] 600: Metal shell

[0066] 700: Control circuit

[0067] S1302-S1312: steps. DETAILED DESCRIPTION

[0068] The present invention will be explained below through embodiments. The embodiments of the present invention are not intended to limit the present invention to any specific environment, application or special method as described in the embodiments. Therefore, the description of the embodiments is only for the purpose of explaining the present invention, and is not intended to limit the present invention. It should be noted that in the following embodiments and drawings, elements that are not directly related to the present invention have been omitted and not shown, and the dimensional relationship between the elements in the drawings is only for easy understanding, and is not intended to limit the actual proportion.

[0069] Please refer to the first embodiment of the present invention Figures 1 to 8 . Figure 1Schematic diagram of the circuit of the integrated photoelectric relay 100 of the present invention. The integrated photoelectric relay 100 is connected to an input circuit 200 and an output circuit 300. The integrated photoelectric relay 100 includes a light emitting diode (LED) 110, a photodiode (PD) 130 in series, a first metal oxide semiconductor field effect transistor (MOSFET) 150, and a second metal oxide semiconductor field effect transistor 170. The first metal oxide semiconductor field effect transistor 150 has a first gate 151, a first source 153, and a first drain 155. The second metal oxide semiconductor field effect transistor 170 has a second gate 171, a second source 173, and a second drain 175.

[0070] The light emitting diode 110 receives an input signal from the input circuit 200 and generates a light 111 in response to the input signal. The light 111 is reflected to form a reflected light 113. When the photodiode 130 series senses the reflected light 113, an induced current is generated and a voltage difference is generated between the two ends of the series, which is used to control the first gate 151 of the first metal oxide semiconductor field effect transistor 150 and the second gate 171 of the second metal oxide semiconductor field effect transistor 170.

[0071] Compared with the photoelectric relay in the prior art, one chip is required to make a light-emitting diode, and another chip is required to make a photodiode and a metal oxide semiconductor field effect transistor. In other words, the prior art requires at least two chips to make a photoelectric relay. Since the chip for making a light-emitting diode is different from the chip for making a photodiode and a metal oxide semiconductor field effect transistor, the manufacturing process for making a light-emitting diode is also different from the manufacturing process for making a photodiode and a metal oxide semiconductor field effect transistor. In addition, the output voltage of the traditional photoelectric relay using a silicon substrate is limited. When it is not equipped with an additional silicon carbide component, the maximum voltage resistance is only 800 volts to 900 volts.

[0072] In order to simplify the manufacturing process and reduce the overall product cost, while improving the off-state voltage, the present invention proposes to manufacture the light-emitting element (i.e., light-emitting diode) and the light-receiving element (i.e., photodiode) required for the photoelectric relay on the same silicon carbide substrate to simplify the manufacturing process. Figures 2 to 8 ,in Figures 2 to 7 They are cross-sectional views of the integrated photoelectric relay 100 at different stages of the manufacturing process. Figure 81 is a top view of the circuit layout of the integrated photoelectric relay 100. In the process of manufacturing the integrated photoelectric relay 100 of the present invention, an epitaxial layer 192 is first grown on a substrate 191, and a plurality of ions are implanted into the epitaxial layer 192 to form a first PN structure 1921, a second PN structure 1922 and an NPN structure 1923 in the epitaxial layer 192. Figure 2 and Figure 3 shown.

[0073] The substrate 191 is made of silicon carbide (SiC) doped with low ion concentration, and its ion concentration is generally less than 1E15 (1 / cm 3 ). Silicon carbide has different crystal structures, such as hexagonal silicon carbide (6H-SiC), tetragonal silicon carbide (4H-SiC) and cubic silicon carbide (3C-SiC). Silicon carbide has high temperature stability, high electron mobility, high voltage tolerance and excellent thermal conductivity. Therefore, compared with the prior art photoelectric relay made of silicon substrate, the present invention uses silicon carbide to make the integrated photoelectric relay 100, which can greatly improve the withstand voltage of the AC switch.

[0074] In this embodiment, the epitaxial layer 192 itself is N-type doped. The ions can be N-type ions or P-type ions. For details, please refer to Figure 3 ,exist Figure 3 The oblique line portion is a P-type doping region, and the gray portion is an N-type doping region. The first PN structure 1921 is a PN structure formed by a P-type doping region formed by implanting P-type ions into an N-type epitaxial layer through ion implantation and an N-type epitaxial layer. The second PN structure 1922 is also a PN structure formed by implanting P-type ions into an N-type epitaxial layer and then into a P-type doping region through ion implantation, and then implanting N-type ions into the P-type doping region again through ion implantation. Similar to the manufacturing method of the second PN structure 1922, the NPN structure 1923 is an NPN structure formed by first implanting P-type ions into an N-type epitaxial layer and then into a P-type doping region through ion implantation, and then implanting N-type ions into two different regions in the P-type doping region again through ion implantation.

[0075] Next, please refer to Figure 4, a dry etching is performed to form a groove 1924 in the epitaxial layer 192. Dry etching uses plasma to selectively remove material from the surface of the wafer. The groove 1924 divides the epitaxial layer 192 into a low-voltage area 1925 and a high-voltage area 1926. In order to electrically isolate the low-voltage area 1925 and the high-voltage area 1926 from each other, the depth of the dry etching needs to reach the position of the substrate 191 and expose the surface of the substrate 191. In this case, the low-voltage area 1925 and the high-voltage area 1926 are connected only through the substrate 191. Since the substrate 191 is a substrate doped with a low ion concentration, the electrical resistance of the substrate 191 is high. In other words, the substrate 191 can prevent the low-voltage area 1925 and the high-voltage area 1926 from producing electrical changes, so that the low-voltage area 1925 and the high-voltage area 1926 are completely electrically isolated.

[0076] After the dry etching is completed, an isolation layer 194 is deposited on the epitaxial layer 192 and the trench 1924, and a mask etching is performed to generate a plurality of patterns (not shown), and a metal layer 195 is deposited to form a light emitting diode 110 in the first PN structure 1921, a photodiode 130 in the second PN structure 1922, and a first metal oxide semiconductor field effect transistor 150 and a second metal oxide semiconductor field effect transistor 170 in the NPN structure 1923 based on these patterns. Figure 5 and Figure 6 shown.

[0077] In this embodiment, the isolation layer 194 is formed by chemical vapor deposition, physical vapor deposition, sputtering or other deposition methods during the manufacturing process. The material for making the isolation layer 194 can be silicon dioxide (SiO 2 ) or silicon nitride (Si 3 N 4 ). Silicon dioxide and silicon nitride are insulating materials, and when used to make the isolation layer 194 , they are mainly used to prevent current from flowing between different crystal regions, for example, between the low voltage region 1925 and the high voltage region 1926 .

[0078] The pattern generated by photomask etching corresponds to the first PN structure 1921, the second PN structure 1922 and the NPN structure 1923. Figure 6 Therefore, after the metal layer 195 is deposited, a light emitting diode 110 is formed in the first PN structure 1921, a photodiode 130 is formed in the second PN structure 1922, and a first metal oxide semiconductor field effect transistor 150 and a second metal oxide semiconductor field effect transistor 170 are formed in the NPN structure 1923. Figure 7 and Figure 8 shown.

[0079] The light emitting diode 110 is formed in the low voltage region 1925 of the epitaxial layer 192, and is used to receive an input signal from the input circuit and generate light 111 in response to the input signal. The photodiode 130 is formed in the high voltage region 1926 of the epitaxial layer 192, and is used to sense the reflected light 113 and generate an induced voltage. The first metal oxide semiconductor field effect transistor 150 is formed in the high voltage region 1926 of the epitaxial layer 192, and is electrically connected to the photodiode 130, and is driven in response to the induced voltage and generates a first output current to the output circuit 300. The second metal oxide semiconductor field effect transistor 170 is formed in the high voltage region 1926 of the epitaxial layer 192, and is electrically connected to the photodiode 130, and is driven in response to the induced voltage and generates a second output current to the output circuit 300.

[0080] It can be seen that the light emitting diode 110, the photodiode 130, the first metal oxide semiconductor field effect transistor 150 and the second metal oxide semiconductor field effect transistor 170 are manufactured on the same substrate 191 using the same manufacturing process, and are formed adjacent to each other on the substrate 191. Therefore, the present invention can significantly increase the withstand voltage of the AC switch to more than 1700 volts (V) without the need for additional components, which can not only reduce the chip area, but also reduce the module cost (BOMcost).

[0081] The second embodiment of the present invention can be found in Fig. 9 , which depicts a cross-sectional view of the integrated photoelectric relay 100. The second embodiment is an extension of the first embodiment. In this embodiment, the method of packaging the integrated photoelectric relay 100 will be further described. Specifically, the integrated photoelectric relay 100 is packaged with a pair of blue-violet light transparent packaging glue 400, and a blue-ultraviolet light reflecting film 500 is plated on an outer surface of the packaging glue 400. The blue-ultraviolet light reflecting film 500 is used to reflect the light 111 to form reflected light 113. Therefore, the light 111 emitted by the light-emitting diode 110 will be transmitted to the blue-ultraviolet light reflecting film 500 through the packaging glue 400, and reflected to the photodiode 130 through the blue-ultraviolet light reflecting film 500. The light 111 emitted by the light-emitting diode 110 is mainly blue light to ultraviolet light, and the wavelength of the light 111 is between 300 nanometers and 500 nanometers.

[0082] Please refer to the third embodiment of the present invention Fig.10, which depicts a cross-sectional view of another embodiment of the integrated photoelectric relay 100. The third embodiment is an extension of the first embodiment. Different from the second embodiment, in this embodiment, the blue-ultraviolet light reflective film 500 is first plated on the isolation layer 194, and then the integrated photoelectric relay 100 is encapsulated by the encapsulation glue 400. Therefore, the light 111 emitted by the light emitting diode 110 is transmitted to the blue-ultraviolet light reflective film 500 through the isolation layer 194, and is reflected to the photodiode 130 by the blue-ultraviolet light reflective film 500.

[0083] Please refer to the fourth embodiment of the present invention Fig.11 , which depicts a cross-sectional view of the integrated photoelectric relay 100. The fourth embodiment is an extension of the first embodiment. Different from the second and third embodiments, in this embodiment, the integrated photoelectric relay 100 is first packaged with a metal shell 600, and then the blue-ultraviolet light reflective film 500 is plated on an inner surface of the metal shell, and the inside of the metal shell is not filled with packaging glue. Therefore, the light emitted by the light emitting diode is transmitted to the blue-ultraviolet light reflective film through the air inside the metal shell, and is reflected to the photodiode by the blue-ultraviolet light reflective film.

[0084] Please refer to the fifth embodiment of the present invention Fig.12 , which is a schematic diagram of a control circuit 700 for an integrated photoelectric relay of the present invention. The fifth embodiment is an extension of the first embodiment. The control circuit 700 includes at least one metal oxide semiconductor field effect transistor 710, at least one resistor 730 and at least one diode 750. The circuit diagram is shown in FIG. Fig.12 The control circuit 700 is electrically connected to the photodiode 130, the first gate 151 of the first metal oxide semiconductor field effect transistor 150, and the second gate 171 of the second metal oxide semiconductor field effect transistor 170, and is used to control a first voltage response time of the first metal oxide semiconductor field effect transistor 150 and a second voltage response time of the second metal oxide semiconductor field effect transistor 170. In addition, during the manufacturing process, the control circuit 700, the light emitting diode 110, the photodiode 130, the first metal oxide semiconductor field effect transistor 150, and the second metal oxide semiconductor field effect transistor 170 are manufactured on the same silicon carbide substrate 191 using the same manufacturing process.

[0085] Please refer to the sixth embodiment of the present invention Fig.13 , which is a flow chart of the integrated photoelectric relay manufacturing method of the present invention. The integrated photoelectric relay manufacturing method is applicable to manufacturing the integrated photoelectric relay 100 of the aforementioned embodiment. The integrated photoelectric relay manufacturing method is performed using a variety of different semiconductor equipment, such as: deposition equipment, ion implantation machine, photolithography machine, etching equipment, cleaning equipment, sputtering machine, testing equipment and packaging equipment, etc., but is not limited thereto.

[0086] First, in step S1302, an epitaxial layer is grown on a substrate, for example: Figures 2 to 7 The substrate 191 and the epitaxial layer 192 are shown. The substrate is made of silicon carbide and is doped with a low ion concentration. In step S1304, multiple ions are implanted into the epitaxial layer to form a first PN structure, a second PN structure and an NPN structure in the epitaxial layer. In step S1306, a dry etching is performed to form a groove in the epitaxial layer. The groove divides the epitaxial layer into a high-voltage region and a low-voltage region. The high-voltage region and the low-voltage region are electrically isolated from each other.

[0087] Then, in step S1308, an isolation layer is deposited on the epitaxial layer and the trench. In step S1310, a mask etching is performed to generate a plurality of patterns. In step S1312, a metal layer is deposited to form a light emitting diode in the first PN structure, a photodiode in the second PN structure, and a first metal oxide semiconductor field effect transistor and a second metal oxide semiconductor field effect transistor in the NPN structure based on the patterns.

[0088] In one embodiment, an integrated photoelectric relay is encapsulated with a packaging glue, and a blue-ultraviolet light reflecting film is plated on an outer surface of the packaging glue. Light is transmitted to the blue-ultraviolet light reflecting film through the packaging glue, and is reflected by the blue-ultraviolet light reflecting film to the photodiode, as described in the second embodiment and Fig. 9 shown.

[0089] In other embodiments, the ultraviolet blue light reflective film is first plated on the isolation layer, and then the integrated photoelectric relay is encapsulated with encapsulation glue. In this case, the light is transmitted to the ultraviolet blue light reflective film through the isolation layer, and is reflected by the ultraviolet blue light reflective film to the photodiode, as described in the third embodiment and Fig.10 shown.

[0090] In other embodiments, the integrated photoelectric relay is packaged in a metal shell, and a blue-ultraviolet light reflective film is plated on an inner surface of the metal shell. Therefore, light is transmitted to the blue-ultraviolet light reflective film through the air inside the metal shell, and is reflected to the photodiode by the blue-ultraviolet light reflective film, as described in the fourth embodiment and Fig.11 shown.

[0091] In addition, in other embodiments, the integrated photoelectric relay manufacturing method of the present invention further electrically connects a control circuit to the photodiode and a first gate of the first metal oxide semiconductor field effect transistor and a second gate of the second metal oxide semiconductor field effect transistor. When the photodiode generates an induced voltage, a first voltage response time of the first metal oxide semiconductor field effect transistor and a second voltage response time of the second metal oxide semiconductor field effect transistor are controlled by the control circuit.

[0092] In addition to the above steps, the integrated photoelectric relay manufacturing method of this embodiment can also perform all operations described in the above embodiments and have all corresponding functions. Ordinary technicians in the relevant technical field can directly understand how this embodiment performs these operations and has these functions based on the above embodiments, so it is not repeated.

[0093] In summary, the integrated photoelectric relay of the present invention uses a silicon carbide substrate doped with a low ion concentration. Compared with the silicon substrate used in the prior art, the electric field breakdown strength of silicon carbide is 10 times that of silicon, and silicon carbide can be used to simultaneously produce light-emitting elements and light-receiving elements. Therefore, in the present invention, after growing an epitaxial layer on a silicon carbide substrate and injecting ions, the epitaxial layer is divided into two parts by dry etching, and an isolation layer is deposited and mask etching is performed, and finally a metal layer is deposited to simultaneously form a light-emitting diode, a photodiode, and a metal oxide semiconductor field effect transistor in the two parts of the epitaxial layer. Accordingly, the present invention uses the same manufacturing process to produce all the components of the integrated photoelectric relay on the same substrate, which can greatly improve the withstand voltage of the AC switch without the need for additional components, and reduce the chip area, while reducing the module cost.

[0094] The above embodiments are only used to illustrate the implementation scheme of the present invention and to explain the technical features of the present invention, and are not used to limit the protection scope of the present invention. Any changes or equivalent arrangements that can be easily completed by those skilled in the art belong to the scope claimed by the present invention, and the scope of protection of the present invention shall be subject to the attached claims.

Claims

1. An integrated photoelectric relay connected to an input circuit and an output circuit, and comprising: a substrate; An epitaxial layer is formed on the substrate, wherein a groove is formed on the epitaxial layer to divide the epitaxial layer into a high-voltage region and a low-voltage region, wherein the high-voltage region and the low-voltage region are electrically isolated from each other; an isolation layer formed on the epitaxial layer; a light emitting diode formed in the low voltage region of the epitaxial layer, for receiving an input signal from the input circuit and generating a light in response to the input signal; A blue ultraviolet light reflecting film, used to reflect the light to form a reflected light; A photodiode formed in the high voltage region of the epitaxial layer to sense the reflected light and generate an induced voltage; a first metal oxide semiconductor field effect transistor formed in the high voltage region of the epitaxial layer and electrically connected to the photodiode, for being driven in response to the induced voltage and generating a first output current to the output circuit; as well as a second metal oxide semiconductor field effect transistor formed in the high voltage region of the epitaxial layer and electrically connected to the photodiode, for being driven in response to the induced voltage and generating a second output current to the output circuit; The light emitting diode, the photodiode, the first metal oxide semiconductor field effect transistor and the second metal oxide semiconductor field effect transistor are formed adjacent to each other on the substrate. 2 . The integrated photoelectric relay as claimed in claim 1 , wherein the substrate is made of silicon carbide and is doped with a low ion concentration. 3 . The integrated photoelectric relay as claimed in claim 1 , wherein after the ultraviolet light reflecting film is plated on the isolation layer, the integrated photoelectric relay is encapsulated by an encapsulation adhesive. 4 . The integrated photoelectric relay as claimed in claim 3 , wherein the light is transmitted to the blue-ultraviolet light reflecting film through the isolation layer, and is reflected to the photodiode by the blue-ultraviolet light reflecting film. 5 . The integrated photoelectric relay as claimed in claim 1 , wherein the integrated photoelectric relay is packaged with a packaging glue, and the blue-ultraviolet light reflecting film is plated on an outer surface of the packaging glue. 6 . The integrated photoelectric relay as claimed in claim 5 , wherein the light is transmitted to the blue-ultraviolet light reflecting film through the packaging glue, and is reflected to the photodiode by the blue-ultraviolet light reflecting film. 7 . The integrated photoelectric relay as claimed in claim 1 , wherein the integrated photoelectric relay is packaged in a metal shell, and the blue-ultraviolet light reflecting film is plated on an inner surface of the metal shell. 8 . The integrated photoelectric relay as claimed in claim 7 , wherein the light is transmitted to the blue-ultraviolet light reflecting film through air inside the metal shell, and is reflected by the blue-ultraviolet light reflecting film to the photodiode. 9 . The integrated photoelectric relay as claimed in claim 1 , wherein the epitaxial layer is N-type doped. 10 . The integrated photoelectric relay as claimed in claim 1 , wherein a wavelength of the light is between 300 nanometers and 500 nanometers.

11. The integrated photoelectric relay according to claim 1, further comprising: A control circuit is electrically connected to the photodiode and a first gate of the first metal oxide semiconductor field effect transistor and a second gate of the second metal oxide semiconductor field effect transistor, and is used to control a first voltage response time of the first metal oxide semiconductor field effect transistor and a second voltage response time of the second metal oxide semiconductor field effect transistor.

12. A method for manufacturing an integrated photoelectric relay, comprising: growing an epitaxial layer on a substrate; Implanting a plurality of ions into the epitaxial layer to form a first PN structure, a second PN structure and an NPN structure in the epitaxial layer; Performing dry etching to form a trench in the epitaxial layer, wherein the trench divides the epitaxial layer into a high-voltage region and a low-voltage region, wherein the high-voltage region and the low-voltage region are electrically isolated from each other; Depositing an isolation layer on the epitaxial layer and the trench; Performing a mask etching to generate a plurality of patterns; as well as A metal layer is deposited to form a light emitting diode in the first PN structure, a photodiode in the second PN structure, and a first metal oxide semiconductor field effect transistor and a second metal oxide semiconductor field effect transistor in the NPN structure based on the pattern.

13. The method for manufacturing an integrated photoelectric relay according to claim 12, further comprising: A blue ultraviolet light reflecting film is plated on the isolation layer; and The integrated photoelectric relay is encapsulated with an encapsulation adhesive. 14 . The integrated photoelectric relay manufacturing method as claimed in claim 13 , wherein a light is transmitted to the blue-ultraviolet light reflecting film through the isolation layer, and is reflected by the blue-ultraviolet light reflecting film to the photodiode.

15. The method for manufacturing an integrated photoelectric relay according to claim 12, further comprising: Encapsulating the integrated photoelectric relay with an encapsulation adhesive; and A blue ultraviolet light reflecting film is plated on an outer surface of the packaging glue. 16 . The integrated photoelectric relay manufacturing method as claimed in claim 15 , wherein a light is transmitted to the blue-ultraviolet light reflecting film through the packaging glue, and is reflected by the blue-ultraviolet light reflecting film to the photodiode.

17. The method for manufacturing an integrated photoelectric relay according to claim 12, further comprising: Encapsulating the integrated photoelectric relay with a metal shell; and A blue ultraviolet light reflecting film is plated on an inner surface of the metal shell. 18 . The integrated photoelectric relay manufacturing method as claimed in claim 17 , wherein a light is transmitted to the blue-ultraviolet light reflecting film through air inside the metal shell, and is reflected to the photodiode by the blue-ultraviolet light reflecting film.

19. The method for manufacturing an integrated photoelectric relay as claimed in claim 12, wherein the substrate is made of silicon carbide and is doped with a low ion concentration.

20. The method for manufacturing an integrated photoelectric relay according to claim 12, further comprising: electrically connecting a control circuit to the photodiode and a first gate of the first MOSFET and a second gate of the second MOSFET; and When the photodiode generates an induction voltage, a first voltage response time of the first metal oxide semiconductor field effect transistor and a second voltage response time of the second metal oxide semiconductor field effect transistor are controlled by the control circuit.

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