Display device and method of manufacturing same

Abstract

A display device and a method of manufacturing the same are disclosed. The display device includes: a display panel on which a plurality of sub-pixels and lines connected to the sub-pixels are disposed; and a pixel driving circuit configured to drive the sub-pixels. The display panel further includes: a plurality of protruding bank patterns disposed in the sub-pixels; and a light emitting element disposed in each of the bank patterns. The light-emitting element includes: a first electrode; a second electrode; a light emitting layer disposed between the first electrode and the second electrode; and a reflector covering at least a portion of a side surface of the first electrode and a side surface of the light emitting layer. The reflector includes a first insulating layer, a second insulating layer, and a metal layer disposed between the first insulating layer and the second insulating layer.

Description

Technical Field

[0001] The present disclosure relates to a display device and a method for manufacturing the display device, and more specifically, for example, but not limited to, to a display device in which a reflective layer is arranged inside a light-emitting element to allow light to be directly reflected by the reflective layer in the light-emitting element and a method for manufacturing the display device. Background Art

[0002] Electroluminescent display devices can be divided into OLED display devices in which organic light emitting diodes (OLEDs) are provided in pixels and inorganic light emitting display devices (hereinafter referred to as "display devices") in which inorganic light emitting diodes (hereinafter referred to as "LEDs") are provided in pixels.

[0003] Since the electroluminescent display device uses a self-luminous element to display an image, the electroluminescent display device does not require a separate light source such as a backlight unit, and can be implemented in various thinner forms. Since the electroluminescent display device has a fast response time, high luminous efficiency and brightness, and a wide viewing angle, and can express a black level of perfect black, the electroluminescent display device has an excellent contrast ratio and an excellent color gamut.

[0004] The OLED display device requires a design to prevent oxygen and moisture penetration because an oxidation phenomenon may occur between an organic light emitting layer and an electrode due to the penetration of moisture and oxygen.

[0005] As an example of a display device, a micro LED display device in which a micro LED is arranged in a pixel has attracted attention as a next-generation display device. The micro LED may be an inorganic LED having a size of 100 μm or less. The micro LED may be manufactured separately by a semiconductor process, transferred to a pixel located on a display panel substrate of the display device, and arranged in a sub-pixel of each color.

[0006] The description provided in the description of the background technology section should not be assumed to be prior art simply because it is mentioned in the description of the background technology section or is associated with the description of the background technology section. The description of the background technology section may include information describing one or more aspects of the subject technology, and the description in this part does not limit the present invention. Summary of the invention

[0007] The inventors have recognized that in the process of manufacturing a display device, when a reflective layer is formed on a bank pattern as a transfer structure of a micro light emitting diode (LED), a narrow edge may continuously cause defects. Therefore, when a reflective layer is formed under the micro LED, light efficiency may be reduced.

[0008] This specification is intended to address the above-mentioned needs and / or problems.

[0009] The present specification also aims to provide a display device and a method for manufacturing the display device, in which a reflective layer is arranged inside a light-emitting element to allow light to be directly reflected by the reflective layer in the light-emitting element, thereby improving light-emitting efficiency.

[0010] The objects of the present disclosure are not limited to the above objects, and other objects not mentioned will be clearly understood by those skilled in the art from the following description.

[0011] A display device according to one or more exemplary embodiments of the present specification may include: a display panel on which a plurality of sub-pixels and lines connected to the sub-pixels are arranged; and a pixel driving circuit configured to drive the sub-pixels, wherein the display panel also includes: a plurality of protruding embankment patterns arranged in the sub-pixels; and a light-emitting element arranged in each of the embankment patterns, the light-emitting element including a first electrode, a second electrode, and a light-emitting layer arranged between the first electrode and the second electrode; and a reflector covering at least a portion of a side surface of the first electrode and a side surface of the light-emitting layer, and the reflector including a first insulating layer, a second insulating layer, and a metal layer arranged between the first insulating layer and the second insulating layer.

[0012] A method for manufacturing a display device may include: forming a display panel on which a plurality of sub-pixels and lines connected to the sub-pixels are arranged; and forming a pixel driving circuit configured to drive the sub-pixels, wherein the step of forming the display panel also includes: forming a plurality of protruding dam patterns, which are arranged in the sub-pixels; and forming a light-emitting element, which is arranged in each of the dam patterns, and the step of forming the light-emitting element includes: forming a first electrode and a second electrode; forming a light-emitting layer arranged between the first electrode and the second electrode; and forming a reflector, which covers at least a portion of a side surface of the first electrode and a side surface of the light-emitting layer, and the step of forming the reflector includes: forming a first insulating layer and a second insulating layer on the side surfaces of the light-emitting element; and forming a metal layer between the first insulating layer and the second insulating layer.

[0013] In the present disclosure, a reflective layer can be formed in a light-emitting element so that light can be directly reflected in the light-emitting element, thereby improving the luminous efficiency. Specifically, the exemplary embodiment of the present disclosure can improve the internal luminous efficiency of the light-emitting element by arranging the reflective layer inside the light-emitting element, thereby improving the luminous efficiency even under low power consumption, thereby improving the yield.

[0014] In the present disclosure, since a process of forming a reflective mirror on an upper portion of a bank pattern may be omitted, the process may be simplified and a process margin defect may be fundamentally improved.

[0015] The present specification can improve the light emitting efficiency by disposing a reflective layer inside the light emitting element, thereby reducing process materials because a side wall diffuser made of an expensive material with excellent light emitting efficiency is not required.

[0016] Furthermore, an exemplary embodiment of the present disclosure can simplify a manufacturing process by omitting a patterning process of forming a reflective layer under a light emitting element to form a reflective mirror.

[0017] Furthermore, an exemplary embodiment of the present disclosure can improve light emitting efficiency by disposing a reflective layer in a light emitting element without using an expensive side wall diffuser material, thereby reducing manufacturing process costs.

[0018] The effects of the present disclosure are not limited to the above-mentioned effects, and other effects not mentioned will be clearly understood from the description of the claims by those skilled in the art. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] The above and other aspects, features and other advantages of the present disclosure will be more clearly understood through the following detailed description in conjunction with the accompanying drawings, in which:

[0020] Figure 1 is a view showing a display device according to an exemplary embodiment of the present disclosure.

[0021] Figure 2 yes Figure 1 Magnified view of area A in the middle.

[0022] Figure 3 is a diagram showing a local area of ​​a pixel.

[0023] Figure 4 is along Figure 3 Cross-sectional view along line II'.

[0024] Figure 5 is along Figure 3 Cross-sectional view along line II-II'.

[0025] Figure 6 is along Figure 3 Cross-sectional view along line III-III'.

[0026] Figure 7 is a cross-sectional view showing an example in which a main light emitting element and a sub light emitting element are electrically connected to a pixel driving circuit.

[0027] Figure 8 is a view illustrating a display device according to another exemplary embodiment of the present disclosure.

[0028] Fig. 9 is along Figure 8 Cross-sectional view along line IV-IV'.

[0029] Fig.10 is shown along Figure 3 A cross-sectional view of a longitudinal cross-sectional structure of a portion of the display device along line II', which is Figure 4 Enlarged cross-sectional view of "B".

[0030] Fig.11 is shown along Figure 3 A cross-sectional view of a longitudinal cross-sectional structure of a portion of the display device along line II', which is Figure 4 Enlarged cross-sectional view of "C".

[0031] Fig.12 is a plan view illustrating a light emitting element of a display device according to an exemplary embodiment of the present specification.

[0032] Fig.13 is shown along Fig.12 4 is a cross-sectional view of a longitudinal cross-sectional structure of a portion of the light emitting element taken along line VV'.

[0033] Fig.14A , Fig. 14B , Fig. 14C , Fig.14D , Fig.14E , Fig.14F , Figure 14G , Fig.14H , Fig.14I , Fig.14J , Figure 14K , Figure 14L , Fig.14M , Fig.14N , Fig.14O , Figure 14P , Figure 14Q , Figure 14R , Figure 14S and Figure 14T is a cross-sectional view illustrating a process of manufacturing a light emitting element of a display device according to an exemplary embodiment of the present specification.

[0034] Fig.15 is a plan view illustrating a light emitting element of a display device according to another exemplary embodiment of the present specification.

[0035] Fig.16 is shown along Fig.15 5 is a cross-sectional view of a longitudinal cross-sectional structure of a portion of the light-emitting element taken along line VI-VI'.

[0036] Fig.17A , Fig. 17B , Fig. 17C , Fig.17D , Fig.17E , Fig.17F , Figure 17G , Fig.17H, Fig.17I , Fig.17J , Figure 17K , Figure 17L , Fig.17M , Fig.17N , Fig.17O , Figure 17P , Figure 17Q , Figure 17R , Figure 17S and Figure 17T is a cross-sectional view illustrating a manufacturing process of a light emitting element of a display device according to another exemplary embodiment of the present specification.

[0037] Fig.18A , Fig.18B , Fig.18C , Fig.18D , Fig.18E , Fig.18F and Figure 18G is a process cross-sectional view describing a process of manufacturing one pixel having a light emitting element of a display device according to an exemplary embodiment of the present specification.

[0038] Fig.19 is a cross-sectional view schematically illustrating a state of reflecting and emitting light in a light emitting element of a display device according to an exemplary embodiment of the present specification.

[0039] Fig. 20 is a cross-sectional view schematically illustrating a state of reflecting and emitting light in a light emitting element of a display device according to another exemplary embodiment of the present specification.

[0040] Throughout the drawings and detailed description, unless otherwise described, the same drawing reference numerals should be understood to refer to the same elements, features, and structures. The relative sizes and depictions of these elements may be exaggerated for clarity, illustration, and convenience. DETAILED DESCRIPTION

[0041] The advantages and features of the exemplary embodiments of the present specification and the methods for achieving these advantages and features will become clear with reference to the exemplary embodiments described in detail below in conjunction with the accompanying drawings. However, the present disclosure is not limited to the exemplary embodiments disclosed below, but can be implemented in various different forms, and these exemplary embodiments are provided only to make the disclosure of the present disclosure complete and to fully inform the technical personnel in the field to which the present disclosure belongs of the scope of the present disclosure, and the present disclosure is limited only by the scope of the attached claims.

[0042] Since the shapes, sizes, dimensions (e.g., length, width, height, thickness, radius, diameter, area, etc.), ratios, angles, quantities, etc. disclosed in the drawings describing the exemplary embodiments of the present specification are illustrative, the present disclosure is not limited to the items shown. Throughout the specification, the same reference numerals represent the same components. In addition, when describing the present disclosure, when it is determined that the detailed description of the related known technology may unnecessarily obscure the main points of the present disclosure, its detailed description will be omitted.

[0043] When the terms “comprising,” “having,” “including,” “containing,” “consisting of,” “made of,” “formed of,” or “composed of” described in this specification are used, other components may be added unless “only” is used. When a component is expressed in the singular, it may be construed as a plurality of components unless otherwise specifically stated.

[0044] The dimensions including size and thickness of the various components shown in the drawings are shown for ease of description, and the present disclosure is not limited to the dimensions and thickness of the components shown, but it should be noted that the relative dimensions including relative size, position and thickness of the components shown in the various drawings submitted herein are part of the present disclosure.

[0045] When interpreting a component, even if there is no separate explicit description, the component is interpreted as including the error range.

[0046] When describing the positional relationship and interconnection relationship between two components (for example, "on," "over," "above," "below," "below," "beside," "under," "near," "close," "adjacent," "on the side," "close to," "connected or coupled," "cross or intersect," etc.), unless the term "immediately" or "directly" is described, one or more other components may be inserted between the two components.

[0047] Spatially relative terms, such as "below," "below," "under," "lower," "above," "upper," etc., may be used herein to describe the relationship of one element or feature to another element or feature as shown in the figures. It should be understood that, in addition to the orientation shown in the figures, spatially relative terms may also include different orientations of elements in use or operation. For example, if the elements in the figures are inverted, elements described as being "below" or "below" other elements or features will be oriented as being "above" other elements or features. Therefore, the exemplary term "below" may include orientations below and above. Similarly, the exemplary terms "above" or "above" may include orientations "above" and "below."

[0048] When the terms "after", "subsequently", "next", "then", "before" and the like are used to describe a time relationship, non-sequential cases may be included unless the terms "immediately" or "directly" are used.

[0049] To distinguish components, "first", "second", etc. may be used in front of the component name, but its function or structure is not limited by the ordinal number or the component name. For ease of description, the ordinal number of the name of the same component may be different between exemplary embodiments.

[0050] In addition, when describing the components of the present disclosure, terms such as first, second, A, B, (a), (b), etc. may be used herein. Each of these terms is not used to limit the nature, order or sequence of the corresponding components, but is only used to distinguish the corresponding components from other components. In the case of describing that a certain structural element or layer is "connected", "coupled", "bonded" or "joined" to another structural element or layer, it is generally interpreted that the other structural element or layer can be directly or indirectly "connected", "coupled", "bonded" or "joined" to the structural element or layer.

[0051] It should be understood that the term "at least one" includes all combinations related to any one item. For example, "at least one of a first element, a second element, and a third element" may include all combinations of two or more elements selected from the first element, the second element, and the third element, as well as each element of the first element, the second element, and the third element.

[0052] The term "device" as used herein may refer to a display device including a display panel and a driver for driving the display panel. Examples of display devices may include light-emitting elements, etc. In addition, examples of devices may include laptop computers, televisions, computer monitors, automotive devices, wearable devices, and automotive equipment devices, as well as complete electronic devices (or devices) or complete sets of devices (or devices) that include light-emitting elements, etc. as complete products or final products, for example, mobile electronic devices such as smart phones or electronic tablets, but embodiments of the present disclosure are not limited thereto.

[0053] Like reference numerals generally refer to like elements throughout the specification.

[0054] For convenience of description, the size and thickness of each component shown in the drawings are shown, and the present disclosure is not limited to the size and thickness of the components shown.

[0055] The following exemplary embodiments may be partially or completely connected or combined, and various technical intercommunications and drives may be performed. These exemplary embodiments may be implemented independently of each other, or may be implemented together in an associated relationship.

[0056] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as those commonly understood by those skilled in the art to which the example embodiments belong. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning consistent with their meaning in the context of the relevant technology, and should not be interpreted in an idealized or overly formal sense unless explicitly defined as such in this article.

[0057] Hereinafter, various exemplary embodiments of the present disclosure will be described in detail with reference to the accompanying drawings.

[0058] Figure 1 is a view showing a display device according to an exemplary embodiment of the present disclosure. Figure 2 yes Figure 1 Magnified view of area A in the middle. Figure 3 is a diagram showing a local area of ​​a pixel.

[0059] Reference Figure 1 and Figure 2 , a display device 10 according to an exemplary embodiment of the present disclosure includes a display panel that visually displays an input image. The display panel may include a display area AA that displays an image and a non-display area NA that does not display an image. The non-display area NA is configured to surround the display area AA near, partially, or completely. A pad portion PAD to which various lines and driving circuits as well as integrated circuits, printed circuits, etc. are connected may be installed in the non-display area NA.

[0060] The plurality of light emitting elements 100 disposed in the display area AA to form the pixel PXL may be micro-sized inorganic light emitting elements. The inorganic light emitting elements may be grown on a silicon wafer and then attached to the display panel through a transfer process.

[0061] The transfer process of the light emitting element 100 may be performed for each pre-divided region. Figure 1 It is shown that the display area AA is divided into nine transfer areas ST, but the size or number of the transfer area divisions is not limited thereto. The transfer process can be performed sequentially or simultaneously on the first transfer area ST to the ninth transfer area ST. The blue light emitting element 100, the green light emitting element 100, and the red light emitting element 100 can each be transferred to the transfer area ST in sequence. Alternatively, the display area AA can be divided into sixteen transfer areas ST, and the transfer process can be performed sequentially or simultaneously on the first transfer area ST to the sixteenth transfer area ST. The blue light emitting element, the green light emitting element, the red light emitting element, and the white light emitting element can each be transferred to the transfer area ST in sequence.

[0062] A data driving circuit or a gate driving circuit may be provided in the non-display area NA, and a line through which a control signal for controlling the driving circuit is supplied may be provided. Here, the control signal may include various timing signals (including a clock signal, an input data enable signal, and a synchronization signal), and the control signal may be received through the pad portion PAD.

[0063] The pixel PXL can be driven by a pixel driving circuit. The pixel driving circuit can drive multiple pixels by receiving a driving voltage, an image signal (digital signal), a synchronization signal synchronized with the image signal, etc. and outputting an anode voltage and a cathode voltage of the light-emitting element 100. The driving voltage can be a high potential voltage EVDD. The cathode voltage can be a low potential voltage EVSS commonly applied to the pixel. The anode voltage can be a voltage corresponding to the pixel data value of the image signal. The pixel driving circuit can be arranged in the non-display area NA or below the display area AA.

[0064] Each of the pixels PXL may include a plurality of sub-pixels each having a different color. The plurality of sub-pixels SPX is the minimum unit constituting the display area, and n sub-pixels SPX form one pixel. Each of the plurality of sub-pixels SPX may emit light having a wavelength different from each other. The plurality of sub-pixels may include a first sub-pixel, a second sub-pixel, and a third sub-pixel that emit light of different colors from each other. For example, the plurality of pixels may include a red sub-pixel provided with a light emitting element 100 for emitting light having a red wavelength, a green sub-pixel provided with a light emitting element 100 for emitting light having a green wavelength, and a blue sub-pixel provided with a light emitting element 100 for emitting light having a blue wavelength. The plurality of pixels may also include a white sub-pixel.

[0065] In addition, a plurality of sub-pixels SPX may be variously modified in color and configuration as needed. However, the present disclosure is not limited thereto. For example, a plurality of sub-pixels SPX may include red sub-pixels, green sub-pixels, and blue sub-pixels, wherein the red sub-pixels, green sub-pixels, and blue sub-pixels may be arranged in a repeated manner. Alternatively, a plurality of sub-pixels SPX may include red sub-pixels, green sub-pixels, blue sub-pixels, and white sub-pixels, wherein the red sub-pixels, green sub-pixels, blue sub-pixels, and white sub-pixels may be arranged in a repeated manner, or the red sub-pixels, green sub-pixels, blue sub-pixels, and white sub-pixels may be arranged in a quadrilateral type. For example, the red sub-pixels, blue sub-pixels, and green sub-pixels may be arranged sequentially along the row direction, or the red sub-pixels, blue sub-pixels, green sub-pixels, and white sub-pixels may be arranged sequentially along the row direction. However, in an embodiment of the present disclosure, the color type, arrangement type, and arrangement order of the sub-pixels are not limited, and may be configured in various forms according to the luminous characteristics, device life, and device specifications.

[0066] In addition, the sub-pixels may have different light-emitting areas according to the light-emitting characteristics. For example, a sub-pixel emitting light of a color different from the color of the blue sub-pixel may have a light-emitting area different from the light-emitting area of ​​the blue sub-pixel. For example, a red sub-pixel, a blue sub-pixel, and a green sub-pixel, or a red sub-pixel, a blue sub-pixel, a white sub-pixel, and a green sub-pixel may each have a different light-emitting area.

[0067] Reference Figure 2 and Figure 3 , a plurality of pixels PXL may be continuously arranged along a first direction (X-axis direction) and a second direction (Y-axis direction). A plurality of sub-pixels of the same color may be arranged in a pixel of a display area AA. For example, each of the plurality of sub-pixels may include a first red sub-pixel provided with a 1-1 light-emitting element 101a for emitting light having a red wavelength, a second red sub-pixel provided with a 1-2 light-emitting element 101b for emitting light having a red wavelength, a first green sub-pixel provided with a 2-1 light-emitting element 102a for emitting light having a green wavelength, a second green sub-pixel provided with a 2-2 light-emitting element 102b for emitting light having a green wavelength, a first blue sub-pixel provided with a 3-1 light-emitting element 103a for emitting light having a blue wavelength, and a second blue sub-pixel provided with a 3-2 light-emitting element 103b for emitting light having a blue wavelength. The 1-1 light-emitting element 101a, the 2-1 light-emitting element 102a, and the 3-1 light-emitting element 103a may be interpreted as main light-emitting elements.

[0068] The 1-2 light emitting element 101b, the 2-2 light emitting element 102b, and the 3-2 light emitting element 103b may be interpreted as sub-light emitting elements.

[0069] Since a sub-pixel may include one or more light emitting elements, when one light emitting element fails, the brightness of the sub-pixel may be adjusted by increasing the brightness of the remaining light emitting elements. However, the present disclosure is not necessarily limited thereto, and a sub-pixel may include only one light emitting element.

[0070] A plurality of first electrodes 161 may be each disposed below the light emitting element 100, and may be selectively connected to a plurality of signal lines TL1 to TL6 through an extension (connection portion) 161a. A high potential voltage may be applied to the pixel driving circuit through the signal lines TL1 to TL6. The signal lines TL1 to TL6 and the first electrodes 161 may be formed as an electrode pattern integrated with an anode during an electrode patterning process.

[0071] As an example, the first signal line TL1 can be connected to the anode of the first red sub-pixel, and the second signal line TL2 can be connected to the anode of the second red sub-pixel. The third signal line TL3 can be connected to the anode of the first green sub-pixel, and the fourth signal line TL4 can be connected to the anode of the second green sub-pixel. The fifth signal line TL5 can be connected to the anode of the first blue sub-pixel, and the sixth signal line TL6 can be connected to the anode of the second blue sub-pixel. When one sub-pixel includes only one light-emitting element, the number of signal lines TL can be halved. For example, the first signal line TL1 can be connected to the anode of the red sub-pixel, the second signal line TL2 can be connected to the anode of the green sub-pixel, and the third signal line TL3 can be connected to the anode of the blue sub-pixel, however, the present disclosure is not limited thereto.

[0072] The second electrode 170 may be a cathode disposed in each row to apply a cathode voltage to the light emitting elements 100 disposed continuously along the first direction (X-axis direction). A plurality of second electrodes 170 may be disposed to be spaced apart from each other along the second direction (Y-axis direction). A plurality of second electrodes 170 may be connected to the cathode voltage through the contact electrode 162. A plurality of second electrodes 170 may each be electrically connected to the contact electrode 162. However, the present disclosure is not limited thereto, and the second electrode 170 is not divided into a plurality of electrodes, and may be formed as one electrode layer used as a common electrode.

[0073] Figure 4 is along Figure 3 Cross-sectional view along line II'. Figure 5 is along Figure 3 Cross-sectional view along line II-II'. Figure 6 is along Figure 3 Cross-sectional view along line III-III'. Figure 7 is a cross-sectional view showing an example in which two light emitting elements are connected to a pixel driving circuit.

[0074] Reference Figures 3 to 5 According to an exemplary embodiment, the display device 10 includes a plurality of first electrodes 161 and a contact electrode 162 disposed on a substrate 110, a plurality of light emitting elements 100 disposed on the plurality of first electrodes 161, a first interlayer insulating layer 141 disposed between the plurality of light emitting elements 100, and a second electrode 170 disposed on the plurality of light emitting elements 100.

[0075] The substrate 110 may be made of a flexible plastic. For example, the substrate 110 may be manufactured as a single-layer or multi-layer substrate 110 made of a material selected from polyimide, polyethylene terephthalate, polyethylene naphthalate, polycarbonate, polyethersulfone, polyarylate, polysulfone, and cyclic olefin copolymer. In some exemplary embodiments, the substrate 110 may be made of a flexible polymer film. For example, the flexible polymer film may be made of any one of polyimide (PI), polyethylene terephthalate (PET), acrylonitrile-butadiene-styrene copolymer (ABS), polymethyl methacrylate (PMMA), polyethylene naphthalate (PEN), polycarbonate (PC), polyethersulfone (PES), polyarylate (PAR), polysulfone (PSF), cyclic olefin copolymer (COC), triacetyl cellulose (TAC), polyvinyl alcohol (PVA), and polystyrene (PS), but is not limited thereto. For example, the substrate 110 may be a ceramic or glass substrate.

[0076] The pixel driving circuit 20 may be disposed in the display area AA on the substrate 110. The pixel driving circuit 20 may include a plurality of thin film transistors (TFTs) using a semiconductor material such as an oxide semiconductor, an amorphous semiconductor, or a polycrystalline semiconductor.

[0077] Oxide semiconductor materials can have excellent effects of preventing leakage current and relatively cheap manufacturing costs. Oxide semiconductors can be made of metal oxides such as zinc (Zn), indium (In), gallium (Ga), tin (Sn) and titanium (Ti) or metals such as zinc (Zn), indium (In), gallium (Ga), tin (Sn) or titanium (Ti) and combinations of their oxides. Specifically, oxide semiconductors can include zinc oxide (ZnO), zinc tin oxide (ZTO), zinc indium oxide (ZIO), indium oxide (InO), titanium oxide (TiO), indium gallium zinc oxide (IGZO), indium zinc tin oxide (IZTO), indium zinc oxide (IZO), indium gallium tin oxide (IGTO) and indium gallium oxide (IGO), but are not limited thereto.

[0078] The polycrystalline semiconductor material has a fast moving speed of carriers such as electrons and holes, and thus has high mobility, and has low power consumption and excellent reliability. The polycrystalline semiconductor may be made of polycrystalline silicon (poly-Si), but is not limited thereto.

[0079] The amorphous semiconductor material may be made of amorphous silicon (a-Si), but is not limited thereto.

[0080] The pixel driving circuit 20 may include at least one driving TFT, at least one switching TFT, and at least one storage capacitor. When the pixel driving circuit 20 includes a plurality of TFTs, the pixel driving circuit 20 may be formed on the substrate 110 by a process of manufacturing TFTs. In an exemplary embodiment, the pixel driving circuit 20 may collectively represent a concept of a plurality of TFTs electrically connected to the light emitting element 100.

[0081] The pixel driving circuit 20 may be a driving driver manufactured on the single crystal semiconductor substrate 110 using a process for manufacturing a metal oxide silicon field effect transistor (MOSFET). The driving driver may include a plurality of pixel driving circuits and drive a plurality of sub-pixels. When the pixel driving circuit 20 is implemented as a driving driver, after the adhesive layer is disposed on the substrate 110, the driving driver may be mounted on the adhesive layer by a transfer process.

[0082] A buffer layer 121 covering the pixel driving circuit 20 may be disposed on the substrate 110. The buffer layer 121 may be made of an organic insulating material such as photosensitive photoacryl or photosensitive polyimide, but is not limited thereto.

[0083] The buffer layer 121 may be formed by stacking multiple layers of inorganic insulating materials such as silicon nitride (SiN x ) or an inorganic insulating material of silicon oxide (SiO2), for example, the buffer layer 121 can be configured as a single layer or multiple layers made of silicon nitride (SiNx) or silicon oxide (SiOx). For example, the buffer layer 121 can be formed by a single layer or multiple layers of inorganic films, for example, the single layer of inorganic film can be a silicon oxide (SiOx) film or a silicon nitride (SiNx) film, and the multilayer inorganic film can be formed by alternately stacking one or more layers of silicon oxide (SiOx) film, one or more layers of silicon nitride (SiNx) film and one or more layers of amorphous silicon (a-Si), but the present disclosure is not limited thereto. For example, the buffer layer 121 can use organic insulating materials and inorganic insulating materials in a manner of stacking organic insulating materials and inorganic insulating materials in multiple layers.

[0084] The insulating layer 122 may be disposed on the buffer layer 121. The insulating layer 122 may be made of an organic insulating material such as photosensitive photopropylene or photosensitive polyimide, but is not limited thereto. The connecting wires RT1 and RT2 may be disposed on the buffer layer 121. The connecting wires RT1 and RT2 may be connected to corresponding signal wires TL1 to TL6, or to the signal wires TL1 to TL6. The connecting wires RT1 and RT2 may include a plurality of line patterns disposed on different layers, with one or more insulating layers interposed therebetween. The line patterns disposed on different layers may be electrically connected through contact holes passing through the insulating layers.

[0085] A plurality of bank patterns 130 may be disposed on the insulating layer 122. At least one light emitting element 100 may be disposed on each bank pattern 130. For example, a first light emitting element 101 may be disposed on the first bank pattern 130, a second light emitting element 102 may be disposed on the second bank pattern 130, and a third light emitting element 103 may be disposed on the third bank pattern 130.

[0086] The bank pattern 130 may be made of an organic insulating material such as photosensitive photoacryl or photosensitive polyimide, but is not limited thereto. The bank pattern 130 may guide the attachment position of the light emitting element 100 in the transfer process of the light emitting element 100. The bank pattern 130 may be omitted.

[0087] The solder pattern 163 may be disposed on the first electrode 161. The solder pattern 163 may be made of indium (In), tin (Sn), or an alloy thereof, but is not limited thereto.

[0088] A plurality of light emitting elements 100 may be mounted on the solder pattern 163, respectively. One pixel may include light emitting elements 100 of three colors. The first light emitting element 101 may be a red light emitting element, the second light emitting element 102 may be a green light emitting element, and the third light emitting element 103 may be a blue light emitting element. Two light emitting elements may be formed on each sub-pixel. For example, the first light emitting element 101 may include two red light emitting elements, the second light emitting element 102 may include two green light emitting elements, and the third light emitting element 103 may include two blue light emitting elements, but the present disclosure is not limited thereto.

[0089] The first interlayer insulating layer 141 may cover the plurality of light emitting elements 100 and the bank pattern 130. Thus, the first interlayer insulating layer 141 may cover spaces between the plurality of light emitting elements 100 and spaces between the bank patterns 130. The first interlayer insulating layers 141 may extend in the first direction X, and may be spaced apart from each other in the second direction Y to separate between rows of pixels.

[0090] The first interlayer insulating layer 141 may include an inorganic insulating material or an organic insulating material.

[0091] The second electrode 170 may be disposed on the plurality of light emitting elements 100. The second electrode 170 may be commonly connected to the plurality of pixels PXL. The second electrode 170 may be a light-transmitting thin electrode. The second electrode 170 may be made of a transparent electrode material such as indium tin oxide (ITO) or indium zinc oxide (IZO), but is not necessarily limited thereto.

[0092] The second electrodes 170 may extend in the first direction (X-axis direction) and may be spaced apart from each other in the second direction (Y-axis direction). The second electrode 170 may include a first region 171 disposed on the upper surface of the light emitting element 100 and the upper surface of the first interlayer insulating layer 141, a second region 172 contacting and electrically connected to the contact electrode 162, and a third region 173 disposed on the side surface of the first interlayer insulating layer 141 to connect the first region 171 and the second region 172.

[0093] In a plan view, the plurality of second electrodes 170 may each overlap the first interlayer insulating layer 141 , and the second region 172 may cover an outer surface of the first interlayer insulating layer 141 .

[0094] The second interlayer insulating layer 142 may be an inorganic insulating material layer or an organic insulating material layer surrounding the periphery of the first interlayer insulating layer 141. The second interlayer insulating layer 142 and the first interlayer insulating layer 141 may be disposed together on the insulating layer 122. The first interlayer insulating layer 141 and the second interlayer insulating layer 142 may be made of the same material among an inorganic insulating material and an organic insulating material, or made of different materials. However, the present disclosure is not necessarily limited thereto.

[0095] According to this exemplary embodiment, since second region 172 of second electrode 170 is connected to contact electrode 162 in a state of being entirely flatly formed, stress does not excessively concentrate at the point where second region 172 is connected to contact electrode 162. Therefore, cracks in second electrode 170 can be effectively prevented.

[0096] The second interlayer insulating layer 142 may cover the second region 172 and the third region 173 of the second electrode 170. The upper surface of the second interlayer insulating layer 142 may be coplanar with the upper surface of the first region 171 of the second electrode 170. In other words, the first interlayer insulating layer 141 and the second interlayer insulating layer 142 may be used as a planarization layer. Therefore, since there is no step on the surface on which the black matrix 180 is formed, the pattern of the black matrix 180 may be easily formed on the first interlayer insulating layer 141 and the second interlayer insulating layer 142. However, the present disclosure is not necessarily limited thereto, and the upper surface of the second interlayer insulating layer 142 and the upper surface of the second electrode 170 may be located at different heights.

[0097] The black matrix 180 may be made of an organic insulating material to which a black pigment is added. The second electrode 170 may be in contact with the contact electrode 162 below the black matrix 180. Transmission holes 181 through which light emitted from the light emitting element 100 is emitted outward may be formed between patterns of the black matrix 180. The black matrix 180 may solve the problem that light emitted from adjacent light emitting elements 100 is mixed by the first interlayer insulating layer 141.

[0098] The capping layer 190 may be made of an organic insulating material covering the black matrix 180 and the second electrode 170. However, the present disclosure is not necessarily limited thereto.

[0099] exist Figure 3 In the figure, the configuration of the black matrix 180 and the cover layer 190 is omitted.

[0100] The contact electrode 162 may be electrically connected to a first connection line RT1 disposed therebelow, and the first connection line RT1 may be connected to the pixel driving circuit 20. Therefore, a cathode voltage may be applied to the second electrode 170 through the contact electrode 162. The first electrode 161 may be electrically connected to the second connection line RT2.

[0101] Reference Figure 5 The contact electrode 162 may be disposed coplanarly with the signal lines TL1 to TL6. The pixel driving circuit 20 may be disposed below the contact electrode 162 and the signal lines TL1 to TL6. When the pixel driving circuit 20 is a driving driver, a plurality of driving drivers may be disposed in the display panel.

[0102] The second insulating layer 133 may expose the contact electrode 162 to allow the contact electrode 162 to be electrically connected to the second electrode 170. In addition, the second insulating layer 133 may insulate the signal lines TL2 to TL5 from the second electrode 170.

[0103] Reference Figure 6 The connection portion 161 a of the first electrode 161 may extend to one side surface 131 of the bank pattern 130 and may be electrically connected to a connection line RT2 disposed on the insulating layer 122 .

[0104] The first electrode 161, the connection portion 161a, the signal line TL and / or the connection lines RT1 and RT2 may include a single metal layer or a multi-layer metal layer formed of a material selected from titanium (Ti), molybdenum (Mo) and aluminum (Al). The first electrode 161, the connection portion 161a, the signal line TL and / or the connection line RT2 may be formed into a multi-layer structure including a first layer ML1, a second layer ML2, a third layer ML3 and a fourth layer ML4.

[0105] The first layer ML1 and the third layer ML3 may include Ti or Mo. The second layer ML2 may include Al. The fourth layer ML4 may include a transparent conductive oxide layer such as indium tin oxide (ITO) or indium zinc oxide (IZO) which has high adhesion to the solder pattern 163 and also has corrosion resistance and acid resistance.

[0106] The first layer ML1 , the second layer ML2 , the third layer ML3 , and the fourth layer ML4 may be sequentially deposited and then patterned by performing a photolithography process and an etching process.

[0107] The second insulating layer 133 may include an opening 133 a disposed on the first electrode 161 and the signal line TL to expose the solder pattern 163 .

[0108] The light emitting element 100 may include a first conductive semiconductor layer 100-1, an active layer 100-2 disposed on the first conductive semiconductor layer 100-1, and a second conductive semiconductor layer 100-3 disposed on the active layer 100-2. The first electrode 214 may be disposed under the first conductive semiconductor layer 100-1, and the second electrode 252 may be disposed on the second conductive semiconductor layer 100-3.

[0109] The light emitting element 100 can be formed on a silicon wafer by using metal organic chemical vapor deposition (MOCVD), CVD, plasma enhanced CVD (PECVD), molecular beam epitaxy (MBE), hydride vapor phase epitaxy (HVPE), sputtering, or the like.

[0110] The first conductive semiconductor layer 100-1 may be implemented using a group III-V or group II-VI compound semiconductor and doped with a first dopant. The first conductive semiconductor layer 100-1 may be made of a semiconductor having a composition formula of Al x1 In y1 Ga (1-x1-y1) The first conductive semiconductor layer 100-1 may be made of a semiconductor material of N (0≤x1≤1, 0≤y1≤1, 0≤x1+y1≤1) or any one or more of InAlGaN, AlGaAs, GaP, GaAs, GaAsP and AlGaInP, but is not limited thereto. When the first dopant is an n-type dopant such as Si, Ge, Sn, Se or Te, the first conductive semiconductor layer 100-1 may be an n-type nitride semiconductor layer. However, when the first dopant is a p-type dopant, the first conductive semiconductor layer 100-1 may be a p-type nitride semiconductor layer.

[0111] The active layer 100-2 is a layer where electrons (or holes) injected through the first conductive semiconductor layer 100-1 meet holes (or electrons) injected through the second conductive semiconductor layer 100-3. As electrons and holes are recombined and light having a corresponding wavelength is generated, the active layer 100-2 may be converted to a low energy level.

[0112] The active layer 100-2 may have any one of a single well structure, a multi-well structure, a single quantum well structure, a multi-quantum well (MQW) structure, a quantum dot structure, and a quantum wire structure, and the structure of the active layer 100-2 is not limited thereto. The active layer 100-2 may generate light in a visible light band. As an example, the active layer 100-2 may output light in any one of a blue band, a green band, and a red band.

[0113] The second conductive semiconductor layer 100-3 may be disposed on the active layer 100-2. The second conductive semiconductor layer 100-3 may be implemented using a group III-V or group II-VI compound semiconductor, and the second conductive semiconductor layer 100-3 may be doped with a second dopant. The second conductive semiconductor layer 100-3 may be composed of a semiconductor having a composition formula of In x2 Al y2 Ga (1-x2-y2) The second conductive semiconductor layer 100-3 may be made of a semiconductor material of N (0≤x2≤1, 0≤y2≤1, 0≤x2+y2≤1) or a material selected from AlInN, AlGaAs, GaP, GaAs, GaAsP and AlGaInP, but is not limited thereto. When the second dopant is a p-type dopant such as Mg, Zn, Ca, Sr or Ba, the second conductive semiconductor layer 100-3 doped with the second dopant may be a p-type semiconductor layer. When the second dopant is an n-type dopant, the second conductive semiconductor layer 100-3 may be an n-type nitride semiconductor layer.

[0114] The reflector 16 may be disposed on the side surface and the lower surface of the light emitting element 100. The reflector 16 may have a structure in which a reflective material is dispersed in a resin layer, but is not necessarily limited thereto. As an example, the reflector 16 may be formed as a reflector having any different structure. The light emitted from the active layer 100-2 may be reflected upward by the reflector 16, thereby improving the light extraction efficiency. Considering the light reflection efficiency and resistance, the reflector 16 may include various conductive layers. For example, the reflector 16 may use an opaque conductive layer such as silver (Ag), aluminum (Al), molybdenum (Mo), titanium (Ti) or an alloy thereof, and a transparent conductive layer such as indium tin oxide (ITO) or indium zinc oxide (IZO), but the structure of the reflector 16 is not limited thereto.

[0115] Although the light emitting element 100 has been described as having a vertical structure in which the lower electrode 214 and the upper electrode 252 are disposed above and below the light emitting structure in the exemplary embodiment, the light emitting element may have a lateral structure or a flip chip structure other than the vertical structure.

[0116] Reference Figure 7 , the main light emitting element 102a and the sub-light emitting element 102b of the sub-pixel may be disposed on the bank pattern 130. An example of a second light emitting element will be described. The 1-1 electrode 161-1 connected to the main light emitting element 102a may extend to one side surface of the bank pattern 130 and may be electrically connected to the 2-1 connection line RT21 disposed thereunder. The 1-2 electrode 161-2 connected to the sub-light emitting element 102b may extend to the other side surface of the bank pattern 130 and may be electrically connected to the 2-2 connection line RT22 disposed thereunder.

[0117] The pixel driving circuit 20 may apply an anode voltage to the main light emitting element 102a through the 2-1 connection line RT21, and apply an anode voltage to the sub light emitting element 102b through the 2-2 connection line RT22. The pixel driving circuit 20 may apply a cathode voltage to the main light emitting element 102a and the sub light emitting element 102b through the first connection line RT1 and the second electrode 170.

[0118] The pixel driving circuit 20 can adjust the brightness by driving only the main light emitting element 102a, and can adjust the brightness by driving the main light emitting element 102a and the sub-light emitting element 102b at the same time. When the main light emitting element 102a becomes a dark spot, the pixel driving circuit 20 can adjust the brightness by driving only the sub-light emitting element 102b.

[0119] Figure 8 is a view illustrating a display device according to another exemplary embodiment of the present disclosure. Fig. 9 is along Figure 8 Cross-sectional view along line IV-IV'.

[0120] Reference Figure 8 and Fig. 9 , the second electrode 170 may be electrically connected to the contact electrode 162 through the contact hole TH1 formed in the second interlayer insulating layer 142. The second interlayer insulating layer 142 may include a contact hole TH1 exposing the contact electrode 162. The second electrode 170 may be inserted into the contact hole TH1 of the second interlayer insulating layer 142 and may contact the upper surface of the contact electrode 162. The contact hole TH1 may be formed in the outer region of the pixel.

[0121] Fig.10 is shown along Figure 1 A cross-sectional view of a longitudinal cross-sectional structure of a portion of a display panel taken along line II' in FIG. Figure 4 Enlarged cross-sectional view of "B".

[0122] Fig.11 is shown along Figure 1 A cross-sectional view of a longitudinal cross-sectional structure of a portion of a display panel taken along line II' in FIG. Figure 4 Enlarged cross-sectional view of "C".

[0123] Reference Fig.10 and Fig.11According to the present exemplary embodiment, the display device 10 may include a pixel driving circuit 20 formed on a substrate 110, a buffer layer 121 disposed on the pixel driving circuit 20, connecting lines RT1 and RT2 disposed on the buffer layer 121, an insulating layer 122 disposed on the connecting lines RT1 and RT2, a dam pattern 130 disposed on the insulating layer 122, a first electrode 161 disposed above the dam pattern 130, and a light emitting element 100 disposed and bonded on the first electrode 161 and connected to the first electrode 161 through a solder pattern 163.

[0124] The light emitting element 100 emits light through recombination of electrons and holes according to current flowing between the first conductive semiconductor layer 100 - 1 and the second conductive semiconductor layer 100 - 3 .

[0125] The lower electrode 214 of each of the light emitting elements 100 may be electrically connected to the anode voltage output terminal of the pixel driving circuit 20 through a pad pattern 230 formed on a lower surface thereof via the solder pattern 163 , the first electrode 161 , and at least one line pattern.

[0126] The second electrode 170 of each of the light emitting elements 100 may be electrically connected to a cathode voltage output terminal of the pixel driving circuit 20 via the upper electrode 252 and one or more connection lines RT1 and RT2 .

[0127] Under the upper surface of the light emitting element 100, the bank pattern 130 and the light emitting element 100 may be covered by a first interlayer insulating layer 141. The first interlayer insulating layer 141 may have a stacked structure of any one or more of an organic insulating material and an inorganic insulating material including an oxide film or a nitride film.

[0128] A second passivation layer 220 made of an inorganic insulating material or an organic insulating material may also be formed (see Figure 4 ) to surround the periphery of the first interlayer insulating layer 141. The second interlayer insulating layer 142 may be disposed on the first insulating layer 122 together with the first interlayer insulating layer 141.

[0129] The second electrode 170 may be disposed on the first interlayer insulating layer 141 and commonly connected to all pixels PXL. The second electrode 170 may be a light-transmitting thin metal electrode. The first electrode 161, the second electrode 170, and the black matrix 180 may be stacked in a non-luminous region of the pixel region. The second electrode 170 may be made of a transparent electrode material such as ITO, but is not necessarily limited thereto.

[0130] The first electrode 161 may be formed as a single metal layer or a multi-layer metal layer formed of a material selected from the group consisting of Ti, Mo, and Al. A transparent electrode material layer formed of a material selected from the group consisting of ITO and IZO may be stacked on the metal layer.

[0131] The black matrix 180 may be made of an organic insulating material to which a black pigment is added. The second electrode 170 may make contact with the contact electrode 162 under the black matrix 180 .

[0132] The first interlayer insulating layer 141 may include a contact hole (not shown) exposing the contact electrode 162. A portion of the second electrode 170 may be formed in the contact hole of the first interlayer insulating layer 141 so that the second electrode 170 may contact the upper surface of the contact electrode 162. The contact hole (not shown) may be formed in the outer region of the pixel in the form of surrounding the bank pattern 130.

[0133] The capping layer 190 may be made of an organic insulating material covering the black matrix 180 and the second electrode 170. The same insulating layer as the first interlayer insulating layer 141 may be evenly formed between the capping layer 190 and the second electrode 170. In this case, a passivation layer (not shown) made of an inorganic insulating material or an organic insulating material may cover the second electrode 170 with a thickness smaller than that of the first interlayer insulating layer 141.

[0134] Fig.12 is a plan view showing a light emitting element of a display panel according to an exemplary embodiment of the present specification.

[0135] Fig.13 is shown along Fig.12 4 is a cross-sectional view of a longitudinal cross-sectional structure of a portion of the light emitting element taken along line VV'.

[0136] Reference Fig.12 and Fig.13 According to the exemplary embodiment of the present specification, the light emitting element 100 may be transferred to a substrate (not shown). Fig.10 110) on the bank pattern (not shown, Fig.10 130) and is arranged on and overlaps with the bank pattern 130.

[0137] In addition, the light emitting element 100 may be connected to a first electrode (not shown, Fig.10 161) in contact with and overlaps with the first electrode 161.

[0138] The light emitting layer 100 a may include a lower surface provided with the lower electrode 214 , an upper surface provided with the upper electrode 252 , and a side surface between the lower surface and the upper surface.

[0139] The first flat protrusion 100a-1 and the second flat protrusion 100a-2 provided with the lower electrode 214 and the upper electrode 252 may be formed on the lower surface and the upper surface of the light emitting layer 100a. For example, the first flat protrusion 100a-1 provided with the lower electrode 214 may be formed on the lower surface of the light emitting layer 100a, and the second flat protrusion 100a-2 provided with the upper electrode 252 may be formed on the upper surface of the light emitting layer 100a. A step portion (not shown) may be formed on the side surface of the first flat protrusion 100a-1 and the second flat protrusion 100a-2. For example, a step portion (not shown) may be formed on the side surface of each of the first flat protrusion 100a-1 and the second flat protrusion 100a-2. However, the present disclosure is not limited thereto.

[0140] The step portion has a height smaller than those of the first and second flat protrusions 100 a - 1 and 100 a - 2 , and the reflector 16 may be disposed on at least a portion of the side surface of the light emitting element 100 below the step portion.

[0141] The area of ​​the light emitting element 100 may be smaller than or equal to the area of ​​the bank pattern 130 and the first electrode 161. However, the present disclosure is not necessarily limited thereto. For process margin, the area of ​​the first electrode 161 may be preferably larger than the area of ​​the light emitting element 100.

[0142] like Fig.10 As shown, the light emitting element 100 may include: a light emitting layer 100a, which includes a first conductive semiconductor layer 100-1, a second conductive semiconductor layer 100-3 and an active layer 100-2 interposed therebetween; a lower electrode 214, which is in contact with the first conductive semiconductor layer 100-1 of the light emitting layer 100a; an upper electrode 252, which is in contact with the second conductive semiconductor layer 100-3 of the light emitting layer 100a; and a reflector 16, which covers the side surface and the lower surface of the lower electrode 214 and the light emitting layer 100a.

[0143] The reflector 16 may include a first passivation layer 216 and a second passivation layer 220 surrounding the light emitting layer 100 a and the lower electrode 214 , and a reflective layer 218 disposed therebetween.

[0144] The first passivation layer 216 and the second passivation layer 220 may serve as an insulating layer or a protective layer.

[0145] The lower electrode 214 in contact with the first conductive semiconductor layer 100-1 may include an anode, and the upper electrode 252 in contact with the second conductive semiconductor layer 100-3 may include a cathode. The light emitting layer 100a may include one or more quantum well layers. The doped first conductive semiconductor layer 100-1 and the second conductive semiconductor layer 100-3 and the active layer 100-2 of the light emitting element 100 may be made of a II-VI or III-V compound semiconductor. The light emitting element 100 may be manufactured on a semiconductor substrate by a separate manufacturing process and disposed on the solder pattern 163 by a transfer process.

[0146] The light emitting layer 100 a of the light emitting element 100 according to the present exemplary embodiment has a PN junction structure in which a first conductive semiconductor layer 100 - 1 , an active layer 100 - 2 , and a second conductive semiconductor layer 100 - 3 are sequentially formed.

[0147] In addition, the side surfaces of the lower electrode 214 and the light emitting layer 100a are surrounded by the first passivation layer 216 and the second passivation layer 220 forming the reflector 16, and the reflective layer 218 is formed to allow light from the light emitting element 100 to be reflected between the first passivation layer 216 and the second passivation layer 220 and emitted outward.

[0148] The pad pattern 230 is formed on the lower surface of the light emitting element 100 , and the pad pattern 230 is bonded to the solder pattern 163 formed on the first electrode 161 disposed above the bank pattern 130 .

[0149] The light emitting element 100 may be formed in an inverted trapezoidal shape, the width of which increases from the bottom toward the center portion thereof.

[0150] The area of ​​the light emitting element 100 may be less than or equal to the areas of the bank pattern 130 and the first electrode 161. However, the present disclosure is not necessarily limited thereto.

[0151] A width between left and right surfaces of a central portion of the light emitting layer 100 a of the light emitting element 100 may be greater than a width between left and right surfaces of a lower portion and an upper portion thereof.

[0152] The width between the left and right surfaces of the lower portion of the light emitting element 100 and the width between the left and right surfaces of the upper portion of the light emitting element 100 may be smaller than the width between the left and right surfaces of the central portion thereof.

[0153] Portions of the light emitting layer 100a located under both sides of the upper electrode 252 of the light emitting element 100 may be exposed. However, the present disclosure is not necessarily limited thereto.

[0154] The first passivation layer 216 and the second passivation layer 220 may be provided in a form surrounding the entire side surface except for a portion of an upper portion of the light emitting layer 100 a of the light emitting element 100 and the side surface and the lower surface of the lower electrode 214 .

[0155] The light emitting element 100 is separated from the growth substrate 210 before being transferred to the panel, and is disposed on the carrier substrate 250 .

[0156] When the active layer 100-2 as an epitaxial structure is separated from the growth substrate 210, laser (laser lift-off (LLO)) is irradiated from a laser source to the growth substrate, so the carrier substrate 250 is made of a material capable of transmitting laser light. For example, the growth substrate 210 may be made of sapphire.

[0157] The carrier substrate 250 may be made of polymer resin, glass, quartz, a synthetic resin film, a transparent substrate, and a transparent flexible polymer substrate.

[0158] The first conductive semiconductor layer 100-1 forming the light emitting layer 100a is a semiconductor layer in which holes with positive charges move as carriers to generate current, and can be made of a P-GaN-based material. The P-GaN-based material can be GaN, AlGaN, InGaN, AlInGaN, etc., and the impurities used to dope the P-type semiconductor layer can include Mg, Zn, Be, etc.

[0159] A lower electrode 214 is formed on the first conductive semiconductor layer 100-1 to form an ohmic contact, and a pad pattern 230 is formed on a lower surface of the lower electrode 214. As the light emitting element 100 is transferred to the panel, the light emitting element 100 may contact a pixel electrode (not shown) to receive a voltage corresponding to a data voltage through a TFT.

[0160] The second conductive semiconductor layer 100-3 is a semiconductor layer in which free electrons with negative charges move as carriers to generate current, and may be made of an n-GaN-based material. The n-GaN-based material may be GaN, AlGaN, InGaN, AlInGaN, etc., and impurities used to dope the second conductive semiconductor layer 100-3 may include Si, Ge, Se, Te, C, etc. In addition, in some cases, a buffer layer such as an undoped GaN-based semiconductor layer may be additionally formed between the growth substrate 210 and the N-type semiconductor layer.

[0161] The active layer 100-2 may be disposed on the first conductive semiconductor layer 100-1 and have an MQW structure having a well layer and a barrier layer having a band gap greater than that of the well layer. For example, the active layer 100-2 may have an MQW structure such as InGaN / GaN.

[0162] Furthermore, the first passivation layer 216 and the second passivation layer 220 forming the reflector 16 are disposed around the lower and side surfaces of the lower electrode 214 and the light emitting layer 100a. Each of the first and second passivation layers 216 and 220 may be formed as a multilayer film or a single layer film made of an inorganic material.

[0163] The first passivation layer 216 and the second passivation layer 220 may serve as an insulating layer or a protective layer.

[0164] The first passivation layer 216 and the second passivation layer 220 may be made of any one selected from the group consisting of SiO 2 , Si 3 N 4 , and resin, or made of an oxide including at least one of Ni, Ti, Pt, Pd, Cu, CuW, Mo, MoW, Ag, and Al.

[0165] For example, the inorganic material may be a metal oxide or a metal nitride, and specifically, the inorganic material may include SiO2, SiN x , at least one of SiON, Al2O3, TiO2, Ta2O5, HfO2 and ZrO2.

[0166] In addition, the reflective layer 218 may be disposed between the first passivation layer 216 and the second passivation layer 220 and disposed to overlap the lower and side surfaces of the light emitting layer 100a and the lower electrode 214. The reflective layer 218 reflects light generated in the light emitting element 100 and emits the reflected light upward from the light emitting element 100.

[0167] The reflective layer 218 may be formed as a single metal layer or a multilayer metal layer made of one or more of Al, Pt, Pd, Ag, Mg, Au, Ni, Nd, Ir, Cr, Li, Ca, Mo, Ti, W, and Cu. In particular, a metal layer material having a high light reflectivity may be preferably used as a material for the reflective layer 218. In the present exemplary embodiment, aluminum (Al) is used as a material for the reflective layer 218. However, the present disclosure is not limited thereto.

[0168] The lower electrode 214 may contact the first conductive semiconductor layer 100 - 1 of the light emitting layer 100 a , and the upper electrode 252 may contact the second conductive semiconductor layer 100 - 3 .

[0169] The lower electrode 214 and the upper electrode 252 may be made of a transparent or semi-transparent electrode material, but are not necessarily limited thereto. The transparent or semi-transparent electrode material may include one or more selected from the group consisting of ITO, IZO, zinc oxide (ZnO), indium oxide (In2O3), indium gallium oxide (IGO), and aluminum zinc oxide (AZO).

[0170] In addition, a pad pattern 230 may be formed on a lower surface of the lower electrode 214 to form an ohmic contact.

[0171] The pad pattern 230 may be formed as a stacked structure of first, second, third, and fourth metal layers 230a, 230b, 230c, and 230d, or a single layer structure formed of a single metal layer that is any one of the above metal layers, but is not necessarily limited thereto.

[0172] When the pad pattern 230 has a stacked structure, the second metal layer 230b and the third metal layer 230c may be formed between the first metal layer 230a and the fourth metal layer 230d. Although each of the first metal layer 230a to the fourth metal layer 230d may be made of any one of Au, Al and Ni or an alloy thereof, and the first metal layer 230a and the fourth metal layer 230d may be made of a metal different from the second metal layer 230b and the third metal layer 230c, the present disclosure is not limited thereto. The second metal layer 230b may be made of a metal different from the first metal layer 230a, the third metal layer 230c and the fourth metal layer 230d. For example, the first metal layer 230a and the fourth metal layer 230d may contain gold (Au), the second metal layer 230b may contain aluminum (Al), and the third metal layer 230c may contain nickel (Ni).

[0173] In addition, the number of layers of the laminated structure of the pad pattern 230 is not limited to one or four layers, and the number of layers of the laminated structure of the pad pattern 230 may be n (where n is an integer) layers. For example, when the pad pattern 230 has a laminated structure, the second metal layer, the third metal layer, and the fourth metal layer may be formed between the first metal layer and the fifth metal layer. Each of the first to fifth metal layers may be made of any one of Au, Al, and Ni or an alloy thereof, and at least one of the first to fifth metal layers may be made of a metal different from the other layers, however, the present disclosure is not limited thereto.

[0174] When formed on the growth substrate 210 (see Fig.14A ) is transferred to the substrate 110 via the carrier substrate 250 (see Fig.10 ), the lower electrode 214 is connected to the pixel electrode (not shown) through the pad pattern 230, so that a positive voltage is applied to the lower electrode 214 in contact with the first conductive semiconductor layer 100-1 through the pixel electrode, and a negative voltage is applied to the upper electrode 252 in contact with the first conductive semiconductor layer 100-1 through the second electrode 170. Therefore, current flows between the pixel electrode (not shown) and the second electrode 170 by the movement of electrons of the second conductive semiconductor layer 100-3 and the flow of holes of the first conductive semiconductor layer 100-1.

[0175] In addition, the light emitting layer 100 a emits light through recombination of electrons and holes according to current flowing between the pixel electrode and the second electrode 170 .

[0176] Therefore, light generated in the light emitting element 100 is reflected by the reflective layer 218 provided in the first passivation layer 216 and the second passivation layer 220 , and is emitted upward from the light emitting element 100 .

[0177] Hereinafter, a process of manufacturing a light emitting element of a display device according to an exemplary embodiment of the present specification will be described.

[0178] Fig.14A , Fig. 14B , Fig. 14C , Fig.14D , Fig.14E , Fig.14F , Figure 14G , Fig.14H , Fig.14I , Fig.14J , Figure 14K , Figure 14L , Fig.14M , Fig.14N , Fig.14O , Figure 14P , Figure 14Q , Figure 14R , Figure 14S and Figure 14T is a cross-sectional view illustrating a process of manufacturing a light emitting element of a display device according to an exemplary embodiment of the present specification.

[0179] Reference Fig.14A A growth substrate 210 for forming an epitaxial structure forming one of red (RED) type, green (GREEN) type and blue (BLUE) type light emitting elements is provided.

[0180] The growth substrate 210 may be formed as a conductive substrate or an insulating substrate. The growth substrate 210 may be made of at least any one of sapphire, SiC, Si, GaAs, GaN, ZnO, Si, GaP, InP, Ge, and Ga2O3. However, the present disclosure is not necessarily limited thereto.

[0181] Next, a first conductive semiconductor layer 100 - 1 , an active layer 100 - 2 , and a second conductive semiconductor layer 100 - 3 forming a light emitting layer portion 100 a ′ are sequentially deposited on the growth substrate 210 .

[0182] The first conductive semiconductor layer 100 - 1 , the active layer 100 - 2 , and the second conductive semiconductor layer 100 - 3 may be formed by using a MOCVD method, a CVD method, a PECVD method, an MBE method, a HVPE method, or an epitaxial method.

[0183] The first conductive semiconductor layer 100 - 1 is a semiconductor layer in which holes having positive charges move as carriers to generate current.

[0184] The first conductive semiconductor layer 100-1 may include a semiconductor layer having a composition formula of In selected from GaN, AlN, AlGaN, InGaN, InN, InAlGaN, and AlInN. x Al y Ga 1-x-y A semiconductor material of N (0≤x≤1, 0≤xy≤1, 0≤x+y≤1) and doped with a p-type dopant such as Mg, Zn, Ca, Sr or Ba.

[0185] Alternatively, the first conductive semiconductor layer 100-1 may be made of a P-GaN-based material, which may be GaN, AlGaN, InGaN, AlInGaN, etc., and impurities for doping the P-type semiconductor layer may include Mg, Zn, Be, etc.

[0186] The second conductive semiconductor layer 100 - 3 is a semiconductor layer in which free electrons having negative charges move as carriers to generate current.

[0187] The second conductive semiconductor layer 100-3 may be formed by including, for example, an n-type semiconductor layer. The second conductive semiconductor layer 100-3 may include a semiconductor layer having a composition formula of In selected from GaN, AlN, AlGaN, InGaN, InN, InAlGaN, and AlInN. x Al y Ga 1-x-y A semiconductor material of N (0≤x≤1, 0≤xy≤1, 0≤x+y≤1) and doped with an n-type dopant such as Si, Ge or Sn.

[0188] Alternatively, the second conductive semiconductor layer 100-3 may be made of an n-GaN-based material. The n-GaN-based material may be GaN, AlGaN, InGaN, AlInGaN, etc., and the impurities used to dope the second conductive semiconductor layer 100-3 may include Si, Ge, Se, Te, C, etc.

[0189] In addition, the present exemplary embodiment is not limited thereto, and the first conductive semiconductor layer 100 - 1 may include an n-type semiconductor layer, and the second conductive semiconductor layer 100 - 3 may include a p-type semiconductor layer.

[0190] The active layer 100 - 2 is a region where electrons and holes are recombined, and as the electrons and holes are recombined, the active layer 100 - 2 may be transformed to a lower energy level to generate light having a corresponding wavelength.

[0191] The active layer 100-2 may be composed of, for example, a composition formula of Inx Al y Ga 1-x-y The semiconductor material is N (0x≤1, 0≤yx≤1, 0≤x+y≤1) and is formed into a single quantum well structure or an MQW structure.

[0192] In addition, the active layer 100 - 2 may include a quantum wire structure or a quantum dot structure.

[0193] The active layer 100-2 may be disposed on the first conductive semiconductor layer 100-1 and may have an MQW structure having a well layer and a barrier layer having a band gap higher than that of the well layer. For example, the active layer 100-2 may have an MQW structure such as InGaN / GaN.

[0194] Then, refer to Fig. 14B , a first flat protrusion 100a-1 is formed by selectively patterning the light emitting layer portion 100a' to remove a portion of the light emitting layer portion 100a' in a region other than a region serving as an active layer.

[0195] Next, refer to Fig. 14C , a lower electrode layer 214a serving as an electrode made of a transparent conductive material such as ITO or IZO is deposited on the light emitting layer portion 100a'.

[0196] The lower electrode layer 214a may be made of a transparent or semi-transparent electrode material, but is not necessarily limited thereto. The transparent or semi-transparent electrode material may include one or more selected from the group consisting of ITO, IZO, ZnO, In2O3, IGO, and AZO.

[0197] Then, refer to Fig.14D , a patterning process is performed using a photographic process to selectively remove the lower electrode layer 214a and the light-emitting layer portion 100a' disposed thereunder, so that the light-emitting element region is separated, and the lower electrode 214 and the light-emitting layer 100a of the light-emitting element are formed. In this case, the lower electrode 214 can be formed on the first flat protrusion 100a-1 of the light-emitting layer 100a.

[0198] Next, refer to Fig.14E , a first passivation layer portion 216a is formed on the growth substrate 210 including the lower electrode 214 and the light emitting layer 100a. The first passivation layer portion 216a may be formed as a multi-layer film or a single-layer film made of an inorganic material or an organic material.

[0199] The first passivation layer portion 216 a may be made of any one selected from the group consisting of SiO 2 , Si 3 N 4 , and resin, or an oxide including at least one of Ni, Ti, Pt, Pd, Cu, CuW, Mo, MoW, Ag, and Al.

[0200] For example, the inorganic material may be a metal oxide or a metal nitride, and specifically, the inorganic material may include SiO2, SiN x , at least one of SiON, Al2O3, TiO2, Ta2O5, HfO2 and ZrO2.

[0201] Then, refer to Fig.14F , the first passivation layer 216 that finitely separates each of the light emitting regions is formed by selectively patterning the first passivation layer portion 216a.

[0202] The first passivation layer 216 may be disposed on side surfaces of the light emitting layer 100 a and side and lower surfaces of the lower electrode 214 .

[0203] Then, refer to Figure 14G , a metal layer 218a serving as a reflective mirror is formed on the growth substrate 210 including the first passivation layer 216 formed on the separated light emitting element region.

[0204] The metal layer 218a may be formed as a single layer or a multilayer made of one or more of Al, Pt, Pd, Ag, Mg, Au, Ni, Nd, Ir, Cr, Li, Ca, Mo, Ti, W, and Cu. In particular, a material having a high light reflectivity may be preferably used as the material of the metal layer 218a. In the present exemplary embodiment, an example of a case where aluminum (Al) is used as the material of the metal layer 218a is described, but the present disclosure is not limited thereto.

[0205] Next, refer to Fig.14H The metal layer 218a is selectively patterned by a photolithography process to form a reflective layer 218 in each light emitting element region. When the metal layer 218a is patterned, a portion of the first passivation layer 216 disposed under the metal layer 218a is removed simultaneously with the metal layer 218a disposed on the light emitting element region, thereby also exposing a portion of the lower electrode 214.

[0206] Then, refer to Fig.14I , a second passivation layer portion 220a is formed on the growth substrate 210 including the reflective layer 218 and the exposed portion of the lower electrode 214. The second passivation layer portion 220a may be formed as a multi-layer film or a single-layer film made of an inorganic material.

[0207] The second passivation layer portion 220 a may be made of any one selected from the group consisting of SiO 2 , Si 3 N 4 , and resin, or an oxide including at least one of Ni, Ti, Pt, Pd, Cu, CuW, Mo, MoW, Ag, and Al.

[0208] For example, the inorganic material may be a metal oxide or a metal nitride, and specifically, the inorganic material may include SiO2, SiN x , at least one of SiON, Al2O3, TiO2, Ta2O5, HfO2 and ZrO2.

[0209] When forming the second passivation layer part 220 a , the second passivation layer part 220 a may be made of the same material as or a different material from the first passivation layer part 216 a .

[0210] Next, refer to Fig.14J The second passivation layer 220 that allows each light emitting region to be limitedly separated is formed by selectively patterning the second passivation layer part 220a.

[0211] When the second passivation layer portion 220 a is patterned, the second passivation layer portion 220 a contacting the lower electrode 214 and the surface of the growth substrate 210 may also be removed.

[0212] As described above, the reflector 16 may include the first passivation layer 216, the second passivation layer 220, and the reflective layer 218 interposed therebetween.

[0213] The reflective layer 218 forming the reflector 16 may be provided in a form surrounded by the first passivation layer 216 and the second passivation layer 220. In addition, the first passivation layer 216 and the second passivation layer 220 may be provided in a form surrounding the side surface of the light emitting layer 100a and the side surface and the upper surface of the lower electrode 214. In addition, the reflective layer 218 may be provided between the first passivation layer 216 and the second passivation layer 220 to overlap with the side surface of the light emitting layer 100a and the side surface and the upper surface of the lower electrode 214.

[0214] Then, refer to Figure 14K A pad pattern 230 contacting the lower electrode 214 is formed by depositing a metal material layer on the entire surface of the growth substrate 210 including the exposed portion of the lower electrode 214 and the second passivation layer 220 and selectively patterning the metal material layer.

[0215] The pad pattern 230 may be formed as a stacked structure of first, second, third, and fourth metal layers 230a, 230b, 230c, and 230d, or a single layer structure formed of a single metal layer that is any one of the above metal layers, but is not necessarily limited thereto.

[0216] When the pad pattern 230 has a stacked structure, the second metal layer 230b and the third metal layer 230c may be interposed between the first metal layer 230a and the fourth metal layer 230d. Although each of the first metal layer 230a to the fourth metal layer 230d may be made of any one of Au, Al and Ni or an alloy thereof, and the first metal layer 230a and the fourth metal layer 230d may be made of a metal different from the second metal layer 230b and the third metal layer 230c, the present disclosure is not limited thereto. The second metal layer 230b may be made of a metal different from the first metal layer 230a, the third metal layer 230c and the fourth metal layer 230d. For example, the first metal layer 230a and the fourth metal layer 230d may contain gold (Au), the second metal layer 230b may contain aluminum (Al), and the third metal layer 230c may contain nickel (Ni).

[0217] In addition, the number of layers of the laminated structure of the pad pattern 230 is not limited to one or four layers, and the number of layers of the laminated structure of the pad pattern 230 may be n (where n is an integer) layers. For example, when the pad pattern 230 has a laminated structure, the second metal layer, the third metal layer, and the fourth metal layer may be formed between the first metal layer and the fifth metal layer. Each of the first to fifth metal layers may be made of any one of Au, Al, and Ni or an alloy thereof, and at least one of the first to fifth metal layers may be made of a metal different from the other layers, however, the present disclosure is not limited thereto.

[0218] Next, refer to Figure 14L A sacrificial layer 232a is formed on the entire surface of the overall structure of the growth substrate 210 including the pad pattern 230. Any one of insulating materials including SiO2, SiN, etc. may be selectively used as the sacrificial layer 232a.

[0219] Then, refer to Fig.14M , the sacrificial layer 232a is selectively patterned through a mask process to separate the light emitting element region, and a contact hole 234h exposing a portion of the pad pattern 230 is formed at the same time.

[0220] Next, refer to Fig.14N , a dummy insulating layer 236a is formed on the entire surface of the growth substrate 210 including the remaining sacrificial layer 232 to planarize the growth substrate 210, thereby completing the process of manufacturing a light emitting element on the growth substrate 210. The material of the dummy insulating layer 236a may be selected from benzocyclobutene (BCB) or other insulating materials.

[0221] Hereinafter, a process of arranging and bonding a light emitting element on a carrier substrate will be described.

[0222] The carrier substrate 250 is provided, and a substrate separation process of separating the light emitting element from the growth substrate 210 is performed to transfer the light emitting element to the carrier substrate 250 .

[0223] The carrier substrate 250 may be made of polymer resin, glass, quartz, a synthetic resin film, a transparent substrate, and a transparent flexible polymer substrate.

[0224] Reference Fig.14O , the structure formed on the growth substrate 210 is disposed and bonded on the carrier substrate 250. Although not shown in the figure, in order to laminate the growth substrate 210 in an inverted state on the carrier substrate 250, an ultraviolet reactive resin layer (not shown) that can be used as an adhesive layer can be formed on the carrier substrate 250.

[0225] In this case, in a state where the growth substrate 210 is inverted, a portion of the dummy insulating layer 236 a is disposed and bonded on the carrier substrate 250 , and the growth substrate 210 is exposed to the outside.

[0226] Next, refer to Figure 14P , after the light emitting element portion of the growth substrate 210 is brought into contact with the ultraviolet reactive resin layer (not shown) of the carrier substrate 250 , laser is irradiated to a boundary between the light emitting element portion and the growth substrate 210 .

[0227] Laser light radiated from the laser source after passing through the growth substrate 210 may separate the light emitting element portion from the growth substrate 210. In this case, the light emitting element portion may maintain a state of contact with the ultraviolet reactive resin layer (not shown) of the carrier substrate 250.

[0228] Then, refer to Figure 14Q After the growth substrate 210 is removed by laser irradiation, an upper electrode layer 252a is formed on the first passivation layer 216 and the second passivation layer 220 including the light emitting layer 100a of the exposed area as the light emitting element portion, the reflective layer 218 disposed between the first passivation layer 216 and the second passivation layer 220, the sacrificial layer 232 and the dummy insulating layer 236a.

[0229] The upper electrode layer 252a may be made of a transparent or semi-transparent electrode material, but is not necessarily limited thereto. The transparent or semi-transparent electrode material may include one or more selected from the group consisting of ITO, IZO, ZnO, In2O3, IGO, and AZO. In the present disclosure, an example of a case where ITO is used as a transparent electrode material will be described.

[0230] Next, refer to Figure 14R, the upper electrode layer 252a is selectively patterned by a mask process, thereby forming the upper electrode 252 on the light emitting layer 100a. In this case, when the upper electrode layer 252a is patterned, the upper portions of the first passivation layer 216 and the second passivation layer 220 including the upper electrode layer 252a and the side surfaces of the light emitting layer 100a, the upper region of the reflective layer 218 disposed between the first passivation layer 216 and the second passivation layer 220, and the upper regions of a portion of the dummy insulating layer 236a and the sacrificial layer 232 may be etched together.

[0231] The second flat protrusion 100 a - 2 may be formed on the upper surface of the light emitting layer 100 a , and a stepped portion (not shown) may be formed on the side surface of the light emitting layer 100 a .

[0232] As described above, the light emitting layer 100a, the lower electrode 214, the upper electrode 252, and the reflective layer 218 disposed between the first passivation layer 216 and the second passivation layer 220 are formed, wherein the first passivation layer 216 and the second passivation layer 220 surround the light emitting element 100 (see Figure 14T )'s lower electrode 214 and the side surfaces and lower surfaces of the light-emitting layer 100a.

[0233] Then, refer to Figure 14S , in the externally exposed region, the dummy insulating layer 236 a disposed between the sacrificial layers 232 is selectively removed by performing a dry etching process.

[0234] Next, refer to Figure 14T The remaining sacrificial layer 232 is removed by a wet etching process so that the light emitting element 100 remains on the carrier substrate 250 .

[0235] As described above, the process of separating the light emitting element 100 according to an exemplary embodiment of the present disclosure from the growth substrate 210 and bonding the light emitting element 100 on the carrier substrate 250 is completed.

[0236] Furthermore, hereinafter, a light emitting element of a display device according to another exemplary embodiment of the present specification will be described.

[0237] Fig.15 is a plan view illustrating a light emitting element of a display device according to another exemplary embodiment of the present specification.

[0238] Fig.16 is shown along Fig.15 5 is a cross-sectional view of a longitudinal cross-sectional structure of a portion of the light-emitting element taken along line VI-VI'.

[0239] Reference Fig.15 and Fig.16According to another exemplary embodiment of the present specification, the light emitting element 300 may be transferred and disposed on a substrate (not shown). Fig.10 The bank pattern (not shown, Fig.10 130) in the middle to overlap with the bank pattern 130.

[0240] In addition, the light emitting element 300 may be connected to a first electrode (not shown, Fig.10 161) in contact to overlap with the first electrode 161.

[0241] The area of ​​the light emitting element 300 may be smaller than or equal to the area of ​​the bank pattern 130 and the first electrode 161. However, the present disclosure is not necessarily limited thereto. In addition, for process margin, the area of ​​the first electrode 161 may be preferably larger than the area of ​​the light emitting element 300.

[0242] like Fig.15 As shown, the light emitting element 300 may include: a light emitting layer 300a, which includes a first conductive semiconductor layer 300-1, a second conductive semiconductor layer 300-3 and an active layer 300-2 interposed therebetween; a lower electrode 314, which contacts the first conductive semiconductor layer 300-1 of the light emitting layer 300a; an upper electrode 352, which contacts the second conductive semiconductor layer 300-3 of the light emitting layer 300a; and a reflector 36, which covers the side surface and the lower surface of the lower electrode 314 and the light emitting layer 300a.

[0243] The reflector 36 may include a first passivation layer 316 and a second passivation layer 320 surrounding the light emitting layer 300 a and the lower electrode 314 , and a reflective layer 318 disposed therebetween.

[0244] The first passivation layer 316 and the second passivation layer 320 may serve as an insulating layer or a protective layer.

[0245] The lower electrode 314 contacting the first conductive semiconductor layer 300 - 1 may include an anode, and the upper electrode 352 contacting the second conductive semiconductor layer 300 - 3 may include a cathode.

[0246] The light emitting layer 300a may include one or more quantum well layers. The doped first conductive semiconductor layer 300-1 and the second conductive semiconductor layer 300-3 and the active layer 300-2 of the light emitting element 300 may be made of a II-VI group or a III-V group compound semiconductor. The light emitting element 300 may be manufactured on a semiconductor substrate through a separate manufacturing process and may be disposed on a solder pattern (not shown) through a transfer process. Fig.10 162).

[0247] The light emitting layer 300 a may include a lower surface provided with the lower electrode 314 , an upper surface provided with the upper electrode 352 , and a side surface or an edge portion between the lower surface and the upper surface.

[0248] The lower surface of the light emitting layer 300a may include a first flat protrusion 300a-1 provided with a lower electrode 314. The upper surface of the light emitting layer 300a may include a second flat protrusion 300a-2 provided with an upper electrode 352. The first flat protrusion 300a-1 and the second flat protrusion 300a-2 may include a step portion (not shown) formed on the side surface thereof. For example, each of the first flat protrusion 300a-1 and the second flat protrusion 300a-2 may include a step portion (not shown) formed on the side surface thereof. However, the present disclosure is not limited thereto.

[0249] The step portion has a height smaller than those of the first and second flat protrusions 300 a - 1 and 300 a - 2 , and the reflector 312 may be disposed on at least a portion of the side surface of the light emitting element 300 below the step portion.

[0250] The lower electrode 314 in contact with the first conductive semiconductor layer 300-1 may include an anode, and the upper electrode 352 in contact with the second conductive semiconductor layer 300-2 may include a cathode. The light emitting layer 300a may include one or more quantum well layers. The doped first conductive semiconductor layer 300-1 and the second conductive semiconductor layer 300-3 and the active layer 300-2 of the light emitting element 300 may be made of a II-VI or III-V compound semiconductor. The light emitting element 300 may be manufactured on a semiconductor substrate by a separate manufacturing process and disposed on the solder pattern 163 (see FIG. 1 ) by a transfer process. Fig.10 )superior.

[0251] The light emitting layer 300 a of the light emitting element 300 according to another exemplary embodiment of the present disclosure is a PN junction structure in which a first conductive semiconductor layer 300 - 1 , an active layer 300 - 2 , and a second conductive semiconductor layer 300 - 3 are sequentially formed.

[0252] Furthermore, the outer surfaces of the lower electrode 314 and the light emitting layer 300a are surrounded by the first passivation layer 316 and the second passivation layer 320, and the reflective layer 318 is formed to allow light from the light emitting element 300 to be reflected between the first passivation layer 316 and the second passivation layer 320 and emitted outward.

[0253] The pad pattern 324 is formed on the lower surface of the light emitting element 300, and the pad pattern 324 is bonded to the bank pattern (not shown). Fig.10 On the solder pattern 163 formed on the first electrode 161 above 130).

[0254] As will be described below Figure 17K As shown, the pad pattern 324 may be formed as a stacked structure of a first metal layer 324a, a second metal layer 324b, a third metal layer 324c, and a fourth metal layer 324d, or a single layer structure formed of a single metal layer being any one of the above metal layers, but is not necessarily limited thereto.

[0255] When the pad pattern 324 has a stacked structure, the second metal layer 324b and the third metal layer 324c may be formed between the first metal layer 324a and the fourth metal layer 324d. Although each of the first metal layer 324a to the fourth metal layer 324d may be made of any one of gold (Au), aluminum (Al) and nickel (Ni) or an alloy thereof, and the first metal layer 324a to the fourth metal layer 324d may be made of a metal different from the second metal layer 324b and the third metal layer 324c, the present disclosure is not limited thereto. The second metal layer 324b may be made of a metal different from the first metal layer 324a, the third metal layer 324c and the fourth metal layer 324d. For example, the first metal layer 324a and the fourth metal layer 324d may contain gold (Au), the second metal layer 324b may contain aluminum (Al), and the third metal layer 324c may contain nickel (Ni).

[0256] In addition, the number of layers of the laminated structure of the pad pattern 324 is not limited to one or four layers, and the number of layers of the laminated structure of the pad pattern 324 may be n (where n is an integer) layers. For example, when the pad pattern 324 has a laminated structure, the second metal layer, the third metal layer, and the fourth metal layer may be formed between the first metal layer and the fifth metal layer. Each of the first to fifth metal layers may be made of any one of Au, Al, and Ni or an alloy thereof, and at least one of the first to fifth metal layers may be made of a metal different from the other layers, however, the present disclosure is not limited thereto.

[0257] The light emitting element 300 is separated from the growth substrate 310 before being transferred to the panel, and is disposed on the carrier substrate 350 .

[0258] When the light emitting layer 300a as an epitaxial structure is separated from the growth substrate 310, laser (laser lift-off (LLO)) is irradiated from a laser source to the growth substrate, so the carrier substrate 350 is made of a material capable of transmitting laser light. For example, the growth substrate 310 may be made of sapphire.

[0259] The carrier substrate 350 may be made of polymer resin, glass, quartz, a synthetic resin film, a transparent substrate, and a transparent flexible polymer substrate.

[0260] The first conductive semiconductor layer 300-1 forming the light emitting layer 300a is a semiconductor layer in which holes with positive charges move as carriers to generate current, and can be made of a P-GaN-based material. The P-GaN-based material can be GaN, AlGaN, InGaN, AlInGaN, etc., and the impurities used to dope the P-type semiconductor layer can include Mg, Zn, Be, etc.

[0261] The pad pattern 324 is formed on the first conductive semiconductor layer 300-1 to form an ohmic contact. As the light emitting element 300 is transferred to the panel, the light emitting element 100 may contact the pixel electrode (not shown) to receive a voltage corresponding to a data voltage through the TFT.

[0262] The second conductive semiconductor layer 300-3 is a semiconductor layer in which free electrons with negative charges move as carriers to generate current, and may be made of an n-GaN-based material. The n-GaN-based material may be GaN, AlGaN, InGaN, AlInGaN, etc., and the impurities used to dope the N-type semiconductor layer 212c may include Si, Ge, Se, Te, C, etc. In addition, in some cases, a buffer layer such as an undoped GaN-based semiconductor layer may be additionally formed between the growth substrate 210 and the N-type semiconductor layer.

[0263] The active layer 300-2 may be disposed on the first conductive semiconductor layer 300-1 and may have an MQW structure having a well layer and a barrier layer having a band gap higher than that of the well layer. For example, the active layer 300-2 may have an MQW structure such as InGaN / GaN.

[0264] In addition, the first passivation layer 316 and the second passivation layer 320 are disposed to surround the lower surface and the side surface of the lower electrode 314 and the light emitting layer 300a. Each of the first passivation layer 316 and the second passivation layer 320 may be formed as a multi-layer film or a single-layer film made of an inorganic material.

[0265] The first passivation layer 316 and the second passivation layer 320 may be made of any one selected from the group consisting of SiO 2 , Si 3 N 4 , and resin, or made of an oxide including at least one of Ni, Ti, Pt, Pd, Cu, CuW, Mo, MoW, Ag, and Al.

[0266] The inorganic material may be a metal oxide or a metal nitride, and specifically, the inorganic material may include SiO2, SiN x , at least one of SiON, Al2O3, TiO2, Ta2O5, HfO2 and ZrO2.

[0267] In addition, the reflective layer 318 may be disposed between the first passivation layer 316 and the second passivation layer 320 and disposed to overlap the lower and side surfaces of the light emitting layer 300a and the lower electrode 314. The reflective layer 318 reflects light generated in the light emitting element 300 and emits the reflected light upward from the light emitting element 300.

[0268] The reflective layer 318 may be formed as a single metal layer or a multilayer metal layer made of one or more of Al, Pt, Pd, Ag, Mg, Au, Ni, Nd, Ir, Cr, Li, Ca, Mo, Ti, W, and Cu. In particular, a material having a high light reflectivity may be preferably used as the material of the reflective layer 318. In the present exemplary embodiment, aluminum (Al) is used as the material of the reflective layer 318.

[0269] The lower electrode 314 may contact the first conductive semiconductor layer 300 - 1 of the light emitting layer 300 a , and the upper electrode 352 may contact the second conductive semiconductor layer 300 - 3 .

[0270] The lower electrode 314 and the upper electrode 352 may be made of a transparent or semi-transparent electrode material, but are not necessarily limited thereto. The transparent or semi-transparent electrode material may include one or more selected from the group consisting of ITO, IZO, ZnO, In2O3, IGO, and AZO.

[0271] In addition, a pad pattern 330 may be formed on a lower surface of the lower electrode 314 to form an ohmic contact.

[0272] When formed on the growth substrate 310 (see Fig.17A ) is transferred to a panel substrate (not shown) through a carrier substrate 350. Fig.10 When the lower electrode 314 is connected to the pixel electrode (not shown) through the pad pattern 324, a positive voltage is applied to the lower electrode 314 in contact with the first conductive semiconductor layer 300-1 through the pixel electrode, and a negative voltage is applied to the upper electrode 352 in contact with the second conductive semiconductor layer 300-3 through the second electrode 170 (see Fig.10 Therefore, by the movement of electrons in the second conductive semiconductor layer 300-3 and the flow of holes in the first conductive semiconductor layer 300-1, current flows between the pixel electrode (not shown) and the second electrode (not shown, Fig.10 170) in the flow.

[0273] In addition, the light emitting layer 300 a emits light through recombination of electrons and holes according to current flowing between the pixel electrode and the second electrode 170 .

[0274] Therefore, light generated in the light emitting element 300 is reflected by the reflective layer 318 provided in the first passivation layer 316 and the second passivation layer 320 , and is emitted upward from the light emitting element 300 .

[0275] Hereinafter, a process of manufacturing a light emitting element of a display device according to another exemplary embodiment of the present specification will be described.

[0276] Fig.17A , Fig. 17B , Fig. 17C , Fig.17D , Fig.17E , Fig.17F , Figure 17G , Fig.17H , Fig.17I , Fig.17J , Figure 17K , Figure 17L , Fig.17M , Fig.17N , Fig.17O , Figure 17P , Figure 17Q , Figure 17R , Figure 17S and Figure 17T is a cross-sectional view illustrating a manufacturing process of a light emitting element of a display device according to another exemplary embodiment of the present specification.

[0277] Reference Fig.17A A growth substrate 310 for forming an epitaxial structure forming one of red (RED) type, green (GREEN) type and blue (BLUE) type light emitting elements is provided.

[0278] The growth substrate 310 may be formed as a conductive substrate or an insulating substrate. For example, the growth substrate 310 may be made of at least any one of sapphire, SiC, Si, GaAs, GaN, ZnO, Si, GaP, InP, Ge, and Ga2O3. However, the present disclosure is not necessarily limited thereto.

[0279] Next, a first conductive semiconductor layer 300 - 1 , an active layer 300 - 2 , and a second conductive semiconductor layer 300 - 3 forming a light emitting layer portion 300 a ′ are sequentially deposited on the growth substrate 310 .

[0280] The first conductive semiconductor layer 300 - 1 , the active layer 300 - 2 , and the second conductive semiconductor layer 300 - 3 may be formed by using a MOCVD method, a CVD method, a PECVD method, an MBE method, a HVPE method, or an epitaxial method.

[0281] The first conductive semiconductor layer 300 - 1 is a semiconductor layer in which holes having positive charges move as carriers to generate current.

[0282] The first conductive semiconductor layer 300-1 may include a semiconductor layer having a composition formula of In selected from GaN, AlN, AlGaN, InGaN, InN, InAlGaN, and AlInN. x Al y Ga 1-x-y A semiconductor material of N (0≤x≤1, 0≤xy≤1, 0≤x+y≤1) and doped with a p-type dopant such as Mg, Zn, Ca, Sr or Ba.

[0283] Alternatively, the first conductive semiconductor layer 300-1 may be made of a P-GaN-based material, which may be GaN, AlGaN, InGaN, AlInGaN, etc., and impurities for doping the P-type semiconductor layer may include Mg, Zn, Be, etc.

[0284] The second conductive semiconductor layer 300 - 3 is a semiconductor layer in which free electrons having negative charges move as carriers to generate current.

[0285] The second conductive semiconductor layer 300-3 may be formed by including, for example, an n-type semiconductor layer. The second conductive semiconductor layer 300-3 may include a semiconductor layer having a composition formula of In selected from GaN, AlN, AlGaN, InGaN, InN, InAlGaN, and AlInN. x Al y Ga 1-x-y A semiconductor material of N (0≤x≤1, 0≤xy≤1, 0≤x+y≤1) and doped with an n-type dopant such as Si, Ge or Sn.

[0286] Alternatively, the second conductive semiconductor layer 300-3 may be made of an n-GaN-based material. The n-GaN-based material may be GaN, AlGaN, InGaN, AlInGaN, etc., and the impurities used to dope the n-type semiconductor layer 212c may include Si, Ge, Se, Te, C, etc.

[0287] In addition, the present exemplary embodiment is not limited thereto, and the first conductive semiconductor layer 300 - 1 may include an n-type semiconductor layer, and the second conductive semiconductor layer 300 - 3 may include a p-type semiconductor layer.

[0288] The active layer 300 - 2 is a region where electrons and holes are recombined, and as the electrons and holes are recombined, the active layer 300 - 2 may be transformed to a lower energy level to generate light having a corresponding wavelength.

[0289] The active layer 300-2 may be composed of, for example, a composition formula of In x Al y Ga 1-x-yThe semiconductor material is N (0x≤1, 0≤yx≤1, 0≤x+y≤1) and is formed into a single quantum well structure or an MQW structure.

[0290] In addition, the active layer 300 - 2 may include a quantum wire structure or a quantum dot structure.

[0291] The active layer 300-2 may be disposed on the first conductive semiconductor layer 300-1 and may have an MQW structure having a well layer and a barrier layer having a band gap higher than that of the well layer. For example, the active layer 300-2 may have an MQW structure such as InGaN / GaN.

[0292] Then, refer to Fig. 17B , by selectively patterning the light emitting layer portion 300a' and removing a portion of the light emitting layer portion 300a' in a region other than a region serving as an active layer, thereby limiting a region where the first protrusion is formed.

[0293] Next, refer to Fig. 17C , a first electrode layer 314a serving as a first electrode made of a transparent conductive material such as ITO or IZO is deposited on the light emitting layer portion 300a'.

[0294] The first electrode layer 314a may be made of a transparent or semi-transparent electrode material, but is not necessarily limited thereto. The transparent or semi-transparent electrode material may include one or more selected from the group consisting of ITO, IZO, ZnO, In2O3, IGO, and AZO.

[0295] Then, refer to Fig.17D A patterning process is performed using a mask process to selectively remove the first electrode layer 314a and the light-emitting layer portion 300a' disposed below the first electrode layer 314a, so that the light-emitting element region is separated, and the lower electrode 314 and the light-emitting layer 300a of the light-emitting element are formed.

[0296] When the light emitting layer 300 a is formed, the first flat protrusion 300 a - 1 may also be simultaneously formed on the lower surface of the light emitting layer 300 a .

[0297] Next, refer to Fig.17E , a first passivation layer portion 316a is formed on the growth substrate 310 including the lower electrode 314 and the light emitting layer 300a. The first passivation layer portion 316a may be formed as a multi-layer film or a single-layer film made of an inorganic material.

[0298] The first passivation layer portion 316 a may be made of any one selected from the group consisting of SiO 2 , Si 3 N 4 , and resin, or an oxide including at least one of Ni, Ti, Pt, Pd, Cu, CuW, Mo, MoW, Ag, and Al.

[0299] For example, the inorganic material may be a metal oxide or a metal nitride, and specifically, the inorganic material may include SiO2, SiN x , at least one of SiON, Al2O3, TiO2, Ta2O5, HfO2 and ZrO2.

[0300] Then, refer to Fig.17F , the first passivation layer 316 that finitely separates each of the light emitting regions is formed by selectively patterning the first passivation layer part 316a.

[0301] The first passivation layer 316 may be disposed on side surfaces of the light emitting layer 300 a and side and lower surfaces of the lower electrode 314 .

[0302] Then, refer to Figure 17G , a metal layer 318a serving as a reflective mirror is formed on the entire surface of the growth substrate 210 including the first passivation layer 316 formed on the separated light emitting element region.

[0303] The metal layer 318a may be formed as a single layer or a multilayer made of one or more of Al, Pt, Pd, Ag, Mg, Au, Ni, Nd, Ir, Cr, Li, Ca, Mo, Ti, W, and Cu. In particular, a material having a high light reflectivity may be preferably used as the material of the metal layer 318a. In the present exemplary embodiment, an example of a case where aluminum (Al) is used as the material of the metal layer 318a is described, but the present disclosure is not limited thereto.

[0304] Next, refer to Fig.17H , the metal layer 318a is selectively etched through an etch-back process to form a reflective layer 318 on the side surface of the first passivation layer 316.

[0305] Then, refer to Fig.17I , a second passivation layer portion 320a is formed on the growth substrate 310 including the reflective layer 318 and the first passivation layer 316. The second passivation layer portion 320a may be formed as a multi-layer film or a single-layer film made of an inorganic material.

[0306] The second passivation layer portion 320 a may be made of any one selected from the group consisting of SiO 2 , Si 3 N 4 , and resin, or an oxide including at least one of Ni, Ti, Pt, Pd, Cu, CuW, Mo, MoW, Ag, and Al.

[0307] For example, the inorganic material may be a metal oxide or a metal nitride, and specifically, the inorganic material may include SiO2, SiN x , at least one of SiON, Al2O3, TiO2, Ta2O5, HfO2 and ZrO2.

[0308] When forming the second passivation layer part 320 a , the second passivation layer part 320 a may be made of the same material as or a different material from the first passivation layer part 316 a .

[0309] Next, refer to Fig.17J The second passivation layer 320 that allows each light emitting region to be limitedly separated is formed by selectively patterning the second passivation layer part 320a.

[0310] When the second passivation layer portion 320 a is patterned, the second passivation layer portion 320 a contacting the lower electrode 314 and the surface of the growth substrate 310 may also be removed together to allow a portion of the growth substrate 310 and the lower electrode 314 to be exposed to the outside.

[0311] The reflective layer 318 may be provided in a form surrounded by the first passivation layer 316 and the second passivation layer 320. In addition, the first passivation layer 316 and the second passivation layer 320 may be provided in a form surrounding the side surface of the light emitting layer 300a and the side surface and the upper surface of the lower electrode 314. In addition, the reflective layer 318 may be provided between the first passivation layer 316 and the second passivation layer 320, and provided to overlap with the side surface of the light emitting layer 300a.

[0312] The reflector 16 may include a first passivation layer 316 and a second passivation layer 320 surrounding the light emitting layer 300 a and the lower electrode 314 , and a reflective layer 318 disposed therebetween.

[0313] Then, refer to Figure 17K A pad pattern 324 contacting the lower electrode 314 is formed by depositing a metal material layer on the entire surface of the growth substrate 310 including the exposed portion of the lower electrode 314 and the second passivation layer 320 and selectively patterning the metal material layer.

[0314] like Figure 17K As shown, the pad pattern 324 may be formed as a stacked structure of a first metal layer 324a, a second metal layer 324b, a third metal layer 324c, and a fourth metal layer 324d, or a single layer structure formed of a single metal layer being any one of the above metal layers, but is not necessarily limited thereto.

[0315] When the pad pattern 324 has a stacked structure, the second metal layer 324b and the third metal layer 324c may be interposed between the first metal layer 324a and the fourth metal layer 324d. Although each of the first metal layer 324a to the fourth metal layer 324d may be made of any one of gold (Au), aluminum (Al), and nickel (Ni) or an alloy thereof, and the first metal layer 324a and the fourth metal layer 324d may be made of a metal different from the second metal layer 324b and the third metal layer 324c, the present disclosure is not limited thereto. The second metal layer 324b may be made of a metal different from the first metal layer 324a, the third metal layer 324c, and the fourth metal layer 324d. For example, the first metal layer 324a and the fourth metal layer 324d may contain gold (Au), the second metal layer 324b may contain aluminum (Al), and the third metal layer 324c may contain nickel (Ni).

[0316] In addition, the number of layers of the laminated structure of the pad pattern 324 is not limited to one or four layers, and the number of layers of the laminated structure of the pad pattern 324 may be n (where n is an integer) layers. For example, when the pad pattern 324 has a laminated structure, the second metal layer, the third metal layer, and the fourth metal layer may be formed between the first metal layer and the fifth metal layer. Each of the first to fifth metal layers may be made of any one of Au, Al, and Ni or an alloy thereof, and at least one of the first to fifth metal layers may be made of a metal different from the other layers, however, the present disclosure is not limited thereto.

[0317] Next, refer to Figure 17L A sacrificial layer 326a is formed on the entire structure of the growth substrate 310 including the pad pattern 324. Any one of insulating materials including SiO2, SiN, etc. may be selectively used as the sacrificial layer 326a.

[0318] Then, refer to Fig.17M , the sacrificial layer 232a is selectively patterned through a mask process to separate the light emitting element region, and a contact hole 328h exposing a portion of the pad pattern 324 is formed at the same time.

[0319] Next, refer to Fig.17N The process of manufacturing the light emitting element on the growth substrate 310 is completed by forming a dummy insulating layer 330a on the growth substrate 310 including the sacrificial layer 326 to planarize the growth substrate 310. As a material of the dummy insulating layer 330a, BCB or other insulating materials may be selectively used.

[0320] Hereinafter, a process of arranging and bonding the light emitting element portion on the carrier substrate will be described.

[0321] First, the carrier substrate 350 is provided, and a substrate separation process of separating the light emitting element from the growth substrate 310 is performed to transfer the light emitting element onto the carrier substrate 350 .

[0322] The carrier substrate 350 may be made of polymer resin, glass, quartz, a synthetic resin film, a transparent substrate, and a transparent flexible polymer substrate.

[0323] Reference Fig.17O The structure formed on the growth substrate 310 is disposed and bonded on the carrier substrate 350. Although not shown in the figure, in order to laminate the growth substrate 310 in an inverted state on the carrier substrate 350, an ultraviolet reactive resin layer (not shown) that can serve as an adhesive layer can be formed on the carrier substrate 350.

[0324] In this case, in a state where the growth substrate 310 is inverted, a portion of the dummy insulating layer 330 a is disposed and bonded on the carrier substrate 350 to expose the growth substrate 210 to the outside.

[0325] Next, refer to Figure 17P , after the light emitting element portion of the growth substrate 310 is brought into contact with the ultraviolet reactive resin layer (not shown) of the carrier substrate 350 , laser is irradiated to a boundary between the light emitting element portion and the growth substrate 310 .

[0326] Laser light radiated from the laser source after passing through the growth substrate 310 may separate the light emitting element portion from the growth substrate 310. In this case, the light emitting element portion may maintain a state of contact with the ultraviolet reactive resin layer (not shown) of the carrier substrate 350.

[0327] Then, refer to Figure 17Q After the growth substrate 310 is removed by laser irradiation, a second electrode layer 352a is formed on the first passivation layer 316 and the second passivation layer 320 including the exposed area of ​​the light emitting layer 300a as the light emitting element portion, the area of ​​the reflective layer 318 inserted between the first passivation layer 316 and the second passivation layer 320, the sacrificial layer 326 and the dummy insulating layer 330a.

[0328] The second electrode layer 352a may be made of a transparent or semi-transparent electrode material, but is not necessarily limited thereto. The transparent or semi-transparent electrode material may include one or more selected from the group consisting of ITO, IZO, ZnO, In2O3, IGO, and AZO. In the present disclosure, an example of a case where ITO is used as a transparent electrode material will be described.

[0329] Next, refer to Figure 17R, the second electrode layer 352a is selectively patterned by a mask process, thereby forming the second electrode 352 on the light emitting layer 300a. In this case, when the second electrode layer 352a is patterned, the upper portions of the first passivation layer 316 and the second passivation layer 320 including the second electrode layer 352a and the side surfaces of the light emitting layer 300a, the upper region of the reflective layer 318 disposed between the first passivation layer 316 and the second passivation layer 320, and the upper regions of a portion of the insulating layer 330a and the sacrificial layer 326 may be etched together and exposed to the outside.

[0330] In this case, the second flat protrusion 300 a - 2 may be formed on the upper surface of the light emitting layer 300 a , and a stepped portion (not shown) may be formed on the side surface of the light emitting layer 300 a .

[0331] As described above, the light emitting layer 300a, the first electrode 314 and the second electrode 352, and the reflective layer 318 disposed between the first passivation layer 316 and the second passivation layer 320 may be formed, and the first passivation layer 316 and the second passivation layer 320 may surround the light emitting element 300 (see Figure 17T )'s lower electrode 314 and the side surface and lower surface of the light-emitting layer 300a.

[0332] Then, refer to Figure 17S , in the externally exposed region, a portion of the dummy insulating layer 330 a disposed between the sacrificial layers 326 is selectively removed by performing a dry etching process.

[0333] Next, refer to Figure 17T The remaining sacrificial layer 326 is removed by a wet etching process so that the light emitting element 300 remains on the carrier substrate 350 .

[0334] As described above, the process of separating the light emitting element 300 from the growth substrate 310 and bonding the light emitting element 300 on the carrier substrate 350 according to another exemplary embodiment of the present disclosure is completed.

[0335] Hereinafter, in a display device according to an exemplary embodiment of the present specification, a process of transferring a light emitting element formed on a carrier substrate onto a substrate will be described.

[0336] Fig.18A , Fig.18B , Fig.18C , Fig.18D , Fig.18E , Fig.18F and Figure 18G 1 is a process cross-sectional view for describing a process of manufacturing one pixel in a display device according to an exemplary embodiment of the present specification.

[0337] Reference Fig.18A, the pixel driving circuit 20 is formed on the substrate 110 , and the buffer layer 121 covering the pixel driving circuit 20 is disposed on the substrate 110 including the pixel driving circuit 20 .

[0338] The substrate 110 may be made of flexible plastic. For example, the substrate 110 may be formed as a single layer or multiple layers made of a material selected from the group consisting of polyimide, polyethylene terephthalate, polyethylene naphthalate, polycarbonate, polyether sulfone, polyarylate, polysulfone, and cyclic olefin copolymer, but is not limited thereto. For example, the substrate 110 may be a glass substrate.

[0339] The buffer layer 121 may be made of inorganic insulating materials such as SiN in a multi-layer stacked manner. x The organic insulating material and the inorganic insulating material are formed by stacking the organic insulating material and the inorganic insulating material in a multilayer manner.

[0340] The connection lines RT1 and RT2 may be disposed on the buffer layer 121. The connection lines RT1 and RT2 may be connected to the corresponding signal lines TL1 to TL6, or connected to the signal lines TL1 to TL6. The connection lines RT1 and RT2 may include a plurality of line patterns disposed on different layers with one or more insulating layers interposed therebetween. The line patterns disposed on different layers may be electrically connected through contact holes passing through the insulating layers formed in subsequent processes.

[0341] The connection wires RT1 and RT2 may be a single-layer metal wire or a multi-layer metal wire formed of a material selected from the group consisting of aluminum (Al), titanium (Ti), copper (Cu), molybdenum (Mo), tantalum (Ta), titanium nitride (TiN), and tantalum nitride (TaN). For example, the connection wires RT1 and RT2 may be metal wires stacked in a three-layer structure such as Ti / Al / Ti or Mo / Al / Mo.

[0342] The first insulating layer 122 may be disposed on the buffer layer 121 including the connection lines RT1 and RT2. The first insulating layer 122 may be made of an organic insulating material such as photosensitive photopropylene or photosensitive polyimide, but is not limited thereto. For example, the first insulating layer 122 may include a single-layer insulating layer or a multi-layer insulating layer made of an inorganic insulating material such as silicon oxide, silicon nitride, silicon oxynitride, or aluminum oxide, but is not limited thereto. For example, the first insulating layer 122 may be configured as a single layer or a multi-layer made of silicon oxide, silicon nitride, silicon oxynitride, or aluminum oxide. For example, the first insulating layer 122 may be formed by a single-layer or multi-layer inorganic film, for example, the single-layer inorganic film may be a silicon oxide, silicon nitride, silicon oxynitride, or aluminum oxide film, and the multi-layer inorganic film may be formed by alternately stacking at least one of one or more silicon oxide films, one or more silicon nitride films, one or more silicon oxynitride films, and one or more aluminum oxide films and one or more amorphous silicon (a-Si), but the present disclosure is not limited thereto.

[0343] Next, a bank pattern 130 may be formed on the first insulating layer 122. The bank pattern 130 may be made of an organic insulating material such as photosensitive photoacryl or photosensitive polyimide, but is not limited thereto. The bank pattern 130 may guide the attachment position of the light emitting element in the transfer process of the light emitting element. The bank pattern 130 may be omitted.

[0344] Each of the bank patterns 130 may be provided in one light emitting element 100 (see Fig.10 ) or below two light-emitting elements.

[0345] Subsequently, a first electrode 161 may be formed on the bank pattern 130 and the first insulating layer 122 .

[0346] The first electrode 161, the connection portion 161a, the signal line TL and / or the connection lines RT1 and RT2 may include a single metal layer or a multilayer metal layer formed of a material selected from the group consisting of titanium (Ti), molybdenum (Mo) and aluminum (Al). The first electrode 161, the connection portion 161a, the signal line TL and / or the connection line RT2 may be formed into a multilayer structure including a first layer ML1, a second layer ML2, a third layer ML3 and a fourth layer ML4.

[0347] The first layer ML1 and the third layer ML3 may include titanium (Ti) or molybdenum (Mo). The second layer ML2 may include aluminum (Al). The fourth layer ML4 may include a transparent conductive oxide layer such as ITO or IZO, which has good adhesion to the solder pattern 163 and also has corrosion resistance and acid resistance.

[0348] The first layer ML1 , the second layer ML2 , the third layer ML3 , and the fourth layer ML4 may be sequentially deposited and then patterned by performing a photolithography process and an etching process.

[0349] In addition, the contact electrodes (not shown, Fig.10 The second contact electrode 162 is formed in a region other than the bank pattern 130 on the first insulating layer 122. In this case, the second contact electrode 162 may be made of the same material as the first electrode 161 at the same time.

[0350] Subsequently, a solder pattern 163 may be disposed on the first electrode 161. The solder pattern 163 may be made of, but not limited to, indium (In), tin (Sn), or an alloy thereof. In the light emitting region, a pad pattern 230 formed on the lower surface of the lower electrode 214 of the light emitting element 100 may contact the upper surface of the solder pattern 163.

[0351] Next, the second insulating layer 133 is formed on the solder pattern 163 , the first electrode 161 , the bank pattern 130 , and the first insulating layer 122 .

[0352] The second insulating layer 133 may be made of an organic insulating material such as photosensitive photopropylene or photosensitive polyimide, but is not limited thereto. For example, the first insulating layer 122 may include a single insulating layer or multiple insulating layers of an inorganic insulating material such as silicon oxide, silicon nitride, silicon oxynitride, or aluminum oxide, but is not limited thereto. For example, the first insulating layer 122 may be configured as a single layer or multiple layers made of silicon oxide, silicon nitride, silicon oxynitride, or aluminum oxide. For example, the first insulating layer 122 may be formed by a single layer or multiple layers of an inorganic film, for example, the single layer of the inorganic film may be a silicon oxide, silicon nitride, silicon oxynitride, or aluminum oxide film, and the multilayer inorganic film may be formed by alternately stacking at least one of one or more layers of silicon oxide film, one or more layers of silicon nitride film, one or more layers of silicon oxynitride film, and one or more layers of aluminum oxide film and one or more layers of amorphous silicon (a-Si), but the present disclosure is not limited thereto.

[0353] Subsequently, the second insulating layer 133 is selectively etched through a patterning process using a photolithography process to expose the solder pattern 163 and / or the upper portion of the first electrode 161. When the second insulating layer 133 is patterned, a contact hole (not shown) exposing the upper portion of the solder pattern 163 and / or the first electrode 161 may be formed.

[0354] An upper portion of the solder pattern 163 may be exposed by protruding upward from the second insulating layer 133 , or exposed in a contact hole of the second insulating layer 133 .

[0355] Next, although not shown in the drawings, a bonding member (not shown) for transferring the light emitting element 100 may be further formed on the second insulating layer 133 on the substrate 110. However, the present disclosure is not necessarily limited thereto.

[0356] Then, refer to Fig.18BIn order to transfer the light emitting element 100 onto the second insulating layer 133, a substrate separation process is performed to separate the light emitting element 100 from the carrier substrate 250 (see Figure 14T ). The substrate separation process may use LLO, chemical lift-off (CLO), a method of destroying the insulating layer 236 by applying pressure using a stamp, or the like.

[0357] The light emitting element 100 may be separated from the carrier substrate 250 by performing a substrate separation process (see Figure 14T ).

[0358] Next, the pad pattern 230 formed on the lower surface of the separated light emitting element 100 may contact the solder pattern 163 and the second insulating layer 133 disposed over the bank pattern 130 on the substrate 110 , or may be disposed on the solder pattern 163 and the first electrode 161 .

[0359] The light emitting element 100 may be fixed by a bonding member (not shown) and / or the first electrode 161 and the solder pattern 163 .

[0360] The lower electrode 214 of each of the light emitting elements 100 may be electrically connected to an anode voltage output terminal of the pixel driving circuit 20 via the solder pattern 163, the first electrode 161, and at least one line pattern through a pad pattern 230 formed on a lower surface of the lower electrode 214. The upper electrode 252 of each of the light emitting elements 100 may be electrically connected to a cathode voltage output terminal of the pixel driving circuit 20 via the second electrode 170, the contact electrode 162, and at least one line pattern.

[0361] Next, refer to Fig.18C , a first interlayer insulating layer 141 is formed on the light emitting element 100 , and a second insulating layer 133 is formed on the substrate 110 .

[0362] The first interlayer insulating layer 141 may cover the plurality of light emitting elements 100 and the bank pattern 130. The first interlayer insulating layer 141 may cover spaces between the plurality of light emitting elements 100 and spaces between the bank patterns 130. The first interlayer insulating layers 141 may extend in the first direction X, and may be spaced apart from each other in the second direction Y to separate between rows of pixels.

[0363] Light emitted from the plurality of light emitting elements 100 may be scattered by metal particles dispersed in the first interlayer insulating layer 141 and emitted to the outside.

[0364] The first interlayer insulating layer 141 may include an organic insulating material in which metal particles such as titanium dioxide particles are dispersed.

[0365] In addition, the first interlayer insulating layer 141 may be formed by selecting a material having excellent planarization characteristics among an organic insulating material or an inorganic insulating material including an oxide film or a nitride film. However, the present disclosure is not necessarily limited thereto.

[0366] Since the first interlayer insulating layer 141 may be formed using a relatively cheap material such as an inorganic insulating material including an oxide film or a nitride film, the first interlayer insulating layer 141 may replace an existing sidewall diffuser made of an expensive material, thereby reducing manufacturing process costs.

[0367] Although not shown in the figure, a second interlayer insulating layer (not shown, Figure 4 The second interlayer insulating layer 142 may be made of an organic insulating material.

[0368] The second interlayer insulating layer 142 and the first interlayer insulating layer 141 may be disposed together in the second insulating layer (not shown, Figure 4 The first interlayer insulating layer 141 and the second interlayer insulating layer 142 may be made of the same material or different materials. However, the present disclosure is not necessarily limited thereto.

[0369] Then, refer to Fig.18D , the first interlayer insulating layer 141 may be selectively removed through a mask process, thereby forming a contact hole 141 h exposing the upper electrode 252 of the light emitting element 100 .

[0370] Next, refer to Fig.18E A second electrode layer (not shown) is formed on the first interlayer insulating layer 141 including the contact hole 141h and the second electrode layer is patterned by a photolithography process, thereby forming a second electrode 170 in contact with the upper electrode 252 of the light emitting element 100. The second electrode 170 may be commonly connected to a plurality of pixels (not shown, Figure 2 The second electrode 170 may be a thin electrode that transmits light. The second electrode 170 may be made of a transparent electrode material such as ITO, but is not necessarily limited thereto.

[0371] The second electrodes 170 may each overlap the first interlayer insulating layer 141 , and some of the second electrodes 170 may cover an outer surface of the first interlayer insulating layer 141 .

[0372] The second electrode 170 may be disposed on the first interlayer insulating layer 141 and commonly connected to all pixels PXL. The second electrode 270 may be a light-transmitting thin metal electrode. The first electrode 161, the second electrode 170, and the black matrix 180 may be stacked in a non-luminous region of the pixel region. The second electrode 170 may be made of a transparent electrode material such as ITO, but is not necessarily limited thereto.

[0373] Next, refer to Fig.18F , a black matrix 180 is formed on the second electrode 170. The black matrix 180 may be made of an organic insulating material to which a black pigment is added.

[0374] Then, refer to Figure 18G , a capping layer 190 is formed on the black matrix 180 and the second electrode 170. The capping layer 190 may be made of an organic insulating material that covers the black matrix 180 and the second electrode 170.

[0375] The same insulating layer as the first interlayer insulating layer 141 may be flatly formed between the capping layer 190 and the second electrode 170. In this case, the insulating layer made of an organic insulating material may cover the second electrode 170 with a thickness smaller than that of the first interlayer insulating layer 141.

[0376] As described above, when the light emitting element 100 is transferred onto the substrate 110, the lower electrode 214 is connected to the pixel electrode (not shown) through the pad pattern 230, so a positive voltage is applied to the lower electrode 214 through the pixel electrode, and a negative voltage is applied to the upper electrode 252 through the second electrode 170. Therefore, current flows between the pixel electrode (not shown) and the second electrode 170 by movement of electrons of the second conductive semiconductor layer and flow of holes of the first conductive semiconductor layer.

[0377] Fig.19 is a cross-sectional view schematically illustrating a state in which light is reflected and emitted in a light emitting element of a display device according to an exemplary embodiment of the present specification.

[0378] Fig. 20 is a cross-sectional view schematically illustrating a state in which light is reflected and emitted in a light emitting element of a display device according to another exemplary embodiment of the present specification.

[0379] Reference Fig.19 It can be seen that the light generated in the light emitting element 100 of the display device according to an exemplary embodiment of the present specification is reflected by the reflective layer 218 of the reflector 16 provided on the side surface and the lower surface of the light emitting element 100 and emitted upward, thereby improving the light emitting efficiency.

[0380] Since the reflective layer 218 is disposed between the first passivation layer 216 and the second passivation layer 220 disposed around the side surface and the lower surface of the light emitting element 100 , light generated inside the light emitting element 100 may be allowed to be reflected by the reflective layer 218 and efficiently emitted upward from the light emitting element 100 .

[0381] Reference Fig. 20It can be seen that the light generated in the light emitting element 300 of the display device according to another exemplary embodiment of the present specification is reflected by the reflective layer 318 of the reflector 16 disposed on the side surface of the light emitting element 300 and emitted upward, thereby improving the light emitting efficiency.

[0382] Since the reflective layer 318 is disposed between the first passivation layer 316 and the second passivation layer 320 disposed around the side surface of the light emitting element 300 , light generated inside the light emitting element 300 may be allowed to be reflected by the reflective layer 318 and efficiently emitted upward from the light emitting element 300 .

[0383] Reference Fig.19 and Fig. 20 At least some of the light generated from the light emitting layers 100a and 300a passes through the first electrodes 214 and 314, is reflected from the reflective layers 218 and 318, passes through the first electrodes 214 and 314, the light emitting layers 100a and 300a, and the second electrodes 252 and 352, and is emitted to the outside.

[0384] Furthermore, conventionally, since a process of patterning a portion of a reflective layer disposed under a light emitting element needs to be performed to form a reflective mirror, a process margin of formation is narrow.

[0385] However, in the present disclosure, the process of forming a reflector under the light emitting elements 100 and 300 is omitted, the first passivation layer and the second passivation layer surrounding the outer surface of the light emitting element are arranged on the side surface of the light emitting element, and the reflective layer replaced by the reflector is formed between the first passivation layer and the second passivation layer, thereby solving the traditional problem of narrowing the process margin.

[0386] In an exemplary embodiment of the present specification, since the reflective layer is disposed inside the light emitting element to improve the light emitting efficiency inside the light emitting element, the light emitting efficiency can be improved even at low power consumption, thereby improving productivity.

[0387] Furthermore, in an exemplary embodiment of the present specification, since a patterning process for forming a reflective layer inside a light emitting element to form a reflective mirror or the like can be omitted, the manufacturing process can be simplified.

[0388] Furthermore, in an exemplary embodiment of the present specification, since the reflective layer is provided in the light emitting element to improve the light emitting efficiency even without a side wall diffuser made of an expensive material for improving the light emitting efficiency, the manufacturing process cost can be reduced.

[0389] In the present specification, since the reflective layer is formed in the light emitting element to allow light to be directly reflected in the light emitting element, light emitting efficiency can be improved.

[0390] In the present specification, since a process of forming a reflective mirror on a bank pattern can be omitted, the process can be simplified and a process margin defect can be fundamentally prevented.

[0391] In the present specification, since the reflective layer is disposed inside the light emitting element to improve the light emitting efficiency, there is no need to use a side wall diffuser made of an expensive material having excellent light emitting efficiency, thereby reducing process materials.

[0392] Furthermore, in an exemplary embodiment of the present specification, since a patterning process of forming a reflective layer under a light emitting element to form a reflective mirror or the like can be omitted, the manufacturing process can be simplified.

[0393] A display device according to various exemplary embodiments of the present disclosure may be described as follows.

[0394] A display device according to an exemplary embodiment of the present specification may include: a first electrode; a second electrode; a light-emitting layer disposed between the first electrode and the second electrode; and a reflector covering at least a portion of a side surface of the first electrode and a side surface of the light-emitting layer, wherein the reflector includes: a first insulating layer; a second insulating layer; and a metal layer disposed between the first insulating layer and the second insulating layer.

[0395] According to the display device according to one or more exemplary embodiments of the present disclosure, the metal layer may be disposed between the first insulating layer and the second insulating layer to overlap the side surface and the lower surface of the light emitting layer or overlap the side surface of the light emitting layer.

[0396] According to a display device according to one or more exemplary embodiments of the present disclosure, the light-emitting layer may include: a lower surface on which a first electrode is disposed; an upper surface on which a second electrode is disposed; and a side surface located between the lower surface and the upper surface, the lower surface and the upper surface of the light-emitting layer include: a first flat protrusion and a second flat protrusion on which the first electrode and the second electrode are disposed; and a step portion disposed at edges of the first flat protrusion and the second flat protrusion, the height of the step portion being less than the heights of the first flat protrusion and the second flat protrusion, and a reflector disposed on at least a portion of the side surface of the light-emitting layer below the step portion.

[0397] According to the display device according to one or more exemplary embodiments of the present disclosure, the first electrode is disposed to cover a portion of a side surface of the light emitting layer and a lower surface of the light emitting layer.

[0398] According to the display device according to one or more exemplary embodiments of the present disclosure, the reflector is disposed to cover a side surface of the first electrode and a portion of a lower surface of the first electrode.

[0399] According to the display device according to one or more exemplary embodiments of the present disclosure, the display device further includes a pad pattern disposed at a lower surface of the first electrode and on the protruding bank pattern.

[0400] According to the display device according to one or more exemplary embodiments of the present disclosure, the pad pattern is formed as one metal layer or a stacked structure having at least two metal layers, and, when the pad pattern includes the stacked structure having at least two metal layers, at least one metal layer is made of a metal different from that of the other metal layers.

[0401] According to a display device according to one or more exemplary embodiments of the present disclosure, the width of the lower surface of the light-emitting layer provided with the first electrode of the light-emitting element and the upper surface of the light-emitting layer provided with the second electrode can be smaller than the width of the side surface of the light-emitting layer located between the upper surface and the lower surface.

[0402] A display device according to one or more exemplary embodiments of the present disclosure may include: a display panel on which a plurality of sub-pixels and lines connected to the sub-pixels are arranged; and a pixel driving circuit configured to drive the sub-pixels, wherein the display panel also includes: a plurality of protruding embankment patterns arranged in the sub-pixels; and a light-emitting element arranged in each of the embankment patterns, the light-emitting element including: a first electrode; a second electrode; a light-emitting layer arranged between the first electrode and the second electrode; and a reflector covering at least a portion of a side surface of the first electrode and a side surface of the light-emitting layer, and the reflector includes: a first insulating layer; a second insulating layer; and a metal layer arranged between the first insulating layer and the second insulating layer.

[0403] According to the display device according to one or more exemplary embodiments of the present disclosure, the metal layer may be disposed between the first insulating layer and the second insulating layer to overlap the side surface and the lower surface of the light emitting element or overlap the side surface of the light emitting element.

[0404] According to the display device according to one or more exemplary embodiments of the present disclosure, the first insulating layer and the second insulating layer may be made of any one selected from an inorganic insulating material or an organic insulating material, or of an oxide including at least one of Ni, Ti, Pt, Pd, Cu, CuW, Mo, MoW, Ag, Al, Hf, Zr, and Ta.

[0405] According to a display device according to one or more exemplary embodiments of the present disclosure, the light-emitting layer may include: a lower surface on which a first electrode is disposed; an upper surface on which a second electrode is disposed; and a side surface located between the lower surface and the upper surface, the lower surface and the upper surface of the light-emitting layer include: a first protrusion and a second protrusion on which the first electrode and the second electrode are disposed; and a step portion disposed at edges of the first protrusion and the second protrusion, the height of the step portion being less than the height of the first protrusion and the second protrusion, and a reflector disposed on at least a portion of the side surface of the light-emitting element below the step portion.

[0406] According to the display device according to one or more exemplary embodiments of the present disclosure, the width of the lower surface of the light-emitting layer provided with the first electrode and the upper surface of the light-emitting layer provided with the second electrode is smaller than the width of the side surface of the light-emitting layer located between the upper and lower surfaces.

[0407] According to the display device according to one or more exemplary embodiments of the present disclosure, the area of ​​the light emitting element is smaller than or equal to the area of ​​the bank pattern.

[0408] According to the display device according to one or more exemplary embodiments of the present disclosure, the light emitting element may be connected to the solder pattern and the electrode line disposed on the bank pattern through the pad pattern disposed on the lower surface of the first electrode.

[0409] According to the display device according to one or more exemplary embodiments of the present disclosure, the area of ​​the light emitting element may be smaller than or equal to the area of ​​the electrode line.

[0410] According to the display device according to one or more exemplary embodiments of the present disclosure, the interlayer insulating layer may be provided on the entire surface of the substrate including the light emitting element.

[0411] According to the display device according to one or more exemplary embodiments of the present disclosure, the interlayer insulating layer may have a stacked structure of any one or more of an inorganic insulating material including an oxide film or a nitride film and an organic insulating material.

[0412] A method for manufacturing a display device according to one or more exemplary embodiments of the present disclosure may include: forming a light-emitting layer on a substrate; forming a first electrode layer under the light-emitting layer; forming a first insulating layer and a second insulating layer on at least a portion of a side surface of the first electrode and a side surface of the light-emitting layer; forming a reflective layer between the first insulating layer and the second insulating layer; and forming a second electrode on the light-emitting layer.

[0413] According to a method of manufacturing a display device according to one or more exemplary embodiments of the present disclosure, the reflective layer may be formed to overlap with a side surface of the light-emitting layer and a side surface and a lower surface of the first electrode, or to overlap with a side surface of the light-emitting layer and a side surface of the first electrode.

[0414] According to a method for manufacturing a display device according to one or more exemplary embodiments of the present disclosure, forming a reflective layer may include: forming a first insulating layer on the light-emitting layer and the first electrode; forming a metal layer on the first insulating layer; exposing a portion of the first electrode by patterning the metal layer and the first insulating layer; and forming a second insulating layer on the patterned metal layer and the exposed first electrode, and forming a reflective layer between the first insulating layer and the second insulating layer.

[0415] According to the method of manufacturing a display device according to one or more exemplary embodiments of the present disclosure, the formation of a reflective layer may include: forming a first insulating layer on the light-emitting layer and the first electrode; forming a metal layer on the first insulating layer; patterning the metal layer and the first insulating layer, and forming a reflective layer on the first electrode, the light-emitting layer and the side surface; and forming a second insulating layer on the first insulating layer formed on the side surface and the lower surface of the reflective layer and the first electrode.

[0416] According to the method of manufacturing a display device according to one or more exemplary embodiments of the present disclosure, the metal layer may be patterned by an etch-back process to form a reflective layer between the first insulating layer and the second insulating layer formed on side surfaces of the first electrode and the light emitting layer.

[0417] According to the method of manufacturing a display device according to one or more exemplary embodiments of the present disclosure, the method may further include removing a portion of the light emitting layer under both sides of the second electrode.

[0418] According to the method of manufacturing a display device according to one or more exemplary embodiments of the present disclosure, a protrusion can be formed on the upper surface of the light-emitting layer where the second electrode is formed by removing a portion of the upper surface of the light-emitting layer, and a step portion can be formed on the side surface of the protrusion of the light-emitting layer.

[0419] A method for manufacturing a display device according to one or more exemplary embodiments of the present disclosure may include: forming a display panel on which a plurality of sub-pixels and lines connected to the sub-pixels are arranged; and forming a pixel driving circuit configured to drive the sub-pixels, wherein the formation of the display panel also includes: forming a plurality of protruding embankment patterns, which are arranged in the sub-pixels; and forming a light-emitting element, which is arranged in each of the embankment patterns, the formation of the light-emitting element includes: forming a first electrode and a second electrode; forming a light-emitting layer, which is arranged between the first electrode and the second electrode; and forming a reflector, which covers at least a portion of a side surface of the first electrode and a side surface of the light-emitting layer, and the formation of the reflector includes: forming a first insulating layer and a second insulating layer on the side surfaces of the light-emitting element; and forming a metal layer between the first insulating layer and the second insulating layer.

[0420] According to the method of manufacturing a display device according to one or more exemplary embodiments of the present disclosure, a metal layer may be disposed between the first insulating layer and the second insulating layer to overlap with side surfaces and a lower surface of the light emitting element or overlap with side surfaces of the light emitting element.

[0421] According to the method of manufacturing a display device according to one or more exemplary embodiments of the present disclosure, the light-emitting layer may include: a lower surface on which a first electrode is arranged; an upper surface on which a second electrode is arranged; and a side surface located between the lower surface and the upper surface, the lower surface and the upper surface of the light-emitting layer include: a first flat protrusion and a second flat protrusion on which the second electrode is arranged; and a step portion arranged at the edges of the first flat protrusion and the second flat protrusion, the height of the step portion is less than the height of the first flat protrusion and the second flat protrusion, and the metal layer is arranged on at least a portion of the side surface of the light-emitting element below the step portion.

[0422] According to the method of manufacturing a display device according to one or more exemplary embodiments of the present disclosure, the width of the lower surface of the light-emitting layer provided with the first electrode of the light-emitting element and the upper surface of the light-emitting layer provided with the second electrode are smaller than the width of the side surface between the upper surface and the lower surface of the light-emitting layer.

[0423] According to the method of manufacturing a display device according to one or more exemplary embodiments of the present disclosure, the area of ​​the light emitting element may be less than or equal to the area of ​​the bank pattern.

[0424] According to the method of manufacturing a display device according to one or more exemplary embodiments of the present disclosure, the method may further include: forming a pad pattern on a lower surface of the first electrode; and forming a solder pattern and an electrode line connecting the light emitting element through the pad pattern on the dam pattern.

[0425] According to the method of manufacturing a display device according to one or more exemplary embodiments of the present disclosure, the method may further include forming an interlayer insulating layer on the substrate including the light emitting element.

[0426] According to the method of manufacturing a display device according to one or more exemplary embodiments of the present disclosure, the interlayer insulating layer may have a stacked structure of any one or more of an inorganic insulating material including an oxide film or a nitride film and an organic insulating material.

[0427] The effects of the present specification are not limited to the above-mentioned effects, and other effects not mentioned will be clearly understood by those skilled in the art from the above detailed description.

[0428] Since the contents of the specification described in the above problems to be solved, means for solving the problems, and effects do not define essential features of the claims, the scope of the claims is not limited by the items described in the contents of the specification.

[0429] Although the exemplary embodiments of the present disclosure have been described in more detail with reference to the accompanying drawings, the present disclosure is not necessarily limited to these exemplary embodiments, and various modifications may be made without departing from the technical spirit of the present disclosure. Therefore, the exemplary embodiments disclosed in the present disclosure are not intended to limit the technical spirit of the present disclosure, but are intended to describe the technical spirit of the present disclosure, and the scope of the technical spirit of the present disclosure is not limited by these exemplary embodiments. Therefore, it should be understood that the above exemplary embodiments are illustrative and non-restrictive in all aspects.

[0430] CROSS-REFERENCE TO RELATED APPLICATIONS

[0431] This application claims the benefit of priority to Korean Patent Application No. 2023-0104258 filed on August 9, 2023, the entire contents of which are hereby expressly incorporated herein for all purposes.

Claims

1. A display device, comprising a light-emitting element, wherein the light-emitting element comprises: a first electrode; a second electrode; a light-emitting layer, the light-emitting layer being disposed between the first electrode and the second electrode; as well as a reflector covering at least a portion of a side surface of the first electrode and a side surface of the light emitting layer, Wherein, the reflector comprises: a first insulating layer; a second insulating layer; and A metal layer is disposed between the first insulating layer and the second insulating layer.

2. The display device according to claim 1, wherein: The metal layer is disposed between the first insulating layer and the second insulating layer to overlap with a side surface and a lower surface of the light emitting layer, or to overlap with a side surface of the light emitting layer.

3. The display device according to claim 1, wherein: The light-emitting layer comprises: a lower surface, wherein the first electrode is disposed on the lower surface; an upper surface, on which the second electrode is disposed; and a side surface, the side surface being located between the lower surface and the upper surface, The lower surface and the upper surface of the light emitting layer include: a first flat protrusion and a second flat protrusion, the first flat protrusion having the first electrode disposed thereon, and the second flat protrusion having the second electrode disposed thereon; and a step portion, the step portion being provided at an edge of the first flat protrusion and an edge of the second flat protrusion, The height of the step portion is smaller than the height of each of the first flat protrusion and the second flat protrusion, and The reflector is disposed on at least a portion of a side surface of the light emitting layer below the step portion.

4. The display device according to claim 1, wherein: Each of a lower surface of the light emitting layer provided with the first electrode of the light emitting element and an upper surface of the light emitting layer provided with the second electrode has a width smaller than a width of the side surface of the light emitting layer located between the upper surface and the lower surface.

5. The display device according to claim 1, wherein: The first electrode is disposed to cover a portion of a side surface of the light emitting layer and a lower surface of the light emitting layer.

6. The display device according to claim 5, wherein: The reflector is disposed to cover a side surface of the first electrode and a portion of a lower surface of the first electrode.

7. The display device according to claim 1, wherein: The display device further includes a plurality of bank patterns protruding from the sub-pixels of the display device.

8. The display device according to claim 7, wherein: The display device further includes a pad pattern disposed at a lower surface of the first electrode and disposed on the protruding bank pattern.

9. The display device according to claim 8, wherein: The pad pattern is formed as one metal layer or a stacked structure having at least two metal layers, and Wherein, when the pad pattern includes a stacked structure having the at least two metal layers, at least one metal layer is made of a metal different from that of the other metal layers.

10. A display device, comprising: A display panel, wherein a plurality of sub-pixels and circuits connected to the sub-pixels are arranged on the display panel; as well as a pixel driving circuit configured to drive the sub-pixel, Wherein, the display panel further includes: a plurality of protruding bank patterns, the plurality of protruding bank patterns being disposed in the sub-pixel; and a light emitting element provided in each of the bank patterns, The light emitting element comprises: a first electrode; a second electrode; a light-emitting layer, the light-emitting layer being disposed between the first electrode and the second electrode; and a reflector covering at least a portion of a side surface of the first electrode and a side surface of the light emitting layer, and The reflector comprises: a first insulating layer; a second insulating layer; and A metal layer is disposed between the first insulating layer and the second insulating layer.

11. The display device according to claim 10, wherein: The first electrode is disposed to cover a portion of a side surface of the light emitting layer and a lower surface of the light emitting layer.

12. The display device according to claim 11, wherein: The reflector is disposed to cover a side surface of the first electrode and a portion of a lower surface of the first electrode.

13. The display device according to claim 10, wherein: The display panel further includes a pad pattern disposed at a lower surface of the first electrode and on the protruding bank pattern.

14. The display device according to claim 13, wherein: The pad pattern is formed as one metal layer or a stacked structure having at least two metal layers, and Wherein, when the pad pattern includes a stacked structure having the at least two metal layers, at least one metal layer is made of a metal different from that of the other metal layers.

15. The display device according to claim 10, wherein: The metal layer is disposed between the first insulating layer and the second insulating layer to overlap with side surfaces and a lower surface of the light emitting element or overlap with side surfaces of the light emitting element.

16. The display device according to claim 10, wherein: The first insulating layer and the second insulating layer are made of any one selected from an inorganic insulating material or an organic insulating material, or are made of an oxide including at least one of Ni, Ti, Pt, Pd, Cu, CuW, Mo, MoW, Ag, Al, Hf, Zr and Ta.

17. The display device according to claim 10, wherein: The light-emitting layer comprises: a lower surface, wherein the first electrode is disposed on the lower surface; an upper surface, on which the second electrode is disposed; and a side surface, the side surface being located between the lower surface and the upper surface, The lower surface and the upper surface of the light emitting layer include: a first protrusion and a second protrusion, the first protrusion having the first electrode disposed thereon and the second protrusion having the second electrode disposed thereon; and a step portion, the step portion being provided at an edge of the first protrusion and an edge of the second protrusion, The height of the step portion is smaller than the height of each of the first protrusion and the second protrusion, and The reflector is provided on at least a portion of a side surface of the light emitting element below the step portion.

18. The display device according to claim 10, wherein: Widths of a lower surface of the light emitting layer provided with the first electrode and an upper surface of the light emitting layer provided with the second electrode are smaller than a width of a side surface of the light emitting layer located between the upper surface and the lower surface.

19. The display device according to claim 10, wherein: An area of ​​the light emitting element is smaller than or equal to an area of ​​the bank pattern.

20. The display device according to claim 10, wherein: The light emitting element is connected to a solder pattern and an electrode line disposed on the bank pattern through a pad pattern disposed on a lower surface of the first electrode.

21. The display device according to claim 20, wherein: The area of ​​the light emitting element is smaller than or equal to the area of ​​the electrode line.

22. The display device according to claim 10, wherein: An interlayer insulating layer is provided on the entire surface of the substrate including the light emitting element.

23. The display device according to claim 22, wherein: The interlayer insulating layer has a stacked structure of any one or more of an inorganic insulating material including an oxide film or a nitride film and an organic insulating material.

24. A method for manufacturing a display device including a light emitting element, the method comprising the following steps: forming a light-emitting layer on a substrate; forming a first electrode layer below the light-emitting layer; forming a first insulating layer and a second insulating layer on at least a portion of a side surface of the first electrode layer and a side surface of the light emitting layer; forming a reflective layer between the first insulating layer and the second insulating layer; as well as A second electrode layer is formed on the light emitting layer.

25. The method according to claim 24, wherein: The first electrode layer is provided to cover a portion of a side surface of the light emitting layer and a lower surface of the light emitting layer.

26. The method according to claim 25, wherein: The reflective layer is disposed to cover a side surface of the first electrode layer and a portion of a lower surface of the first electrode layer.

27. The method according to claim 24, wherein: The method further includes the step of forming a plurality of protruding bank patterns on the substrate.

28. The method according to claim 27, wherein: The method further includes forming a pad pattern between a lower surface of the first electrode layer and the protruding bank pattern.

29. The method according to claim 28, wherein: The pad pattern is formed as one metal layer or a stacked structure having at least two metal layers, and Wherein, when the pad pattern includes a stacked structure having the at least two metal layers, at least one metal layer is made of a metal different from that of the other metal layers.

30. The method of claim 24, wherein: The reflective layer is formed to overlap with a side surface of the light emitting layer and a side surface and a lower surface of the first electrode layer, or is formed to overlap with a side surface of the light emitting layer and a side surface of the first electrode layer.

31. The method of claim 24, wherein: The step of forming the reflective layer comprises: forming the first insulating layer on the light-emitting layer and the first electrode layer; forming a metal layer on the first insulating layer; exposing a portion of the first electrode layer by patterning the metal layer and the first insulating layer; and The second insulating layer is formed on the patterned metal layer and the exposed first electrode layer, and the reflective layer is formed between the first insulating layer and the second insulating layer.

32. The method of claim 24, wherein: The step of forming the reflective layer comprises: forming the first insulating layer on the light-emitting layer and the first electrode layer; forming a metal layer on the first insulating layer; patterning the metal layer and the first insulating layer, and forming the reflective layer on a side surface of the first electrode layer and a side surface of the light emitting layer; and The second insulating layer is formed on the first insulating layer formed on the side surfaces and the lower surface of the reflective layer and the first electrode layer.

33. The method according to claim 32, wherein: The metal layer is patterned by an etch-back process to form the reflective layer between the first insulating layer and the second insulating layer formed on side surfaces of the light emitting layer and the first electrode layer.

34. The method according to claim 24, further comprising the steps of: A portion of the light emitting layer below both sides of the second electrode layer is removed.

35. The method of claim 34, wherein: A protrusion is formed on the upper surface of the light emitting layer where the second electrode layer is formed by removing a portion of the upper surface of the light emitting layer, and a step portion is formed on a side surface of the protrusion of the light emitting layer.

36. A method for manufacturing a display device, the method comprising the following steps: forming a display panel, wherein a plurality of sub-pixels and circuits connected to the sub-pixels are disposed on the display panel; as well as forming a pixel driving circuit configured to drive the sub-pixel, Wherein, the step of forming the display panel further includes: forming a plurality of protruding bank patterns, the plurality of protruding bank patterns being disposed in the sub-pixels; and forming a light emitting element, the light emitting element being disposed in each of the bank patterns, The steps of forming the light emitting element include: forming a first electrode and a second electrode; forming a light-emitting layer, the light-emitting layer being disposed between the first electrode and the second electrode; and forming a reflector that covers at least a portion of a side surface of the first electrode and a side surface of the light emitting layer, and The steps of forming the reflector include: forming a first insulating layer and a second insulating layer on side surfaces of the light emitting element; and A metal layer is formed between the first insulating layer and the second insulating layer.

37. The method of claim 36, wherein: The first electrode is disposed to cover a portion of a side surface of the light emitting layer and a lower surface of the light emitting layer.

38. The method of claim 37, wherein: The reflector is disposed to cover a side surface of the first electrode and a portion of a lower surface of the first electrode.

39. The method of claim 36, wherein: The method further includes forming a pad pattern between a lower surface of the first electrode and the protruding bank pattern.

40. The method of claim 39, wherein: The pad pattern is formed as one metal layer or a stacked structure having at least two metal layers, and Wherein, when the pad pattern includes a stacked structure having the at least two metal layers, at least one metal layer is made of a metal different from that of the other metal layers.

41. The method of claim 36, wherein: The metal layer is disposed between the first insulating layer and the second insulating layer to overlap with side surfaces and a lower surface of the light emitting element or to overlap with side surfaces of the light emitting element.

42. The method of claim 36, wherein: The light-emitting layer comprises: a lower surface, wherein the first electrode is disposed on the lower surface; an upper surface, on which the second electrode is disposed; and a side surface, the side surface being located between the lower surface and the upper surface, The lower surface and the upper surface of the light emitting layer include: a first flat protrusion and a second flat protrusion, the first flat protrusion having the first electrode disposed thereon, and the second flat protrusion having the second electrode disposed thereon; and a step portion, the step portion being provided at an edge of the first flat protrusion and an edge of the second flat protrusion, The height of the step portion is smaller than the height of each of the first flat protrusion and the second flat protrusion, and The metal layer is provided on at least a portion of a side surface of the light emitting element below the step portion.

43. The method of claim 36, wherein: A width of a lower surface of the light emitting layer provided with the first electrode of the light emitting element and an upper surface of the light emitting layer provided with the second electrode is smaller than a width of a side surface between the upper surface and the lower surface of the light emitting layer.

44. The method of claim 36, wherein: An area of ​​the light emitting element is smaller than or equal to an area of ​​the bank pattern.

45. The method according to claim 36, further comprising the steps of: forming a pad pattern on a lower surface of the first electrode; as well as A solder pattern and an electrode line connected to the light emitting element through the pad pattern are formed on the bank pattern.

46. ​​The method according to claim 36, further comprising the steps of: An interlayer insulating layer is formed on a substrate including the light emitting element.

47. The method of claim 46, wherein: The interlayer insulating layer has a stacked structure of any one or more of an inorganic insulating material including an oxide film or a nitride film and an organic insulating material.

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