Silicon wafer polishing method and silicon wafer polishing equipment

Abstract

The invention provides a silicon wafer polishing method and a silicon wafer polishing device, a template assembly of the silicon wafer polishing device comprises a thin film base part and a ring part, the ring part extends from the edge of the thin film base part to form a groove used for holding a silicon wafer, the ring part is provided with a telescopic unit, and the method comprises the steps that in the polishing process of the silicon wafer, the telescopic unit is arranged on the thin film base part; detecting the wear stress of the ring part to obtain stress data; and under the condition that the stress data is not in the target numerical value range, adjusting the length of the telescopic unit so as to change the depth of the groove. By monitoring the abrasion stress of the ring part and automatically adjusting the length of the telescopic unit, automatic adjustment of the size of the TA is achieved, the automation level and the utilization rate of the equipment are improved, excessive abrasion caused by too large abrasion stress of the TA can be effectively reduced, and the service life of the TA is prolonged. In addition, the TA size is automatically regulated and controlled, the removal amount of the edge of the silicon wafer can be ensured to be at a reasonable level, and the edge flatness and the product quality of the silicon wafer are improved.

Description

Technical Field

[0001] The present application relates to the technical field of silicon wafer polishing, and in particular to a silicon wafer polishing method and a silicon wafer polishing device. Background Art

[0002] In the semiconductor manufacturing process, silicon wafer polishing is a key step to ensure the flatness of the silicon wafer surface. High-quality polishing can effectively remove the tiny unevenness on the silicon wafer surface and improve the accuracy and efficiency of subsequent processes. Related silicon wafer polishing equipment usually uses a fixed-size template assembly (TA) to fix and maintain the position of the silicon wafer during the polishing process.

[0003] However, due to the fixed size of TA, different sizes of TA are often required according to different processing conditions. This process usually requires manual intervention, which not only increases the complexity and time cost of the operation, but also reduces the utilization rate of the equipment. Secondly, the larger TA size may lead to a reduction in the removal amount of the silicon wafer edge, which in turn affects the edge flatness of the silicon wafer.

[0004] Based on this, the present application provides a silicon wafer polishing method and a silicon wafer polishing device to improve the relevant technology. Summary of the invention

[0005] The purpose of the present application is to provide a silicon wafer polishing method and a silicon wafer polishing device, which realize automatic adjustment of TA size, improve the automation level and utilization rate of the equipment, and enhance the edge flatness of the silicon wafer.

[0006] The purpose of this application is achieved by the following technical solutions:

[0007] In a first aspect, the present application provides a method for polishing a silicon wafer, wherein a template assembly of a silicon wafer polishing device comprises a film base and a ring portion, wherein the ring portion extends from an edge of the film base to form a groove for holding a silicon wafer, and the ring portion is provided with a telescopic unit. The method comprises: during the polishing process of the silicon wafer, detecting the wear stress of the ring portion to obtain stress data; and when the stress data is not within a target numerical range, adjusting the length of the telescopic unit to change the depth of the groove.

[0008] In some embodiments, when the stress data is not within the target numerical range, adjusting the length of the telescopic unit includes: when the stress data is greater than a maximum value of the target numerical range, reducing the length of the telescopic unit to reduce the depth of the groove.

[0009] In some embodiments, the method further includes: before polishing the silicon wafer, using an edge flatness automation model to calculate a target length of the telescopic unit; and controlling the length of the telescopic unit to be the target length.

[0010] In some embodiments, the method further includes: receiving actual edge flatness data of the silicon wafer; and updating model parameters of the edge flatness automation model using the actual edge flatness data.

[0011] In some embodiments, input data of the edge flatness automation model includes size data and lifespan data of the template assembly and target edge flatness data of the silicon wafer.

[0012] In some embodiments, the method further includes: measuring the depth of the groove before polishing the silicon wafer.

[0013] In some embodiments, the method further includes: executing an alarm operation when the stress data is not within the target value range.

[0014] In the second aspect, the present application provides a silicon wafer polishing device, which includes: a template assembly, including a film base and a ring portion, the ring portion extending from the edge of the film base to form a groove for holding a silicon wafer, and the ring portion is provided with a telescopic unit; a pressure sensor, used to detect the wear stress of the ring portion during the polishing process of the silicon wafer to obtain stress data; a control module, used to adjust the length of the telescopic unit to change the depth of the groove when the stress data is not within the target numerical range.

[0015] In some embodiments, the silicon wafer polishing equipment also includes: a polishing disk; a polishing head; a chuck located between the polishing head and the template assembly, the chuck being used to connect the polishing head and the template assembly; a pressure assembly being used to create a negative pressure environment between the polishing head and the polishing disk to adsorb the silicon wafer; or, to create a positive pressure environment between the polishing head and the polishing disk to press the silicon wafer.

[0016] In some embodiments, the telescopic unit includes one or more telescopic rods; the pressure sensor is close to the end of the telescopic unit away from the polishing head; the silicon wafer polishing equipment also includes a ranging sensor, which is arranged on the surface of the film base away from the polishing head, and the ranging sensor is used to measure the depth of the groove before polishing the silicon wafer.

[0017] In some embodiments, the control module stores an edge flatness automation model; input data of the edge flatness automation model includes size data and life data of the template component and target edge flatness data of the silicon wafer.

[0018] The present application provides a silicon wafer polishing method and a silicon wafer polishing device, wherein the template assembly of the silicon wafer polishing device includes a film base and a ring extending from the edge of the film base, thereby forming a groove for fixing and holding the silicon wafer. The ring is provided with a telescopic unit for dynamically adjusting the depth of the groove. During the polishing process, stress data is obtained by detecting the wear stress of the ring. When the detected wear stress is not within the preset target value range, the length of the telescopic unit is automatically adjusted to change the depth of the groove. By monitoring the wear stress of the ring and automatically adjusting the length of the telescopic unit, the automatic adjustment of the TA size is achieved, the need for manual operation is reduced, and the automation level and utilization rate of the equipment are improved. Automatic control of the TA size based on wear stress can effectively reduce excessive wear of the TA due to excessive wear stress, extend the service life of the TA, and reduce maintenance and replacement costs. In addition, automatic control of the TA size can ensure that the removal amount of the silicon wafer edge is at a reasonable level, and improve the edge flatness and product quality of the silicon wafer. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] The present application is further described below in conjunction with the accompanying drawings and specific implementation methods.

[0020] Figure 1 It is a front view of a silicon wafer polishing device provided in an embodiment of the present application.

[0021] Figure 2 It is a schematic diagram of polishing a silicon wafer using a silicon wafer polishing device provided in an embodiment of the present application.

[0022] Figure 3 It is a schematic diagram of the application process of an edge flatness automation model provided in an embodiment of the present application.

[0023] In the figure: 101, polishing disc; 102, polishing head; 103, pressure assembly; 104, chuck; 105, template assembly; 106, telescopic unit; 107, pressure sensor; 108, ranging sensor; 201, silicon wafer; 301, film base; 302, ring; 303, groove. DETAILED DESCRIPTION

[0024] The following will be combined with the drawings in this application to clearly and completely describe the technical solutions in the implementation mode of this application. Obviously, the described implementation mode is only a part of the implementation mode of this application, not all the implementation modes. Based on the implementation mode in this application, all other implementation modes obtained by those skilled in the art without creative work are within the scope of protection of this application.

[0025] In the description of the embodiments of the present application, it should be understood that the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the embodiments of the present application, the meaning of "multiple" is two or more, unless otherwise clearly and specifically defined.

[0026] Currently, the polishing head of the final polishing equipment uses TA (Template Assemble, also known as template assembly) to fix the silicon wafer. Different sizes of TA need to be replaced according to different processing conditions. A larger TA size will reduce the amount of silicon wafer edge removal.

[0027] See also Figure 1 and Figure 2 , Figure 1 is a front view of a silicon wafer polishing device provided in an embodiment of the present application, Figure 2 It is a schematic diagram of polishing a silicon wafer 201 using a silicon wafer polishing device provided in an embodiment of the present application.

[0028] An embodiment of the present application provides a method for polishing a silicon wafer 201. The template assembly 105 of the silicon wafer polishing equipment includes a film base 301 and a ring portion 302. The ring portion 302 extends from the edge of the film base 301 to form a groove 303 for holding the silicon wafer 201. The ring portion 302 is provided with a telescopic unit 106. The method includes: during the polishing process of the silicon wafer 201, detecting the wear stress of the ring portion 302 to obtain stress data; when the stress data is not within the target numerical range, adjusting the length of the telescopic unit 106 to change the depth of the groove 303.

[0029] In the above embodiment, adjusting the length of the telescopic unit 106 may be to automatically increase the length of the telescopic unit 106 so that the depth of the groove 303 becomes larger, or to automatically decrease the length of the telescopic unit 106 so that the depth of the groove 303 becomes smaller.

[0030] In some embodiments, when the stress data is not within the target numerical range, adjusting the length of the telescopic unit 106 may include: when the stress data is greater than the maximum value of the target numerical range, reducing the length of the telescopic unit 106 to reduce the depth of the groove 303.

[0031] The above method has a high degree of automation. Specifically, the TA size is automatically controlled, which reduces personnel replacement and improves equipment utilization rate. In addition, the life of spare parts (for example, TA spare parts) can be improved. When there are special circumstances (for example, stress data is not within the target numerical range), the TA size is automatically adjusted to reduce TA wear and extend TA life. Automatically adjusting the TA size can ensure that the removal amount of the edge of the silicon wafer 201 is at a reasonable level, and improve the edge flatness and product quality of the silicon wafer 201. Among them, the utilization rate refers to the proportion of time occupied by the equipment to create value within the time available. Spare parts, also known as spare parts and maintenance parts, refer to interchangeable parts in inventory. Spare parts are used when equipment needs to be repaired, maintained or refurbished.

[0032] See also Figure 3 , Figure 3 It is a schematic diagram of the application process of an edge flatness automation model provided in an embodiment of the present application.

[0033] In some embodiments, the method may further include: before polishing the silicon wafer 201 , calculating a target length of the telescopic unit 106 using an edge flatness automation model; and controlling the length of the telescopic unit 106 to be the target length.

[0034] In some embodiments, the method may further include: receiving actual edge flatness data of the silicon wafer 201; and updating model parameters of the edge flatness automation model using the actual edge flatness data. As an example, after polishing the silicon wafer 201, the actual edge flatness data of the silicon wafer 201 may be obtained by using a silicon wafer surface flatness detection device to detect.

[0035] In some embodiments, the input data of the edge flatness automation model may include the size data and life data of the template assembly 105 and the target edge flatness data of the silicon wafer 201. The size data of the template assembly 105 may include, for example, the depth of the groove 303. As an example, before polishing the silicon wafer 201, the size data and life data of the template assembly 105 and the target edge flatness data of the silicon wafer 201 are input into the edge flatness automation model, and the edge flatness automation model is used to perform simulation calculation to obtain the target length of the telescopic unit 106; the length of the telescopic unit 106 is controlled to the length obtained by simulation calculation (i.e., the target length), and then the polishing operation of the silicon wafer 201 is performed.

[0036] The above embodiment is conducive to improving the flatness of the silicon wafer 201. Specifically, an edge flatness automation model is established to control the length of the telescopic unit 106, which effectively ensures the flatness of the processed silicon wafer 201.

[0037] like Figure 3 As shown, in a specific application scenario, the system (e.g., silicon wafer polishing equipment) establishes a preliminary model of ESFQR parameters (i.e., an edge flatness automation model); then, before polishing the silicon wafer 201, the TA size (i.e., the size data of the template component 105, such as the depth of the groove 303), the life (i.e., the life data of the template component 105) and the ESFQR parameters (here, the target edge flatness data of the silicon wafer 201) are imported into the model (i.e., the edge flatness automation model); next, the edge flatness automation model is used to simulate and calculate The target length of the telescopic unit 106 (for example, including one or more telescopic rods) is calculated and executed, that is, the length of the telescopic unit 106 is controlled to the length calculated by simulation (that is, the target length); thereafter, data (for example, actual edge flatness data of the silicon wafer 201) can be continuously collected and the model (that is, the edge flatness automation model) can be improved, wherein improving the model, for example, refers to updating the model parameters, thereby optimizing the target length of the telescopic unit 106 obtained by subsequent calculation, so as to dynamically control the ESFQR parameters (here, the actual edge flatness data of the silicon wafer 201). Among them, the full name of ESFQR is Edge Site Front Quotient Range, that is, the edge area front quotient range, also known as edge flatness, or edge local flatness.

[0038] In some embodiments, the method may further include: measuring the depth of the groove 303 before polishing the silicon wafer 201. After measuring the depth of the groove 303, the measured data may be recorded, thereby achieving not only automatic control of the TA size, but also automatic recording of related data (e.g., the depth of the groove 303). The automatic control of the TA size is achieved by adjusting the length of the telescopic unit 106.

[0039] In some embodiments, the method may further include: when the stress data is not within the target value range, performing an alarm operation. The alarm operation may include, for example, one or more of a voice alarm operation, a light alarm operation, and an alarm information push operation. The alarm information push operation may, for example, push the alarm information to a terminal device (e.g., a mobile phone, a tablet computer, a desktop computer, a wearable device, etc.) of a relevant staff member. Thus, it is convenient for the staff member to promptly handle the situation that the stress data is not within the target value range during the polishing process of the silicon wafer, reduce TA wear, and extend TA life.

[0040] Compared with the related art, the above embodiment designs an automatic TA size control function to reduce manual replacement by personnel and improve the utilization rate of the equipment. Since the TA size is automatically controlled and automatically adjusted when the grinding stress is too large, the TA life can be extended. An ESFQR management and control model (i.e., an edge flatness automation model) is established, and the model parameters are updated according to the detection data (e.g., actual edge flatness data), so as to automatically control the TA size and effectively improve the flatness of the silicon wafer 201 (e.g., the edge flatness of the silicon wafer 201). In general, the above embodiment achieves an improvement in the utilization rate of the silicon wafer polishing equipment (e.g., the final polishing equipment), extends the TA life, and improves the flatness level of the silicon wafer 201.

[0041] The embodiment of the present application also provides a silicon wafer polishing device, which includes a template assembly 105, a pressure sensor 107 and a control module. The template assembly 105 includes a film base 301 and a ring 302, wherein the ring 302 extends from the edge of the film base 301 to form a groove 303 for holding the silicon wafer 201, and the ring 302 is provided with a telescopic unit 106. The pressure sensor 107 is used to detect the wear stress of the ring 302 during the polishing process of the silicon wafer 201 to obtain stress data. The control module is used to adjust the length of the telescopic unit 106 to change the depth of the groove 303 when the stress data is not within the target value range.

[0042] In some embodiments, the silicon wafer polishing device may further include a polishing plate 101, a polishing head 102, a chuck 104, and a pressure assembly 103. The chuck 104 is located between the polishing head 102 and the template assembly 105, and the chuck 104 is used to connect the polishing head 102 and the template assembly 105. The pressure assembly 103 is used to create a negative pressure environment between the polishing head 102 and the polishing plate 101 to adsorb the silicon wafer 201; or, create a positive pressure environment between the polishing head 102 and the polishing plate 101 to press the silicon wafer 201.

[0043] The above embodiments do not limit the material of the chuck 104 . In some embodiments, the chuck 104 may be a rubber chuck 104 .

[0044] In some embodiments, the telescopic unit 106 may include one or more telescopic rods.

[0045] In some embodiments, the pressure sensor 107 may be close to an end of the telescopic unit 106 away from the polishing head 102 .

[0046] In some embodiments, the silicon wafer polishing device may further include a distance sensor 108, which is disposed on a surface of the film base 301 away from the polishing head 102, and is used to measure the depth of the groove 303 before polishing the silicon wafer 201. As an example, before polishing the silicon wafer 201, the TA is controlled to move downward until the TA just contacts the polishing plate 101, and the distance sensor 108 measures the distance between the position and the polishing plate 101 as the depth of the groove 303.

[0047] For example, Figure 1 and Figure 2As shown, the silicon wafer 201 is adsorbed by the polishing head 102 through the pressure assembly 103, wherein the chuck 104 is used to connect the TA, and the telescopic unit 106 includes a plurality of telescopic rods. Before polishing begins, the pressure assembly 103 uses negative pressure (i.e., creates a negative pressure environment). After polishing begins, the pressure assembly 103 uses positive pressure (i.e., creates a positive pressure environment) to press the silicon wafer 201 onto the polishing disc 101 for polishing. At the same time, due to the positive pressure, the TA will come into contact with the polishing disc 101 and cause wear. When a special situation occurs, for example, when the wear stress is too large and exceeds the upper threshold of the target numerical range (i.e., the maximum value of the target numerical range), the length of the telescopic rod is automatically adjusted (for example, the telescopic rod is automatically retracted) to ensure that the TA is not subjected to high-intensity wear, and at the same time, the equipment alarms to notify personnel to check for abnormalities. After collecting the ESFQR data of the device (e.g., actual edge flatness data), the telescopic rod will automatically adjust the depth of the TA groove (i.e., groove 303) to ensure the quality of the subsequent processed product, and automatically measure and record the current TA groove depth through the ranging sensor 108 before processing to facilitate subsequent data analysis.

[0048] In some embodiments, the control module may store an edge flatness automation model; input data of the edge flatness automation model includes size data and life data of the template assembly 105 and target edge flatness data of the silicon wafer 201 .

[0049] The above embodiments can be widely used in application fields such as semiconductor manufacturing and final polishing technology. First, the TA size of the polishing head 102 is automatically controlled to reduce personnel replacement and improve the utilization rate of the equipment; second, the TA life is extended by setting thresholds (for example, the upper threshold and lower threshold of the target value range); finally, an edge flatness automation model is established to improve the overall flatness level of the silicon wafer 201. The above silicon wafer polishing equipment has a great market demand, especially in large-scale semiconductor manufacturing enterprises, and is expected to realize the automation and intelligence of silicon wafer polishing equipment (for example, final polishing equipment), greatly improve production efficiency, and reduce production costs.

[0050] It should be noted that each embodiment in the present application is described in a progressive manner, and the same or similar parts between the embodiments can be referred to each other, and each embodiment focuses on the differences from other embodiments. In particular, for the product embodiment, since it is basically similar to the method embodiment, the description is relatively simple, and the relevant parts can be referred to the partial description of the method embodiment.

[0051] Unless otherwise defined, the technical terms or scientific terms used in the present disclosure should be understood by people with ordinary skills in the field to which the present disclosure belongs. The "first", "second" and similar words used in the present disclosure do not indicate any order, quantity or importance, but are only used to distinguish different components. "Include" or "comprise" and similar words mean that the elements or objects appearing before the word cover the elements or objects listed after the word and their equivalents, without excluding other elements or objects. "Connect" or "connected" and similar words are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. "Up", "down", "left", "right" and the like are only used to indicate relative positional relationships. When the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0052] It will be understood that when an element such as a layer, film, region, or substrate is referred to as being “on” or “under” another element, it can be “directly on” or “under” the other element or intervening elements may be present.

[0053] In the description of the above embodiments, specific features, structures, materials or characteristics may be combined in a suitable manner in any one or more embodiments or examples.

[0054] The above is only a specific embodiment of the present disclosure, but the protection scope of the present disclosure is not limited thereto. Any person skilled in the art who is familiar with the technical field can easily think of changes or substitutions within the technical scope disclosed in the present disclosure, which should be included in the protection scope of the present disclosure. Therefore, the protection scope of the present disclosure should be based on the protection scope of the claims.

Claims

1. A silicon wafer polishing method, characterized in that: The template assembly of the silicon wafer polishing equipment comprises a film base and a ring portion, wherein the ring portion extends from the edge of the film base to form a groove for holding the silicon wafer, and the ring portion is provided with a telescopic unit, and the method comprises: During the polishing process of the silicon wafer, the wear stress of the ring portion is detected to obtain stress data; When the stress data is not within the target value range, the length of the telescopic unit is adjusted to change the depth of the groove.

2. The silicon wafer polishing method according to claim 1, characterized in that: When the stress data is not within the target value range, adjusting the length of the telescopic unit includes: When the stress data is greater than a maximum value of the target value range, the length of the telescopic unit is reduced to reduce the depth of the groove.

3. The silicon wafer polishing method according to claim 1, characterized in that: The method further comprises: Before polishing the silicon wafer, a target length of the telescopic unit is calculated using an edge flatness automation model; The length of the telescopic unit is controlled to be the target length.

4. The silicon wafer polishing method according to claim 1, characterized in that: The method further comprises: Receiving actual edge flatness data of the silicon wafer; The actual edge flatness data is used to update model parameters of the edge flatness automation model.

5. The silicon wafer polishing method according to claim 3, characterized in that: The input data of the edge flatness automation model includes the size data and life data of the template assembly and the target edge flatness data of the silicon wafer.

6. The silicon wafer polishing method according to claim 1, characterized in that: The method further comprises: Before polishing the silicon wafer, measuring the depth of the groove; and / or, When the stress data is not within the target value range, an alarm operation is performed.

7. A silicon wafer polishing device, characterized in that: The silicon wafer polishing equipment comprises: A template assembly, comprising a film base and a ring portion, wherein the ring portion extends from an edge of the film base to form a groove for holding a silicon wafer, and the ring portion is provided with a telescopic unit; A pressure sensor, used to detect the wear stress of the ring portion during the polishing process of the silicon wafer to obtain stress data; The control module is used to adjust the length of the telescopic unit to change the depth of the groove when the stress data is not within the target value range.

8. The silicon wafer polishing equipment according to claim 7, characterized in that: The silicon wafer polishing equipment also includes: Polishing discs; Polishing head; A chuck is located between the polishing head and the template assembly, and the chuck is used to connect the polishing head and the template assembly; The pressure component is used to create a negative pressure environment between the polishing head and the polishing plate to absorb the silicon wafer; or to create a positive pressure environment between the polishing head and the polishing plate to press the silicon wafer.

9. The silicon wafer polishing equipment according to claim 8, characterized in that: The telescopic unit includes one or more telescopic rods; The pressure sensor is close to an end of the telescopic unit away from the polishing head; The silicon wafer polishing device further comprises a distance measuring sensor, which is arranged on a surface of the film base away from the polishing head, and is used to measure the depth of the groove before polishing the silicon wafer.

10. The silicon wafer polishing equipment according to claim 7, characterized in that: The control module stores an edge flatness automation model; The input data of the edge flatness automation model includes the size data and life data of the template assembly and the target edge flatness data of the silicon wafer.

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