Chip normal packaging method
By using glue to fix and vacuum sputter the conductive circuit layer during chip packaging, the inductance effect problem caused by wire bonding is solved, the chip's reliability and anti-interference ability are improved, and the stability and speed of signal transmission are improved.
Patent Information
- Application Number
- CN202510082633.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-01-20
- Publication Date
- 2025-02-28
AI Technical Summary
During the chip packaging process, the inductance effect caused by wire bonding is not properly compensated, affecting signal integrity and thus affecting the operating stability and speed of the system, especially in high-speed systems.
A chip formal packaging method is adopted, including fixing the chip to be packaged in a preset groove of the printed circuit board, filling and curing it with glue, and then forming a conductive circuit layer on the flush surface by vacuum sputtering, and finally colloid coating is performed on the surface of the printed circuit board and the conductive circuit layer to complete the packaging.
It eliminates the inductance effect caused by connections in the chip packaging process, improves the reliability and anti-interference ability of the chip formal installation, reduces interference from signal reflection, and improves the stability and speed of signal transmission.
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Abstract
Description
Technical Field
[0001] The present application relates to the technical field of chip packaging, and in particular to a chip upright packaging method. Background Art
[0002] The packaging of front-mounted chips generally uses a wire bonding packaging process, but wire bonding will produce an inductance effect. If the inductance effect caused by wire bonding is not properly compensated, signal reflection will occur, thereby affecting signal integrity, and then affecting the operating stability and speed of the system, especially in high-speed systems. Summary of the invention
[0003] The purpose of this application is to provide a chip upright packaging method, which can improve the reliability of chip upright packaging and the anti-interference ability of the chip.
[0004] To achieve the above objectives, this application provides the following solutions: In a first aspect, the present application provides a chip packaging method, comprising: When the chip to be packaged is a single-layer chip, the chip to be packaged is fixed in a preset groove of the printed circuit board; The preset grooves for fixing the chip to be packaged are filled with glue, so that the surface of the glue after curing is flush with the surface of the printed circuit board; A conductive circuit layer is formed on the surface of the glue after curing and flush with the surface of the printed circuit board by vacuum sputtering; The surfaces of the printed circuit board and the conductive circuit layer are coated with colloid to complete the upright packaging of the chip to be packaged.
[0005] Optionally, fixing the chip to be packaged in a preset groove of the printed circuit board specifically includes: fixing the chip to be packaged in the preset groove of the printed circuit board using a die-bonding adhesive.
[0006] Optionally, the preset groove that fixes the chip to be packaged is filled with glue, so that the surface of the glue is flush with the surface of the printed circuit board after curing, specifically including: applying glue to the printed circuit board by spin coating, scraping or dispensing, filling and fixing the preset groove that fixes the chip to be packaged, so that the surface of the glue is flush with the surface of the printed circuit board after curing.
[0007] Optionally, a conductive circuit layer is formed on a surface flush with the printed circuit board surface after the glue is cured by vacuum sputtering, specifically comprising: After the glue is cured, a photosensitive material is coated on the surface flush with the surface of the printed circuit board, and the photosensitive material is exposed to light to be cured to form a protective layer of the circuit image; Based on the protective layer of the circuit image, the conductive circuit layer is formed by vacuum sputtering.
[0008] Optionally, coating a photosensitive material on a surface flush with the printed circuit board surface after the glue is cured, and exposing the photosensitive material to form a circuit image by curing, specifically comprising: Coating a photosensitive material on the surface of the glue after curing that is flush with the surface of the printed circuit board; The printed circuit board is placed in an exposure machine to expose the photosensitive material, and a stripping liquid is used to clean the uncured photosensitive material, and the remaining cured photosensitive material forms a protective layer of the circuit image.
[0009] Optionally, based on the protective layer of the circuit image, the forming of the conductive circuit layer by vacuum sputtering specifically includes: Placing the printed circuit board into a sputtering device for vacuum sputtering to obtain a vacuum-coated metal layer; The protective layer that has been solidified in the vacuum-coated metal layer is removed by using a remover, and the remaining vacuum-coated metal forms a conductive circuit layer.
[0010] Optionally, the vacuum sputtering is magnetron sputtering, evaporation plating or chemical plating.
[0011] Optionally, the chip to be packaged is a memory chip.
[0012] Optionally, the colloid is black glue.
[0013] In a second aspect, the present application provides a chip packaging method, the chip packaging method comprising: When the chip to be packaged includes N layers of chips, each layer of chips is packaged into a preset groove of the printed circuit board in sequence, where N is an integer greater than 1, specifically including: For the i-th layer chip, when i=1, the i-th layer chip is fixed in the preset groove of the printed circuit board, and when i>1, the i-th layer chip is fixed above the i-1th conductive circuit layer; Filling the preset groove in which the i-th layer chip is fixed with glue, so that the surface of the current glue after curing is flush with the i-th set position in the preset groove, to obtain the i-th flush surface; Forming an i-th conductive circuit layer on the i-th flat surface by vacuum sputtering; If i is not equal to N, then the value of i is increased by 1, and the process returns to the step of fixing the i-th layer chip on the i-1th conductive circuit layer; If i is equal to N, colloid coating is performed on the surface of the printed circuit board and the i-th conductive circuit layer to complete the face-up packaging of the chip to be packaged.
[0014] According to the specific embodiments provided by the present application, the present application discloses the following technical effects: the present application provides a chip upright packaging method, wherein the preset groove of the chip to be packaged is filled and fixed with glue, and a conductive circuit layer is formed on the surface flush with the surface of the printed circuit board (PCB) after the glue is cured by sputtering, thereby eliminating the inductance effect caused by the connection in the chip packaging process, thereby improving the reliability of the chip upright packaging. On the other hand, the wire connection is reduced to make the transmission impedance closer to the theoretical value, reduce the interference of signal reflection, and thus improve the chip's anti-interference ability. BRIEF DESCRIPTION OF THE DRAWINGS
[0015] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.
[0016] Figure 1 A schematic flow chart of a chip packaging method provided in accordance with an embodiment of the present application.
[0017] Figure 2 This is a schematic diagram of the structure of a single-layer chip after upright packaging provided in an embodiment of the present application.
[0018] Figure 3 This is a schematic diagram of the structure of a multi-layer chip after upright packaging provided in one embodiment of the present application.
[0019] Figure 4 A schematic diagram of the position relationship between the conductive circuit layer circuit and the chip pad provided in an embodiment of the present application.
[0020] Reference numerals: 1-printed circuit board, 2-solid glue, 3-chip to be packaged, 4-glue, 5-conductive circuit layer, 6-black glue, 7-conductive circuit layer circuit, 8-chip pad. DETAILED DESCRIPTION
[0021] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.
[0022] In order to make the above-mentioned objects, features and advantages of the present application more obvious and easy to understand, the present application is further described in detail below with reference to the accompanying drawings and specific implementation methods.
[0023] The present application provides a chip packaging method, such as Figure 1 As shown, the chip face-up packaging method includes steps 101 to 104.
[0024] Step 101: When the chip to be packaged is a single-layer chip, fix the chip to be packaged in a preset groove of a printed circuit board.
[0025] Step 102: Use glue to fill the preset groove that fixes the chip to be packaged, so that the surface of the glue after curing is flush with the board surface of the printed circuit board.
[0026] Step 103: A conductive circuit layer is formed on the surface of the cured glue flush with the surface of the printed circuit board by vacuum sputtering.
[0027] Step 104: applying colloid coating on the surface of the printed circuit board and the conductive circuit layer to complete the face-up packaging of the chip to be packaged.
[0028] The chip 3 to be packaged is an integrated circuit (IC) chip.
[0029] The present application uses glue 4 to fill and fix the preset groove of the chip 3 to be packaged, and uses vacuum sputtering to form a conductive circuit layer 5 on the surface of the glue 4 after curing and flush with the surface of the printed circuit board 1. The positional relationship between the conductive circuit layer circuit 7 and the chip pad 8 is as follows: Figure 4 As shown, compared with the related wire bonding packaging method, the chip upright packaging method of the present application can control the impedance of the wire routing, eliminate the inductance effect caused by the connection in the chip packaging process, improve the matching of the signal transmission impedance, and reduce the interference of signal reflection, thereby improving the chip's anti-interference ability, and then improving the chip's data transmission efficiency, reducing packaging costs and improving production efficiency.
[0030] In an exemplary embodiment, step 101 specifically includes: using a bonding adhesive 2 to fix the chip 3 to be packaged in a preset groove of the printed circuit board 1. More specifically, the bonding adhesive 2 is scraped on the surface of the preset groove of the printed circuit board 1, and the chip 3 to be packaged is placed in the groove. The bonding adhesive 2 is cured by baking and heating to complete the fixation of the chip 3 to be packaged and the printed circuit board 1.
[0031] In an exemplary embodiment, step 102 specifically includes: applying glue to the printed circuit board 1 by spin coating, scraping or dispensing, filling the preset groove in which the chip 3 to be packaged is fixed, so that the surface of the glue 4 is flush with the board surface of the printed circuit board 1 after curing. More specifically, applying glue to the printed circuit board 1 to fill the gap between the storage chip and the printed circuit board 1, and then baking and curing the gap glue 4 so that the surface of the chip 3 to be packaged and the surface of the printed circuit board 1 present an integral plane.
[0032] In an exemplary embodiment, step 103 specifically includes: Step 1031: coating a photosensitive material on the surface of the glue 4 after curing and flush with the surface of the printed circuit board 1, and exposing the photosensitive material to form a protective layer of the circuit image.
[0033] Step 1032: Based on the protective layer of the circuit image, a conductive circuit layer 5 is formed by vacuum sputtering.
[0034] Wherein, step 1031 specifically includes: After the glue 4 is cured, a photosensitive material is coated on the surface flush with the surface of the printed circuit board 1. The photosensitive material is a liquid photosensitive glue or a photosensitive dry film.
[0035] The printed circuit board 1 is placed in an exposure machine to expose the photosensitive material, and a special stripping liquid is used to clean the uncured photosensitive material (leaking out the conductive circuit required by the chip 3 to be packaged), and the remaining cured photosensitive material forms a protective layer of the circuit image.
[0036] Wherein, step 1032 specifically includes: The printed circuit board 1 is placed in a sputtering device for vacuum sputtering to obtain a vacuum-coated metal layer.
[0037] A professional remover is used to remove the solidified protective layer (including the metal layer attached to the protective layer) in the vacuum-coated metal layer, and the remaining vacuum-coated metal forms a conductive circuit layer 5 .
[0038] In an exemplary embodiment, the vacuum sputtering is magnetron sputtering, evaporation deposition or chemical plating.
[0039] In an exemplary embodiment, the chip 3 to be packaged is a memory chip.
[0040] In an exemplary embodiment, the colloid is black glue 6, and the packaging test is performed after the black glue 6 is coated.
[0041] In an exemplary embodiment, a single-layer chip includes at least one chip in the same layer. After the single-layer chip is packaged, Figure 2 shown.
[0042] The present application is applicable to the front-mounted packaging of high-speed memory chips, and improves signal integrity from the following aspects, thereby improving the stability and speed of high-speed signal transmission: (1) The packaging method of the present application replaces the related wire bonding packaging method, eliminating the inductance effect caused by wire bonding and its impact on signal integrity; (2) For impedance control, the transmission line theory of the conductive line design is implemented by sputtering, thereby controlling the impedance of the line, improving the matching of the signal transmission impedance, reducing signal reflection and improving signal integrity; (3) The inductance effect is eliminated and the impedance control of the line is implemented, thereby reducing signal crosstalk and improving signal integrity.
[0043] In an exemplary embodiment, the present application provides a chip face-up packaging method, the chip face-up packaging method comprising: when the chip to be packaged includes N layers of chips, each layer of chips is packaged into a preset groove of a printed circuit board in sequence, N is an integer greater than 1, specifically comprising: Step 201: For the i-th layer chip, when i=1, fix the i-th layer chip in a preset groove of the printed circuit board; when i>1, fix the i-th layer chip above the i-1th conductive circuit layer.
[0044] Step 202: Use glue to fill the preset groove that fixes the i-th layer chip, so that the surface of the current glue after curing is flush with the i-th set position in the preset groove, to obtain the i-th flush surface.
[0045] Step 203: forming an i-th conductive circuit layer on the i-th flat surface by vacuum sputtering.
[0046] Step 204: If i is not equal to N, the value of i is increased by 1, and the process returns to the step of fixing the i-th layer chip on the i-1th conductive circuit layer.
[0047] Step 205: If i is equal to N, then colloid coating is performed on the surface of the printed circuit board and the i-th conductive circuit layer to complete the face-up packaging of the chip to be packaged.
[0048] The chip packaging process of the N-layer chip, i.e., the chip packaging process of the multi-layer chip, can adopt the relevant technical features involved in the chip packaging process of the single-layer chip. Figure 3 shown.
[0049] The technical features of the above embodiments may be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.
[0050] This article uses specific examples to illustrate the principles and implementation methods of this application. The description of the above embodiments is only used to help understand the method and core ideas of this application. At the same time, for those skilled in the art, according to the ideas of this application, there will be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as limiting this application.
Claims
1. A chip packaging method, characterized in that: The chip packaging method comprises: When the chip to be packaged is a single-layer chip, the chip to be packaged is fixed in a preset groove of the printed circuit board; The preset grooves for fixing the chip to be packaged are filled with glue, so that the surface of the glue after curing is flush with the surface of the printed circuit board; A conductive circuit layer is formed on the surface of the glue after curing and flush with the surface of the printed circuit board by vacuum sputtering; The surfaces of the printed circuit board and the conductive circuit layer are coated with colloid to complete the upright packaging of the chip to be packaged.
2. The chip packaging method according to claim 1, characterized in that: Fixing the chip to be packaged in the preset groove of the printed circuit board specifically includes: The chip to be packaged is fixed in the preset groove of the printed circuit board using a die-bonding adhesive.
3. The chip packaging method according to claim 1, characterized in that: The preset groove of the chip to be packaged is filled and fixed with glue so that the surface of the glue after curing is flush with the surface of the printed circuit board, which specifically includes: The printed circuit board is glued by spin coating, scraping or dispensing to fill the preset grooves in which the chips to be packaged are fixed, so that the surface of the glue after curing is flush with the board surface of the printed circuit board.
4. The chip packaging method according to claim 1, characterized in that: The conductive circuit layer is formed on the surface of the glue after curing and flush with the surface of the printed circuit board by vacuum sputtering, which specifically includes: After the glue is cured, a photosensitive material is coated on the surface flush with the surface of the printed circuit board, and the photosensitive material is exposed to light to be cured to form a protective layer of the circuit image; Based on the protective layer of the circuit image, the conductive circuit layer is formed by vacuum sputtering.
5. The chip face-up packaging method according to claim 4, characterized in that: After the glue is cured, a photosensitive material is coated on the surface flush with the surface of the printed circuit board, and the photosensitive material is exposed to form a circuit image by curing, which specifically includes: Coating a photosensitive material on the surface of the glue after curing that is flush with the surface of the printed circuit board; The printed circuit board is placed in an exposure machine to expose the photosensitive material, and a stripping liquid is used to clean the uncured photosensitive material, and the remaining cured photosensitive material forms a protective layer of the circuit image.
6. The chip packaging method according to claim 4, characterized in that: Based on the protective layer of the circuit image, the conductive circuit layer is formed by vacuum sputtering, which specifically includes: Placing the printed circuit board into a sputtering device for vacuum sputtering to obtain a vacuum-coated metal layer; The protective layer that has been solidified in the vacuum-coated metal layer is removed by using a remover, and the remaining vacuum-coated metal forms a conductive circuit layer.
7. The chip packaging method according to claim 6, characterized in that: The vacuum sputtering is magnetron sputtering, evaporation plating or chemical plating.
8. The chip packaging method according to claim 1, characterized in that: The chip to be packaged is a memory chip.
9. The chip face-up packaging method according to claim 1, characterized in that: The colloid is black glue.
10. A chip packaging method, characterized in that: The chip packaging method comprises: When the chip to be packaged includes N layers of chips, each layer of chips is packaged into a preset groove of the printed circuit board in sequence, where N is an integer greater than 1, specifically including: For the i-th layer chip, when i=1, the i-th layer chip is fixed in the preset groove of the printed circuit board, and when i>1, the i-th layer chip is fixed above the i-1th conductive circuit layer; Filling the preset groove in which the i-th layer chip is fixed with glue, so that the surface of the current glue after curing is flush with the i-th set position in the preset groove, to obtain the i-th flush surface; Forming an i-th conductive circuit layer on the i-th flat surface by vacuum sputtering; If i is not equal to N, then the value of i is increased by 1, and the process returns to the step of fixing the i-th layer chip on the i-1th conductive circuit layer; If i is equal to N, colloid coating is performed on the surface of the printed circuit board and the i-th conductive circuit layer to complete the face-up packaging of the chip to be packaged.
Citation Information
Patent Citations
Upright package structure and preparation method for novel high-density multi-layer circuit chip
CN103325761A
Chip packaging structure
CN118116876A
Printed circuit board embedded with chip and manufacturing method thereof
CN118946029A