Method and system for controlling flexible and programmable equipment power supply board card

Abstract

The invention relates to a flexible and programmable control method and system for an equipment power supply board card, and the method sequentially comprises the following steps: 1, compiling and generating a test description program of the equipment power supply board card, and describing the configuration, output, comparison and measurement contents of a DPS at each test node; step 2, performing system optimization and compiling on the test description program in the step 1 to obtain a final executable program, and downloading the final executable program into an equipment power supply board card; 3, partitioning the test description program downloaded into the equipment power supply board card in the step 2, and then storing the test description program into a DDR (Double Data Rate) memory of the equipment power supply board card; and 4, the equipment power board card executes the dynamic DC test case in the system. According to the invention, synchronization between the DPS and other system board cards can be effectively coordinated, and reliable configuration is ensured to be obtained in a high-speed measurement scene.

Description

Technical Field

[0001] The present invention relates to the technical field related to semiconductor test ATE systems, and in particular to a control method and system for a flexible and programmable device power board. Background Art

[0002] In the semiconductor industry, chip testing is an extremely important part of the manufacturing process. Automatic Test Equipment (ATE) is a key tool for evaluating and verifying chip performance, reliability, and functionality. ATE is a collection of test instruments and equipment that uses a variety of test modes and tools to detect chips.

[0003] ATE simulates different working conditions by executing test vectors to ensure that the chip can operate normally under various circumstances. Therefore, ATE plays a vital role in ensuring high-quality chip production, providing manufacturers with a reliable means to verify chip design and functionality.

[0004] In ATE systems, the device power supply (DPS) is one of the core components. It is responsible for providing power signals to the device under test and measuring the performance characteristics of these signals.

[0005] At the same time, the DPS device power board needs to have a certain degree of flexibility to generate and provide corresponding power waveforms according to specific test requirements. This flexibility enables it to dynamically adjust the power output to adapt to the power requirements of the device under test in different test scenarios. Therefore, the role of the DPS device power board is not only to provide power for the device under test, but also to generate appropriate power signals according to specific test requirements to provide support for comprehensive chip testing.

[0006] When the ATE machine performs dynamic DC testing, the equipment power supply card plays a vital role. Usually, the DPS is controlled by the main control unit in the ATE system, so that the main control unit automatically configures the DPS under specific trigger conditions. This enables the DPS to accurately output the waveform described in the test pattern in each test section, and compare and measure at each test point.

[0007] However, the current control method of the power board of the equipment only relies on the main control for dynamic configuration, which has the following disadvantages:

[0008] 1. The flexibility and functionality of the equipment power board are limited, and the performance of the DPS part is restricted by the performance of the system main control;

[0009] 2. The time consumption of master-slave device communication affects the efficiency of dynamic DC testing, making it difficult to fully support high-speed dynamic DC test cases;

[0010] 3. In addition, it is difficult for other devices (such as TMU, RFMU, etc.) working with the power board of the collaborative device to quickly confirm the stabilization time between the output test points of the DPS and the ADC (analog-to-digital converter) conversion completion time in the system.

[0011] In view of the above-mentioned defects, the designers have actively carried out research and innovation in order to create a control method and system for a flexible and programmable device power board to make it more valuable for industrial use. Summary of the invention

[0012] In order to solve the above technical problems, the purpose of the present invention is to provide a control method and system for a flexible and programmable device power board.

[0013] To achieve the above object, the present invention adopts the following technical solution:

[0014] One of the purposes of the present invention:

[0015] A control method for a flexible and programmable device power board comprises the following steps in sequence:

[0016] Step 1: Write and generate the test description program of the device power board, describing the configuration, output, comparison and measurement content of DPS at each test node;

[0017] Step 2: After the test description program in the above step 1 is optimized and compiled by the system, a final executable program is obtained and downloaded to the power board of the device;

[0018] Step 3: The test description program downloaded to the device power board in the above step 2 is partitioned and then stored in the DDR memory of the device power board;

[0019] Step 4: The device power board executes the dynamic DC test case in the system.

[0020] As a further improvement of the present invention, the test description program in step 1 is composed of one or more program segments, each program segment is composed of multiple nested program blocks, and the program block includes program description information, program declarations and control vector sets;

[0021] in,

[0022] Program Description Information: Provides detailed information about the test vector description file, including version number, creation time, and any additional comments to make the file easier to understand and manage;

[0023] Program declaration: used to define and declare various elements used in the test vector, including time scale, timing definition, output grouping, and DPS control channels within the group. The purpose is to introduce and configure necessary elements to ensure the accuracy of the DPS module test vector and consistency with the system;

[0024] Control vector set: The core of the device power board control and test vector description, including the configuration content of the power board at different nodes, describing various operations of the test vector, and providing key steps and parameters for the specific implementation of dynamic DC testing.

[0025] As a further improvement of the present invention, when generating the test description program in step 1, the user generates the original program segment through the tools provided by the system or writes it according to the grammatical rules given by the system based on the configuration of the pins, timing, levels in the test case and the test vector content of the DPS.

[0026] As a further improvement of the present invention, the test description program in step 1 includes:

[0027] Pin, Timing and Level information in the entire test case;

[0028] The power output and comparison configuration of each DPS channel at each test point;

[0029] Through timing description, the output and measurement of each DPS channel can be controlled.

[0030] As a further improvement of the present invention, the configuration content of the test description program in step 1 includes drive channel power shutdown parameters, drive amplifier enable parameters, drive amplifier ground enable parameters, drive channel global bias adjustment parameters, drive voltage setting parameters, drive voltage gain adjustment parameters, drive voltage bias adjustment parameters, clamp enable parameters, high clamp current setting parameters, high clamp current gain adjustment parameters, high clamp current bias adjustment parameters, low clamp current setting parameters, low clamp current gain adjustment parameters, low clamp current bias adjustment parameters, drive mode selection parameters, output slew rate control parameters, alarm mode setting parameters, compensation mode setting parameters, compensation gear selection parameters, open circuit detection threshold voltage parameters, equipment ground detection threshold voltage parameters and diagnostic mode selection parameters.

[0031] As a further improvement of the present invention, in step 2, the original program segment is optimized according to the model of the device power board, the output mode, and the Pin definition assigned to the DUT, and then compiled into binary machine code, wherein the binary machine code is the program that can ultimately be understood and executed by the device power board.

[0032] As a further improvement of the present invention, in step 3, the device power board divides the test description program into six parts according to the binary program format, namely, the definition of the test power channel, the declaration of the test time scale and timing set, the test core program segment, the DPS configuration vector and the DPS test vector, and establishes a partition table, allocates partition addresses according to the size of each program and data segment, and then saves the test description program partitions in the DDR memory, and saves the partition table in the lowest segment of this memory.

[0033] As a further improvement of the present invention, in step 4, the test system enters the test mode under the management of the main control. At this time, the device power board only pays attention to the clock synchronization signal and the input trigger signal. Whenever a trigger signal that meets the conditions is received, the device power board executes the next program instruction at the edge of the synchronization clock, and so on. When executing part of the program, if the preset conditions are met, the device power board compares, measures and sends external trigger signals to cooperate with other boards to work until all test instances are run to completion, all program executions are completed, or they are forcibly interrupted by the main control device. The device power board completes the program control execution of a dynamic test case.

[0034] The second purpose of the present invention is:

[0035] A control system for a flexible and programmable device power board, the control system can execute the above control method.

[0036] By means of the above scheme, the present invention has at least the following advantages:

[0037] The present invention can effectively coordinate the synchronization between the DPS and other system boards and ensure reliable configuration in high-speed measurement scenarios.

[0038] The present invention can improve the performance and reliability of ATE systems in dynamic DC testing and provide more accurate and stable test results for high-speed measurement use cases.

[0039] The present invention writes and generates a device power board program according to test requirements, optimizes and compiles it, and stores it in partitions in the device power board. When the ATE system runs a dynamic DC test instance, it can receive and send trigger signals to other units through a clock synchronization bus and a trigger bus.

[0040] The program pre-stored in the board of the present invention replaces the system main control to configure and control the device power board, which greatly liberates the flexibility of the device power board, improves the speed upper limit of dynamic DC testing, and increases the possibility of the device power board to work in coordination with other boards in high-speed test cases, thereby improving the working efficiency of the tester as a whole and shortening the chip testing time.

[0041] The above description is only an overview of the technical solution of the present invention. In order to more clearly understand the technical means of the present invention and implement it according to the contents of the specification, the following is a detailed description of the preferred embodiments of the present invention in conjunction with the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for use in the embodiments are briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present invention and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without creative work.

[0043] Figure 1 The present invention is a flowchart of a control method of a flexible and programmable device power board.

[0044] Figure 2 It is a diagram of the relationship between the power board of the device in the present invention and other units in the system;

[0045] Figure 3 It is a schematic diagram of the flow chart of the device power board program control in the first embodiment of the present invention;

[0046] Figure 4 It is a schematic diagram of the relationship between the modules of the test system in the first embodiment of the present invention. DETAILED DESCRIPTION

[0047] The specific implementation of the present invention is further described in detail below in conjunction with the accompanying drawings and examples. The following examples are used to illustrate the present invention, but are not intended to limit the scope of the present invention.

[0048] In order to enable those skilled in the art to better understand the scheme of the present invention, the technical scheme in the embodiment of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiment of the present invention. Obviously, the described embodiment is only a part of the embodiment of the present invention, rather than all the embodiments. The components of the embodiment of the present invention generally described and shown in the drawings here can be arranged and designed in various different configurations. Therefore, the following detailed description of the embodiment of the present invention provided in the drawings is not intended to limit the scope of the invention claimed for protection, but merely represents the selected embodiment of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without making creative work belong to the scope of protection of the present invention.

[0049] Example

[0050] like Figure 1 to Figure 4 As shown,

[0051] One of the purposes of the present invention:

[0052] A control method for a flexible and programmable device power board comprises the following steps in sequence:

[0053] Step 1: Write and generate the test description program of the device power board, describing the configuration, output, comparison and measurement content of DPS at each test node;

[0054] Step 2: After the test description program in the above step 1 is optimized and compiled by the system, a final executable program is obtained and downloaded to the power board of the device;

[0055] Step 3: The test description program downloaded to the device power board in the above step 2 is partitioned and then stored in the DDR memory of the device power board;

[0056] Step 4: The device power board executes the dynamic DC test case in the system.

[0057] Preferably, the test description program in step 1 is composed of one or more program segments, each program segment is composed of multiple nested program blocks, and the program block includes program description information, program declarations and control vector sets;

[0058] in,

[0059] Program Description Information: Provides detailed information about the test vector description file, including version number, creation time, and any additional comments to make the file easier to understand and manage;

[0060] Program declaration: used to define and declare various elements used in the test vector, including time scale, timing definition, output grouping, and DPS control channels within the group. The purpose is to introduce and configure necessary elements to ensure the accuracy of the DPS module test vector and consistency with the system;

[0061] Control vector set: The core of the device power board control and test vector description, including the configuration content of the power board at different nodes, describing various operations of the test vector, and providing key steps and parameters for the specific implementation of dynamic DC testing.

[0062] Preferably, when generating the test description program in step 1, the user generates the original program segment through the tools provided by the system or writes it according to the grammatical rules given by the system based on the configuration of the pins, timing, levels in the test case and the test vector content of the DPS.

[0063] Preferably, the test description procedure in step 1 includes:

[0064] Pin, Timing and Level information in the entire test case;

[0065] The power output and comparison configuration of each DPS channel at each test point;

[0066] Through timing description, the output and measurement of each DPS channel can be controlled.

[0067] Preferably, the configuration content of the test description program in step 1 includes drive channel power shutdown parameters, drive amplifier enable parameters, drive amplifier ground enable parameters, drive channel global bias adjustment parameters, drive voltage setting parameters, drive voltage gain adjustment parameters, drive voltage bias adjustment parameters, clamp enable parameters, high clamp current setting parameters, high clamp current gain adjustment parameters, high clamp current bias adjustment parameters, low clamp current setting parameters, low clamp current gain adjustment parameters, low clamp current bias adjustment parameters, drive mode selection parameters, output slew rate control parameters, alarm mode setting parameters, compensation mode setting parameters, compensation gear selection parameters, open circuit detection threshold voltage parameters, device ground detection threshold voltage parameters and diagnostic mode selection parameters.

[0068] Preferably, in step 2, the original program segment is optimized according to the model of the device power board, the output mode, and the Pin definition assigned to the DUT, and then compiled into binary machine code, wherein the binary machine code is the program that can ultimately be understood and executed by the device power board.

[0069] Preferably, in step 3, the device power board divides the test description program into six parts according to the binary program format, namely, the definition of the test power channel, the declaration of the test time scale and timing set, the test core program segment, the DPS configuration vector and the DPS test vector, and establishes a partition table, allocates partition addresses according to the size of each program and data segment, and then saves the test description program partitions in the DDR memory, and saves the partition table in the lowest segment of this memory.

[0070] Preferably, in step 4, the test system enters the test mode under the management of the main control. At this time, the device power board only pays attention to the clock synchronization signal and the input trigger signal. Whenever a trigger signal that meets the conditions is received, the device power board executes the next program instruction at the edge of the synchronization clock, and so on. When executing part of the program, if the preset conditions are met, the device power board compares, measures and sends external trigger signals to cooperate with other boards to work until all test instances are run to completion, all program executions are completed, or they are forcibly interrupted by the main control device. The device power board completes the program control execution of a dynamic test case.

[0071] The second purpose of the present invention is:

[0072] A control system for a flexible and programmable device power board, the control system can execute the above control method.

[0073] In order to solve the problems of the prior art and effectively improve the output and conversion speed of the device power board in the dynamic DC test to a certain extent, the present invention proposes a control method and system for a flexible and programmable device power board, and the specific contents include:

[0074] 1. Real-time control of the device power board in the test case, using a flexible programmable method and a test vector description language dedicated to the device power board to describe the configuration, output, comparison and measurement content of the DPS at each test node;

[0075] 2. Systematic program control method, that is, the control program flow of the equipment power board needs to go through the stages of generation and compilation to obtain the final executable program and run it in the equipment power board;

[0076] 3. As attached Figure 2 As shown, when the device power board runs the control program and executes the DPS test vector, it is affected by other resources in the system, including the command of the main control device, the system clock synchronization signal, the system trigger signal, and the trigger signal of other device boards.

[0077] 1. Specification of real-time control program of equipment power board:

[0078] The programming control method of the device power board proposed in the present invention is a method in which the timing, multiple configurations, measurement content and test vectors of the board are written into a program in a specific language, pre-loaded into the board, and waited to be executed during the running of the test case.

[0079] At the same time, the present invention proposes the contents that the program needs to include, which are as follows:

[0080] 1. Describe the Pin, Timing, Level and other information in the entire test case;

[0081] 2. Describe the power output and comparison configuration of each DPS channel at each test point;

[0082] 3. Through timing description, accurate control of the output and measurement of each DPS channel can be achieved.

[0083] In the control of the device power board, the program segment starts with the keyword "DpsuProgram" and is enclosed in curly brackets "{" and "}". The program segment consists of multiple program blocks, which are divided into three main types, which are also the three core contents that each valid program segment must contain: program description information, program declaration, and control vector set.

[0084] Program description information provides detailed information about the test vector description file, including version number, creation time, and any additional comments to make the file easier to understand and manage.

[0085] Program declaration, which is used to define and declare various elements used in the test vector, including time scale, timing definition, output grouping, and DPS control channels within the group, etc. The purpose is to introduce and configure the necessary elements to ensure the accuracy of the DPS module test vector and consistency with the system.

[0086] Control vector set, the core of device power board control and test vector description, including the configuration content of the power board at different nodes, describing various operations of the test vector, and providing key steps and parameters for the specific implementation of dynamic DC test

[0087] The contents contained in the above-mentioned main program blocks can be further subdivided into smaller structures, which characteristically contain the contents including version number, version time, information annotation, time scale, timing setting, channel configuration, channel grouping, configuration combination, test vector and program blocks for test action execution.

[0088] All program blocks start with a keyword, followed by optional content, such as the name of the program block or the input parameters of the program block. The specific content of the program block is enclosed by brackets "[", "]" or "{", "}". For the content of the minimum structured program block, when it contains multiple parameters or items, commas "," and semicolons ";" are allowed as separators. This design is intended to provide a clear and concise grammatical structure, making the control program of the device power board easier to read and write.

[0089] In the control program of the device power board, for the program block part of the configuration combination, the parameters that need to be included to describe the device power board include one or more of the following parameters: drive channel power shutdown parameters, drive amplifier enable parameters, drive amplifier ground enable parameters, drive channel global bias adjustment parameters, drive voltage setting parameters, drive voltage gain adjustment parameters, drive voltage bias adjustment parameters, clamp enable parameters, high clamp current setting parameters, high clamp current gain adjustment parameters, high clamp current bias adjustment parameters, low clamp current setting parameters, low clamp current gain adjustment parameters, low clamp current bias adjustment parameters, comparator enable parameters, comparator mode setting parameters, high comparison voltage ... Parameters, high comparison voltage gain adjustment parameters, high comparison voltage bias adjustment parameters, low comparison voltage setting parameters, low comparison voltage gain adjustment parameters, low comparison voltage bias adjustment parameters, high comparison current setting parameters, high comparison current gain adjustment parameters, high comparison current bias adjustment parameters, low comparison current setting parameters, low comparison current gain adjustment parameters, low comparison current bias adjustment parameters, working thermal shutdown threshold parameters, measurement output amplifier gain parameters, measurement output mode parameters, drive mode selection parameters, output slew rate control parameters, alarm mode setting parameters, compensation mode setting parameters, compensation gear selection parameters, open circuit detection threshold voltage parameters, equipment ground detection threshold voltage parameters, diagnostic mode selection parameters.

[0090] 2. The programming control system workflow of the equipment power board:

[0091] The control method and system of the flexible and programmable device power board proposed in the present invention puts forward a series of requirements and defines some specifications for the workflow and steps of such programmable control and the system supporting such working mode:

[0092] First, when generating the control program of the device power board (i.e., the test description program), based on the pin, timing, level configuration in the test case and the test vector content of the DPS, the user generates the original program segment through the tools provided by the system or writes it according to the grammatical rules given by the system.

[0093] Then the compilation step is performed. Since the description in the original program segment is derived from application requirements and is a relatively high-level description, it cannot be directly used by the device power board and needs to be compiled by the system. In the system, the original program segment is optimized according to the model, output mode, and Pin definition assigned to the DUT of the device power board, and then compiled into binary machine code, partitioned according to certain requirements, and stored in the DDR memory of the device power board.

[0094] For the compiled binary program, the characteristic partitioning requirements specified in the present invention mainly include: the first section of the partition is the partition table of the program, and then the definition of the test power channel, the declaration of the test time scale and timing set, the test core program segment, the DPS configuration vector and the DPS test vector are partitioned and saved according to the addresses given in the partition table.

[0095] When the device power board executes dynamic DC test cases in the system, it no longer waits for the command of the system master at each test point, but flexibly, dynamically and autonomously completes the configuration, execution control and test actions according to the pre-stored program.

[0096] For the control method and system of the flexible and programmable device power board proposed in the present invention, when controlling the device power board, or when executing the control program, it will be affected by other modules in the system according to the configuration, which may be guidance or restriction.

[0097] As attached Figure 2 The relationship between the modules in the system is shown in the figure. In addition to being directly controlled by the ATE system main control unit, the equipment power board is also mounted on the system clock synchronization bus and the system trigger bus.

[0098] The clock synchronization bus needs to ensure that it is connected from the synchronization source to all devices in a star connection with equal length to ensure the consistency of signal transmission delay.

[0099] When receiving signals on the trigger bus, the device power board can receive trigger signals from the system master to execute actions, or receive trigger signals from other cooperating boards to execute programs, or receive mixed trigger signals to execute different types of programs. At the same time, the device power board itself can also send trigger signals to other devices as requests or other actions by configuring the node that sends trigger signals in the program.

[0100] The first embodiment of the present invention:

[0101] Specifically disclosed is a control method and system for a flexible and programmable device power board, which replaces the method of controlling the device power board by the system master through a method of dynamically configuring and controlling the program, greatly improving the test efficiency of the device power board in dynamic DC test cases, and supporting the test machine to perform high-speed DC testing. The program flow of the device power board is as shown in the attached figure. Figure 3 As shown, the relationship between the modules of the test system in the embodiment is as shown in the attached Figure 4 As shown, the specific scheme of the embodiment of the invention is as follows:

[0102] A control method for a flexible and programmable device power board is applied in ATE equipment, and the method includes the following steps:

[0103] A flexible programmable method is used to control the device power board when the dynamic DC test case is running. A test vector description language dedicated to the device power board is used to write the test description program of the device power board to describe the configuration, output, comparison and measurement content of DPS at each test node.

[0104] The test description program of the device power board is obtained through the system optimization and compilation stages to obtain the final executable program and downloaded to the device power board.

[0105] The program downloaded to the device power board is partitioned and stored in the DDR memory of the device power board.

[0106] Before the system runs the test instance, the device power board needs to prepare the program to be executed. During the test instance running process, the device power board adjusts the clock edge according to the system clock synchronization signal, executes the program according to the system trigger from the master control, completes automatic configuration and management, drives the corresponding power channel to work, and sends a trigger signal to the cooperating board when the execution of some programs meets the conditions.

[0107] Specifically, when the user implements flexible programming configuration to control the device power board, he needs to write and generate a test program first. The program file consists of one or more program segments, each of which consists of multiple nested program blocks. The program description includes several points:

[0108] Pin, Timing, and Level information in the entire test case;

[0109] The power output and comparison configuration of each DPS channel at each test point;

[0110] Through timing description, precise control of the output and measurement of each DPS channel can be achieved.

[0111] It should be noted that, in this embodiment, the user needs to use the desired device power board test output waveform as the basis for writing the test program. In the configuration content of the program, it is necessary to include the drive channel power shutdown parameter, the drive amplifier enable parameter, the drive amplifier ground enable parameter, the drive channel global bias adjustment parameter, the drive voltage setting parameter, the drive voltage gain adjustment parameter, the drive voltage bias adjustment parameter, the clamp enable parameter, the high clamp current setting parameter, the high clamp current gain adjustment parameter, the high clamp current bias adjustment parameter, the low clamp current setting parameter, the low clamp current gain adjustment parameter, the low clamp current bias adjustment parameter, the drive mode selection parameter, the output slew rate control parameter, the alarm mode setting parameter, the compensation mode setting parameter, the compensation gear selection parameter, the open circuit detection threshold voltage parameter, the device ground detection threshold voltage parameter, and the diagnostic mode selection parameter.

[0112] After the program is completed, it needs to be compiled before downloading. Since the description in the original program segment is derived from application requirements and is a relatively high-level description, it cannot be directly used by the device power board and needs to be compiled by the system. In the system, the original program segment is optimized according to the model of the device power board, the output mode, and the Pin definition assigned to the DUT, and then compiled into binary machine code. The binary machine code is the program that can ultimately be understood and executed by the device power board.

[0113] After the optimization and compilation are completed, the final program is downloaded from the system master to the device power board. The device power board is partitioned according to certain rules and the program is stored in segments in the DDR memory of the device power board, waiting for the execution of the program.

[0114] The device power board divides the program into six parts according to the binary program format: definition of test power channel, declaration of test time scale and timing set, test core program segment, DPS configuration vector and DPS test vector. A partition table is established to allocate partition addresses according to the size of each program and data segment. The program partitions are then saved in DDR and the partition table is saved in the lowest segment of this memory.

[0115] When a DC test case is loaded into the ATE system, for example, this test case drives a rising voltage signal on a set of channels on the device power board in a time series set and uses a precision measurement unit to measure the output voltage driven to the device.

[0116] After all the test behaviors of the equipment have been defined and prepared, especially the hardware connections of the equipment power board have been established, and the internal pre-loaded program has been generated, compiled, downloaded and partitioned. The test system enters the test mode under the management of the master control.

[0117] At this time, the device power board only pays attention to the clock synchronization signal and the input trigger signal. Whenever a trigger signal that meets the conditions is received, the device power board executes the next program instruction at the edge of the synchronization clock, and so on. When executing part of the program and meeting specific conditions, the device power board compares, measures and sends external trigger signals to work with other boards. Until all test instances are run, all program executions are completed, or they are forcibly interrupted by the main control device, the device power board completes the program control execution of a dynamic test case.

[0118] Compared with the traditional control method, it no longer needs to wait for the command of the system master at each test conversion point, but flexibly, dynamically and autonomously completes the configuration, execution control and testing actions according to the pre-stored program.

[0119] The present invention can effectively coordinate the synchronization between the DPS and other system boards and ensure reliable configuration in high-speed measurement scenarios.

[0120] The present invention can improve the performance and reliability of ATE systems in dynamic DC testing and provide more accurate and stable test results for high-speed measurement use cases.

[0121] The present invention writes and generates a device power board program according to test requirements, optimizes and compiles it, and stores it in partitions in the device power board. When the ATE system runs a dynamic DC test instance, it can receive and send trigger signals to other units through a clock synchronization bus and a trigger bus.

[0122] The program pre-stored in the board of the present invention replaces the system main control to configure and control the device power board, which greatly liberates the flexibility of the device power board, improves the speed upper limit of dynamic DC testing, and increases the possibility of the device power board to work in coordination with other boards in high-speed test cases, thereby improving the working efficiency of the tester as a whole and shortening the chip testing time.

[0123] In addition, the English and Chinese definitions of some terms involved in the present invention are as follows:

[0124] Automatic Test Equipment (ATE): Automatic test equipment

[0125] Device power supply (DPS): device power supply

[0126] Time Measurement Unit (TMU): Time Measurement Unit

[0127] Radio Frequency Measurement Unit (RFMU): Radio Frequency Measurement Unit

[0128] Precise Measurement Unit (PMU): Precise Measurement Unit

[0129] Device Under Test (DUT): Device under test

[0130] Double Data Rate SDRAM (DDR): Double Data Rate Synchronous Dynamic Random Access Memory In the description of the present invention, it should be understood that the terms "center", "longitudinal", "lateral", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside" and the like indicate positions or positional relationships based on the positions or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present invention. In addition, the terms "first", "second", and the like are only used for descriptive purposes, and cannot be understood as indicating or implying relative importance or implicitly referring to the number of technical features indicated. Therefore, the features defined as "first", "second", and the like may explicitly or implicitly include one or more of the features. In the description of the present invention, unless otherwise specified, "multiple" means two or more.

[0131] In the description of the present invention, it should be noted that, unless otherwise clearly specified and limited, the terms "installation", "connection" and "connection" should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium; it can be the internal connection of two components. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood through specific circumstances.

[0132] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. It should be pointed out that a person skilled in the art can make several improvements and modifications without departing from the technical principles of the present invention, and these improvements and modifications should also be regarded as within the scope of protection of the present invention.

Claims

1. A control method for a flexible and programmable device power board, characterized in that: The following steps are included in sequence: Step 1: Write and generate the test description program of the device power board, describing the configuration, output, comparison and measurement content of DPS at each test node; Step 2: After the test description program in the above step 1 is optimized and compiled by the system, a final executable program is obtained and downloaded to the power board of the device; Step 3: The test description program downloaded to the device power board in the above step 2 is partitioned and then stored in the DDR memory of the device power board; Step 4: The device power board executes the dynamic DC test case in the system.

2. A control method for a flexible and programmable device power board as claimed in claim 1, characterized in that: The test description program in step 1 is composed of one or more program segments, each program segment is composed of a plurality of nested program blocks, and the program block includes program description information, program declaration and control vector set; in, Program Description Information: Provides detailed information about the test vector description file, including version number, creation time, and any additional comments to make the file easier to understand and manage; Program declaration: used to define and declare various elements used in the test vector, including time scale, timing definition, output grouping, and DPS control channels within the group. The purpose is to introduce and configure necessary elements to ensure the accuracy of the DPS module test vector and consistency with the system; Control vector set: The core of the device power board control and test vector description, including the configuration content of the power board at different nodes, describing various operations of the test vector, and providing key steps and parameters for the specific implementation of dynamic DC testing.

3. A control method for a flexible and programmable device power board as claimed in claim 1, characterized in that: When generating the test description program in step 1, the user generates the original program segment through the tools provided by the system or writes it according to the grammatical rules given by the system based on the configuration of the pins, timing, and levels in the test case and the test vector content of the DPS.

4. A control method for a flexible and programmable device power board as claimed in claim 1, characterized in that: The test description procedure in step 1 includes: Pin, Timing and Level information in the entire test case; The power output and comparison configuration of each DPS channel at each test point; Through timing description, the output and measurement of each DPS channel can be controlled.

5. A control method for a flexible and programmable device power board as claimed in claim 1, characterized in that: The configuration content of the test description program in the step 1 includes a drive channel power shutdown parameter, a drive amplifier enable parameter, a drive amplifier ground enable parameter, a drive channel global bias adjustment parameter, a drive voltage setting parameter, a drive voltage gain adjustment parameter, a drive voltage bias adjustment parameter, a clamp enable parameter, a high clamp current setting parameter, a high clamp current gain adjustment parameter, a high clamp current bias adjustment parameter, a low clamp current setting parameter, a low clamp current gain adjustment parameter, a low clamp current bias adjustment parameter, a drive mode selection parameter, an output slew rate control parameter, an alarm mode setting parameter, a compensation mode setting parameter, a compensation gear selection parameter, an open circuit detection threshold voltage parameter, a device ground detection threshold voltage parameter, and a diagnostic mode selection parameter.

6. A control method for a flexible and programmable device power board as claimed in claim 1, characterized in that: In step 2, the original program segment is optimized according to the model of the device power board, the output mode, and the Pin definition assigned to the DUT, and then compiled into binary machine code, wherein the binary machine code is the program that can ultimately be understood and executed by the device power board.

7. A control method for a flexible and programmable device power board as claimed in claim 1, characterized in that: In step 3, the device power board divides the test description program into six parts according to the binary program format, namely, the definition of the test power channel, the declaration of the test time scale and timing set, the test core program segment, the DPS configuration vector and the DPS test vector, and establishes a partition table, allocates partition addresses according to the size of each program and data segment, and then saves the test description program partitions in the DDR memory, and saves the partition table in the lowest segment of this memory.

8. A control method for a flexible and programmable device power board as claimed in claim 1, characterized in that: In step 4, the test system enters the test mode under the management of the main control. At this time, the device power board only pays attention to the clock synchronization signal and the input trigger signal. Whenever a trigger signal that meets the conditions is received, the device power board executes the next program instruction at the edge of the synchronization clock, and so on. When executing part of the program, if the preset conditions are met, the device power board compares, measures and sends external trigger signals to cooperate with other boards to work until all test instances are completed, all program executions are completed, or they are forcibly interrupted by the main control device. The device power board completes the program control execution of a dynamic test case.

9. A control system for a flexible and programmable device power board, characterized in that: The control system can execute the control method according to any one of claims 1 to 8.

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