Packaging method
By first installing the back of the chip on the heat sink in the semiconductor device package, then welding the front of the chip on the unit structure, and cutting the heat dissipation structure, the problem of insufficient performance and heat dissipation efficiency of the package structure is solved, and higher packaging performance and heat dissipation effect are achieved.
Patent Information
- Application Number
- CN202411687311.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-22
- Publication Date
- 2025-03-07
AI Technical Summary
The performance of existing semiconductor device packaging structures still needs to be improved, especially in terms of heat dissipation.
A packaging method is adopted, firstly the back of the chip is mounted on the heat sink, and then the front of the chip is soldered to the unit structure of the substrate. At the same time, by cutting the heat dissipation structure, the individual heat dissipation fins are separated to reduce the probability of stress and gaps.
This method reduces the probability of damage to the soldering points between the chip and the unit structure, and improves the performance and heat dissipation efficiency of the packaging structure.
Smart Images
Figure CN119581338A_ABST
Abstract
Description
Technical Field
[0001] The embodiments of the present invention relate to the field of semiconductor manufacturing, and in particular to a packaging method. Background Art
[0002] In recent years, the semiconductor integrated circuit (IC) industry has developed rapidly. Driven by Moore's Law, semiconductor technology continues to move towards smaller process nodes, making integrated circuits develop in the direction of smaller size, higher circuit precision and higher circuit complexity.
[0003] With the rapid development of the semiconductor industry, integrated circuit packaging products have also been increasing the integration density of various semiconductor devices by continuously reducing the minimum feature size. At present, with the rapid increase in integration and power consumption, overheating has become the primary factor affecting the performance of semiconductor devices. In order to enable semiconductor devices to obtain good heat dissipation performance, heat sinks are often set on the chip.
[0004] However, the performance of the packaging structure still needs to be improved. Summary of the invention
[0005] The problem solved by the embodiments of the present invention is to provide a packaging method to improve the performance of the packaging structure.
[0006] To solve the above problems, an embodiment of the present invention also provides a packaging method, comprising: providing a substrate, the substrate comprising a unit structure; providing a heat sink; providing a chip, the chip comprising a front side and a back side arranged back to back; mounting the back side of the chip on the heat sink; after mounting the back side of the chip on the heat sink, soldering the front side of the chip to the unit structure.
[0007] Optionally, after welding the front side of the chip to the unit structure, the packaging method further comprises: forming a plastic encapsulation layer on the unit structure to encapsulate the chip, wherein the plastic encapsulation layer also covers the side walls of the heat sink and exposes the surface of the heat sink facing away from the chip.
[0008] Optionally, the step of forming a plastic layer on the unit structure to encapsulate the chip includes: forming a plastic material layer on the unit structure to encapsulate the chip and the heat sink; and planarizing the plastic material layer to expose the surface of the heat sink facing away from the chip.
[0009] Optionally, in the step of providing a substrate, the substrate includes multiple unit structures; in the step of providing the chip, the number of the chips is multiple; multiple heat sinks are provided; the back sides of the chips are respectively mounted on the corresponding heat sinks; the front sides of the chips are respectively welded to the corresponding unit structures; after a plastic sealing layer encapsulating the chip is formed on the unit structure, the packaging method further includes: separating each of the unit structures and the plastic sealing layer located on the unit structure to form an independent packaging structure.
[0010] Optionally, the step of providing a heat sink includes: providing a heat dissipation structure, the heat dissipation structure including a plurality of heat sinks; in the step of providing the chip, the number of the chips is multiple; mounting the back sides of the chips on the corresponding heat sinks respectively; after mounting the back sides of the chips on the corresponding heat sinks respectively, before welding the front sides of the chips to the unit structure, it also includes: cutting the heat dissipation structure to separate the heat sinks.
[0011] Optionally, the heat dissipation structure further includes a cutting groove located between adjacent heat sinks, the thickness of the heat dissipation structure at the location of the cutting groove is less than the thickness of the heat sink; and the heat dissipation structure is cut along the cutting groove.
[0012] Optionally, in the step of providing the heat dissipation structure, the thickness of the heat dissipation structure at the location of the cutting groove is 40% to 60% of the thickness of the heat sink.
[0013] Optionally, after mounting the back sides of the chips on the corresponding heat sinks respectively and before cutting the heat dissipation structure, the packaging method further comprises: attaching the surface of the heat sink facing away from the chip to a carrier layer.
[0014] Optionally, under the action of the bearing layer, the front sides of all the chips are welded to the unit structure.
[0015] Optionally, in the step of cutting the heat dissipation structure, a partial thickness of the bearing layer is also cut.
[0016] Optionally, the thickness of the cut bearing layer accounts for 20% to 50% of the total thickness of the bearing layer.
[0017] Optionally, under the action of the carrier layer, the step of welding the front sides of all the chips to the unit structure includes: attaching the edge area of the surface of the carrier layer facing away from the chip to the mounting ring, so as to transfer all the heat sinks and chips to the mounting ring in one operation; transferring all the chips and heat sinks from the carrier layer to the unit structure, with the front sides of the chips facing the unit structure.
[0018] Optionally, in the step of providing the substrate, the substrate further includes a first positioning component; and in the step of providing the heat dissipation structure, the heat dissipation structure further includes a second positioning component.
[0019] Optionally, the first positioning component and the second positioning component both include positioning holes.
[0020] Optionally, during the process of cutting the heat dissipation structure, a coolant is used to cool the heat dissipation structure.
[0021] Optionally, in the step of providing the heat sink and the chip, the outline of the heat sink is larger than the outline of the chip; in the step of mounting the back side of the chip on the heat sink, the chip is located within the outline of the heat sink, and there is a gap between the outline of the chip and the outline of the heat sink.
[0022] Optionally, the interval ranges from 0.1 mm to 0.3 mm.
[0023] Optionally, in the step of mounting the back side of the chip on the heat sink, the center of the outline of the chip coincides with the center of the outline of the heat sink.
[0024] Optionally, the heat sink has a thickness of 0.1 mm to 0.5 mm.
[0025] Optionally, the material of the heat sink includes copper, aluminum and ceramic.
[0026] Optionally, the process of welding the front side of the chip to the unit structure includes a flip-chip welding process.
[0027] Optionally, in the step of providing a substrate, the substrate includes a lead frame, and a unit structure of the lead frame includes a plurality of pins; in the step of welding the front side of the chip to the unit structure, the chip is welded to the pins.
[0028] Optionally, in the step of providing the chip, the number of the chips is multiple; in the step of mounting the back side of the chip on the heat sink, the back sides of multiple chips are mounted on the same heat sink; in the step of soldering the front side of the chip to the unit structure, the multiple chips mounted on the same heat sink are soldered to the same unit structure.
[0029] Compared with the prior art, the technical solution of the embodiment of the present invention has the following advantages:
[0030] In the packaging method provided by the embodiment of the present invention, after the back side of the chip is mounted on the heat sink, the front side of the chip is welded to the unit structure of the substrate. Since the back side of the chip is mounted on the heat sink first and then the chip and the unit structure are welded, the welding point between the chip and the unit structure is prevented from being damaged during the process of fixing the chip and the heat sink, thereby reducing the probability of the welding point between the chip and the unit structure being damaged by external force, which is beneficial to improving the performance of the packaging structure. In an optional scheme, a heat dissipation structure is provided, the heat dissipation structure includes a plurality of heat sinks, after the back side of the chip is respectively mounted on the corresponding heat sinks and before the front side of the chip is welded to the unit structure, it also includes: cutting the heat dissipation structure to separate each of the heat sinks. Compared with the method of forming a heat sink by cutting a mold, cutting the heat dissipation structure to separate the heat sinks can reduce the stress of the heat sink and the probability of generating a gap between the heat sink and other structures (for example, a chip) under delayed stress. As a result, during the use of the chip, water vapor in the air is not easy to enter the chip along the gap, which is also beneficial to improving the performance of the packaging structure. BRIEF DESCRIPTION OF THE DRAWINGS
[0031] Figure 1 It is a flow chart of an encapsulation method;
[0032] Figure 2 is a flow chart of an embodiment of a packaging method of the present invention;
[0033] Figures 3 to 13 It is a schematic structural diagram corresponding to each step in an embodiment of a packaging method of the present invention. DETAILED DESCRIPTION
[0034] At present, the performance of the packaging structure still needs to be improved. Now, combined with a packaging method, the reasons why the performance of the packaging structure needs to be improved are analyzed.
[0035] refer to Figure 1 , Figure 1 It is a flow chart of a packaging method.
[0036] Perform step s1: provide a substrate, wherein the substrate comprises a unit structure.
[0037] Execute step s2: provide a heat sink.
[0038] Execute step s3: provide a chip, wherein the chip comprises a front side and a back side arranged opposite to each other.
[0039] Execute step s4: mount the front side of the chip on the unit structure.
[0040] Execute step s5: after mounting the front side of the chip on the unit structure, mount the heat sink on the back side of the chip.
[0041] Research has found that during the process of attaching the heat sink to the back of the chip, the welding points between the chip and the unit structure are easily damaged by external forces, resulting in poor welding effect between the chip and the unit structure of the substrate, and further poor performance of the packaging structure.
[0042] In order to solve the above technical problems, an embodiment of the present invention provides a packaging method, comprising: providing a substrate, the substrate comprising a unit structure; providing a heat sink; providing a chip, the chip comprising a front side and a back side arranged back to back; mounting the back side of the chip on the heat sink; after mounting the back side of the chip on the heat sink, soldering the front side of the chip to the unit structure.
[0043] In the solution disclosed in the embodiment of the present invention, after the back side of the chip is mounted on the heat sink, the front side of the chip is welded to the unit structure of the substrate. Since the back side of the chip is mounted on the heat sink first and then the chip and the unit structure are welded, the welding point between the chip and the unit structure is prevented from being damaged during the process of fixing the chip and the heat sink, thereby reducing the probability of the welding point between the chip and the unit structure being damaged by external force, which is beneficial to improving the performance of the packaging structure.
[0044] In order to make the above-mentioned purposes, features and advantages of the embodiments of the present invention more obvious and understandable, specific embodiments of the present invention are described in detail below with reference to the accompanying drawings.
[0045] Figure 2 is a flow chart of an embodiment of a packaging method of the present invention, Figures 3 to 13 It is a schematic structural diagram corresponding to each step in an embodiment of a packaging method of the present invention.
[0046] refer to Figure 2 , and combined with reference Figure 8 , performing step S1: providing a substrate 100 , wherein the substrate 100 includes a unit structure 102 .
[0047] The substrate 100 is used to provide a process basis for subsequently welding the front side of the chip to the unit structure 102 .
[0048] In this embodiment, the substrate 100 includes a plurality of unit structures 102, which facilitates the subsequent formation of a plurality of packaging structures, thereby facilitating improving the efficiency of forming the packaging structures.
[0049] In this embodiment, in the step of providing the substrate 100 , the substrate 100 includes a lead frame 101 , and a unit structure 102 of the lead frame 101 includes a plurality of pins 103 .
[0050] The lead frame 101 is used to carry the chip and realize the electrical connection between the chip and the external circuit.
[0051] It should be noted that the material of the lead frame 101 is metal or alloy.
[0052] The unit structure 102 of the lead frame 101 serves as a basic unit constituting the lead frame 101 .
[0053] Specifically, the pin 103 is used to realize the electrical connection between the chip and the external circuit.
[0054] In other embodiments, the substrate may also be other structures for carrying chips, such as a base plate, a transfer plate, etc.
[0055] In this embodiment, in the step of providing the substrate 100 , the substrate 100 further includes a first positioning component 104 .
[0056] The first positioning component 104 is used to position the unit structure 102 during the subsequent process of welding the front side of the chip to the unit structure 102 .
[0057] Specifically, the first positioning component 104 is located at the edge of the substrate 100. As an example, the first positioning component 104 is located at the frame position in the length direction of the lead frame 101, and the first positioning component 104 includes a first sub-positioning component (not shown) and a second sub-positioning component (not shown), and the first sub-positioning component and the second sub-positioning component have different shapes and are located on different frames.
[0058] It should be noted that the first positioning component 104 includes a positioning hole.
[0059] The process of manufacturing the positioning holes is simple and the process is highly mature.
[0060] refer to Figure 2 , and combined with reference Figure 3 , execute step S2: provide a heat sink 111.
[0061] The heat sink 111 is used for mounting on the chip, which is beneficial to improving the heat dissipation efficiency of the chip, so as to improve the performance of the chip.
[0062] In this embodiment, a plurality of heat sinks 111 are provided.
[0063] The plurality of heat sinks 111 are used to cooperate with the chips later, so that the back sides of the plurality of chips are respectively mounted on the corresponding heat sinks 111 .
[0064] In this embodiment, the step of providing the heat sink 111 includes: providing a heat dissipation structure 110 , wherein the heat dissipation structure 110 includes a plurality of heat sinks 111 .
[0065] A heat dissipation structure 110 including a plurality of heat dissipation fins 111 is provided, so as to provide a process basis for subsequently cutting the heat dissipation structure 110 to separate the heat dissipation fins 111 .
[0066] Specifically, the heat dissipation structure 110 further includes a cutting groove 112 located between adjacent heat dissipation fins 111 , and the thickness of the heat dissipation structure 110 at the location of the cutting groove 112 is smaller than the thickness of the heat dissipation fin 111 .
[0067] The cutting groove 112 is used to provide a process basis for subsequently cutting the heat dissipation structure 110 along the cutting groove 112 .
[0068] The ratio of the thickness of the heat dissipation structure 110 at the position of the cutting groove 112 to the thickness of the heat sink 111 should not be too small or too large. If the ratio of the thickness of the heat dissipation structure 110 at the position of the cutting groove 112 to the thickness of the heat sink 111 is too small, it is easy to make the stability of the connection between adjacent heat sinks 111 poor, so that in the process of mounting the back of the chip on the corresponding heat sink 111, it is easy to separate the adjacent heat sinks 111 from each other, thereby increasing the difficulty of welding the front of the chip to the unit structure 102 later; if the ratio of the thickness of the heat dissipation structure 110 at the position of the cutting groove 112 to the thickness of the heat sink 111 is too large, it is easy to reduce the effect of the thickness of the heat dissipation structure 110 that needs to be cut. Therefore, in the step of providing the heat dissipation structure 110, the thickness of the heat dissipation structure 110 at the position of the cutting groove 112 is 40% to 60% of the thickness of the heat sink 111.
[0069] It should be noted that the heat dissipation structure 110 further includes: a tool alignment groove (not shown) running through the edge of the heat dissipation structure 110. The tool alignment groove is used to align the cutting tool with the preset cutting position during the process of cutting the heat dissipation structure 110.
[0070] In this embodiment, in the step of providing the heat dissipation structure 110 , the heat dissipation structure 110 further includes a second positioning component 115 .
[0071] The second positioning component 115 is used to position the heat sink 111 in the subsequent process of mounting the back side of the chip on the heat sink 111 .
[0072] Specifically, the second positioning component 115 is located at the edge of the heat dissipation structure 110. As an example, the second positioning component 115 is located at the frame position in the length direction of the heat dissipation structure 110, and the second positioning component 115 includes a third sub-positioning component (not shown) and a fourth sub-positioning component (not shown), and the third sub-positioning component and the fourth sub-positioning component have different shapes and are located on different frames.
[0073] It should be noted that the second positioning member 115 includes a positioning hole. It is understandable that both the second positioning member 115 and the first positioning member 104 include a positioning hole.
[0074] The process of manufacturing the positioning holes is simple and the process is highly mature; moreover, the positioning holes are easy to use, which helps to reduce the difficulty of subsequent positioning.
[0075] The thickness of the heat sink 111 should not be too small or too large. If the thickness of the heat sink 111 is too small, the heat dissipation effect is likely to be poor; if the thickness of the heat sink 111 is too large, the thickness of the entire chip packaging structure is likely to be too thick. Therefore, in this embodiment, the thickness of the heat sink 111 is 0.1 mm to 0.5 mm.
[0076] In this embodiment, the material of the heat sink 111 includes copper, aluminum and ceramic.
[0077] Copper, aluminum and ceramics have good thermal conductivity and high strength. Therefore, the material of the heat sink 111 includes copper, aluminum and ceramics, which is conducive to improving the heat dissipation performance of the chip and making the heat sink 111 better as a chip carrier support effect.
[0078] In other embodiments, the heat sink may also be made of other materials with good thermal conductivity and high strength.
[0079] refer to Figure 2 , and combined with reference Figure 4 , executing step S3: providing a chip 120, wherein the chip 120 includes a front side 121 and a back side 122 disposed opposite to each other.
[0080] The back side 122 of the chip 120 is used for mounting on the heat sink 111. The front side 121 of the chip 120 is used for welding with the unit structure 102.
[0081] Specifically, a bump (not shown) is formed on the front surface of the chip 120 .
[0082] In this embodiment, in the step of providing the chip 120 , there are multiple chips 120 .
[0083] The plurality of chips 120 are used to be mounted on the corresponding heat sink 111. The plurality of chips 120 are also used to be welded with the corresponding unit structure 102, so as to form a plurality of packaging structures later.
[0084] In this embodiment, in the step of providing the heat sink 111 and the chip 120 , the outline of the heat sink 111 is larger than the outline of the chip 120 , which provides a process basis for subsequently providing a gap between the outline of the chip 120 and the outline of the heat sink 111 .
[0085] refer to Figure 2 , and combined with reference Figure 5 , execute step S4: mount the back side 122 of the chip 120 on the heat sink 111 .
[0086] The heat sink 111 is mounted on the back side 122 of the chip 120 , which is beneficial to improving the heat dissipation performance of the chip 120 .
[0087] Specifically, the steps of mounting the back side of the chip 120 on the heat sink 111 include: coating a thermal interface material (not shown) on the heat sink 111; placing the back side 122 of the chip 120 on the heat sink 111 coated with the thermal interface material; and baking and curing the thermal interface material so that the back side 122 of the chip 120 is mounted on the heat sink 111.
[0088] More specifically, the thermal interface material may include thermally conductive glue, electrically conductive glue, non-conductive glue, solder paste, thermally conductive film, etc.
[0089] In this embodiment, a plurality of heat sinks 111 and a plurality of chips 120 are provided. Accordingly, the back surfaces 122 of the chips 120 are mounted on the corresponding heat sinks 111 respectively.
[0090] In this embodiment, in the step of mounting the back side 122 of the chip 120 on the heat sink 111, the chip 120 is located in the outline of the heat sink 111, and there is a gap W between the outline of the chip 120 and the outline of the heat sink 111, which is beneficial to reduce the probability of damage to the chip 120 during the subsequent cutting process of the heat dissipation structure 110.
[0091] It should be noted that the interval W should not be too small or too large. If the interval W is too small, the effect of reducing the probability of chip 120 being damaged during cutting is not good. If the interval W is too large, the size of the package structure is too large. Therefore, in this embodiment, the interval W ranges from 0.1 mm to 0.3 mm.
[0092] It should also be noted that, in the step of mounting the back side 122 of the chip 120 on the heat sink 111, the contour center of the chip 120 coincides with the contour center of the heat sink 111, so that the uniformity of the interval W at different positions is better, which is beneficial to further reduce the probability of damage to the chip 120.
[0093] In this embodiment, in the step of mounting the back side 122 of the chip 120 on the heat sink 111, the back sides 122 of multiple chips 120 are mounted on the same heat sink 111, which is beneficial for simplifying the process flow of mounting the heat sink 111 and improving process efficiency when welding multiple chips 120 on a single unit structure 102.
[0094] In this embodiment, reference Figure 6 After the back surfaces 122 of the chips 120 are respectively mounted on the corresponding heat sinks 111 and before the heat dissipation structure 110 is cut, the packaging method further comprises: attaching the surface of the heat sink 111 facing away from the chip 120 to the carrier layer 130 .
[0095] The surface of the heat sink 111 facing away from the chip 120 is attached to the carrier layer 130, so that after the heat dissipation structure 110 is subsequently cut, when the heat sinks 111 are separated from each other, the heat dissipation structure 110 can still maintain integrity under the action of the carrier layer 130, thereby reducing the subsequent welding of the front side 121 of the chip 120 to the unit structure 102.
[0096] Specifically, the carrier layer 130 includes a UV (Ultraviolet Rays) film.
[0097] In this embodiment, after the back sides 122 of the chips 120 are respectively mounted on the corresponding heat sinks 111 and before the front sides 121 of the chips 120 are welded to the unit structure 102 , the process further includes: cutting the heat dissipation structure 110 to separate the heat sinks 111 .
[0098] Compared with the method of forming a heat sink by cutting a mold, cutting the heat dissipation structure 110 to separate the heat sinks 111 can reduce the stress of the heat sink 111 and the probability of generating a gap between the heat sink 111 and other structures (for example, the chip 120) under delayed stress. As a result, during the use of the chip 120, water vapor in the air is not easy to enter the chip 120 along the gap, which is also beneficial to improving the performance of the packaging structure.
[0099] Specifically, cutting the heat dissipation structure 110 along the cutting groove 112 is beneficial to reducing the probability of the heat sink 111 being damaged during the cutting process, and is also beneficial to reducing the probability of the chip 120 being damaged during the cutting process.
[0100] Moreover, since the thickness of the heat dissipation structure 110 at the position of the cutting groove 112 is less than the thickness of the heat sink 111, the thickness of the heat dissipation structure 110 to be cut is reduced during the cutting process, thereby reducing the difficulty of separating each heat sink 111 and correspondingly improving the cutting efficiency.
[0101] It should be noted that during the cutting process of the heat dissipation structure 110, the heat dissipation structure 110 is cooled by using a coolant, which is beneficial to reducing the surface temperature of the heat dissipation structure 110, thereby reducing the degree of deformation of the heat dissipation structure 110, and further beneficial to further reduce the stress of each heat dissipation fin 111 after separation; moreover, the use of coolant during the cutting process is also beneficial to improving processing accuracy and extending the service life of the cutting tool.
[0102] In this embodiment, during the step of cutting the heat dissipation structure 110 , a portion of the thickness of the bearing layer 130 is also cut, so that the total thickness of the cutting is greater than the thickness of the cut heat dissipation structure 110 , thereby ensuring the separation of the heat dissipation fins 111 .
[0103] It should be noted that the ratio of the thickness of the cut bearing layer 130 to the total thickness of the bearing layer 130 should not be too small or too large. If the ratio of the thickness of the cut bearing layer 130 to the total thickness of the bearing layer 130 is too small, it is easy to ensure that the effect of separating each of the heat sinks 111 is poor; if the ratio of the thickness of the cut bearing layer 130 to the total thickness of the bearing layer 130 is too large, it is easy to make the heat dissipation structure 110 no longer have integrity after each of the heat sinks 111 is separated. Therefore, in this embodiment, the thickness of the cut bearing layer 130 accounts for 20% to 50% of the total thickness of the bearing layer 130.
[0104] In this embodiment, before welding the front side 121 of the chip 120 to the unit structure 102, the packaging method further includes: Figure 8 As shown, solder paste (not shown) is printed on the unit structure 102 .
[0105] refer to Figure 2 , and combined with reference Figures 7 to 9 , perform step S5: after mounting the back side 122 of the chip 120 on the heat sink 111, solder the front side 121 of the chip 120 to the unit structure 102 (such as Fig. 9 shown).
[0106] Figure 7 yes Figure 6 Schematic diagram after all heat sinks are transferred to the mounting ring. Fig. 9 yes Figure 7 A schematic diagram after the front sides of all the chips are welded to the unit structure through the chip mounting ring.
[0107] Since the back side of the chip 120 is first mounted on the heat sink 111 and then the chip 120 and the unit structure 102 are welded, it is avoided that the welding point between the chip 120 and the unit structure 102 is damaged during the process of fixing the chip 120 and the heat sink 111, thereby reducing the probability of the welding point between the chip 120 and the unit structure 102 being damaged by external force, which is beneficial to improving the performance of the packaging structure.
[0108] Specifically, the bumps located on the front side 121 of the chip 120 are welded to the unit structure 102 .
[0109] In this embodiment, since a plurality of unit structures 102 and a plurality of chips 120 are provided, the front surfaces 121 of the chips 120 are respectively welded to the corresponding unit structures 102 .
[0110] In this embodiment, after the back sides 122 of the chips 120 are respectively mounted on the corresponding heat sinks 111 and before the heat dissipation structure 110 is cut, the packaging method further includes: attaching the surface of the heat sink 111 facing away from the chip 120 to the carrier layer 130 .
[0111] Specifically, under the action of the carrier layer 130 , the front sides of all the chips 120 are welded to the unit structure 102 , which helps to reduce the difficulty of the welding process.
[0112] More specifically, under the action of the carrier layer 130, the steps of welding the front sides of all the chips 120 to the unit structure 102 include: Figure 7 As shown, the edge area of the surface of the carrier layer 130 facing away from the chip 120 is attached to the mounting ring 160, so that all the heat sinks 111 and the chips 120 are transferred to the mounting ring 160 in one operation; all the chips 120 and the heat sink 111 are transferred from the carrier layer 130 to the unit structure 102, and the front side 121 of the chip 120 faces the unit structure 102; as shown Fig. 9 As shown, the front sides 121 of all the chips 120 are soldered to the unit structure 102 .
[0113] The chip ring 160 is a fixture used to place the chip 120 in the welding equipment before welding the chip 120 to the unit structure 102 .
[0114] Transferring all the heat sinks 111 and chips 120 to the chip ring 160 in one operation helps to reduce the difficulty of transferring the chips 120 to the welding equipment.
[0115] In other embodiments, the heat sink and the chip may be transferred to the chip mounting ring one by one without the support layer.
[0116] In this embodiment, the process of welding the front side 121 of the chip 120 to the unit structure 102 includes a flip chip process.
[0117] The flip-chip process is beneficial for reducing the size of the packaging structure, thereby improving the integration of semiconductor devices.
[0118] In this embodiment, in the step of providing the substrate 100, the substrate 100 includes a lead frame 101, and the unit structure 102 of the lead frame 101 includes a plurality of pins 103. Accordingly, in the step of soldering the front surface 121 of the chip 120 to the unit structure 102, the chip 120 is soldered to the pins 103.
[0119] In this embodiment, in the step of soldering the front side 121 of the chip 120 to the unit structure 102 , a plurality of the chips 120 mounted on the same heat sink 111 are soldered to the same unit structure 102 .
[0120] Soldering the plurality of chips 120 mounted on the same heat sink 111 to the same unit structure 102 is beneficial to realize the integration of multiple chips 120. Moreover, it is also beneficial to increase the total area of the heat sink 111 on the same unit structure 102, thereby further improving the heat dissipation effect of the chip 120.
[0121] In this embodiment, the front side 121 of the chip 120 is soldered to the unit structure 102 by using the solder paste.
[0122] In this embodiment, reference Figure 10 to Figure 11 After the front side 121 of the chip 120 is welded to the unit structure 102, the packaging method further comprises: forming a plastic encapsulation layer 140 on the unit structure 102 to encapsulate the chip 120, wherein the plastic encapsulation layer 140 also covers the side wall of the heat sink 111 and exposes the surface of the heat sink 111 facing away from the chip 120.
[0123] Fig.10 yes Fig. 9 Schematic diagram after forming the plastic encapsulation material layer, Fig.11 yes Fig.10 Schematic diagram after the plastic encapsulation layer is formed.
[0124] The plastic encapsulation layer 140 is used to protect the chip 120, for example, to provide support for the chip 120, isolate the chip 120 from water vapor or corrosive gases in the external environment, and prevent the chip 120 from being damaged. As an example, the plastic encapsulation layer 140 is epoxy resin.
[0125] It should be noted that the step of forming the plastic encapsulation layer 140 encapsulating the chip 120 on the unit structure 102 includes: Fig.10 As shown, a plastic encapsulation material layer 141 is formed on the unit structure 102 to encapsulate the chip 120 and the heat sink 111; Fig.11 As shown, the molding material layer 141 is planarized to expose the surface of the heat sink 111 facing away from the chip 120 .
[0126] It is understandable that after the plastic encapsulation material layer 141 is planarized to expose the surface of the heat sink 111 facing away from the chip 120 , the remaining plastic encapsulation material layer 141 serves as the plastic encapsulation layer 140 .
[0127] First, a molding material layer 141 is formed on the unit structure 102 to encapsulate the chip 120 and the heat sink 111 , and then the molding material layer 141 is planarized to expose the surface of the heat sink 111 facing away from the chip 120 , which is beneficial to improving the heat dissipation effect of the heat sink 111 .
[0128] It should also be noted that since the thickness of the heat dissipation structure 110 at the position of the cutting groove 112 is less than the thickness of the heat sink 111, after the plastic layer 140 encapsulating the chip 120 is formed on the unit structure 102, the cutting groove 112 located at the edge of the heat sink 111 can be covered by the plastic layer 140, which is beneficial to increase the contact area between the heat dissipation structure 110 and the plastic layer 140, thereby helping to increase the bonding force between the plastic layer 140 and the heat sink 111.
[0129] In this embodiment, reference Fig.12 After the plastic encapsulation material layer 141 is planarized to expose the surface of the heat sink 111 facing away from the chip 120, before each of the unit structures 102 and the plastic encapsulation layer 140 located on the unit structure 102 are separated to form an independent packaging structure, it also includes: forming an electroplating layer 150 on the heat sink 111.
[0130] In this embodiment, reference Fig.13The substrate 100 includes a plurality of unit structures 102, and a plastic encapsulation layer 140 encapsulating the chip 120 is formed on the unit structure 102, and the plastic encapsulation layer 140 covers the side wall of the heat sink 111 and exposes the surface of the heat sink 111 facing away from the chip 120. Accordingly, after the plastic encapsulation layer 140 encapsulating the chip 120 is formed on the unit structure 102, the packaging method further includes: separating each of the unit structures 102 and the plastic encapsulation layer 140 located on the unit structure 102 to form an independent packaging structure.
[0131] Fig.13 yes Fig.12 Schematic diagram after forming an independent packaging structure.
[0132] The description of the subsequent steps will not be repeated in this embodiment.
[0133] Although the present invention is disclosed as above, the present invention is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the scope defined by the claims.
Claims
1. A packaging method, characterized in that: include: providing a substrate, the substrate comprising a cell structure; Provide heat sink; Providing a chip, the chip comprising a front side and a back side arranged opposite to each other; Mounting the back side of the chip on the heat sink; After the back side of the chip is mounted on the heat sink, the front side of the chip is welded to the unit structure.
2. The packaging method according to claim 1, characterized in that: After welding the front side of the chip to the unit structure, the packaging method further comprises: A plastic encapsulation layer encapsulating the chip is formed on the unit structure, and the plastic encapsulation layer also covers the side wall of the heat sink and exposes the surface of the heat sink facing away from the chip.
3. The packaging method according to claim 2, characterized in that: The step of forming a plastic encapsulation layer on the unit structure to encapsulate the chip comprises: forming a plastic packaging material layer on the unit structure to encapsulate the chip and the heat sink; The plastic packaging material layer is planarized to expose the surface of the heat sink facing away from the chip.
4. The packaging method according to claim 2, characterized in that: In the step of providing a substrate, the substrate includes a plurality of unit structures; In the step of providing the chip, the number of the chips is multiple; Providing multiple heat sinks; Mounting the back sides of the chips on the corresponding heat sinks respectively; Soldering the front sides of the chips to the corresponding unit structures respectively; After forming a plastic encapsulation layer encapsulating the chip on the unit structure, the packaging method further comprises: separating each of the unit structures and the plastic encapsulation layer on the unit structure to form an independent packaging structure.
5. The packaging method according to claim 1, characterized in that: The step of providing a heat sink comprises: providing a heat dissipation structure, wherein the heat dissipation structure comprises a plurality of heat sinks; In the step of providing the chip, the number of the chips is multiple; Mounting the back sides of the chips on the corresponding heat sinks respectively; After the back sides of the chips are respectively mounted on the corresponding heat sinks and before the front sides of the chips are welded on the unit structure, the method further includes: cutting the heat dissipation structure to separate the heat sinks.
6. The packaging method according to claim 5, characterized in that: The heat dissipation structure further comprises a cutting groove located between adjacent heat dissipation fins, and the thickness of the heat dissipation structure at the location of the cutting groove is smaller than the thickness of the heat dissipation fin; The heat dissipation structure is cut along the cutting groove.
7. The packaging method according to claim 6, characterized in that: In the step of providing the heat dissipation structure, the thickness of the heat dissipation structure at the location of the cutting groove is 40% to 60% of the thickness of the heat sink.
8. The packaging method according to claim 5, characterized in that: After mounting the back sides of the chips on the corresponding heat sinks respectively and before cutting the heat dissipation structure, the packaging method further comprises: attaching the surface of the heat sink facing away from the chip to the carrier layer.
9. The packaging method according to claim 8, characterized in that: Under the action of the bearing layer, the front sides of all the chips are welded to the unit structure.
10. The packaging method according to claim 8, characterized in that: In the step of cutting the heat dissipation structure, a portion of the thickness of the bearing layer is also cut.
11. The packaging method according to claim 10, characterized in that: The thickness of the cut bearing layer accounts for 20% to 50% of the total thickness of the bearing layer.
12. The packaging method according to claim 9, characterized in that: Under the action of the carrier layer, the steps of welding the front sides of all the chips to the unit structure include: Attaching the edge area of the surface of the carrier layer facing away from the chip to the chip mounting ring, so as to transfer all the heat sinks and chips to the chip mounting ring in one operation; Transferring all the chips and heat sinks from the carrier layer to the unit structure, with the front side of the chips facing the unit structure; The front sides of all the chips are soldered to the unit structure.
13. The packaging method according to claim 12, characterized in that: In the step of providing the substrate, the substrate further includes a first positioning member; In the step of providing the heat dissipation structure, the heat dissipation structure further includes a second positioning component.
14. The packaging method according to claim 13, characterized in that: The first positioning component and the second positioning component both include positioning holes.
15. The packaging method according to claim 5, characterized in that: During the process of cutting the heat dissipation structure, a coolant is used to cool the heat dissipation structure.
16. The packaging method according to claim 5, characterized in that: In the step of providing the heat sink and the chip, the outline of the heat sink is larger than the outline of the chip; In the step of mounting the back side of the chip on the heat sink, the chip is located within the outline of the heat sink, and there is a gap between the outline of the chip and the outline of the heat sink.
17. The packaging method according to claim 16, characterized in that: The interval ranges from 0.1 mm to 0.3 mm.
18. The packaging method according to claim 16, characterized in that: In the step of mounting the back side of the chip on the heat sink, the center of the outline of the chip coincides with the center of the outline of the heat sink.
19. The packaging method according to claim 1, characterized in that: The thickness of the heat sink is 0.1 mm to 0.5 mm.
20. The packaging method according to claim 1, characterized in that: The heat sink is made of copper, aluminum and ceramic.
21. The packaging method according to claim 1, characterized in that: The process of welding the front side of the chip to the unit structure includes a flip chip process.
22. The packaging method according to claim 1, characterized in that: In the step of providing a substrate, the substrate includes a lead frame, and a unit structure of the lead frame includes a plurality of pins; In the step of welding the front side of the chip to the unit structure, the chip is welded to the pins.
23. The packaging method according to claim 1, characterized in that: In the step of providing the chip, the number of the chips is multiple; In the step of attaching the back side of the chip to the heat sink, attaching the back sides of a plurality of chips to the same heat sink; In the step of soldering the front side of the chip to the unit structure, a plurality of the chips mounted on the same heat sink are soldered to the same unit structure.