Wafer-level hybrid bonding method

Abstract

The invention provides a wafer-level hybrid bonding method, which comprises the following steps of: sequentially forming a semiconductor device layer, an interconnection layer, a first passivation layer and a first bonding metal layer in the first passivation layer on a first wafer, and performing first chemical mechanical grinding on the first passivation layer and the first bonding metal layer, increasing the grinding speed of the first bonding metal layer relative to the first passivation layer to form a curved concave surface structure of the first bonding metal layer; sequentially forming a semiconductor device layer, an interconnection layer, a second passivation layer and a second bonding metal layer in the second passivation layer on a second wafer, and performing second chemical mechanical grinding on the second passivation layer and the second bonding metal layer to improve the grinding speed of the second passivation layer relative to the second bonding metal layer, and forming a curved surface bump structure of the second bonding metal layer. And bonding the curved surface convex point structures into the corresponding curved surface concave surface structures so as to realize bonding of the first wafer and the second wafer. The bonding surface is a curved surface, so that the bonding strength is improved.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor packaging, and in particular to a wafer-level hybrid bonding method. Background Art

[0002] The development and application of new technologies such as artificial intelligence, autonomous driving, 5G networks, and the Internet of Things have put forward higher requirements for advanced electronic packaging. In this context, the three-dimensional packaging technology that stacks and interconnects multiple chips in a vertical direction is developing rapidly. Among them, hybrid bonding is a key process in realizing 3D packaging.

[0003] Hybrid bonding combines the features of fusion bonding and metal bonding. By embedding metal pads on the surface of the wafer, two different wafers can be directly connected copper to copper, without the need for through-silicon vias.

[0004] Traditional hybrid bonding usually uses polymer adhesive to bond copper to copper on different wafers. However, polymer adhesive is in a semi-fluid state, which makes it easy for polymer adhesive to cause a small amount of misalignment between copper and copper due to bonding pressure, that is, causing the bonding offset of the wafer. If the bonding offset of the wafer is too large, the bonding strength between the wafers will be reduced, thereby affecting the performance of the final semiconductor device.

[0005] Therefore, providing a wafer-level hybrid bonding method that can improve wafer bonding strength has become a technical problem that the industry urgently needs to solve. Summary of the invention

[0006] The technical problem solved by the present invention is to provide a wafer-level hybrid bonding method, which solves the problem of wafer bonding strength existing in the existing bonding method.

[0007] In order to solve the above technical problems, an embodiment of the present invention provides a wafer-level hybrid bonding method, comprising:

[0008] Providing a first wafer and a second wafer, wherein the first wafer and the second wafer have formed a semiconductor device layer and an interconnection layer on a substrate, wherein the interconnection layer includes a top interconnection layer;

[0009] Forming a first passivation layer and a second passivation layer on surfaces of the top interconnection layers of the first wafer and the second wafer, respectively;

[0010] Etching the first passivation layer and the second passivation layer respectively to form a plurality of first grooves and a plurality of second grooves respectively, wherein etching endpoints of all the first grooves and all the second grooves stay on the surface of the corresponding top interconnection layer, and each first groove and each second groove corresponds in position;

[0011] A first bonding metal layer is formed in all the first grooves, and the first bonding metal layer is flush with the first passivation layer to serve as a bonding surface of the first wafer; and a second bonding metal layer is formed in all the second grooves, and the second bonding metal layer is flush with the second passivation layer to serve as a bonding surface of the second wafer;

[0012] Performing a first chemical mechanical polishing on the bonding surface of the first wafer, wherein the polishing speed of the first bonding metal layer is greater than the polishing speed of the first passivation layer, so that the first bonding metal layer is recessed compared to the first passivation layer to form a curved concave structure;

[0013] Performing a second chemical mechanical polishing on the bonding surface of the second wafer, wherein the polishing speed of the second bonding metal layer is lower than the polishing speed of the second passivation layer, so that the second bonding metal layer protrudes from the second passivation layer to form a curved bump structure;

[0014] The first wafer is bonded to the second wafer, and the curved surface convex points are bonded to the corresponding curved surface concave structures.

[0015] Optionally, bonding the first wafer to the second wafer, wherein the curved surface convex points are bonded to the corresponding curved surface concave structures, specifically includes:

[0016] Performing surface activation on the bonding surface of the first wafer and the bonding surface of the second wafer respectively:

[0017] Flipping the second wafer after surface activation, positioning the center of the curved convex structure within the range of the corresponding curved concave structure, and using the curved convex structure to slide along the arc surface of the corresponding curved concave structure to a predetermined position, so as to achieve self-aligned pre-bonding of the second wafer and the first wafer;

[0018] The pre-bonded first wafer and second wafer are thermally annealed to complete the bonding of the first wafer and the second wafer.

[0019] Optionally, the first passivation layer and the second passivation layer are made of silicon oxide, and the first bonding metal layer and the second bonding metal layer are made of copper.

[0020] Optionally, the ratio of the polishing speed of the first bonding metal layer to the polishing speed of the first passivation layer in the first chemical mechanical polishing is 1.3; the ratio of the polishing speed of the second bonding metal layer to the polishing speed of the second passivation layer in the second chemical mechanical polishing is 0.6.

[0021] Optionally, the process conditions of the first chemical mechanical polishing are as follows:

[0022] The speed range of the polishing head is 50r / min~100r / min;

[0023] The speed range of the polishing pad is 60r / min~150r / min;

[0024] The flow rate of the grinding liquid ranges from 200mL / min to 400mL / min;

[0025] The polishing pressure range is 15kPa~30kPa;

[0026] The polishing time ranges from 30s to 90s.

[0027] Optionally, the polishing liquid includes abrasive particles, an oxidant, a copper inhibitor and water; wherein the mass fraction of the abrasive particles is 0.1% to 5%, the mass fraction of the oxidant is 0.1 to 5%, the mass fraction of the copper inhibitor is 0.04% to 0.2%, and the rest is water.

[0028] Optionally, the abrasive particles include inorganic abrasive particles and organic abrasive particles; the inorganic abrasive particles include any one of silicon dioxide, aluminum oxide, zirconium oxide, cerium dioxide, titanium dioxide, germanium oxide and silicon carbide or a combination thereof; the organic abrasive particles include any one of polystyrene, polyacrylic acid and polyvinyl chloride or a combination thereof;

[0029] The oxidant includes hydrogen peroxide;

[0030] The copper inhibitor includes any one of benzotriazole, toluenetriazole, and mercaptobenzothiazole sodium salt;

[0031] The pH value of the grinding liquid is between 2 and 7.

[0032] Optionally, the process conditions of the second chemical mechanical polishing are as follows:

[0033] The speed range of the polishing head is 50r / min~100r / min;

[0034] The speed range of the polishing pad is 60r / min~150r / min;

[0035] The flow rate of the grinding liquid ranges from 250m L / min to 450m L / min;

[0036] The polishing pressure range is 15kPa~30kPa;

[0037] The polishing time ranges from 30s to 90s.

[0038] Optionally, the polishing liquid includes abrasive particles, an oxidant, a copper inhibitor and water; wherein the mass fraction of the abrasive particles is 0.1% to 5%, the mass fraction of the oxidant is 0.1% to 5%, the mass fraction of the copper inhibitor is 0.04% to 0.5%, and the rest is water.

[0039] The abrasive particles include inorganic abrasive particles and organic abrasive particles, wherein the inorganic abrasive particles include any one or more of silicon dioxide, aluminum oxide, zirconium oxide, cerium dioxide, titanium dioxide, germanium oxide and silicon carbide, and the organic abrasive particles include any one or more of polystyrene, polyacrylic acid and polyvinyl chloride;

[0040] The oxidant includes hydrogen peroxide;

[0041] The copper inhibitor includes any one of benzotriazole, toluenetriazole, and mercaptobenzothiazole sodium salt;

[0042] The pH value of the grinding liquid is between 7 and 10.

[0043] Compared with the prior art, the technical solution of the embodiment of the present invention has the following beneficial effects:

[0044] In the wafer-level hybrid bonding method of the technical solution of the present invention, the grinding speed of the first bonding metal layer relative to the first passivation layer is increased to form a curved concave structure of the first bonding metal layer; and the grinding speed of the second passivation layer relative to the second bonding metal layer is increased to form a curved convex structure of the second bonding metal layer; and the curved convex structure of the second bonding metal layer is bonded to the curved concave structure of the first bonding metal layer. Since the bonding surface is a curved surface, the bonding strength is improved.

[0045] Furthermore, the center of the curved convex structure of the second bonding metal layer is positioned within the range of the curved concave structure of the first bonding metal layer, so that the curved convex structure of the second bonding metal layer can slide along the arc surface by gravity and stop at the center of the curved concave structure of the first bonding metal layer to complete self-alignment bonding, thereby reducing the pre-bonding time and further improving the bonding efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0046] Figure 1 The process of the wafer-level hybrid bonding method provided by the embodiment of the present invention is Figure 1 ;

[0047] Figure 2(a) to Figure 7 It is a simplified cross-sectional structural schematic diagram corresponding to different process stages of the wafer-level hybrid bonding method provided by an embodiment of the present invention;

[0048] Figure 8This is the second flow chart of the wafer-level hybrid bonding method provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0049] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments in the present invention, all other embodiments obtained by ordinary technicians in the field without creative work are within the scope of protection of the present invention. The terms "first", "second", "third", "fourth", etc. (if any) in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present invention described here can be implemented in an order other than those illustrated or described here. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units that are clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0050] As described in the background art, conventional bonding has the problem of too large a bonding offset resulting in too low a bonding strength.

[0051] In view of this, the present invention provides a new wafer-level hybrid bonding method to improve the bonding strength between wafers; the method comprises:

[0052] Providing a first wafer and a second wafer, wherein the first wafer and the second wafer have formed a semiconductor device layer and an interconnection layer on a substrate, wherein the interconnection layer includes a top interconnection layer;

[0053] Forming a first passivation layer and a second passivation layer on surfaces of the top interconnection layers of the first wafer and the second wafer, respectively;

[0054] Etching the first passivation layer and the second passivation layer respectively to form a plurality of first grooves and a plurality of second grooves respectively, wherein etching endpoints of all the first grooves and all the second grooves stay on the surface of the corresponding top interconnection layer, and each first groove and each second groove corresponds in position;

[0055] A first bonding metal layer is formed in all the first grooves, and the first bonding metal layer is flush with the first passivation layer to serve as a bonding surface of the first wafer; and a second bonding metal layer is formed in all the second grooves, and the second bonding metal layer is flush with the second passivation layer to serve as a bonding surface of the second wafer;

[0056] Performing a first chemical mechanical polishing on the bonding surface of the first wafer, wherein the polishing speed of the first bonding metal layer is greater than the polishing speed of the first passivation layer, so that the first bonding metal layer is recessed compared to the first passivation layer to form a curved concave structure;

[0057] Performing a second chemical mechanical polishing on the bonding surface of the second wafer, wherein the polishing speed of the second bonding metal layer is lower than the polishing speed of the second passivation layer, so that the second bonding metal layer protrudes from the second passivation layer to form a curved bump structure;

[0058] The first wafer is bonded to the second wafer, and the curved surface convex points are bonded to the corresponding curved surface concave structures to achieve bonding of the first wafer to the second wafer.

[0059] Since the bonding between the first wafer and the second wafer is achieved through the curved convex point structure of the second bonding metal layer and the curved concave structure of the first bonding metal layer, the bonding surface is a curved surface, thereby improving the bonding strength.

[0060] In order to make the above-mentioned objectives, features and beneficial effects of the present invention more clearly understood, the technical solution of the present invention is described in detail below with reference to the accompanying drawings. Figure 1 is a flow chart of a wafer-level hybrid bonding method provided by an embodiment of the present invention. Figure 2(a) to Figure 7 They are schematic diagrams of simplified cross-sectional structures corresponding to different process stages of the wafer-level hybrid bonding method provided by an embodiment of the present invention.

[0061] Please refer to Figures 1 to 7 The wafer-level hybrid bonding method provided by the present invention comprises the following steps:

[0062] S1: Provide a first wafer and a second wafer, wherein the first wafer has formed a first semiconductor device layer 110 and a first interconnection layer 120 stacked in sequence on a first substrate 100, and the second wafer has formed a second semiconductor device layer 210 and a second interconnection layer 220 stacked in sequence on a second substrate 200, wherein the first interconnection layer 120 and the second interconnection layer 220 respectively include a first top interconnection layer 121 and a second top interconnection layer 221, as shown in Figures 2(a) and 2(b). The first interconnection layer 120 includes at least one first insulating dielectric layer and a first metal layer, and a first plug connecting the device structure in the first semiconductor device layer and the first metal layer is formed in the first insulating dielectric layer. The first top interconnection layer 121 includes a first top insulating dielectric layer, and a first top plug connecting the first metal layer is formed in the first top insulating dielectric layer (not shown in the figure); the second interconnection layer 220 includes at least one second insulating dielectric layer and a second metal layer, and a second plug connecting the device structure in the second semiconductor device layer and the second interconnection layer is formed in the second insulating dielectric layer. The second top interconnection layer 221 includes a second top insulating dielectric layer, and a second top plug connecting the second metal layer is formed in the second top insulating dielectric layer (not shown in the figure).

[0063] Specifically, since bonding belongs to the field of semiconductor packaging, when bonding wafers, both wafers have completed the front-end process and the back-end process on their respective substrates. The front-end process is used to form the device layer of the semiconductor device on the substrate of the wafer, and the specific structure of the device layer is determined by the specific type of semiconductor device, such as NMOS tube, PMOS tube, etc., which is not limited here.

[0064] After the front-end process is completed, the back-end process is then performed on the surface of the device layer to form interconnection layers stacked in sequence, and the device layer is electrically connected to the bottom interconnection layer through the metal layer and the plug, and finally the top interconnection layer completes the external connection. Since the front-end process and the back-end process of the semiconductor can both adopt the conventional technical means in the field, and are not the innovative technical means of the present invention, they will not be described in detail.

[0065] S2: forming a first passivation layer 130 and a second passivation layer 230 on the surface of the first top interconnect layer 121 of the first wafer and the surface of the second top interconnect layer 221 of the second wafer, respectively, as shown in FIG. 3( a ) and FIG. 3( b ).

[0066] Specifically, the first passivation layer 130 and the second passivation layer 230 both include silicon oxide. Of course, in addition to silicon oxide, the first passivation layer 130 and the second passivation layer 230 can also include silicon nitride, phosphosilicate glass or aluminum oxide and other materials with good insulation properties, which are not limited here.

[0067] S3: Etching the first passivation layer 130 and the second passivation layer 230 respectively to form a plurality of first grooves 140 and a plurality of second grooves 240 respectively, wherein the etching endpoints of all the first grooves 140 and all the second grooves 240 stay on the surface of the corresponding top interconnection layer, and the positions of the first grooves 140 and the second grooves 240 correspond to each other, as shown in FIG. 4(a) and FIG. 4(b).

[0068] Specifically, the first groove 140 corresponds to the first top-layer plug, and the second groove 240 corresponds to the second top-layer plug. Subsequently, a first bonding metal layer 150 is to be formed in the first groove 140, and subsequently, a second bonding metal layer 250 is to be formed in the second groove 240, and the first wafer and the second wafer are bonded through the first bonding metal layer 150 and the second bonding metal layer 250. Therefore, when preparing the first groove 140 and the second groove 240, it is necessary to ensure that each of the first grooves 140 and each of the second grooves 240 corresponds to the first top-layer plug and the second top-layer plug respectively, and when bonding, the first groove 140 and the second groove 240 correspond to each other in the upper and lower positions, so as to ensure the subsequent bonding accuracy.

[0069] S4: A first bonding metal layer 150 is formed in all the first grooves 140, and the first bonding metal layer 150 is flush with the first passivation layer 130 to serve as a bonding surface of the first wafer; and a second bonding metal layer 250 is formed in all the second grooves 240, and the second bonding metal layer 250 is flush with the second passivation layer 230 to serve as a bonding surface of the second wafer, as shown in Figures 5(a) and 5(b).

[0070] Specifically, the first bonding metal layer 150 is connected to the first top-layer plug, and the second bonding metal layer 250 is connected to the second top-layer plug. The materials of the first bonding metal layer 150 and the second bonding metal layer 250 each include copper, which ensures the normal electrical connection between the device and other wafers after wafer bonding, and the device performance is not affected. The specific process of forming the first bonding metal layer 150 and the second bonding metal layer 250 can adopt photolithography etching and copper electroplating process. After the first groove 140 and the second groove 240 are electroplated with copper, the surface of the first wafer and the surface of the second wafer are chemically mechanically polished respectively, so that the copper in the first groove 140 is flush with the first passivation layer 130 on both sides, and the copper in the second groove 240 is flush with the second passivation layer 230 on both sides, so as to prepare for further chemical mechanical polishing in the subsequent step S5.

[0071] S5: Performing a first chemical mechanical polishing on the bonding surface of the first wafer, and the polishing speed of the first bonding metal layer 150 is greater than the polishing speed of the first passivation layer 130, so that the first bonding metal layer 150 is recessed compared to the first passivation layer 130 to form a curved concave structure, as shown in Figure 6(a).

[0072] The following describes the process of the first chemical mechanical polishing in detail by taking the case where the material of the first bonding metal layer 150 is copper and the material of the first passivation layer 130 is silicon oxide as an example:

[0073] 1. Preparation stage: Place the wafer to be polished in the chemical mechanical polishing equipment.

[0074] 2. Grinding process: Add grinding fluid to the chemical mechanical polishing equipment and grind the wafer surface.

[0075] 3. Cleaning stage: After completing chemical mechanical polishing, the wafer surface needs to be brushed, sprayed and ultrasonically cleaned.

[0076] The back of the wafer is fixed on the rotating polishing head by hydrophilic tension or vacuum adsorption. Under a certain downward pressure and the presence of abrasive liquid, the rotating polishing head drives the wafer and the rotating polishing pad to move relative to each other. The abrasive particles in the abrasive liquid mechanically rub against the surface of the wafer, and the chemical components in the abrasive liquid react chemically with the surface of the wafer to generate substances that are easy to remove.

[0077] Specifically, the rotation speed of the polishing head is set to 50 r / min; the rotation speed of the polishing pad is set to 60 r / min; the flow rate of the grinding liquid is set to 200 mL / min; the polishing pressure is set to 15 kPa; and the polishing time is set to 30 s.

[0078] Of course, the above-mentioned grinding parameters are only a specific example. The rotation speed of the polishing head can be specifically set within 50r / min~100r / min, the rotation speed of the polishing pad can be specifically set within 60r / min~150r / min; the flow rate of the grinding liquid can be specifically set within 200mL / min~400mL / min; the polishing pressure can be specifically set within 15kPa~30kPa; and the polishing time can be specifically set within 30s~90s.

[0079] Specifically, the polishing liquid is composed of 3% by mass of abrasive particles, 0.1% by mass of an oxidant, 0.04% by mass of a copper inhibitor and water. The pH value of the polishing liquid is 3. The abrasive particles are specifically silicon dioxide. The oxidant is specifically hydrogen peroxide. The copper inhibitor is specifically benzotriazole (BTA). The polishing liquid set above can make the ratio of the copper polishing speed to the silicon oxide polishing speed be 1.3, so as to enhance the dishing of copper, so that copper forms a concave structure relative to silicon oxide. The specific principle is as follows:

[0080] In an acidic environment, the charge polarity of the silica abrasive particles is opposite to that of copper, so the contact probability of the silica abrasive particles with copper can be increased through electrostatic adsorption, thereby accelerating the grinding speed of copper. Since both the oxidant and the copper inhibitor have a protective effect on copper, a small mass fraction of the oxidant and a small mass fraction of the copper inhibitor are set to reduce the protection of copper, thereby further accelerating the grinding speed of copper. Finally, the ratio of the copper grinding speed to the silicon oxide grinding speed is set to 1.3, so as to enhance the dishing of copper, so that the polished copper forms a concave structure relative to the silicon oxide.

[0081] Of course, in addition to silicon dioxide, the abrasive particles can also be selected from any one or more inorganic abrasive particles of silicon dioxide, aluminum oxide, zirconium oxide, cerium dioxide, titanium dioxide, germanium oxide and silicon carbide, and any one or more organic abrasive particles of polystyrene, polyacrylic acid and polyvinyl chloride can be selected. In addition to benzotriazole, the copper inhibitor can also be selected from methyl benzotriazole or sodium mercaptobenzothiazole. In addition to being set to 3%, the mass fraction of the abrasive particles can also be set between 0.1% and 5%. In addition to being set to 0.1%, the mass fraction of the oxidant can also be set between 0.1% and 5%. In addition to being set to 0.04%, the mass fraction of the copper inhibitor can also be set between 0.04% and 0.5%. In addition to being set to 3, the pH value of the grinding liquid can also be set between 2 and 7. As long as the ratio of the copper grinding speed to the silicon oxide grinding speed is ensured to be 1.3, it is within the protection scope of the embodiment of the present invention and is not limited here.

[0082] S6: Performing a second chemical mechanical polishing on the bonding surface of the second wafer, and the polishing speed of the second bonding metal layer 250 is lower than the polishing speed of the second passivation layer 230, so that the second bonding metal layer 250 protrudes compared to the second passivation layer 230 to form a curved bump structure, as shown in Figure 6(b).

[0083] Except for the difference in the composition of the polishing liquid, the process of the second chemical mechanical polishing is basically similar to the process of the first chemical mechanical polishing, and will not be repeated here. Therefore, the polishing liquid used in the second chemical mechanical polishing process is described in detail below, taking the material of the second bonding metal layer 250 as copper and the material of the second passivation layer 230 as silicon oxide as an example:

[0084] The polishing liquid is composed of 3% by mass of abrasive particles, 4% by mass of an oxidant, 0.5% by mass of a copper inhibitor and water. The pH value of the polishing liquid is 9. The abrasive particles are specifically silicon dioxide and cerium dioxide, and the mass ratio of silicon dioxide to cerium dioxide is 1:1. The oxidant is specifically hydrogen peroxide. The copper inhibitor is specifically benzotriazole (BTA). The polishing liquid set above can make the ratio of the copper polishing speed to the silicon oxide polishing speed be 0.6, so as to eliminate the dishing of copper, so that copper forms a convex structure relative to silicon oxide. The specific principles are as follows:

[0085] In an alkaline environment, the charge polarity of the silica abrasive particles and copper is the same. Since like charges repel each other, the contact probability between the silica abrasive particles and copper can be reduced, thereby reducing the grinding speed of the copper. At the same time, cerium dioxide abrasive particles are introduced to cause a redox reaction with the silicon oxide in the passivation layer, thereby accelerating the grinding speed of silicon oxide. Since both oxidants and copper inhibitors have a protective effect on copper, a large mass fraction of oxidants and a large mass fraction of copper inhibitors are set to enhance the protection of copper, thereby further reducing the grinding speed of copper. Finally, the ratio of the copper grinding speed to the silicon oxide grinding speed is set to 0.6 to eliminate the dishing of copper, so that the silicon oxide moves downward relative to the copper as a whole to expose the copper column, so that the copper forms a convex structure relative to the silicon oxide.

[0086] Of course, in addition to silicon dioxide and cerium dioxide, the abrasive particles can also be selected from any one or any combination of inorganic abrasive particles of silicon dioxide, aluminum oxide, zirconium oxide, cerium dioxide, titanium dioxide, germanium oxide and silicon carbide, and any one or any combination of organic abrasive particles of polystyrene, polyacrylic acid and polyvinyl chloride can be selected. In addition to benzotriazole, the copper inhibitor can also be selected from methyl benzotriazole or sodium mercaptobenzothiazole. In addition to being set to 3%, the mass fraction of the abrasive particles can also be set between 0.1% and 5%. In addition to being set to 4%, the mass fraction of the oxidant can also be set between 0.1% and 5%. In addition to being set to 0.5%, the mass fraction of the copper inhibitor can also be set between 0.04% and 0.5%. In addition to being set to 9, the pH value of the grinding liquid can also be set between 9-12. As long as the ratio of the copper grinding speed to the silicon oxide grinding speed is ensured to be 0.6, it is within the protection scope of the embodiment of the present invention and is not limited here.

[0087] The above is a detailed description of step S6. The wafer-level hybrid bonding method further includes the following steps:

[0088] S7: Bonding the first wafer to the second wafer, bonding the curved surface convex point to the corresponding curved surface concave structure, so as to achieve bonding of the first wafer to the second wafer, such as Figure 7 shown.

[0089] It should be noted that Figure 2(a) to Figure 6(a) as well as Figure 7 The first semiconductor device layer 110, the first interconnect layer 120 and the first top interconnect layer 121, and Figure 2(b) to Figure 6(b) as well as Figure 7 The second semiconductor device layer 210, the second interconnection layer 220 and the second top interconnection layer 221 are all simplified representations used to indicate the interlayer positions of the corresponding layers, and do not represent the actual structure.

[0090] The above step S7 will be described in detail below. Figure 8 Flow chart 2 of the wafer-level hybrid bonding method provided by an embodiment of the present invention, specifically, Figure 8 It is a flowchart of the specific solution of the aforementioned step S7.

[0091] Please refer to Figure 8 In step S7, the first wafer is bonded to the second wafer, and the curved surface convex point is bonded to the corresponding curved surface concave structure to achieve the bonding of the first wafer and the second wafer, which specifically includes:

[0092] S71: performing surface activation on the bonding surface of the first wafer and the bonding surface of the second wafer respectively.

[0093] Specifically, the bonding surface of the first wafer and the bonding surface of the second wafer are respectively subjected to wet chemical treatment or dry plasma treatment, so that the bonding surface of the first wafer and the bonding surface of the second wafer have hydrophilic functional groups such as Si-OH as terminal functional groups, so as to achieve hydrophilic interconnection between the first wafer and the second wafer, thereby improving the bonding strength.

[0094] S72: Flip the second wafer after surface activation, and position the center of the curved convex structure within the range of the corresponding curved concave structure, and use the curved convex structure to slide along the arc surface of the corresponding curved concave structure to a predetermined position to achieve self-aligned pre-bonding of the second wafer and the first wafer.

[0095] Among them, the beneficial effect of step S72 is that since the curved concave structure is an arc structure, as long as the center point of the curved convex point structure is placed within the concave range of the corresponding curved concave structure, the curved convex point structure will slide along the arc surface to the midpoint of the corresponding curved concave structure due to gravity, thereby automatically realizing the pre-bonding of the second wafer and the first wafer. Compared with the prior art that requires centrifugal force to achieve pre-bonding, the technical solution of the present invention greatly reduces the time used for pre-bonding, thereby improving the bonding efficiency of the wafer.

[0096] S73: performing thermal annealing on the pre-bonded first wafer and second wafer to complete the bonding of the first wafer and the second wafer.

[0097] The above-mentioned thermal annealing atmosphere gas is N2; the annealing temperature is 350°C; and the process time is 120 minutes. Of course, the thermal annealing atmosphere gas, annealing temperature and process time can also be adjusted according to different actual application scenarios, and are not limited here.

[0098] In summary, the wafer-level hybrid bonding method provided by the technical solution of the present invention, since the concave structure and the convex point structure made by the present invention are both curved structures, when the first wafer and the second wafer are bonded, the actual bonding surface is a curved surface. Compared with the plane bonding of the prior art, the bonding area of ​​the curved bonding is larger, which can make more metal atoms in the bonding metal layer creep and diffuse from the contact area of ​​the metal layer to the hole area of ​​the metal layer, making the connection of the bonding surface more complete, thereby greatly improving the bonding strength of the wafer.

[0099] Furthermore, since the curved concave structure is an arc structure, as long as the center point of the curved convex point structure is placed within the concave range of the corresponding curved concave structure, the curved convex point structure will slide along the arc surface to the midpoint of the corresponding curved concave structure due to gravity, thereby automatically achieving pre-bonding of the second wafer and the first wafer. Compared with the prior art that requires centrifugal force to achieve pre-bonding, the technical solution of the present invention greatly reduces the time used for pre-bonding, thereby improving the bonding efficiency of the wafer.

[0100] Although the present invention is disclosed as above, the present invention is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the scope defined by the claims.

Claims

1. A wafer-level hybrid bonding method, characterized in that: include: Providing a first wafer and a second wafer, wherein the first wafer and the second wafer have formed a semiconductor device layer and an interconnection layer on a substrate, wherein the interconnection layer includes a top interconnection layer; Forming a first passivation layer and a second passivation layer on surfaces of the top interconnection layers of the first wafer and the second wafer, respectively; Etching the first passivation layer and the second passivation layer respectively to form a plurality of first grooves and a plurality of second grooves respectively, wherein etching endpoints of all the first grooves and all the second grooves stay on the surface of the corresponding top interconnection layer, and each first groove and each second groove corresponds in position; A first bonding metal layer is formed in all the first grooves, and the first bonding metal layer is flush with the first passivation layer to serve as a bonding surface of the first wafer; and a second bonding metal layer is formed in all the second grooves, and the second bonding metal layer is flush with the second passivation layer to serve as a bonding surface of the second wafer; Performing a first chemical mechanical polishing on the bonding surface of the first wafer, wherein the polishing speed of the first bonding metal layer is greater than the polishing speed of the first passivation layer, so that the first bonding metal layer is recessed compared to the first passivation layer to form a curved concave structure; Performing a second chemical mechanical polishing on the bonding surface of the second wafer, wherein the polishing speed of the second bonding metal layer is lower than the polishing speed of the second passivation layer, so that the second bonding metal layer protrudes from the second passivation layer to form a curved bump structure; The first wafer is bonded to the second wafer, and the curved surface convex points are bonded to the corresponding curved surface concave structures.

2. The wafer-level hybrid bonding method according to claim 1, characterized in that: Bonding the first wafer to the second wafer, wherein the curved surface convex points are bonded to the corresponding curved surface concave structures, specifically includes: Performing surface activation on the bonding surface of the first wafer and the bonding surface of the second wafer respectively: Flipping the second wafer after surface activation, positioning the center of the curved convex structure within the range of the corresponding curved concave structure, and using the curved convex structure to slide along the arc surface of the corresponding curved concave structure to a predetermined position, so as to achieve self-aligned pre-bonding of the second wafer and the first wafer; The pre-bonded first wafer and second wafer are thermally annealed to complete the bonding of the first wafer and the second wafer.

3. The wafer-level hybrid bonding method according to claim 1 or 2, characterized in that: The material of the first passivation layer and the second passivation layer is silicon oxide, and the material of the first bonding metal layer and the second bonding metal layer is copper.

4. The wafer-level hybrid bonding method according to claim 3, characterized in that: The ratio of the polishing speed of the first bonding metal layer to the polishing speed of the first passivation layer in the first chemical mechanical polishing is 1.3; the ratio of the polishing speed of the second bonding metal layer to the polishing speed of the second passivation layer in the second chemical mechanical polishing is 0.

6.

5. The wafer-level hybrid bonding method according to claim 4, characterized in that: The process conditions of the first chemical mechanical polishing are as follows: The speed range of the polishing head is 50r / min~100r / min; The speed range of the polishing pad is 60r / min~150r / min; The flow rate of the grinding liquid ranges from 200mL / min to 400mL / min; The polishing pressure range is 15kPa~30kPa; The polishing time ranges from 30s to 90s.

6. The wafer-level hybrid bonding method according to claim 5, characterized in that: The polishing liquid includes abrasive grains, an oxidant, a copper inhibitor and water; wherein the mass fraction of the abrasive grains is 0.1% to 5%, the mass fraction of the oxidant is 0.1% to 5%, the mass fraction of the copper inhibitor is 0.04% to 0.2%, and the rest is water.

7. The wafer-level hybrid bonding method according to claim 6, characterized in that: The abrasive particles include inorganic abrasive particles and organic abrasive particles; the inorganic abrasive particles include any one of silicon dioxide, aluminum oxide, zirconium oxide, cerium dioxide, titanium dioxide, germanium oxide and silicon carbide or a combination thereof; the organic abrasive particles include any one of polystyrene, polyacrylic acid and polyvinyl chloride or a combination thereof; The oxidant includes hydrogen peroxide; The copper inhibitor includes any one of benzotriazole, toluenetriazole, and mercaptobenzothiazole sodium salt; The pH value of the grinding liquid is between 2 and 7.

8. The wafer-level hybrid bonding method according to claim 4, characterized in that: The process conditions of the second chemical mechanical polishing are as follows: The speed range of the polishing head is 50r / min~100r / min; The speed range of the polishing pad is 60r / min~150r / min; The flow rate of the grinding liquid ranges from 250mL / min to 450mL / min; The polishing pressure range is 15kPa~30kPa; The polishing time ranges from 30s to 90s.

9. The wafer-level hybrid bonding method according to claim 8, characterized in that: The polishing liquid includes abrasive grains, an oxidant, a copper inhibitor and water; wherein the mass fraction of the abrasive grains is 0.1% to 5%, the mass fraction of the oxidant is 0.1% to 5%, the mass fraction of the copper inhibitor is 0.04% to 0.5%, and the rest is water.

10. The wafer-level hybrid bonding method according to claim 9, characterized in that: The abrasive particles include inorganic abrasive particles and organic abrasive particles, wherein the inorganic abrasive particles include any one or more of silicon dioxide, aluminum oxide, zirconium oxide, cerium dioxide, titanium dioxide, germanium oxide and silicon carbide, and the organic abrasive particles include any one or more of polystyrene, polyacrylic acid and polyvinyl chloride; The oxidant includes hydrogen peroxide; The copper inhibitor includes any one of benzotriazole, toluenetriazole, and mercaptobenzothiazole sodium salt; The pH value of the grinding liquid is between 7 and 10.

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