Diamond high-speed inverter circuit and preparation method thereof

By growing hydrogen/silicon composite terminal E-mode devices and hydrogen terminal D-mode devices on diamond substrates, the existing diamond E/D-mode circuits have been solved, and a high threshold voltage and high-performance diamond high-speed inverter circuits are realized.

CN119582838AActive Publication Date: 2025-03-07XIDIAN UNIV
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Patent Information

Application Number
CN202411647323.X
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-11-18
Publication Date
2025-03-07
Estimated Expiration
2044-11-18

AI Technical Summary

Technical Problem

The existing diamond E/D-mode circuits have slow response speed and poor operating safety, making it difficult to meet the high threshold voltage requirements required by enhanced devices, hindering the development and application of diamond-based digital circuits.

Method used

Using hydrogen/silicon composite terminal E-mode device and hydrogen-terminal D-mode device, a diamond high-speed inverter circuit with a high threshold voltage was prepared by growing silicon-terminal diamond on a single crystal diamond substrate, and then hydrogenation was performed using mask etching and MPCVD processes.

Benefits of technology

It achieves higher performance, higher safety and higher response speed, which is significantly improved compared to the existing single hydrogen terminal diamond high-speed inverter circuit.

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Abstract

The invention discloses a diamond high-speed phase inverter circuit and a preparation method thereof. A diamond high-speed phase inverter comprises a hydrogen / silicon composite terminal E-mode device and a hydrogen terminal D-mode device. Wherein the hydrogen / silicon composite terminal E-mode device and the hydrogen terminal D-mode device share the diamond substrate; the diamond substrate comprises a single crystal diamond substrate and a non-doped diamond epitaxial layer superposed on the single crystal diamond substrate; a terminal layer of the hydrogen / silicon composite terminal E-mode device is hydrogen / silicon composite terminal diamond; a terminal layer of the hydrogen terminal D-mode device is a first hydrogen terminal diamond; an isolation region is arranged between the hydrogen / silicon composite terminal E-mode device and the hydrogen terminal D-mode device; and the E-mode device drain electrode of the hydrogen / silicon composite terminal E-mode device, the D-mode device source electrode of the hydrogen terminal D-mode device and the D-mode device grid electrode of the hydrogen terminal D-mode device are interconnected through metal interconnection lines, so that higher performance, higher safety and higher response speed are realized.
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Description

Technical Field

[0001] The invention belongs to the technical field of semiconductors, and in particular relates to a diamond high-speed inverter circuit and a preparation method thereof. Background Art

[0002] Diamond is known as the "ultimate semiconductor" because of its excellent physical properties such as high thermal conductivity, high breakdown electric field, high intrinsic mobility and high saturation velocity. Diamond semiconductor devices not only have important application prospects in the fields of microwave power and power electronics, but also have unique advantages in the field of high-speed digital circuits. Diamond devices have excellent high-temperature working stability, which can greatly reduce the additional cost introduced by circuit heat dissipation; at the same time, the high breakdown voltage and high carrier saturation velocity of diamond can increase the working voltage of the device, thereby improving the driving ability of the circuit. As a basic logic circuit unit, the inverter plays an important role in digital integrated circuits and systems. Therefore, the E / D-mode inverter circuit prepared by diamond semiconductors has unparalleled advantages over silicon-based circuits in terms of high temperature resistance and high response speed, and is expected to become a key component of the next generation of digital circuits.

[0003] At present, diamond-based digital circuits are mainly implemented by direct coupled field effect transistor logic (DCFL), that is, depletion-mode and enhancement-mode devices, namely E-mode devices and D-mode devices, are prepared on the same substrate, and connected through metal interconnects to form logic circuits such as inverters. The physical and electrical properties of the diamond surface can be effectively changed by modifying the diamond surface. The hydrogen-terminated diamond surface is widely used to prepare depletion-mode diamond FETs (Field Effect Transistors) due to the presence of a two-dimensional hole gas conductive channel, and the device preparation process has been relatively mature. By special treatment of the channel or gate dielectric of the hydrogen-terminated diamond FET, the device can achieve an enhanced working mode. The commonly used treatment methods include insulating dielectric charge regulation, gate Schottky barrier regulation, and complete modification of the hydrogen terminal. The existing diamond inverter mainly uses dielectric materials containing positive fixed charges as gate insulating films to prepare enhancement-mode hydrogen-terminated diamond FET devices, and connects them to depletion-mode hydrogen-terminated diamond FETs to realize logic applications.

[0004] However, existing enhanced hydrogen-terminated diamond FETs have problems such as high MOS (abbreviation of MOSFET, Metal-Oxide-Semiconductor Field-Effect Transistor) interface states and low device threshold voltage, which makes the channel carrier transport characteristics and device switching characteristics poor, and it is difficult to meet the high threshold voltage requirements required by enhanced devices, resulting in the lack of device working safety. Therefore, the response speed and working safety of the existing diamond E / D mode circuits prepared from a single hydrogen-terminated diamond material still need to be improved, which hinders the development and application of diamond-based digital circuits. Summary of the invention

[0005] In order to solve the above problems existing in the prior art, the present invention provides a diamond high-speed inverter circuit and a preparation method thereof.

[0006] The technical problem to be solved by the present invention is achieved through the following technical solutions:

[0007] In a first aspect, the present invention provides a diamond high-speed inverter circuit, the diamond high-speed inverter comprising:

[0008] A hydrogen / silicon composite terminal E-mode device and a hydrogen terminal D-mode device; the hydrogen / silicon composite terminal E-mode device and the hydrogen terminal D-mode device share a diamond substrate; the diamond substrate comprises a single crystal diamond substrate and a non-doped diamond epitaxial layer superimposed on the single crystal diamond substrate; the terminal layer of the hydrogen / silicon composite terminal E-mode device is a hydrogen / silicon composite terminal diamond; the terminal layer of the hydrogen terminal D-mode device is a first hydrogen terminal diamond;

[0009] An isolation region is provided between the hydrogen / silicon composite termination E-mode device and the hydrogen termination D-mode device;

[0010] The E-mode device drain of the hydrogen / silicon composite termination E-mode device, the D-mode device source of the hydrogen termination D-mode device, and the D-mode device gate of the hydrogen termination D-mode device are interconnected through metal interconnection lines.

[0011] Optionally, the hydrogen / silicon composite terminal E-mode device includes:

[0012] Diamond substrate;

[0013] A first p-type heavily boron-doped diamond and a second p-type heavily boron-doped diamond are superimposed on the upper surface of the diamond substrate; the lower surfaces of the first p-type heavily boron-doped diamond and the second p-type heavily boron-doped diamond are both deeply embedded in the diamond substrate;

[0014] A hydrogen / silicon composite terminal diamond superimposed on the upper surface of the diamond substrate and located between the first p-type heavily boron-doped diamond and the second p-type heavily boron-doped diamond; two sides of the hydrogen / silicon composite terminal diamond are in contact with the first p-type heavily boron-doped diamond and the second p-type heavily boron-doped diamond respectively; the hydrogen / silicon composite terminal diamond includes a silicon terminal diamond and a second hydrogen terminal diamond located on both sides of the silicon terminal diamond;

[0015] An E-mode device source electrode; the E-mode device source electrode is superimposed on the first p-type heavily boron-doped diamond;

[0016] An E-mode device drain; the E-mode device drain is superimposed on the second p-type heavily boron-doped diamond;

[0017] An E-mode device gate passivation layer; the E-mode device gate passivation layer is arranged on the upper surface of the hydrogen / silicon composite terminal diamond and extends to both sides to cover a portion of the upper surface of the first p-type heavily boron-doped diamond and the second p-type heavily boron-doped diamond;

[0018] An E-mode device gate; the E-mode device gate is superimposed on the E-mode device gate passivation layer.

[0019] Optionally, the boron doping concentration of the first p-type heavily boron-doped diamond and the second p-type heavily boron-doped diamond are both 1×10 20 cm -3 ~1×10 21 cm -3 ; The source electrode and the drain electrode of the E-mode device are both formed by stacking Ti and Au in sequence from bottom to top; the material of the gate passivation layer of the E-mode device is Al2O3; the material of the gate of the E-mode device is Al.

[0020] Optionally, the thickness range of the first p-type heavily boron-doped diamond and the second p-type heavily boron-doped diamond are both 50nm to 150nm; the thickness range of the hydrogen / silicon composite terminal diamond is 0.2nm to 1nm; the thickness range of the E-mode device source and the E-mode device drain are both 100nm to 130nm; the thickness range of the E-mode device gate passivation layer is 20nm to 100nm; the thickness range of the E-mode device gate is 50nm to 150nm.

[0021] Optionally, the hydrogen terminal D-mode device includes:

[0022] Diamond substrate;

[0023] A third p-type heavily boron-doped diamond and a fourth p-type heavily boron-doped diamond are superimposed on the upper surface of the diamond substrate; lower surfaces of the third p-type heavily boron-doped diamond and the fourth p-type heavily boron-doped diamond are both deeply embedded in the diamond substrate;

[0024] A first hydrogen-terminated diamond superimposed on the upper surface of the diamond substrate and located between the third p-type heavily boron-doped diamond and the fourth p-type heavily boron-doped diamond; both sides of the first hydrogen-terminated diamond are in contact with the third p-type heavily boron-doped diamond and the fourth p-type heavily boron-doped diamond respectively;

[0025] D-mode device source; the D-mode device source is superimposed on the third p-type heavily boron-doped diamond;

[0026] D-mode device drain; the D-mode device drain is superimposed on the fourth p-type heavily boron-doped diamond;

[0027] A D-mode device gate passivation layer; the D-mode device gate passivation layer is arranged on the upper surface of the first hydrogen-terminated diamond and extends to both sides to cover a portion of the upper surfaces of the third p-type heavily boron-doped diamond and the fourth p-type heavily boron-doped diamond;

[0028] D-mode device gate; the D-mode device gate is superimposed on the D-mode device gate passivation layer.

[0029] Optionally, the boron doping concentration of the third p-type heavily boron-doped diamond and the fourth p-type heavily boron-doped diamond are both 1×10 20 cm -3 ~1×10 21 cm -3 ; The source electrode of the D-mode device and the drain electrode of the D-mode device are both formed by stacking Ti and Au in sequence from bottom to top; the material of the gate passivation layer of the D-mode device is Al2O3; the material of the gate electrode of the D-mode device is Al.

[0030] Optionally, the thickness range of the third p-type heavily boron-doped diamond and the fourth p-type heavily boron-doped diamond are both 50nm to 150nm; the thickness range of the first hydrogen-terminated diamond is 0.2nm to 1nm; the thickness range of the D-mode device source and the D-mode device drain are both 100nm to 130nm; the thickness range of the D-mode device gate passivation layer is 20nm to 100nm; the thickness range of the D-mode device gate is 50nm to 150nm.

[0031] Optionally, the diamond high-speed inverter circuit further includes an oxygen-terminated diamond isolation layer and a passivation dielectric layer; the oxygen-terminated diamond isolation layer is located at both ends of the upper surface of the diamond substrate and in the isolation region;

[0032] The passivation dielectric layer is located on the oxygen-terminated diamond isolation layer in the isolation region and extends to cover the upper surfaces of the E-mode device drain of the hydrogen / silicon composite-terminated E-mode device and the D-mode device source of the hydrogen-terminated D-mode device.

[0033] Optionally, the material of the passivation dielectric layer is Al2O3.

[0034] In a second aspect, the present invention provides a method for preparing a diamond high-speed inverter circuit, the preparation method comprising:

[0035] epitaxially growing a non-doped diamond epitaxial layer on the upper surface of a single crystal diamond substrate to form a diamond substrate;

[0036] A hydrogen / silicon composite terminal E-mode device, a hydrogen terminal D-mode device, and an isolation region between the hydrogen / silicon composite terminal E-mode device and the hydrogen terminal D-mode device are prepared; wherein the hydrogen / silicon composite terminal E-mode device and the hydrogen terminal D-mode device share the diamond substrate; the terminal layer of the hydrogen / silicon composite terminal E-mode device is a hydrogen / silicon composite terminal diamond; the terminal layer of the hydrogen terminal D-mode device is a first hydrogen terminal diamond; the hydrogen / silicon composite terminal diamond and the first hydrogen terminal diamond are prepared simultaneously by growing silicon terminal diamond on the diamond substrate and then performing hydrogenation treatment using mask etching and MPCVD processes;

[0037] The drain of the E-mode device of the hydrogen / silicon composite termination E-mode device, the source of the D-mode device of the hydrogen termination D-mode device and the gate of the D-mode device of the hydrogen termination D-mode device are interconnected through metal interconnection lines.

[0038] The terminal layer in the hydrogen / silicon composite terminal E-mode device in a diamond high-speed inverter circuit provided by the present invention adopts hydrogen / silicon composite terminal diamond. Since the silicon and diamond in the silicon-terminated diamond in the hydrogen / silicon composite terminal diamond have the same cubic crystal structure, the silicon-terminated diamond has a better lattice matching effect and a lower interface state density. At the same time, the surface conductivity of the oxidized silicon-terminated diamond is low, which is also conducive to the realization of a high threshold voltage enhanced device. Based on this, the diamond high-speed inverter circuit provided by the embodiment of the present invention has higher performance, higher safety and higher response speed than the existing single hydrogen-terminated diamond high-speed inverter circuit.

[0039] The present invention will be further described in detail below with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] Figure 1 is a cross-sectional view of a diamond high-speed inverter circuit provided by an embodiment of the present invention;

[0041] Figure 21 is a schematic diagram of the structure of a diamond high-speed inverter circuit provided by an embodiment of the present invention;

[0042] Figure 3 It is a schematic diagram of the energy band structure of hydrogen-terminated diamond and silicon-terminated diamond under vacuum conditions;

[0043] Figure 4 Schematic diagram of the atomic configuration of a (001) plane hydrogen / silicon composite terminated diamond structure provided by an embodiment of the present invention;

[0044] Figure 5 It is a schematic flow chart of a method for preparing a diamond high-speed inverter circuit provided by an embodiment of the present invention;

[0045] Figure 6 It is a diagram of the preparation process of a diamond high-speed inverter circuit provided by an embodiment of the present invention.

[0046] Figure numerals: 1. single crystal diamond substrate; 2. undoped diamond epitaxial layer; 3. first p-type heavily boron-doped diamond; 4. second p-type heavily boron-doped diamond; 5. third p-type heavily boron-doped diamond; 6. fourth p-type heavily boron-doped diamond; 7. silicon-terminated diamond; 8. second hydrogen-terminated diamond; 9. first hydrogen-terminated diamond; 10. E-mode device source; 11. E-mode device drain; 12. E-mode device gate passivation layer; 13. E-mode device gate; 14. D-mode device source; 15. D-mode device drain; 16. D-mode device gate passivation layer; 17. D-mode device gate; 18. oxygen-terminated diamond isolation layer; 19. passivation dielectric layer. DETAILED DESCRIPTION

[0047] The present invention is further described in detail below with reference to specific embodiments, but the embodiments of the present invention are not limited thereto.

[0048] In order to solve the problem that the existing diamond E / D mode circuit prepared from a single hydrogen-terminated diamond material has a slow response speed and poor working safety, an embodiment of the present invention provides a diamond high-speed inverter circuit, see Figure 1 and Figure 2 , Figure 1 is a cross-sectional view of a diamond high-speed inverter circuit provided by an embodiment of the present invention, Figure 2 1 is a schematic diagram of the structure of a diamond high-speed inverter circuit provided by an embodiment of the present invention. The diamond high-speed inverter circuit provided by an embodiment of the present invention comprises a hydrogen / silicon composite terminal E-mode device and a hydrogen terminal D-mode device.

[0049] In the embodiment of the present invention, the hydrogen / silicon composite termination E-mode device and the hydrogen termination D-mode device share a diamond substrate.

[0050] The diamond substrate provides a basic structure and support for hydrogen / silicon composite termination E-mode devices and hydrogen termination D-mode devices. The diamond substrate comprises a single crystal diamond substrate 1 and a non-doped diamond epitaxial layer 2 superimposed on the single crystal diamond substrate 1.

[0051] The single crystal diamond substrate 1 is a single crystal diamond substrate formed by the HPHT (High pressure High Temperature) method, and can be specifically a type Ib (001) oriented single crystal diamond substrate. Type Ib diamond is a single crystal diamond with very little nitrogen doping, and the (001) orientation means that the surface orientation of the diamond crystal is the (001) plane. The use of the type Ib (001) oriented single crystal diamond substrate can provide good crystal quality and excellent electronic properties for the subsequently grown materials, and is suitable for high-power and high-frequency devices. In addition, the type Ib (001) oriented single crystal diamond substrate also has the characteristics of high thermal conductivity, which is beneficial to the heat dissipation of high-power devices.

[0052] Specifically, the specification of the single crystal diamond substrate 1 can be 3×3×0.5 mm 3 .

[0053] In the embodiment of the present invention, the non-doped diamond epitaxial layer 2 is superimposed on the single crystal diamond substrate 1. The non-doped diamond epitaxial layer 2 refers to a diamond film into which no dopant is introduced during the epitaxial growth process.

[0054] The undoped diamond epitaxial layer 2 is specifically a high-quality undoped diamond epitaxial layer. The high-quality undoped diamond epitaxial layer refers to a diamond epitaxial layer that not only does not introduce any impurities during the growth process, but also has excellent crystal quality and uniformity, thereby exhibiting excellent electrical, optical and thermal properties.

[0055] Specifically, the thickness of the undoped diamond epitaxial layer 2 may be 500 nm.

[0056] In the embodiment of the present invention, an isolation region is provided between the hydrogen / silicon composite termination E-mode device and the hydrogen termination D-mode device. The isolation region can physically isolate the electric field interference between the hydrogen / silicon composite termination E-mode device and the hydrogen termination D-mode device.

[0057] In the embodiment of the present invention, the hydrogen / silicon composite termination E-mode device and the hydrogen termination D-mode device respectively include a p-type doping region, a termination layer, a passivation layer and an electrode region in addition to a diamond substrate, wherein the electrode region further includes a source electrode, a gate electrode and a drain electrode.

[0058] Specifically, the terminal layer of the hydrogen / silicon composite terminal E-mode device is hydrogen / silicon composite terminal diamond, and the terminal layer of the hydrogen terminal D-mode device is the first hydrogen terminal diamond 9 .

[0059] See also Figure 3 , Figure 3 The energy band structure diagram of hydrogen-terminated diamond and silicon-terminated diamond under vacuum conditions. The energy band structure includes the conduction band CBM, the forbidden band, and the Fermi level E F and valence band VBM. Hydrogen-terminated diamond and silicon-terminated diamond have negative electron affinity (NEA), which is a physical quantity that measures the energy difference between the vacuum electron energy level and the bottom energy level of the conduction band. It reflects the difficulty of electrons moving from the conduction band to the vacuum energy level to become free electrons. Hydrogen- and silicon-terminated diamonds have NEA, which causes surface electrons to escape and forms a hole layer on the diamond surface; silicon is very easy to self-oxidize in the air, which reduces the NEA of silicon-terminated diamond after oxidation, which is conducive to the development of enhanced devices, i.e., E-mode devices. Therefore, in the embodiment of the present invention, the E-mode device is a hydrogen / silicon composite terminal E-mode device.

[0060] In the embodiment of the present invention, the E-mode device drain 11 of the hydrogen / silicon composite terminal E-mode device, the D-mode device source 14 of the hydrogen terminal D-mode device, and the D-mode device gate 17 of the hydrogen terminal D-mode device are interconnected through metal interconnection lines to form an inverter circuit structure.

[0061] In the embodiment of the present invention, the terminal layer in the hydrogen / silicon composite terminal E-mode device of the diamond high-speed inverter circuit adopts hydrogen / silicon composite terminal diamond. Since silicon and diamond in the silicon terminal diamond 7 in the hydrogen / silicon composite terminal diamond have the same cubic crystal structure, the silicon terminal diamond 7 has a better lattice matching effect and a lower interface state density. At the same time, the surface conductivity of the oxidized silicon terminal diamond 7 is low, which is also conducive to the realization of a high threshold voltage enhanced device. Based on this, the diamond high-speed inverter circuit provided by the embodiment of the present invention has higher performance, higher safety and higher response speed than the existing single hydrogen terminal diamond high-speed inverter circuit.

[0062] In one implementation, the hydrogen / silicon composite terminal E-mode device includes a diamond substrate, a first p-type heavily boron-doped diamond 3, a second p-type heavily boron-doped diamond 4, a hydrogen / silicon composite terminal diamond, an E-mode device source 10, an E-mode device drain 11, an E-mode device gate passivation layer 12 and an E-mode device gate 13.

[0063] In the embodiment of the present invention, the first p-type heavily boron-doped diamond 3 and the second p-type heavily boron-doped diamond 4 are superimposed on the upper surface of the diamond substrate. The lower surfaces of the first p-type heavily boron-doped diamond 3 and the second p-type heavily boron-doped diamond 4 are both deeply embedded in the diamond substrate, specifically in the non-doped diamond epitaxial layer 2 of the diamond substrate.

[0064] The p-type doped region of the hydrogen / silicon composite terminal E-mode device specifically refers to p-type heavily boron-doped diamond, namely, the first p-type heavily boron-doped diamond 3 and the second p-type heavily boron-doped diamond 4. The p-type heavily boron-doped diamond is formed by adding boron (B) elements to change the electrical properties of diamond to make it a p-type semiconductor material. Due to the addition of boron, some carbon atoms in the diamond crystal structure are replaced by boron atoms, resulting in the formation of additional positive charge carriers, so that the diamond exhibits p-type conductivity.

[0065] Specifically, the boron doping concentration of the first p-type heavily boron-doped diamond 3 and the second p-type heavily boron-doped diamond 4 is 1×10 20 cm -3 ~1×10 21 cm -3 The thickness of the first p-type heavily boron-doped diamond 3 and the second p-type heavily boron-doped diamond 4 are both in the range of 50 nm to 150 nm.

[0066] In the embodiment of the present invention, the hydrogen / silicon composite terminal diamond is superimposed on the upper surface of the diamond substrate and is located between the first p-type heavily boron-doped diamond 3 and the second p-type heavily boron-doped diamond 4, and a two-dimensional hole gas channel located at the interface of the hydrogen / silicon composite terminal diamond is formed in the diamond substrate. Specifically, the hydrogen / silicon composite terminal diamond includes a silicon terminal diamond 7 and a second hydrogen terminal diamond 8 located on both sides of the silicon terminal diamond 7. Among them, the hole concentration at the interface channel of the second hydrogen terminal diamond 8 is relatively high, and the hole concentration at the interface channel of the silicon terminal diamond 7 is relatively low.

[0067] Specifically, the thickness of the hydrogen / silicon composite terminal diamond is in the range of 0.2 nm to 1 nm.

[0068] The hydrogen / silicon composite terminated diamond provided in the embodiment of the present invention may specifically be a (001) face hydrogen / silicon composite terminated diamond, see Figure 4 , Figure 4 Schematic diagram of the atomic configuration of the (001) plane hydrogen / silicon composite terminal diamond structure provided by an embodiment of the present invention. Figure 4 The left side in the middle shows the 3×1 structure of (001) face silicon terminated diamond. Figure 4 The middle right side shows the 2×1 structure of (001) plane hydrogen-terminated diamond.

[0069] See also Figure 1 and Figure 2 The electrode area of ​​the hydrogen / silicon composite terminal E-mode device specifically includes an E-mode device source 10, an E-mode device drain 11 and an E-mode device gate 13. Among them, the E-mode device drain 11 is used to establish a connection with the hydrogen terminal D-mode device, the E-mode device source 10 is used to ground GND, and the E-mode device gate 13 is used to connect the input voltage V inBy changing the input voltage of the gate 13 of the E-mode device, the conductive properties of the device can be controlled.

[0070] The source electrode 10 of the E-mode device is superimposed on the first p-type heavily boron-doped diamond 3 to form an ohmic contact at the contact interface; the drain electrode 11 of the E-mode device is superimposed on the second p-type heavily boron-doped diamond 4 to form an ohmic contact at the contact interface.

[0071] An E-mode device gate passivation layer 12 is disposed between the E-mode device gate 13 and the hydrogen / silicon composite terminal diamond. Specifically, the E-mode device gate passivation layer 12 is disposed on the upper surface of the hydrogen / silicon composite terminal diamond and extends to both sides to cover a portion of the upper surface of the first p-type heavily boron-doped diamond 3 and the second p-type heavily boron-doped diamond 4.

[0072] The gate passivation layer 12 of the E-mode device can be used to isolate the gate 13 of the E-mode device from the hydrogen / silicon composite terminal diamond to avoid leakage. The material of the gate passivation layer 12 of the E-mode device is a metal oxide, specifically Al2O3 (aluminum oxide), with a thickness ranging from 20nm to 100nm, extending to both sides to cover the upper surface of the first p-type heavily boron-doped diamond 3 and the second p-type heavily boron-doped diamond 4 by 1μm-2μm.

[0073] The E-mode device gate 13 is superimposed on the E-mode device gate passivation layer 12 , and forms a metal / insulator structure with the E-mode device gate passivation layer 12 .

[0074] In the embodiment of the present invention, the source 10 and the drain 11 of the E-mode device are both formed by stacking Ti (titanium) and Au (gold) in sequence from bottom to top, and the material of the gate 13 of the E-mode device is Al (aluminum).

[0075] The thickness of the source 10 and the drain 11 of the E-mode device are both in the range of 100nm to 130nm, and the thickness of the gate 13 of the E-mode device is in the range of 50nm to 150nm. Specifically, for example, the thickness of Ti in the source 10 and the drain 11 of the E-mode device can be 30nm, and the thickness of Au in the source 10 and the drain 11 of the E-mode device can be 100nm.

[0076] In one implementation, the hydrogen-terminated D-mode device includes a diamond substrate, a third p-type heavily boron-doped diamond 5, a fourth p-type heavily boron-doped diamond 6, a first hydrogen-terminated diamond 9, a D-mode device source 14, a D-mode device drain 15, a D-mode device gate passivation layer 16 and a D-mode device gate 17.

[0077] In the embodiment of the present invention, the p-type doped region of the hydrogen terminal D-mode device specifically refers to p-type heavy boron doped diamond, that is, the third p-type heavy boron doped diamond 5 and the fourth p-type heavy boron doped diamond 6. The third p-type heavy boron doped diamond 5 and the fourth p-type heavy boron doped diamond 6 are superimposed on the upper surface of the diamond substrate. The lower surfaces of the third p-type heavy boron doped diamond 5 and the fourth p-type heavy boron doped diamond 6 are both deep in the diamond substrate, specifically in the non-doped diamond epitaxial layer 2 of the diamond substrate.

[0078] Specifically, the boron doping concentration of the third p-type heavily boron-doped diamond 5 and the fourth p-type heavily boron-doped diamond 6 is 1×10 20 cm -3 ~1×10 21 cm -3 The thickness of the third p-type heavily boron-doped diamond 5 and the fourth p-type heavily boron-doped diamond 6 are both in the range of 50 nm to 150 nm.

[0079] In the embodiment of the present invention, the first hydrogen-terminated diamond 9 is superimposed on the upper surface of the diamond substrate and is located between the third p-type heavily boron-doped diamond 5 and the fourth p-type heavily boron-doped diamond 6, and a two-dimensional hole gas channel is formed in the diamond substrate layer at the interface of the first hydrogen-terminated diamond 9.

[0080] Specifically, the thickness of the first hydrogen-terminated diamond 9 is in the range of 0.2 nm to 1 nm.

[0081] See also Figure 1 and Figure 2 The electrode region of the hydrogen-terminated D-mode device specifically includes a D-mode device source 14, a D-mode device drain 15, and a D-mode device gate 17. Among them, the D-mode device source 14 and the D-mode device gate 17 of the hydrogen-terminated D-mode device are interconnected with the E-mode device drain 11 to finally generate an output voltage V out , the D-mode device drain 15 is connected to the power supply voltage V DD .

[0082] The source electrode 14 of the D-mode device is superimposed on the third p-type heavily boron-doped diamond 5 to form an ohmic contact at the contact interface; the drain electrode 15 of the D-mode device is superimposed on the fourth p-type heavily boron-doped diamond 6 to form an ohmic contact at the contact interface.

[0083] A D-mode device gate passivation layer 16 is disposed between the D-mode device gate 17 and the hydrogen-terminated diamond. Specifically, the D-mode device gate passivation layer 16 is disposed on the upper surface of the first hydrogen-terminated diamond 9 and extends to both sides to cover a portion of the upper surface of the third p-type heavily boron-doped diamond 5 and the fourth p-type heavily boron-doped diamond 6.

[0084] The D-mode device gate passivation layer 16 can be used to isolate the D-mode device gate 17 from the first hydrogen-terminated diamond 9 to prevent leakage. The material of the D-mode device gate passivation layer 16 is a metal oxide, specifically Al2O3 (aluminum oxide), with a thickness ranging from 20nm to 100nm, extending to both sides to cover the upper surface of the third p-type heavily boron-doped diamond 5 and the fourth p-type heavily boron-doped diamond 6 by 1μm-2μm.

[0085] The D-mode device gate 17 is superimposed on the D-mode device gate passivation layer 16 , and forms a metal / insulator structure with the D-mode device gate passivation layer 16 .

[0086] In the embodiment of the present invention, the D-mode device source 14 and the D-mode device drain 15 are both formed by stacking Ti (titanium) and Au (gold) in sequence from bottom to top, and the material of the D-mode device gate 17 is Al (aluminum).

[0087] The thickness of the D-mode device source 14 and the D-mode device drain 15 are both in the range of 100nm to 130nm, and the thickness of the D-mode device gate 17 is in the range of 50nm to 150nm. For example, the thickness of Ti in the D-mode device source 14 and the D-mode device drain 15 can be 30nm, and the thickness of Au in the D-mode device source 14 and the D-mode device drain 15 can be 100nm.

[0088] In one implementation, the diamond high-speed inverter circuit further includes an oxygen-terminated diamond isolation layer 18 and a passivation dielectric layer 19. The oxygen-terminated diamond isolation layer 18 is located at both ends of the upper surface of the diamond substrate and in the isolation region, and the passivation dielectric layer 19 is located on the oxygen-terminated diamond isolation layer 18 in the isolation region and extends to cover the upper surface of the E-mode device drain 11 of the hydrogen / silicon composite terminal E-mode device and the D-mode device source 14 of the hydrogen terminal D-mode device. The oxygen-terminated diamond isolation layer 18 and the passivation dielectric layer 19 both play a role in device isolation.

[0089] It should be noted that the passivation dielectric layer 19 does not completely cover the upper surface of the E-mode device drain 11 and the D-mode device source 14, but forms through holes on the upper surface of the E-mode device drain 11 and the D-mode device source 14 for leading out connecting wires.

[0090] Specifically, the thickness of the oxygen-terminated diamond is in the range of 0.2 nm to 0.5 nm, and the thickness of the passivation dielectric layer 19 is in the range of 20 nm to 100 nm. The material of the passivation dielectric layer 19 is Al2O3.

[0091] The embodiment of the present invention provides a method for preparing a diamond high-speed inverter circuit. Figure 5 , Figure 5 1 is a flow chart of a method for preparing a diamond high-speed inverter circuit provided by an embodiment of the present invention, and the specific steps are as follows:

[0092] Step S501 , epitaxially growing a non-doped diamond epitaxial layer 2 on the upper surface of a single crystal diamond substrate 1 to form a diamond substrate.

[0093] First, a single crystal diamond substrate 1 is selected. The selected single crystal diamond substrate 1 may be 3×3×0.5 mm 3 Type Ib (001) oriented single crystal diamond substrate.

[0094] See also Figure 6 , Figure 6 FIG. 1 is a diagram of a process for preparing a diamond high-speed inverter circuit provided by an embodiment of the present invention. A high-quality diamond layer with a low impurity content is epitaxially grown on a single crystal diamond substrate 1 to obtain a non-doped diamond epitaxial layer 2. Figure 6 (a) in the figure, a diamond substrate is thus formed.

[0095] In the embodiment of the present invention, the epitaxially grown non-doped diamond epitaxial layer 2 is obtained by obtaining a 500 nm thick non-doped diamond layer by microwave plasma chemical vapor deposition (MPCVD) method, and then subjecting the substrate to hot mixed acid, organic cleaning and other treatments.

[0096] The reason for selecting the MPCVD method to homoepitaxially grow a single crystal diamond layer to obtain the non-doped diamond epitaxial layer 2 is that the MPCVD method has the advantages of no electrode pollution, high plasma density, and easy size control, and is currently internationally recognized as the best method for growing high-quality single crystal diamond. In this way, a high-purity diamond substrate that meets the application of electronic devices can be synthesized simply and efficiently by the MPCVD method.

[0097] In an embodiment of the present invention, typical experimental parameters for homoepitaxially growing a non-doped diamond epitaxial layer 2 by MPCVD include: H2 (hydrogen) flow rate of 392sccm, CH4 (methane) flow rate of 3sccm, CO2 (carbon dioxide) flow rate of 3sccm, microwave power of 750W, pressure of 35Torr and temperature of 600°C.

[0098] Step S502, preparing a hydrogen / silicon composite terminal E-mode device, a hydrogen terminal D-mode device, and an isolation region between the hydrogen / silicon composite terminal E-mode device and the hydrogen terminal D-mode device; wherein the hydrogen / silicon composite terminal E-mode device and the hydrogen terminal D-mode device share a diamond substrate; the terminal layer of the hydrogen / silicon composite terminal E-mode device is a hydrogen / silicon composite terminal diamond; the terminal layer of the hydrogen terminal D-mode device is a first hydrogen terminal diamond 9; the hydrogen / silicon composite terminal diamond and the first hydrogen terminal diamond 9 are prepared simultaneously by growing a silicon terminal diamond 7 on a diamond substrate, and then performing hydrogenation treatment using mask etching and MPCVD (Microwave Plasma Chemical Vapor Deposition) processes.

[0099] The specific process of preparing hydrogen / silicon composite terminal E-mode devices and hydrogen terminal D-mode devices is described below:

[0100] a) Prepare a Ti / Au mask on the upper surface of a diamond substrate.

[0101] The Ti / Au mask is a layer of Ti / Au metal film deposited by electron beam evaporation technology with the assistance of photolithography technology. The thickness of Ti is about 30nm and the thickness of Au is about 100nm. The metal film acts as a mask in the subsequent p++-Diamond (heavily doped diamond) selective growth step. Then annealing in a H2 atmosphere at 500℃ for 30min allows the Ti / diamond interface to form a TiC (titanium carbide) metal compound to improve the stability of the metal mask / diamond interface.

[0102] b) performing dry etching on the diamond surface.

[0103] Dry etching refers to the use of inductively coupled plasma reactive ion etching (ICPRIE) to etch the diamond area outside the Ti / Au mask. The etching gas is O2 (oxygen) and the etching depth is 40nm. The purpose is to make the subsequently grown p++-Diamond and the channel part have better contact characteristics.

[0104] c) growing heavily boron-doped p-type diamond in the diamond surface etched area, ie, the source and drain regions of the device.

[0105] The heavily doped ohmic contact technology is a reliable and industrially applicable device ohmic contact process that can reduce the device on-resistance and increase the device output current. The heavily boron-doped p-type diamond grown in the source and drain regions of the device is grown by placing the sample in an MPCVD device. The thickness of the heavily boron-doped p-type diamond film is about 150nm, and the boron doping concentration ranges from about 1×10 20 cm -3 ~1×1021 cm -3 This area is used to form an ohmic contact with the metal source and drain when they are subsequently prepared.

[0106] In the embodiment of the present invention, the specific process of growing heavily boron-doped p-type diamond is as follows:

[0107] First, H2 gas was introduced. When the cavity pressure was stabilized at 110 Torr, the microwave power generator was turned on and the plasma was ignited. After the plasma state was stable, TMB (trimethylborane) and CH4 gas were introduced successively. The processing time was 9 minutes starting from the introduction of CH4 gas. After the MPCVD treatment was completed, the sample was taken out to complete the growth of heavily boron-doped p-type diamond.

[0108] d) After removing the Ti / Au mask, perform surface hydrogenation treatment.

[0109] The Ti / Au mask can be completely removed by the same hot mixed acid treatment in the diamond substrate processing step, leaving a clean diamond surface, thereby forming a first p-type heavily boron-doped diamond 3, a second p-type heavily boron-doped diamond 4, a third p-type heavily boron-doped diamond 5 and a fourth p-type heavily boron-doped diamond 6, see Figure 6 (b) in .

[0110] Surface hydrogenation treatment refers to transferring the sample to an MPCVD device for hydrogen plasma treatment to form a hydrogen-terminated surface. The purpose is to convert the oxygen terminals on the diamond surface into hydrogen terminals to prevent Si atoms from bonding with O (oxygen) atoms instead of C (carbon) atoms when depositing Si (silicon) to prepare silicon terminals in the subsequent steps.

[0111] e) Preparing silicon-terminated diamond 7 on the upper surface of the diamond substrate.

[0112] The diamond substrate sample prepared with p-type heavily boron-doped diamond was placed in an ultra-high vacuum system equipped with a Si sublimation source to prepare silicon-terminated diamond 7, see Figure 6 (c) in the figure. First, the sample was heated at 450°C for 30 minutes to remove adsorbents on the surface of the hydrogen-terminated diamond. When the sample temperature returned to room temperature, Si molecular beam deposition was performed on the diamond surface. The thickness of the deposited Si film was 0.5nm. After the deposition, the sample was in-situ vacuum annealed at 920°C for 15 minutes. Through this treatment, the C (carbon) in the diamond reacted with the deposited Si to form a C-Si structure, and was instantly oxidized by oxygen in the air environment to form a C-Si-O (oxygen) silicon-terminated diamond structure, as shown in FIG. Figure 4As shown. Since the C-Si-O structure also has negative electron affinity, after the electrons on the silicon terminal surface escape, in order to meet the electrical neutrality, a hole channel located on the surface of the silicon terminal diamond 7 will be formed in the above-mentioned homoepitaxial undoped diamond.

[0113] f) Preparing a SiO2 mask in the gate region of the hydrogen / silicon composite terminal E-mode device.

[0114] In the embodiment of the present invention, a SiO2 mask can be prepared by magnetron sputtering with the assistance of a photolithography process, and the mask thickness is 100 nm.

[0115] g) Partially etching the silicon-terminated diamond 7 and hydrogen-terminated preparation.

[0116] The C-Si-O surface outside the SiO2 covered area was removed by a fluorine-based inductively coupled plasma reactive ion method to obtain silicon-terminated diamond 7, see Figure 6 (d) in the figure. The specific etching conditions of fluorine-based inductively coupled plasma reactive ion etching are: RF power of 30 W and etching time of 2 s.

[0117] The sample is then transferred to an MPCVD device for hydrogen plasma treatment to form a hydrogen-terminated surface, including a first hydrogen-terminated diamond 9 of a hydrogen-terminated D-mode device and a second hydrogen-terminated diamond 8 of a hydrogen / silicon composite-terminated E-mode device, see Figure 6 (e) in the figure. Since the CH (hydrogen) structure has a negative electron affinity, after the electrons escape from the hydrogen-terminated surface, a two-dimensional hole gas channel will be formed on the hydrogen-terminated diamond surface in order to meet the electrical neutrality.

[0118] h) HF (hydrogen fluoride) removes the above SiO2 mask.

[0119] In order to remove the SiO2 mask of the active area, the sample was immersed in 20% HF acid for 1 hour and then ultrasonically cleaned in deionized water for 30 minutes.

[0120] i) Convert hydrogen terminals to oxygen terminals for device isolation.

[0121] By etching with oxygen plasma, the hydrogen terminals at both ends of the upper surface of the diamond substrate and in the isolation region between the second p-type heavily boron-doped diamond 4 and the third p-type heavily boron-doped diamond 5 are converted into oxygen terminals. Figure 6 (f) in the figure. The equipment used is a reactive ion etcher (RIE), the gas flow rate during the etching process is 80 sccm, the etching power is 100 W, the etching depth is 10 nm, and the etching time is 5 min.

[0122] j) Prepare source and drain electrodes.

[0123] In the embodiments of the present invention, see Figure 6 In (g), the prepared metal source and drain are Ti / Au metal layers prepared by electron beam evaporation, and in this process, the E-mode device source 10 and the E-mode device drain 11 of the hydrogen / silicon composite terminal E-mode device and the D-mode device source 14 and the D-mode device drain 15 of the hydrogen terminal D-mode device are prepared at the same time. Among them, the thickness of Ti can be 30nm, and the thickness of Au can be 100nm.

[0124] l) Deposit the passivation layer and open the window.

[0125] In one embodiment of the present invention, the deposited passivation layer refers to an Al2O3 thin film deposited on the sample surface at 300°C using an atomic layer deposition method (ALD) to obtain a gate passivation layer and a device passivation dielectric layer 19 of an E / D mode device, specifically including an E-mode device gate passivation layer 12, a D-mode device gate passivation layer 16 and a passivation dielectric layer 19, see Figure 6 (h) in the figure. The film thickness may be 20 nm. Specifically, the deposition conditions include: the deposition temperature is 300° C. Subsequently, the Al2O3 film is subjected to a wet etching windowing process to form a through hole on the upper surface of the drain 11 of the E-mode device and the source 14 of the D-mode device for leading out the metal interconnection line.

[0126] m) Prepare a metal gate.

[0127] In the embodiment of the present invention, the prepared metal gate is specifically an Al film with a thickness of 100 nm prepared by resistive heating vacuum evaporation. In this process, the E-mode device gate 13 of the hydrogen / silicon composite terminal E-mode device and the D-mode device gate 17 of the hydrogen terminal D-mode device are simultaneously prepared. Figure 6 (i) in .

[0128] Step S503 , interconnecting the E-mode device drain 11 of the hydrogen / silicon composite termination E-mode device, the D-mode device source 14 of the hydrogen termination D-mode device, and the D-mode device gate 17 of the hydrogen termination D-mode device through metal interconnection lines.

[0129] In the embodiment of the present invention, metal leads are prepared on the surface of the device, and the drain electrode 11 of the E-mode device of the hydrogen / silicon composite terminal E-mode device, the source electrode 14 of the D-mode device of the hydrogen terminal D-mode device, and the gate electrode 17 of the D-mode device of the hydrogen terminal D-mode device are interconnected through metal interconnection lines to complete the preparation of the diamond high-speed inverter circuit provided by the embodiment of the present invention. Figure 1 This step can be performed simultaneously with the preparation of the metal electrode.

[0130] In the embodiment of the present invention, the terminal layer in the hydrogen / silicon composite terminal E-mode device of the diamond high-speed inverter circuit adopts hydrogen / silicon composite terminal diamond. Since silicon and diamond in the silicon terminal diamond 7 in the hydrogen / silicon composite terminal diamond have the same cubic crystal structure, the silicon terminal diamond 7 has a better lattice matching effect and a lower interface state density. At the same time, the surface conductivity of the oxidized silicon terminal diamond 7 is low, which is also conducive to the realization of a high threshold voltage enhanced device. Based on this, the diamond high-speed inverter circuit provided by the embodiment of the present invention has higher performance, higher safety and higher response speed than the existing single hydrogen terminal diamond high-speed inverter circuit.

[0131] It should be noted that in the embodiment of the present invention, the steps of etching the silicon-terminated diamond 7 outside the SiO2 mask and using MPCVD hydrogenation treatment to form the hydrogen-terminated diamond, including the first hydrogen-terminated diamond 9 and the second hydrogen-terminated diamond 8, are the core process of simultaneously preparing the hydrogen / silicon composite terminal diamond E-mode device and the hydrogen-terminated diamond D-mode device and forming the E / D-mode inverter circuit.

[0132] It should be noted that the terms "first", "second", etc. are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchangeable where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present invention. Instead, they are merely examples of devices and methods consistent with some aspects of the present invention.

[0133] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "example", "specific example", or "some examples" etc. means that the specific features or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features or characteristics described may be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art may combine and combine the different embodiments or examples described in this specification.

[0134] Although the present invention is described herein in conjunction with various embodiments, in the process of implementing the claimed invention, those skilled in the art can understand and implement other changes to the disclosed embodiments by viewing the drawings and the disclosed content. In the description of the present invention, the term "comprising" does not exclude other components or steps, "one" or "an" does not exclude multiple situations, and "multiple" means two or more, unless otherwise clearly and specifically limited. In addition, certain measures are recorded in different embodiments, but this does not mean that these measures cannot be combined to produce good results.

[0135] In the description of the present invention, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise" and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the referred device or element must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as limiting the present invention.

[0136] In the present invention, unless otherwise clearly specified and limited, the terms "installed", "connected", "connected", "fixed" and the like should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0137] In the present invention, unless otherwise clearly specified and limited, a first feature being "above" or "below" a second feature may include that the first and second features are in direct contact, or may include that the first and second features are not in direct contact but are in contact through another feature between them. Moreover, a first feature being "above", "above" and "above" a second feature includes that the first feature is directly above and obliquely above the second feature, or simply indicates that the first feature is higher in level than the second feature. A first feature being "below", "below" and "below" a second feature includes that the first feature is directly below and obliquely below the second feature, or simply indicates that the first feature is lower in level than the second feature.

[0138] The above contents are further detailed descriptions of the present invention in combination with specific preferred embodiments, and it cannot be determined that the specific implementation of the present invention is limited to these descriptions. For ordinary technicians in the technical field to which the present invention belongs, several simple deductions or substitutions can be made without departing from the concept of the present invention, which should be regarded as falling within the scope of protection of the present invention.

Claims

1. A diamond high-speed inverter circuit, characterized in that: The diamond high-speed inverter comprises: A hydrogen / silicon composite terminal E-mode device and a hydrogen terminal D-mode device; the hydrogen / silicon composite terminal E-mode device and the hydrogen terminal D-mode device share a diamond substrate; the diamond substrate comprises a single crystal diamond substrate and a non-doped diamond epitaxial layer superimposed on the single crystal diamond substrate; the terminal layer of the hydrogen / silicon composite terminal E-mode device is a hydrogen / silicon composite terminal diamond; the terminal layer of the hydrogen terminal D-mode device is a first hydrogen terminal diamond; An isolation region is provided between the hydrogen / silicon composite termination E-mode device and the hydrogen termination D-mode device; The E-mode device drain of the hydrogen / silicon composite termination E-mode device, the D-mode device source of the hydrogen termination D-mode device, and the D-mode device gate of the hydrogen termination D-mode device are interconnected through metal interconnection lines.

2. The diamond high-speed inverter circuit according to claim 1, characterized in that: The hydrogen / silicon composite terminal E-mode device comprises: Diamond substrate; A first p-type heavily boron-doped diamond and a second p-type heavily boron-doped diamond are superimposed on the upper surface of the diamond substrate; the lower surfaces of the first p-type heavily boron-doped diamond and the second p-type heavily boron-doped diamond are both deeply embedded in the diamond substrate; A hydrogen / silicon composite terminal diamond superimposed on the upper surface of the diamond substrate and located between the first p-type heavily boron-doped diamond and the second p-type heavily boron-doped diamond; two sides of the hydrogen / silicon composite terminal diamond are in contact with the first p-type heavily boron-doped diamond and the second p-type heavily boron-doped diamond respectively; the hydrogen / silicon composite terminal diamond includes a silicon terminal diamond and a second hydrogen terminal diamond located on both sides of the silicon terminal diamond; An E-mode device source electrode; the E-mode device source electrode is superimposed on the first p-type heavily boron-doped diamond; An E-mode device drain; the E-mode device drain is superimposed on the second p-type heavily boron-doped diamond; An E-mode device gate passivation layer; the E-mode device gate passivation layer is arranged on the upper surface of the hydrogen / silicon composite terminal diamond and extends to both sides to cover a portion of the upper surface of the first p-type heavily boron-doped diamond and the second p-type heavily boron-doped diamond; An E-mode device gate; the E-mode device gate is superimposed on the E-mode device gate passivation layer.

3. The diamond high-speed inverter circuit according to claim 2, characterized in that: The boron doping concentration of the first p-type heavily boron-doped diamond and the second p-type heavily boron-doped diamond is 1×10 20 cm -3 ~1×10 21 cm -3 ; The source electrode and the drain electrode of the E-mode device are both formed by stacking Ti and Au in sequence from bottom to top; the material of the gate passivation layer of the E-mode device is Al2O3; the material of the gate of the E-mode device is Al.

4. The diamond high-speed inverter circuit according to claim 2, characterized in that: The thickness range of the first p-type heavily boron-doped diamond and the second p-type heavily boron-doped diamond are both 50nm to 150nm; the thickness range of the hydrogen / silicon composite terminal diamond is 0.2nm to 1nm; the thickness range of the E-mode device source and the E-mode device drain are both 100nm to 130nm; the thickness range of the E-mode device gate passivation layer is 20nm to 100nm; the thickness range of the E-mode device gate is 50nm to 150nm.

5. The diamond high-speed inverter circuit according to claim 1, characterized in that: The hydrogen terminal D-mode device comprises: Diamond substrate; A third p-type heavily boron-doped diamond and a fourth p-type heavily boron-doped diamond are superimposed on the upper surface of the diamond substrate; lower surfaces of the third p-type heavily boron-doped diamond and the fourth p-type heavily boron-doped diamond are both deeply embedded in the diamond substrate; A first hydrogen-terminated diamond superimposed on the upper surface of the diamond substrate and located between the third p-type heavily boron-doped diamond and the fourth p-type heavily boron-doped diamond; both sides of the first hydrogen-terminated diamond are in contact with the third p-type heavily boron-doped diamond and the fourth p-type heavily boron-doped diamond respectively; D-mode device source; the D-mode device source is superimposed on the third p-type heavily boron-doped diamond; D-mode device drain; the D-mode device drain is superimposed on the fourth p-type heavily boron-doped diamond; A D-mode device gate passivation layer; the D-mode device gate passivation layer is arranged on the upper surface of the first hydrogen-terminated diamond and extends to both sides to cover a portion of the upper surfaces of the third p-type heavily boron-doped diamond and the fourth p-type heavily boron-doped diamond; D-mode device gate; the D-mode device gate is superimposed on the D-mode device gate passivation layer.

6. The diamond high-speed inverter circuit according to claim 5, characterized in that: The boron doping concentration of the third p-type heavily boron-doped diamond and the fourth p-type heavily boron-doped diamond is 1×10 20 cm -3 ~1×10 21 cm -3 ; The source electrode of the D-mode device and the drain electrode of the D-mode device are both formed by stacking Ti and Au in sequence from bottom to top; the material of the gate passivation layer of the D-mode device is Al2O3; the material of the gate electrode of the D-mode device is Al.

7. The diamond high-speed inverter circuit according to claim 5, characterized in that: The thickness range of the third p-type heavily boron-doped diamond and the fourth p-type heavily boron-doped diamond are both 50nm to 150nm; the thickness range of the first hydrogen-terminated diamond is 0.2nm to 1nm; the thickness range of the D-mode device source and the D-mode device drain are both 100nm to 130nm; the thickness range of the D-mode device gate passivation layer is 20nm to 100nm; the thickness range of the D-mode device gate is 50nm to 150nm.

8. The diamond high-speed inverter circuit according to claim 1, characterized in that: The diamond high-speed inverter circuit further includes an oxygen-terminated diamond isolation layer and a passivation dielectric layer; the oxygen-terminated diamond isolation layer is located at both ends of the upper surface of the diamond substrate and in the isolation region; The passivation dielectric layer is located on the oxygen-terminated diamond isolation layer in the isolation region and extends to cover the upper surfaces of the E-mode device drain of the hydrogen / silicon composite-terminated E-mode device and the D-mode device source of the hydrogen-terminated D-mode device.

9. The diamond high-speed inverter circuit according to claim 8, characterized in that: The material of the passivation dielectric layer is Al2O3.

10. A method for preparing a diamond high-speed inverter circuit, characterized in that: The preparation method comprises: epitaxially growing a non-doped diamond epitaxial layer on the upper surface of a single crystal diamond substrate to form a diamond substrate; A hydrogen / silicon composite terminal E-mode device, a hydrogen terminal D-mode device, and an isolation region between the hydrogen / silicon composite terminal E-mode device and the hydrogen terminal D-mode device are prepared; wherein the hydrogen / silicon composite terminal E-mode device and the hydrogen terminal D-mode device share the diamond substrate; the terminal layer of the hydrogen / silicon composite terminal E-mode device is a hydrogen / silicon composite terminal diamond; the terminal layer of the hydrogen terminal D-mode device is a first hydrogen terminal diamond; the hydrogen / silicon composite terminal diamond and the first hydrogen terminal diamond are prepared simultaneously by growing silicon terminal diamond on the diamond substrate and then performing hydrogenation treatment using mask etching and MPCVD processes; The drain of the E-mode device of the hydrogen / silicon composite termination E-mode device, the source of the D-mode device of the hydrogen termination D-mode device and the gate of the D-mode device of the hydrogen termination D-mode device are interconnected through metal interconnection lines.

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