Nanoscale failure analysis method

By depositing the protective layer in the FIB machine table and removing the protective layer on the nanoprobe table for electrical testing, the problem of metal diffusion of the sample is solved, and the failure location is quickly and accurately found, saving time and workload, and improving analysis accuracy.

CN119595684APending Publication Date: 2025-03-11SHANGHAI HUALI MICROELECTRONICS CORP
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Patent Information

Application Number
CN202311167439.9
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2023-09-11
Publication Date
2025-03-11

AI Technical Summary

Technical Problem

The existing nano-scale failure analysis method. During the transfer of samples from the FIB machine to the nanoprobe table, the metal is very easy to diffuse, resulting in the inability to confirm the electrical characteristics of the failure bit line and the reference bit line, the failure range cannot be narrowed through dichotomy, and it depends on the time-consuming and labor-consuming SEM high voltage to find defects, making it difficult to ensure the flatness of the sample.

Method used

An electron beam is used to deposit a protective layer in the FIB machine table to prevent metal diffusion. Then remove the protective layer on the nanoprobe table and conduct electrical testing. The target area is gradually reduced through the cycle steps, and the failure position is quickly found using the electrical testing of the nanoprobe table.

Benefits of technology

It effectively prevents metal diffusion, ensures the accuracy of electrical properties, shortens failure analysis time, reduces workload, and improves the accuracy and efficiency of analysis.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention discloses a nanoscale failure analysis method, which comprises the following steps: step 1, placing a first sample to be analyzed on a sample table of an FIB machine table, cutting a selected area of the first sample by utilizing an ion beam in the FIB machine table to form a first cross section, and exposing a metal pattern on the first cross section; and 2, depositing a protective layer on the first cross section by using an electron beam of the FIB machine. And step 3, the first sample is transferred to the nano probe station, and the protective layer is used for protecting the metal pattern and preventing metal diffusion in the transfer process. And 4, carrying out surface micro-treatment on the first sample by using an ion source in the nano probe station to remove the protective layer and expose the metal pattern. And step 5, performing needle insertion on the metal pattern by the nano probe station and realizing an electrical property test. According to the invention, the nano probe station can be adopted to carry out cross-section lower probe test on the sample, and meanwhile, metal diffusion can be prevented in the sample transfer process.
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Description

Technical Field

[0001] The invention relates to a semiconductor integrated circuit manufacturing method, in particular to a nanometer-level failure analysis method. Background Art

[0002] Nano Prober is a nano probe system integrated with a scanning electron microscope (SEM). It can perform nano-level failure analysis on devices in integrated circuit chips, such as electrical characteristic parameter measurement, nano-level open circuit and short circuit failure location, etc. It can also perform micro-processing on the sample surface, such as removing the residual oxide layer on the sample surface. Currently, test samples can be divided into plane samples and cross-sectional samples. For most conventional samples, electrical testing can be completed by inserting a probe on the plane; for some special samples with uneven metal patterns or long target areas, a certain height difference will be formed during grinding, so cross-sectional testing is more appropriate.

[0003] For example, in flash memory such as Nor Flash, there is a short fail case of bit line (BL). The addresses of the two shorted BLs are known, that is, the addresses of the two shorted BLs can be determined by testing the chip. However, since the length of the BL can be very long, such as hundreds of microns, it is necessary to find the defect that causes the two BLs to bridge in the target area of ​​hundreds of microns, and it is unknown which layer the defect is in.

[0004] To address the above bit line short circuit problem, the existing nanoscale failure analysis method is to first use a focused ion beam (FIB) cross section to dig a hole at one end of the target area of ​​the sample to expose the metal pattern, then continuously confirm the electrical properties and narrow the scope through nanoprobe testing and dichotomy, and finally shorten the area length to a few microns before using SEM high-voltage viewing or TEM physical property analysis to accurately locate the defect.

[0005] Problems faced by existing nanoscale failure analysis methods include:

[0006] 1. The metal of Nor Flash products is very easy to diffuse, including copper. When transferring the sample from the FIB machine to the nanoprobe station, the metal on the sample cross section has already diffused seriously, such as Figure 1A and Figure 1B As shown; among them, Figure 1A This is a SEM picture of a cross section of a sample after cutting in a FIB machine in an existing nano-level failure analysis method; it can be seen that the target area 101 is located on the cross section after cutting. Figure 1A The metal pattern on the middle cross section is the bit line 102. Figure 1AThe bit line 102 shown in FIG. 1 is only a side view of the bit line 102. Figure 1A , a top surface 102a of the bit line 102 is also shown in the upper part of the cross section. Figure 1B This is a SEM picture of the cross section after the sample is transferred to the nanoprobe station in the existing nano-level failure analysis method; defect 103 is a short-circuit defect caused by Cu diffusion; Figure 1B The middle bottom area 104 is Figure 1A A magnified view of the area near the defect 103.

[0007] 2. Metal diffusion will cause all metals to bridge together, making it impossible to confirm the electrical characteristics of the failed bit line pair (fail twin BL) and the reference bit line pair (ref twin BL).

[0008] 3. It is not possible to further narrow the scope of failure through dichotomy.

[0009] 4. Defects can only be found by SEM high pressure, which is time-consuming, labor-intensive and difficult to find;

[0010] 5. The target area is long, and it is difficult to ensure the flatness of the sample without targeted manual grinding. Summary of the invention

[0011] The technical problem to be solved by the present invention is to provide a nanoscale failure analysis method, which can use a nanoprobe station to perform cross-sectional needle testing on a sample, and at the same time prevent the metal exposed on the cross section from diffusing during the process of transferring the sample to the nanoprobe station, so that the range of the target area containing the failure position can be continuously narrowed through the electrical test of the nanoprobe station, so that the failure position can be found quickly, saving failure analysis time and workload, reducing the difficulty of finding the failure position and failure structure and improving the accuracy of failure analysis.

[0012] In order to solve the above technical problems, the nanoscale failure analysis method provided by the present invention comprises the following steps:

[0013] Step 1: provide a first sample to be analyzed, place the first sample on a sample stage of a FIB machine, use an ion beam in the FIB machine to cut a selected area of ​​the first sample and form a first cross section, and expose a metal pattern on the first cross section.

[0014] Step 2: Depositing a protective layer on the first cross section using the electron beam of the FIB machine.

[0015] Step three: transferring the first sample to a nanoprobe station. During the transfer process, the protective layer is used to protect the metal pattern and prevent metal diffusion.

[0016] Step 4: Use the ion source in the nanoprobe station to perform surface microprocessing on the first sample to remove the protective layer and expose the metal pattern.

[0017] Step 5: The nanoprobe station punctures the metal pattern and performs electrical testing.

[0018] A further improvement is that, in step one, after the first sample is placed on the sample stage, the sample stage is placed at the height of the common focus point of the ion beam and the electron beam.

[0019] A further improvement is that in step one, after placing the sample stage at the height of the common focus of the ion beam and the electron beam and before performing the cutting, it also includes setting the angle of the sample stage to a first angle, and the first angle is between -38 degrees and 52 degrees.

[0020] A further improvement is that in step 2, before depositing the protective layer, the angle of the sample stage is also set to a second angle.

[0021] A further improvement is that the second angle is 38 degrees counterclockwise rotated on the basis of the first angle, so that the direction of the electron beam is perpendicular to the first cross section.

[0022] A further improvement is that in step 2, the material of the protective layer includes silicon dioxide.

[0023] A further improvement is that in step 2, the thickness of the protective layer is 0.03 micrometer to 0.07 micrometer.

[0024] A further improvement is that in step three, after transferring the first sample to the nanoprobe station, a metal diffusion test is also performed to verify that the metal diffusion has not occurred; if the metal diffusion test finds that the metal diffusion has occurred, the thickness of the protective layer is increased in the next step two.

[0025] A further improvement is that steps one to five form a set of cyclic steps, and in the nanoscale failure analysis method, multiple sets of the cyclic steps are performed until the failure position is found in the first sample.

[0026] A further improvement is that, in step 1, the selected area of ​​the first sample is set according to the target area, the target area is the minimum analysis area including the failure position confirmed before step 1; the first cross section is greater than or equal to the projection area of ​​the target area on the first cross section, so that the metal pattern in the target area is exposed on the first cross section; in step 2, the coverage area of ​​the protective layer is greater than or equal to the projection area of ​​the target area on the first cross section;

[0027] In step 1 of each group of the cycle steps, the target area is gradually reduced.

[0028] A further improvement is to use a binary method to gradually reduce the target area.

[0029] A further improvement is that in step four, the ion source uses Ar plasma, and the surface micro-processing is achieved by bombarding the first sample with the Ar plasma.

[0030] A further improvement is that in step 4, the morphology of the metal pattern on the first cross section is observed at 0.5 kV to determine the stop time of the surface micro-treatment, and the time of the surface micro-treatment is 10 minutes to 20 minutes.

[0031] A further improvement is that in step one, the first sample is obtained by grinding, and the first sample is ground to the metal layer where the metal pattern is located.

[0032] A further improvement is that the metal pattern includes a bit line, and in the length direction along the bit line, the length of the first sample is greater than or equal to the length of the bit line; in the width direction along the bit line, the width of the first sample is greater than the width of multiple bit lines, and the multiple bit lines include at least a pair of failed bit lines and a pair of reference bit lines, the pair of failed bit lines are short-circuited, and the pair of reference bit lines are not conductive.

[0033] In step 1, the top edge of the first cross section is along the width direction of the bit line.

[0034] The top sides of the first cross sections formed in each group of the cycle steps have the same width and are aligned along the length direction of the bit line.

[0035] The width of the target area in each group of the cycle steps is less than or equal to the width of the top edge of the first cross-section.

[0036] The length direction of the target region in each group of the cycle steps is along the length direction of the bit line and the length of the target region in each group of the cycle steps gradually decreases.

[0037] A further improvement is that the target area in the last set of the cycle steps is a final target area, the length and width of the final target area are both within the range of TEM observation, and the failure position is located in the final target area.

[0038] After the last set of the cycle steps is completed, the method further includes: performing TEM plane observation and TEM cross-sectional observation on the final target area to determine the defect structure of the failure position.

[0039] A further improvement is that the target area in the first group of cyclic steps is an initial target area, and the length of the initial target area is hundreds of microns.

[0040] The final target area has a length of several micrometers.

[0041] After the present invention uses the ion beam of the FIB machine to cut the first sample and form the first cross-section, the first sample is not directly transferred to the nanoprobe station, but an electron beam is used in the FIB machine to deposit a protective layer on the first cross-section. The protective layer can prevent metal diffusion from occurring during the transfer of the first sample to the nanoprobe station. After the transfer to the nanoprobe station, the ion source is used to remove the protective layer using the ion source characteristic of the nanoprobe station, and then an electrical test is performed. Since no metal diffusion occurs, the failure position can be analyzed through the electrical test. Therefore, the present invention can use the nanoprobe station to perform a cross-section needle test on the sample, and at the same time prevent the metal exposed on the cross-section from diffusing during the transfer of the sample to the nanoprobe station, so that the failure position analysis can be achieved through the electrical test of the nanoprobe station, thereby continuously narrowing the scope of the target area containing the failure position, thereby quickly finding the failure position, saving failure analysis time and workload, reducing the difficulty of finding the failure position and failure structure, and improving the accuracy of failure analysis. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] The present invention is further described in detail below with reference to the accompanying drawings and specific embodiments:

[0043] Figure 1A This is a SEM image of the cross section of a sample cut in a FIB machine in the existing nanoscale failure analysis method;

[0044] Figure 1B This is a SEM image of the cross section after the sample is transferred to the nanoprobe station in the existing nanoscale failure analysis method;

[0045] Figure 2 is a flow chart of a nanoscale failure analysis method according to an embodiment of the present invention;

[0046] Figure 3A is a schematic diagram of the angle adjustment of the sample stage in step 1 of the nanoscale failure analysis method according to an embodiment of the present invention;

[0047] Figure 3B is a schematic structural diagram of a first sample after a first cross section is formed in step 1 of the nanoscale failure analysis method according to an embodiment of the present invention;

[0048] Figure 3C is a schematic diagram of the angle adjustment of the sample stage in step 2 of the nanoscale failure analysis method according to an embodiment of the present invention;

[0049] Figure 3D is a schematic diagram of a direction of the electron beam being perpendicular to the first cross section in step 2 of the nanoscale failure analysis method according to an embodiment of the present invention;

[0050] Figure 3E is a schematic diagram of the structure after the protective layer is formed in step 2 of the nano-level failure analysis method according to an embodiment of the present invention;

[0051] Figure 4A is a SEM image of a first cross section formed after cutting in step 1 of the nanoscale failure analysis method according to an embodiment of the present invention;

[0052] Figure 4B is a SEM picture of the first cross section after a protective layer is formed on the surface in step 2 of the nanoscale failure analysis method of an embodiment of the present invention;

[0053] Figure 4C is a SEM image of the first cross section after the protective layer is removed in step 4 of the nanoscale failure analysis method of an embodiment of the present invention;

[0054] Figure 5 is a leakage curve obtained by performing a metal diffusion test in step 3 in the nanoscale failure analysis method of an embodiment of the present invention;

[0055] Fig. 6A is a top view of a first sample including the entire initial target area in the nanoscale failure analysis method according to an embodiment of the present invention;

[0056] Figure 6B yes Fig. 6A A magnified view of the middle area 502. DETAILED DESCRIPTION

[0057] like Figure 2 FIG. 1 is a flow chart of a nano-level failure analysis method according to an embodiment of the present invention. The nano-level failure analysis method according to an embodiment of the present invention comprises the following steps:

[0058] Step 1: Figure 3B As shown, a first sample 301 to be analyzed is provided; Figure 3A As shown, the first sample 301 is placed on the sample stage 203 of the FIB machine, and the ion beam provided by the ion beam gun 202 in the FIB machine is used to cut the selected area of ​​the first sample 301 to form a first cross section 302, and the metal pattern 303 on the first cross section 302 is exposed.

[0059] In the embodiment of the present invention, after the first sample 301 is placed on the sample stage 203 , the sample stage 203 is placed at the height of the common focus point of the ion beam and the electron beam.

[0060] After placing the sample stage 203 at the height of the common focus point of the ion beam and the electron beam and before performing the cutting, the method further includes setting the angle of the sample stage 203 to a first angle α1, wherein the first angle α1 is between -38 degrees and 52 degrees. Figure 3A In the figure, the three dotted lines correspond to 0°, -38° and 52° respectively, the 0° dotted line is a horizontal line, and the first angle is an angle relative to the horizontal dotted line.

[0061] In the embodiment of the present invention, the selected area of ​​the first sample 301 is set according to the target area, and the target area is the minimum analysis area including the failure position confirmed before step 1. The first section 302 is greater than or equal to the projection area of ​​the target area on the first section 302, so that the metal pattern 303 in the target area is exposed on the first section 302. Figure 4A As shown, it is a SEM picture of the first cross section formed after cutting in step 1 of the nano-level failure analysis method according to an embodiment of the present invention; Figure 4A , the box 304a is the target area observed from the first section 302, that is, the projection area of ​​the target area on the first section; Figure 4A In the figure, the metal pattern is marked with 303a alone.

[0062] In the embodiment of the present invention, the first sample 301 is obtained by grinding, and the first sample 301 is ground to the metal layer where the metal pattern 303 is located.

[0063] In some embodiments, the metal pattern 303 includes a bit line, and along the length direction of the bit line, the length of the first sample 301 is greater than or equal to the length of the bit line; along the width direction of the bit line, the width of the first sample 301 is greater than the width of multiple bit lines, and the multiple bit lines include at least a pair of failed bit lines and a pair of reference bit lines, the pair of failed bit lines are short-circuited, and the pair of reference bit lines are not conductive. Figure 4A In FIG. 1 , a plurality of metal patterns 303a are shown, among which only two adjacent metal patterns 303a are a pair of failed bit lines (failtwin BL); the number of the other metal patterns 303a is more than two, and two of the metal patterns 303a are selected as a pair of reference bit lines (ref twin BL).

[0064] The top edge of the first cross section 302 is along the width direction of the bit line. Figure 4A Only the width direction of the bit line can be observed.

[0065] like Fig. 6A, which is a top view of the first sample including the entire initial target area in the nanoscale failure analysis method according to an embodiment of the present invention; Fig. 6A In the embodiment, the first sample is represented by a mark 301a, the groove 501 is the groove formed by cutting in step 1, and one side of the groove 501 is the first cross section 302. Figure 6B As shown, Figure 6B An enlarged view of the groove 501 can be seen in FIG. 5 , wherein the first cross section of the groove 501 is individually marked with a label 302 a.

[0066] Step 2: Deposit a protective layer on the first cross section 302 using the electron beam of the FIB machine. Figure 3E In the embodiment, the protective layer is formed in the area indicated by the dotted line frame 305 .

[0067] In the embodiment of the present invention, Figure 3C As shown, before depositing the protective layer, the process further includes setting the angle of the sample stage 203 to a second angle α2.

[0068] like Figure 3D As shown, the second angle α2 is 38 degrees counterclockwise rotated on the basis of the first angle α1, so that the direction of the electron beam is perpendicular to the first cross section 302. Figure 3D In the figure, the arrow line 204 represents the electron beam, and the direction of the arrow line 204 is the direction of the electron beam. It can be seen that the arrow line 204 is vertically downward, and the first section 302 is in a horizontal position, so the two are perpendicular.

[0069] The material of the protective layer includes silicon dioxide. In some embodiments, the thickness of the protective layer is 0.03 micrometers to 0.07 micrometers.

[0070] In the embodiment of the present invention, the coverage area of ​​the protective layer is greater than or equal to the projection area of ​​the target area on the first section 302. Figure 4B , which is a SEM picture of the first cross section after a protective layer is formed on the surface in step 2 of the nanoscale failure analysis method according to an embodiment of the present invention, and Figure 4A In contrast, the metal pattern 303a is covered with the protection layer.

[0071] Step three: transfer the first sample 301 to the nanoprobe station. During the transfer process, the protective layer is used to protect the metal pattern 303 and prevent metal diffusion.

[0072] In an embodiment of the present invention, after the first sample 301 is transferred to the nanoprobe station, a metal diffusion test is also performed to verify that the metal diffusion has not occurred; if the metal diffusion test finds that the metal diffusion has occurred, the thickness of the protective layer is increased in the next step 2. In some embodiments, the metal diffusion only needs to be performed in the selected thickness of the protective layer. After the thickness of the protective layer is selected, it means that the protective layer can protect the metal pattern 303, so the metal diffusion test may not be required later.

[0073] In the embodiment of the present invention, the metal diffusion test is implemented by performing a leakage test on a pair of the reference bit lines. If the leakage in the leakage test is large, it indicates that there is metal diffusion; if there is no leakage, it indicates that there is no metal diffusion. Figure 5 As shown, it is a leakage curve obtained by performing metal diffusion test in step 3 in the nano-level failure analysis method of an embodiment of the present invention; Figure 5 In the figure, the horizontal axis is the sweep voltage, the vertical axis on the left is the sweep current, and the vertical axis on the right is the well current. Figure 5 In FIG. 4 , curve 401 represents a leakage sweep curve between a pair of reference bit lines. It can be seen that the sweep current is 0A between ±0.5V. Figure 5 Also shown in FIG. 4 is a curve 402 of the sink current.

[0074] Step 4: Use the ion source in the nanoprobe station to perform surface microprocessing on the first sample 301 to remove the protective layer and expose the metal pattern 303 .

[0075] In the embodiment of the present invention, the ion source uses Ar plasma, and the surface micro-processing is achieved by bombarding the first sample 301 with the Ar plasma.

[0076] The stop time of the surface micro-processing is determined by observing the morphology of the metal pattern 303 on the first cross section 302 at 0.5 kV. The stop time of the surface micro-processing is 10 minutes to 20 minutes.

[0077] like Figure 4C , which is a SEM picture of the first cross section after the protective layer is removed in step 4 of the nanoscale failure analysis method according to an embodiment of the present invention; and Figure 4B In contrast, the protective layer covering the surface of the metal pattern 303a is removed, so the electrical test can be performed later. At the same time, it can be seen that the structure of each metal pattern 303a is clear, there is no metal diffusion, and there is no Figure 1BDefect 103 formed by metal diffusion is shown in FIG.

[0078] Step 5: The nanoprobe station punctures the metal pattern 303 and performs electrical testing.

[0079] In the embodiment of the present invention, steps 1 to 5 constitute a set of cyclic steps. In the nanoscale failure analysis method, multiple sets of the cyclic steps are performed until the failure position is found in the first sample 301 .

[0080] In the embodiment of the present invention, in step 1 of each group of the cycle steps, the target area is gradually reduced.

[0081] The target area is gradually narrowed down using a binary method.

[0082] like Fig. 6A As shown, the top sides of the first cross sections 302 formed in each set of the cycle steps have the same width and are aligned along the length direction of the bit line. Fig. 6A In the embodiment, each of the grooves 501 is a groove formed in step 1 of each group of the cycle steps, and each of the grooves 501 is aligned and has the same size.

[0083] The width of the target area in each group of the cycle steps is less than or equal to the width of the top edge of the first cross section 302 .

[0084] like Fig. 6A As shown, the length direction of the target area in each group of the cycle steps is along the length direction of the bit line and the length of the target area in each group of the cycle steps gradually decreases. Among them, the target area in the first group of the cycle steps is the initial target area, and the length of the initial target area is hundreds of microns. Fig. 6A It is shown in Figure 1 that the length of the initial target area is approximately 280 microns.

[0085] The target area in the last group of the cycle steps is the final target area, the length and width of the final target area are both within the range of TEM observation, and the failure position is located in the final target area. The length of the final target area is several microns. Fig. 6A In the example, the final target area is located inside the area shown in the frame 501. Figure 6B for Fig. 6A The enlarged view of the area shown in the middle frame 501 is Figure 6B It can be seen that the length of the final target area is about 8 microns. Therefore, the length of the target area can be reduced from about 280 microns to 8 microns through the embodiment of the present invention.

[0086] After the last set of the cycle steps are completed, it also includes: performing TEM plane observation and TEM cross-sectional observation on the final target area to determine the defect structure of the failure position. As is known to those skilled in the art, before TEM observation, it is necessary to prepare the TEM sample, that is, it is necessary to grind the first sample according to the size of the final target area to obtain the TEM sample, and then perform TEM observation. Through TEM observation, a clear structure of the defect at the failure position can be obtained. Among them, on the plane of the TEM sample, the TEM plane observation can obtain the TEM plan view result, and can also perform energy dispersive spectrometer (EDS) and line scan (line scan) analysis and obtain EDS and line scan analysis structures. On the cross section of the TEM sample, a TEM cross section structure can be obtained, and an electron energy loss spectrum (EELS) analysis can be performed to obtain EELS analysis results.

[0087] After the embodiment of the present invention uses the ion beam of the FIB machine to cut the first sample 301 and form the first cross section 302, the first sample 301 is not directly transferred to the nanoprobe station, but an electron beam is used in the FIB machine to deposit a protective layer on the first cross section 302. The protective layer can prevent metal diffusion from occurring during the transfer of the first sample 301 to the nanoprobe station. After the transfer to the nanoprobe station, the ion source is used to remove the protective layer by utilizing the ion source feature of the nanoprobe station, and then an electrical test is performed. Since no metal diffusion occurs, the failure position can be analyzed through the electrical test. Therefore, the embodiment of the present invention can use the nanoprobe station to perform a cross-section needle test on the sample, and at the same time, it can prevent the metal exposed on the cross section from diffusing during the transfer of the sample to the nanoprobe station, so that the failure position analysis can be achieved through the electrical test of the nanoprobe station, thereby continuously narrowing the scope of the target area containing the failure position, thereby quickly finding the failure position, saving failure analysis time and workload, reducing the difficulty of finding the failure position and failure structure, and improving the accuracy of failure analysis.

[0088] The present invention has been described in detail above through specific embodiments, but these do not constitute limitations of the present invention. Without departing from the principle of the present invention, those skilled in the art may also make many variations and improvements, which should also be regarded as the protection scope of the present invention.

Claims

1. A nanoscale failure analysis method, characterized in that: The steps include: Step 1: providing a first sample to be analyzed, placing the first sample on a sample stage of a FIB machine, and using an ion beam in the FIB machine to cut a selected area of ​​the first sample to form a first cross section, wherein a metal pattern on the first cross section is exposed; Step 2: Depositing a protective layer on the first cross section using an electron beam of the FIB machine; Step 3: transferring the first sample to a nanoprobe station, during which the protective layer is used to protect the metal pattern and prevent metal diffusion; Step 4: using the ion source in the nanoprobe station to perform surface microprocessing on the first sample to remove the protective layer and expose the metal pattern; Step 5: The nanoprobe station punctures the metal pattern and performs electrical testing.

2. The nanoscale failure analysis method according to claim 1, characterized in that: In step 1, after the first sample is placed on the sample stage, the sample stage is placed at the height of the common focus point of the ion beam and the electron beam.

3. The nanoscale failure analysis method according to claim 2, characterized in that: In step one, after placing the sample stage at the height of the common focus point of the ion beam and the electron beam and before performing the cutting, it also includes setting the angle of the sample stage to a first angle, and the first angle is between -38 degrees and 52 degrees.

4. The nanoscale failure analysis method according to claim 3, characterized in that: In step 2, before depositing the protective layer, the method further includes setting the angle of the sample stage to a second angle.

5. The nanoscale failure analysis method according to claim 4, characterized in that: The second angle is 38 degrees counterclockwise rotated on the basis of the first angle, so that the direction of the electron beam is perpendicular to the first cross section.

6. The nanoscale failure analysis method according to claim 1, characterized in that: In step 2, the material of the protective layer includes silicon dioxide.

7. The nanoscale failure analysis method according to claim 6, characterized in that: In step 2, the thickness of the protective layer is 0.03 micrometers to 0.07 micrometers.

8. The nanoscale failure analysis method according to claim 7, characterized in that: In step three, after transferring the first sample to the nanoprobe station, a metal diffusion test is also performed to verify that the metal diffusion does not occur; if the metal diffusion test finds that the metal diffusion occurs, the thickness of the protective layer is increased in the next step two.

9. The nanoscale failure analysis method according to claim 1, characterized in that: Steps 1 to 5 constitute a set of cyclic steps. In the nanoscale failure analysis method, multiple sets of the cyclic steps are performed until the failure position is found in the first sample.

10. The nanoscale failure analysis method according to claim 9, characterized in that: In step 1, the selected area of ​​the first sample is set according to the target area, and the target area is the minimum analysis area including the failure position confirmed before step 1; the first section is greater than or equal to the projection area of ​​the target area on the first section, so that the metal pattern in the target area is exposed on the first section; In step 2, the coverage area of ​​the protective layer is greater than or equal to the projection area of ​​the target area on the first cross section; In step 1 of each group of the cycle steps, the target area is gradually reduced.

11. The nanoscale failure analysis method according to claim 10, characterized in that: The target area is gradually narrowed down using a binary method.

12. The nanoscale failure analysis method according to claim 1, characterized in that: In step 4, the ion source uses Ar plasma, and the surface micro-processing is achieved by bombarding the first sample with the Ar plasma.

13. The nanoscale failure analysis method according to claim 12, characterized in that: In step 4, the morphology of the metal pattern on the first cross section is observed at 0.5 kV to determine the stop time of the surface micro-treatment, and the time of the surface micro-treatment is 10 minutes to 20 minutes.

14. The nanoscale failure analysis method according to claim 10, characterized in that: In step 1, the first sample is obtained by grinding, and the first sample is ground to the metal layer where the metal pattern is located.

15. The nanoscale failure analysis method according to claim 14, characterized in that: The metal pattern includes a bit line, in the length direction along the bit line, the length of the first sample is greater than or equal to the length of the bit line; in the width direction along the bit line, the width of the first sample is greater than the width of a plurality of the bit lines, and the plurality of the bit lines include at least a pair of failed bit lines and a pair of reference bit lines, the pair of failed bit lines are short-circuited, and the pair of reference bit lines are not conductive; In step 1, the top edge of the first cross section is along the width direction of the bit line; The top edges of the first cross sections formed in each group of the cycle steps have the same width and are aligned along the length direction of the bit lines; The width of the target area in each group of the cycle steps is less than or equal to the width of the top edge of the first cross section; The length direction of the target region in each group of the cycle steps is along the length direction of the bit line and the length of the target region in each group of the cycle steps gradually decreases.

16. The nanoscale failure analysis method according to claim 15, characterized in that: The target area in the last group of the cycle steps is a final target area, the length and width of the final target area are both within the range of TEM observation, and the failure position is located in the final target area; After the last set of the cycle steps is completed, the method further includes: performing TEM plane observation and TEM cross-sectional observation on the final target area to determine the defect structure of the failure position.

17. The nanoscale failure analysis method according to claim 16, wherein: The target area in the first group of the cycle steps is an initial target area, and the length of the initial target area is hundreds of microns; The final target area has a length of several micrometers.