Static detection method and device for chip packaging defects

Abstract

The invention relates to the technical field of chip detection, in particular to a chip packaging defect static detection device which comprises a static comprehensive measuring instrument and further comprises a base, a printed circuit board is placed at the upper end of the base, a microneedle module and a pin extension interface are installed at the upper end of the printed circuit board, and the microneedle module is connected with the pin extension interface. The micro-needle module and the pin extension interface are tightly connected, the pin extension interface is electrically connected with the static comprehensive measurement instrument, the upper end of the micro-needle module is provided with a rapid self-locking module, and the upper end of the rapid self-locking module is provided with a chip. Through the unique combined design of the chip self-locking module, the microneedle module and the static comprehensive measurement instrument, comprehensive static detection of the internal network of the chip pins is realized, complex peripheral circuit construction and chip power-on operation in a traditional detection mode are abandoned, the detection cost is reduced fundamentally, and the detection efficiency is improved.

Description

Technical Field

[0001] The present invention relates to the technical field of chip detection, and in particular to a static detection method and device for chip packaging defects. Background Art

[0002] In the chip manufacturing process, chip packaging defect detection is crucial. The traditional chip defect detection method is to match the chip with a matching peripheral circuit, measure the dynamic output data of the circuit after the chip is working. However, this detection method has many disadvantages. Due to the diversity of chip types and functions, the required matching peripheral circuits are extremely complex, and the measurement output data types are numerous, resulting in high cost of measuring instruments. At the same time, the production and assembly process of the peripheral circuit board (PCBA) is time-consuming, labor-intensive and costly, making it difficult to achieve fast and low-cost testing applications.

[0003] In addition, the power supply and signal input to the peripheral circuit during the test, and the dynamic data detection after the chip is working normally, is not only inefficient, but also has the risk of power-on damage to the chip. Moreover, this detection method based on the dynamic output data of the peripheral circuit cannot detect each pin of the chip, and there is a certain amount of defect leakage, which seriously affects the control of chip quality and the improvement of production efficiency. Summary of the invention

[0004] In view of the above-mentioned shortcomings of the prior art, the present invention provides a static detection method and device for chip packaging defects, which can effectively solve the problem that the prior art detects dynamic data after the chip is working normally, which is not only inefficient, but also has the risk of power-on damage to the chip, and this detection method based on the dynamic output data of the peripheral circuit cannot detect each pin of the chip.

[0005] To achieve the above objectives, the present invention is implemented through the following technical solutions: The present invention provides a static detection device for chip packaging defects, comprising a static comprehensive measuring instrument and a base, wherein a printed circuit board is placed on the upper end of the base, a microneedle module and a pin extension interface are installed on the upper end of the printed circuit board, and the microneedle module and the pin extension interface are tightly connected, the pin extension interface is electrically connected to the static comprehensive measuring instrument, a quick self-locking module is arranged on the upper end of the microneedle module, and a chip is placed on the upper end of the quick self-locking module; The quick self-locking module includes a main body. An installation cavity is formed at the upper end of the main body. A storage plate is slidably connected to the upper side of the installation cavity. A plurality of reset springs are fixedly connected between the storage plate and the installation cavity. A vertical plate is fixedly connected inside the installation cavity. Two horizontal toothed plates are slidably connected to the vertical plate in a limited manner. A first gear that meshes with the two horizontal toothed plates is rotatably connected to one end of the vertical plate close to the horizontal toothed plates. A second gear is coaxially and fixedly connected to the other end of the first gear. A vertical toothed plate that meshes with the second gear is fixedly connected to the lower end of the storage plate. U-shaped connecting rods are fixedly connected to the opposite ends of the two horizontal toothed plates. The other ends of the U-shaped connecting rods are fixedly connected to a moving plate. A buffer assembly is arranged on the moving plate.

[0006] According to the above-mentioned static detection device for chip packaging defects, two limiting grooves are spaced apart inside the vertical plate. Limiting blocks that are slidably connected to the limiting grooves are fixedly connected to both of the two horizontal toothed plates.

[0007] According to the above-mentioned static detection device for chip packaging defects, the width of one end of the limiting groove close to the horizontal toothed plate is smaller than the width of the end far from the horizontal toothed plate.

[0008] According to the above-mentioned static detection device for chip packaging defects, the buffer assembly includes a plurality of limiting springs fixedly connected to the opposite ends of the two moving plates. A limiting plate is fixedly connected to the plurality of limiting springs together.

[0009] According to the above-mentioned static detection device for chip packaging defects, a plurality of guide rods are fixedly connected to the opposite ends of the two limiting plates. And the plurality of guide rods all pass through the moving plate. The plurality of limiting springs are all arranged on the outer sides of the guide rods.

[0010] A static detection method for chip packaging defects is characterized by including the following steps: S1. First, place the chip in the quick self-locking module to ensure that the position of the chip is accurately fixed. S2. The pin feet of the chip are tightly connected to the micro-needle module. The micro-needle module is installed on the printed circuit board. A stable electrical connection is established with the static comprehensive measurement instrument through the pin foot extension interface. S3. Start the static comprehensive measurement instrument, run the detection software, and detect various combined networks of the chip pin feet according to the set detection logic. S4. Open-circuit and short-circuit detection: Test the open circuit of any combined network of the chip pin feet A1, A2…An. R0 > a and a is the resistance value set by the condition. The short-circuit situation is R0 < b and b is the resistance value set by the condition. By accurately measuring the network resistance value, judge whether there is an open-circuit or short-circuit fault. S5, resistance detection: test the resistance R of the combined network between any two pins of the chip pins A1, A2...An and LSL≤R≤USL, pre-set LSL as the lower limit standard value and USL as the upper limit standard value, and judge whether the resistance of the combined network is within the normal range; S6, capacitance detection: Test the capacitance C of the combined network between any two pins of the chip pins A1, A2...An and LSL≤C≤USL. Also, test the capacitance of the combined network according to the set capacitance standard range to ensure that it meets the chip design requirements; S7, diode value detection: test the diode value D of the combined network between any two pins of the chip pins A1, A2...An and LSL<=D<=USL. Based on the standard diode value range, detect whether the performance of the diode inside the chip is normal. During the detection process, the instrument automatically collects data and compares it with the preset standard, and finally determines whether the chip is qualified based on the test results.

[0011] According to the above-mentioned static detection method for chip packaging defects, it also includes a detection result judgment step. After completing all the above-mentioned detection items, if all tests are passed, the chip is judged to be PASS, that is, the chip packaging has no defects; if any one of the tests does not meet the requirements, it is judged to be NG, indicating that the chip has packaging defects and needs further analysis and processing.

[0012] Compared with the known prior art, the technical solution provided by the present invention has the following beneficial effects: 1. Cost reduction: No need to make and assemble complex peripheral circuit boards, reducing hardware cost investment. At the same time, the simplified detection equipment structure reduces equipment procurement and maintenance costs.

[0013] 2. Improved efficiency: The static detection method does not need to wait for the chip to be powered on and the dynamic data to be stable, and can quickly complete the detection process, greatly shortening the detection cycle and improving production efficiency.

[0014] 3. Reduce the risk of damage: Avoid possible damage to the chip during the power-on process and improve the reliability and yield of chip detection.

[0015] 4. Reduce defect leakage: It can comprehensively detect each pin of the chip and its combined network, effectively reducing the defect leakage rate and ensuring chip quality.

[0016] In summary, the present invention realizes comprehensive static detection of the internal network of chip pins through the unique combination design of chip self-locking module, microneedle module and static comprehensive measuring instrument, abandons the complicated peripheral circuit construction and chip power-on operation in traditional detection methods, fundamentally reduces the detection cost, improves the detection efficiency, and can be applied to any chip packaging type without being restricted by chip function, purpose, manufacturer and other factors. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the prior art descriptions are briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention, and for ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0018] Figure 1 It is a structural schematic diagram of a static detection device for chip packaging defects; Figure 2 for Figure 1 The structural diagram of the fast self-locking module; Figure 3 for Figure 2 The structural diagram of the enlarged part A in the middle; Figure 4 The present invention is a flowchart of a static detection method for chip packaging defects.

[0019] Figure numerals: 1. base; 2. printed circuit board; 3. microneedle module; 4. quick self-locking module; 5. pin extension interface; 6. static comprehensive measuring instrument; 7. installation cavity; 8. storage plate; 9. reset spring; 10. vertical plate; 11. horizontal tooth plate; 12. first gear; 13. second gear; 14. vertical tooth plate; 15. limit groove; 16. U-shaped connecting rod; 17. movable plate; 18. limit spring; 19. limit plate. DETAILED DESCRIPTION

[0020] In order to make the purpose, technical solution and advantages of the embodiments of the present invention clearer, the technical solution in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0021] The present invention will be further described below in conjunction with the embodiments.

[0022] Example: Refer to Figures 1 to 4A static detection method and device for chip packaging defects include a static comprehensive measuring instrument 6. The static comprehensive measuring instrument for detecting a chip 20 is usually used to test and analyze the performance, structure, material, etc. of an integrated circuit (IC) or a chip. The static comprehensive measurement focuses on measuring the physical and electrical characteristics of the chip without changing the circuit state to ensure the quality of chip design and manufacturing. The static comprehensive measuring instrument 6 is an existing well-known technology, and its specific structure and principle are not elaborated in detail here.

[0023] It also includes a base 1, which provides support for the entire detection device and is usually made of durable metal or high-strength plastic material to ensure stability. The surface of the base 1 may be designed as an anti-slip structure to prevent the device from sliding during operation.

[0024] A printed circuit board 2 is placed on the upper end of the base 1, and a microneedle module 3 and a pin extension interface 5 are installed on the upper end of the printed circuit board 2, and the microneedle module 3 and the pin extension interface 5 are tightly connected. The microneedle module 3 adopts high-precision microneedles, which can accurately contact each pin of the chip. The microneedles are made of high-strength materials and have good conductivity and wear resistance.

[0025] The pin extension interface 5 is electrically connected to the static comprehensive measuring instrument 6. The pin extension interface 5 is used to connect the microneedle module and the static comprehensive measuring instrument 6 to ensure the stability of signal transmission and prevent external interference from affecting the measurement results.

[0026] A quick self-locking module 4 is provided at the upper end of the microneedle module 3, and the quick self-locking module 4 includes a main body, an installation cavity 7 is opened at the upper end of the main body, a storage plate 8 is slidably connected to the upper side of the installation cavity 7, a plurality of reset springs 9 are fixedly connected between the storage plate 8 and the installation cavity 7, a vertical plate 10 is vertically fixedly connected in the installation cavity 7, the vertical plate 10 is limitedly slidably connected to two transverse tooth plates 11, two limiting grooves 15 are arranged in the vertical plate 10 at intervals, and the two transverse tooth plates 11 are fixedly connected with limiting blocks slidably connected to the limiting grooves 15. By setting the limiting blocks slidably connected to the limiting grooves 15, the stability and smoothness of the sliding between the transverse tooth plates 11 and the vertical plates 10 are guaranteed.

[0027] The width of the limiting groove 15 at one end close to the transverse tooth plate 11 is smaller than the width at the end away from the transverse tooth plate 11 , thereby ensuring that the transverse tooth plate 11 will not separate from the vertical plate 10 .

[0028] One end of the vertical plate 10 close to the transverse tooth plate 11 is rotatably connected to a first gear 12 meshing with the two transverse tooth plates 11, and the other end of the first gear 12 is coaxially fixedly connected to a second gear 13, and the lower end of the storage plate 8 is fixedly connected to a vertical tooth plate 14 meshing with the second gear 13, and the opposite ends of the two transverse tooth plates 11 are fixedly connected to a U-shaped connecting rod 16, and the other end of the U-shaped connecting rod 16 is fixedly connected to a movable plate 17, and a buffer assembly is arranged on the movable plate 17. Specifically, the buffer assembly includes a plurality of limit springs 18 fixedly connected to the opposite ends of the two movable plates 17, and the plurality of limit springs 18 are fixedly connected to the limit plate 19 together. The buffer assembly (limit spring 18 and limit plate 19) is mainly used to ensure that during the chip detection process, any possible vibration or instability will not affect the detection result. The design of the guide rod can further accurately control the distance between the plate and the chip 20 to avoid measurement errors caused by position deviation, and the chip 20 can be protected by setting the buffer assembly.

[0029] A plurality of guide rods are fixedly connected to the opposite ends of the two limit plates 19, and the plurality of guide rods are arranged through the movable plate 17, and a plurality of limit springs 18 are arranged on the outside of the guide rods. The limit springs 18 are arranged on the outside of the guide rods to avoid the limit springs 18 from easily producing elastic deformation and increase the service life of the limit springs 18.

[0030] A chip 20 is placed on the upper end of the quick self-locking module 4. Before testing, the chip 20 is placed on the upper end of the placement plate 8. Under the weight of the chip 20 itself, the placement plate 8 is pressed downward, driving the vertical tooth plate 14 to move downward, and multiple reset springs 9 are compressed. The vertical tooth plate 14 engages with the second gear 13, and the rotation of the second gear 13 drives the first gear 12 to rotate. The two transverse tooth plates 11 engage with the first gear 12, and the two transverse tooth plates 11 move relative to each other. The two U-shaped connecting rods 16 drive the two moving plates 17 to move relative to each other, driving the two limit plates 19 to abut against the chip 20, completing the quick self-locking of the chip 20.

[0031] When testing the chip 20: First, place the chip 20 in the quick self-locking module 4 to ensure that the position of the chip 20 is accurately fixed. The pin feet of the chip are tightly connected to the micro-needle module 3. The micro-needle module 3 is installed on the printed circuit board 2 and establishes a stable electrical connection with the static comprehensive measuring instrument 6 through the pin foot extension interface 5. Start the static comprehensive measuring instrument 6 and run the detection software to detect various combined networks of the chip pin feet according to the set detection logic. Open-circuit and short-circuit detection: Test the open circuit of any combined network of the chip pin feet A1, A2... An. When R0 > a and a is the resistance value set by the condition, and the short-circuit situation is R0 < b and b is the resistance value set by the condition. By accurately measuring the network resistance value, judge whether there is an open-circuit or short-circuit fault. Then test the resistance value R of any combined network between any two pin feet of the chip pin feet A1, A2... An, and LSL ≤ R ≤ USL. LSL is preset as the lower limit standard value, and USL is the upper limit standard value, to judge whether the resistance value of the combined network is within the normal range. Then test the capacitance value C of any combined network between any two pin feet of the chip pin feet A1, A2... An, and LSL ≤ C ≤ USL. Similarly, according to the set capacitance standard range, detect the capacitance value of the combined network to ensure that it meets the chip design requirements. Finally, test the diode value D of any combined network between any two pin feet of the chip pin feet A1, A2... An, and LSL <= D <= USL. Based on the standard diode value range, detect whether the performance of the internal diode of the chip is normal. During the detection process, the instrument automatically collects data and compares it with the preset standard, and finally determines whether the chip is qualified according to the detection result.

[0032] After completing the above detection items, if all tests pass, the chip is determined to be PASS, that is, there is no defect in the chip package; if any one of the detections does not meet the requirements, it is determined to be NG, indicating that there is a packaging defect in the chip and further analysis and processing are required.

[0033] The specific working principle of the present invention is as follows: S1, Chip placement and fixation: 1.1 When placing the chip 20 into the quick self-locking module 4, it should first be ensured that the direction of the chip matches the interface. When the chip 20 is placed on the placement board 8 by the quick self-locking module 4, the two limit plates 19 on both sides of the placement board 8 move relative to each other to clamp the chip 20, realizing the accurate placement and positioning of the chip 20. 1.2 At this time, the operator should confirm that the chip has been fixed in the appropriate position by observing the indicator light or the display screen. S2, Micro-needle module and electrical connection: 2.1 When the pin of the chip 20 is connected to the micro-needle module 3, the micro-needles are precisely inserted into each pin to ensure correct electrical connection at all contact points. At this time, the connection status can be checked in real time through the monitoring system of the static synthesis measuring instrument 6 to confirm whether there is any poor contact; 2.2 The Pin foot extension interface 5 plays a role in stable signal transmission in this step, ensuring precise electrical contact between the micro-needle module 3 and the static synthesis measuring instrument 6; S3. During the detection process, the static synthesis measuring instrument 6 will detect various electrical networks between the pins of the chip, including but not limited to performance tests such as open circuit, short circuit, resistance value, capacitance value, diode, etc.; S4. Open circuit and short circuit detection Through the precision current source and voltage source, the static synthesis measuring instrument 6 can detect any open circuit and short circuit faults that do not meet the set standards. When testing, it is necessary to ensure that the set resistance conditions (R0 > a or R0 < b) are accurate; S5. Resistance value detection Test whether the resistance value between each pair of pins meets the requirements of the chip design. By measuring the resistance value R, the instrument can determine whether the resistance value deviates from the range (LSL ≤ R ≤ USL), and further infer whether there are electrical faults or quality problems.

[0034] S6. Capacitance value detection Mainly detect whether the capacitive network of the chip meets the specification requirements, and ensure that the capacitance value C of the chip is within the preset standard range (LSL ≤ C ≤ USL).

[0035] S7. Diode value detection Check whether the performance of the diode network in the chip meets the normal working standards, and ensure that its diode value D is within the set range (LSL ≤ D ≤ USL).

[0036] S8. Result analysis The data during the measurement process will be automatically collected and uploaded to the detection software. By comparing with the preset standard values, the system will automatically generate a test report to show whether it meets the quality standards. The software can generate a real-time monitoring chart based on the test data to help the operator quickly diagnose whether there are potential defects.

[0037] The above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that: they can still modify the technical solutions recorded in the foregoing embodiments, or perform equivalent replacements on some of the technical features; and these modifications or replacements will not cause the essence of the corresponding technical solutions to deviate from the protection scope of the technical solutions of the embodiments of the present invention.

Claims

1. A static detection device for chip packaging defects, comprising a static comprehensive measuring instrument (6), characterized in that: It also comprises a base (1), a printed circuit board (2) is placed on the upper end of the base (1), a microneedle module (3) and a pin extension interface (5) are installed on the upper end of the printed circuit board (2), and the microneedle module (3) and the pin extension interface (5) are tightly connected, the pin extension interface (5) is electrically connected to a static comprehensive measuring instrument (6), a quick self-locking module (4) is arranged on the upper end of the microneedle module (3), and a chip (20) is placed on the upper end of the quick self-locking module (4); The quick self-locking module (4) comprises a main body, the upper end of which is provided with a mounting cavity (7), the upper side of which is slidably connected to a storage plate (8), a plurality of return springs (9) being fixedly connected between the storage plate (8) and the mounting cavity (7), a vertical plate (10) being vertically fixedly connected in the mounting cavity (7), the vertical plate (10) being limitedly slidably connected to two transverse toothed plates (11), one end of the vertical plate (10) close to the transverse toothed plates (11) being rotatably connected to a first gear (12) meshing with the two transverse toothed plates (11), the other end of the first gear (12) being coaxially fixedly connected to a second gear (13), the lower end of the storage plate (8) being fixedly connected to a vertical toothed plate (14) meshing with the second gear (13), the opposite ends of the two transverse toothed plates (11) being fixedly connected to a U-shaped connecting rod (16), the other end of the U-shaped connecting rod (16) being fixedly connected to a moving plate (17), and a buffer assembly being arranged on the moving plate (17).

2. The static detection device for chip packaging defects according to claim 1, characterized in that: Two limiting grooves (15) are arranged in the vertical plate (10) at intervals, and limiting blocks which are slidably connected to the limiting grooves (15) are fixedly connected to the two horizontal tooth plates (11).

3. The static detection device for chip packaging defects according to claim 2, characterized in that: The width of the limiting groove (15) at one end close to the transverse tooth plate (11) is smaller than the width of the end away from the transverse tooth plate (11).

4. The static detection device for chip packaging defects according to claim 1, characterized in that: The buffer assembly comprises a plurality of limit springs (18) fixedly connected to opposite ends of two movable plates (17), and the plurality of limit springs (18) are fixedly connected together to a limit plate (19).

5. The static detection device for chip packaging defects according to claim 4, characterized in that: A plurality of guide rods are fixedly connected to the opposite ends of the two limit plates (19), and the plurality of guide rods are arranged through the movable plate (17), and the plurality of limit springs (18) are arranged on the outside of the guide rods.

6. The static detection method of chip packaging defects according to claim 1, characterized in that: The following steps are involved: S1, firstly placing the chip (20) in the fast self-locking module (4) to ensure that the position of the chip (20) is accurately fixed; S2, the pins of the chip are tightly connected to the microneedle module (3), the microneedle module (3) is mounted on the printed circuit board (2), and a stable electrical connection is established with the static integrated measuring instrument (6) through the pin extension interface (5); S3, start the static comprehensive measuring instrument (6), run the detection software, and detect various combination networks of chip pins according to the set detection logic; S4, Open and Short Circuit Detection: Detect the open circuit of any combined network of the chip's pin feet A1, A2... An. R0 > a, where a is the resistance value set by the condition. For the short circuit situation, R0 < b, where b is the resistance value set by the condition. By accurately measuring the network resistance value, determine whether there is an open circuit or short circuit fault; S5, Resistance Value Detection: Detect the resistance value R of any combined network between two pin feet of the chip's pin feet A1, A2... An, where LSL ≤ R ≤ USL. LSL is preset as the lower limit standard value, and USL is preset as the upper limit standard value. Determine whether the resistance value of the combined network is within the normal range; S6, Capacitance Value Detection: Detect the capacitance value C of any combined network between two pin feet of the chip's pin feet A1, A2... An, where LSL ≤ C ≤ USL. Similarly, according to the set capacitance standard range, detect the capacitance value of the combined network to ensure that it meets the chip design requirements; S7, Diode Value Detection: Detect the diode value D of any combined network between two pin feet of the chip's pin feet A1, A2... An, where LSL <= D <= USL. Based on the standard diode value range, detect whether the performance of the internal diode of the chip is normal; During the detection process, the instrument automatically collects data and compares it with the preset standard. Finally, determine whether the chip is qualified according to the detection results.

7. The static detection method of chip packaging defects according to claim 6, characterized in that: It also includes a detection result determination step. After completing all the above detection items, if all the tests pass, the chip is determined to be PASS, that is, the chip package has no defects; if any one of the detections does not meet the requirements, it is determined to be NG, indicating that there are packaging defects in the chip and further analysis and processing are required.

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