Emission control system suitable for phased array power weighting
By using a GaN power amplifier in the phased array radar transmission system and achieving different output power by changing the drain supply voltage, the problems of transmission efficiency loss and poor output accuracy caused by multiple power amplifiers are solved, and a high-efficiency and low-cost power weighting effect is achieved.
Patent Information
- Application Number
- CN202510139288.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-02-08
- Publication Date
- 2025-03-11
- Estimated Expiration
- 2045-02-08
AI Technical Summary
The existing phased array radar transmission channels require a variety of GaN power amplifiers with different output powers, resulting in loss of transmission efficiency, poor output accuracy, high cost, long periods and output accuracy difficult to control.
A GaN power amplifier is used to realize different transmit output power by changing the drain supply voltage, thereby realizing power weighting in the transmitting system. The system ensures efficient output of the power amplifier in saturated state through closed-loop feedback control.
It realizes efficient power weighting of the phased array radar launch system, reduces the secondary lobe level of the radar system, improves anti-interference ability, and reduces the cost and R&D cycle. The output accuracy and emission efficiency are less affected by temperature fluctuations.
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Figure CN119596245A_ABST
Abstract
Description
Technical Field
[0001] The invention relates to the field of semiconductor devices and radio wave ranging, and in particular to a transmission control system suitable for phased array power weighting. Background Art
[0002] In the current phased array radar system, the antenna array is composed of several transceiver components, which account for more than 60% of the radar system hardware cost. In order to increase the range of the radar, the synthetic transmission power often has to reach the kilowatt level or even the megawatt level. With the increasing maturity of GaN power amplifier technology, with its advantages such as high breakdown voltage, high transmission power and higher junction temperature, the final amplifier of the current phased array radar transmission channel usually uses GaN semiconductor technology to achieve power amplification. It is worth mentioning that the power amplifier is the most expensive device in the transmission channel, and the cost of the chip used in the radar transceiver system often accounts for more than half.
[0003] As one of the important application fields of phased array radar system, weather radar carries many security tasks, can detect various meteorological information such as wind, rain, thunder and lightning, and provide relevant data in real time. It is widely used in crowded places such as airports and railway stations, large conference organizations such as international conferences, remote mountainous areas, breeding bases and other specific areas, and can also provide necessary meteorological interference data for some aircraft. In order to further reduce the sidelobe level of the radar system and improve the anti-interference ability, in addition to using digitally controlled attenuators to control channel gain in multiple receiving channels to achieve power weighting, the transmission channel also uses a combination of multiple channels with different output powers to achieve this goal.
[0004] Here, the power weighting scheme of the traditional transmission system is introduced with the digital array weather radar as the background demand. The weather radar adopts the unit-level digital phased array system. In order to realize the power weighting of the radar array transmission channel, the output power of different transmission sub-arrays of the transmission system is set to 42dBm, 44dBm, 46dBm, 48dBm, and 50dBm according to the calculated value, corresponding to 16W, 25W, 40W, 63W, and 100W respectively. Taking into account the insertion loss caused by the power coupling unit, isolator unit, and output port RF connector, according to the total insertion loss of about 1dB, five sub-arrays require five GaN power amplifiers with different output powers (each sub-array contains several identical transmission channels), and their saturated output powers are 43dBm, 45dBm, 47dBm, 49dBm, and 51dBm, corresponding to 20W, 30W, 50W, 80W, and 120W respectively.
[0005] To achieve the five different power values of the five sub-arrays, there are three main traditional methods: First, the single channels of the five sub-arrays all use a power amplifier with an output power of 51dBm, and then cascade 8dB, 6dB, 4dB, 2dB, and 0dB high-power attenuators at the back end of each power amplifier to achieve different power outputs with saturated output powers of 43dBm, 45dBm, 47dBm, 49dBm, and 51dBm. However, this solution has obvious defects. The additional introduction of several high-power attenuators will seriously deteriorate the transmission efficiency of the system, resulting in a significant increase in energy consumption; and the high-power attenuators are large in size and require external heat dissipation devices, which is not conducive to system integration. Secondly, the five sub-arrays each use five different output power GaN power amplifiers, so that the single-channel saturated output power reaches 43dBm, 45dBm, 47dBm, 49dBm, and 51dBm respectively. Although this solution can guarantee the transmission efficiency of each sub-array, the use of multiple power amplifiers with different output powers will increase the R&D and procurement costs of the power amplifiers, and it is also difficult to directly find 2dB stepping serialized power amplifier products in the same frequency band from the same manufacturer. In addition to the two unfavorable factors of R&D cycle and cost, the 2dB power step accuracy will become difficult to control due to the use of different power amplifiers. In addition, this solution is not conducive to the low-cost realization of phased array radars and high-precision output power control, and the flexibility of sub-array output power becomes worse. For example, when the power difference between sub-arrays needs to be adjusted from 2dB power steps to 1dB or 3dB steps, multiple power amplifiers must be redeveloped. Third, the single channels of the five sub-arrays uniformly use a power amplifier with an output power of 51dBm, and use power back-off to achieve different power outputs of saturated output power of 43dBm, 45dBm, 47dBm, 49dBm, and 51dBm, respectively. The required power back-off amounts are 8dB, 6dB, 4dB, 2dB, and 0dB, respectively. Although this solution saves the types of power amplifiers and reduces costs, power back-off will cause the power amplifier transmission efficiency to decrease, and power back-off requires precise control of input power, making it difficult to ensure accurate back-off accuracy and stable power output. The back-off power is also more susceptible to environmental factors such as temperature. Summary of the invention
[0006] The purpose of the present invention is to solve the comprehensive performance problems such as loss of transmission efficiency, poor transmission output accuracy, high cost, long cycle, and difficulty in controlling transmission output accuracy caused by the need for multiple power amplifiers to achieve power weighting in the above-mentioned transmission channels, and propose a transmission control system suitable for phased array power weighting. The system only needs to use one power amplifier, and different transmission output powers can be achieved by changing the drain supply voltage of the power amplifier. In this process, the power amplifier can achieve high-efficiency output when working in a saturated transmission state, thereby realizing power weighting of the transmission system and achieving the purpose of reducing the side lobes of the radar system. Moreover, this power amplifier only needs to be designed according to the maximum power value of 51dBm required for power weighting of different sub-arrays.
[0007] To achieve the above object, the present invention adopts the following technical solution: A transmission control system suitable for phased array power weighting, comprising: an amplitude and phase control unit, a drive amplification unit, a power amplification unit, a power coupling unit, a power detection unit, a low-pass filter unit, an analog-to-digital conversion unit, a power supply control unit and an isolator unit; The input end of the amplitude and phase control unit is the inflow end of the radio frequency input signal RFin, and the output port is connected to the input end of the driving amplifier unit; The output end of the driving amplifier unit is connected to the first input end of the power amplifier unit; The second input end of the power amplification unit is connected to the output end of the power supply control unit, and the output end is connected to the input end of the power coupling unit; The first output end of the power coupling unit is connected to the input end of the isolator unit, and the second input end is connected to the power supply control unit after passing through the power detection unit, the low-pass filter unit, and the analog-to-digital conversion unit in sequence; The output end of the isolator unit is the final signal output end of the entire transmission control system, and the output signal is RFout; The power supply control unit includes a power supply stabilizing unit, a data identification control unit and a switch resistor array unit; the input end of the power supply stabilizing unit is a high-voltage power supply input end, and the output end is connected to the first input end of the switch resistor array unit; the first input end of the data identification control unit is connected to the analog-to-digital conversion unit, the second input end is a control word initial value input end, and the output end is connected to the second input end of the switch resistor array unit; the output end of the switch resistor array unit is the output end of the power supply control unit.
[0008] Furthermore, the amplitude and phase control unit includes a digitally controlled attenuator and a digitally controlled phase shifter, the input end of the digitally controlled attenuator is the input end of the amplitude and phase control unit, and the output end of the digitally controlled phase shifter is connected to the input end of the driving amplifier unit.
[0009] Furthermore, in order to compensate for the insertion loss caused by passive circuits such as digitally controlled attenuators and digitally controlled phase shifters, a gain compensation amplifier is also provided in the amplitude phase control unit, the input end of the gain compensation amplifier is connected to the output end of the digitally controlled attenuator, and the output end of the gain compensation amplifier is connected to the input end of the digitally controlled phase shifter.
[0010] Furthermore, the driving amplification unit includes an adjustable attenuator and a driving amplifier; the input end of the adjustable attenuator is connected to the output end of the amplitude and phase control unit, and the output end is connected to the input end of the driving amplifier, which is used to adjust the input power of the driving amplifier to change the output power of the driving amplification unit to adapt to the power required by the power amplification unit; the output end of the driving amplifier is connected to the power amplification unit, which is used to amplify the signal output by the amplitude and phase control unit to obtain the target amplified signal.
[0011] Furthermore, the adjustable attenuator is implemented by gold wire jumper, without the need for additional control circuit, and can also be implemented by a digitally controlled attenuator with a control port, with an attenuation range of 0-7dB and an attenuation step of 1dB.
[0012] Further, the power amplification unit includes a pulse modulation PMOS circuit and a power amplification circuit; The pulse modulation PMOS circuit includes a PMOS tube, whose gate is connected to the pulse control signal provided by the external radar system, whose source is connected to the variable VDD provided by the power supply control unit, and whose drain is connected to the power amplifier. The PMOS tube is turned on and off by the high and low level states presented by the pulse signal to realize the on-off modulation of the power amplifier drain, thereby having a radar transmission-like pulse working mode; The power amplifier circuit includes an input-stage network matching unit, a power transistor and an output-stage network matching unit; the input end of the input-stage network matching unit is connected to the output end of the driving amplifier, and the output end is connected to the power transistor, receiving the target amplified signal output by the driving amplifier, and is used to achieve impedance matching of the signal at the input end of the power transistor; the power amplifier is used to perform power amplification on the target amplified signal; the output-stage network matching unit is connected to the input end of the coupler, and is used to achieve impedance matching between the output end of the power amplifier and the input end of the coupler.
[0013] Furthermore, the coupler is a high-power passive coupler with a coupling degree of 40 dB. When the input power is 43-51 dBm, the output power is about 3-11 dBm.
[0014] Furthermore, the power supply voltage stabilization unit includes a DC-DC converter and an LDO voltage regulator, the input end of the DC-DC converter is connected to the high voltage power supply input end, the output end is connected to the input end of the LDO voltage regulator, and the output end of the LDO voltage regulator is connected to the switch resistor array unit as the output end of the power supply voltage stabilization unit.
[0015] The transmission control system of the present invention adopts a closed-loop feedback transmission control system, which introduces the output signal of the power amplifier unit as feedback information in the power supply control unit, generates a control word control according to the feedback signal and the input control word initial value, and controls the power supply voltage provided by the power supply voltage stabilizing unit to generate a dynamically variable VDD as the drain supply voltage, thereby achieving a variety of different power outputs under the condition of using only one power amplifier, and each power output is generated when the power amplifier is in a saturated state. Compared with the power fallback working in a linear state, the advantage of the power amplifier working in a saturated state is that a higher transmission efficiency is achieved and it is less affected by temperature fluctuations. The present invention solves the comprehensive performance problems such as the loss of transmission efficiency caused by the need for multiple power amplifiers to achieve power weighting in the transmission channel, poor transmission output accuracy, high cost, long cycle, and difficulty in controlling transmission output accuracy. BRIEF DESCRIPTION OF THE DRAWINGS
[0016] Figure 1 A block diagram comparing the existing weighted implementation scheme and the scheme of the present invention; Figure 2 It is a principle block diagram of a transmission control system suitable for phased array power weighting of the present invention; Figure 3 This is a principle block diagram of the driving amplification unit of the present invention; Figure 4 It is a principle block diagram of the power amplification unit of the present invention; Figure 5 The power amplifier circuit schematic diagram of the present invention; Figure 6 is a return loss curve of an input port of a power amplifier circuit of an embodiment; Figure 7 is a characteristic curve of the saturated output power of the power amplifier circuit of the embodiment changing with the drain voltage VDD; Figure 8 is a characteristic curve of the drain efficiency of the power amplifier circuit of the embodiment changing with the drain voltage VDD; Fig. 9 1 is a characteristic curve of the output power and drain efficiency of the power amplifier circuit according to the embodiment as a function of input power. DETAILED DESCRIPTION
[0017] The technical solution of the present invention is described in detail below with reference to the embodiments and drawings. Figure 2 The present embodiment provides a transmission control system suitable for phased array power weighting, including: an amplitude and phase control unit, a drive amplifier unit, a power amplifier unit, a power coupling unit, a power detection unit, a low-pass filter unit, an analog-to-digital conversion unit, a power supply control unit, and an isolator unit. The specific description of each unit is as follows: The amplitude and phase control unit includes a digitally controlled attenuator and a digitally controlled phase shifter. After the digitally controlled attenuator and the digitally controlled phase shifter are cascaded, the input end of the data attenuator is the inflow end of the RF input signal RFin, and the output end of the digitally controlled phase shifter is connected to the input end of the driving amplifier unit. The amplitude and phase control unit is used to adjust the amplitude and phase of the RF input signal RFin according to requirements. In order to compensate for the insertion loss caused by passive circuits such as digitally controlled attenuators and digitally controlled phase shifters, this embodiment also integrates a gain compensation amplifier in the amplitude and phase control unit to compensate for the gain requirements of the RF transmission channel in the phased array system; after the gain compensation amplifier is integrated, the input end of the amplifier is connected to the output end of the digitally controlled attenuator, and the output end is connected to the input end of the digitally controlled phase shifter.
[0018] Figure 3 The principle block diagram of the drive amplifier unit is given. Figure 3 In the figure, Vi is the input end of the driving amplifier unit, Vo is the output end of the driving amplifier unit, and GND is the ground end of the driving amplifier chip. The driving amplifier unit includes an adjustable attenuator, a driving amplifier, and a power modulation chip. The input end of the adjustable attenuator is connected to the digitally controlled phase shifter of the amplitude phase control unit as the input end of the driving amplifier unit, and the output end is connected to the input end of the driving amplifier; it is used to adjust the power of the input signal after the amplitude phase to change the output power of the driving amplifier so that it is adapted to the power required by the power amplifier unit. The output end of the driving amplifier is connected to the power amplifier unit as the output end of the driving amplifier unit; it is used to power amplify the input signal adapted by the adjustable attenuator to obtain the target amplified signal. The power modulation chip is used to provide a pulse modulated power supply voltage for the driving amplifier. In this embodiment, the adjustable attenuator is implemented by a gold wire jumper method without the need for additional control of a single channel, and can also be implemented by a digitally controlled attenuator with a control port, and its attenuation range is 0~7dB, and the attenuation step is 1dB.
[0019] Figure 4 The principle block diagram of the power amplifier unit is given. Figure 4 In the figure, PA represents a power amplifier circuit, Vi is the input terminal of the power amplifier circuit, Vo is the output terminal of the power amplifier circuit, Vd is the drain bias voltage of the power amplifier circuit, Vg is the gate bias voltage of the power amplifier circuit, and GND is the ground terminal of the power amplifier circuit; the variable VDD generated by the switch resistor array unit provides a drain supply voltage for the power amplifier circuit through a pulse PMOS circuit, and the opening and closing of the PMOS circuit is controlled by the potential Vp. Figure 4The power amplifier unit includes a pulse modulation PMOS circuit and a power amplifier circuit. The pulse modulation PMOS circuit is composed of a PMOS tube, whose gate is connected to the control pulse signal provided by the external radar system, the source is connected to the variable VDD provided by the power supply control unit, and the drain is connected to the drain bias voltage of the power amplifier circuit. The high and low level states of the pulse signal are used to control the conduction and shutdown of the PMOS tube to control the on-off modulation of the drain of the power amplifier, so that the power amplifier circuit has a radar transmission-like pulse working mode.
[0020] Figure 5 The power amplifier circuit schematic diagram inside the power amplifier unit is given. The power amplifier circuit works in the L band and adopts microwave distributed circuit parameter design. Figure 5 The power amplifier circuit includes an input-stage network matching unit, a high-power transistor, and an output-stage network matching unit. The input-stage network matching unit and the output-stage network matching unit are both implemented using ceramic matching circuits, and the high-power transistor is manufactured using existing GaN semiconductor processes. The input port signal of the power amplifier circuit is vin, the output port signal is vout, the gate voltage bias port is VGa, VGb, and the drain voltage bias port is VDa, VDb.
[0021] The input stage matching unit includes: capacitor C1, capacitor C2a, capacitor C2b, transmission line TL1, transmission line TL2, transmission line TL3, transmission line TL4, transmission line TL5, transmission line TL6, transmission line TL7, transmission line TL8a, transmission line TL8b, resistor R1a, resistor R1b, and resistor R2. One end of capacitor C1 is connected to input port signal vin, and the other end is connected to one port of transmission line TL1. The other end of transmission line TL1 is respectively connected to one end of transmission line TL2 and one end of transmission line TL4. The other end of transmission line TL2 is connected to the first port of transmission line TL3. The other port of transmission line TL3 is open. The other end of transmission line TL4 is connected to one end of transmission line TL5 and one end of transmission line TL7. The other end of transmission line TL5 is connected to one end of transmission line TL6. The other end of transmission line TL6 is open. The other end of transmission line TL7 is connected to one end of transmission line TL8a, one end of transmission line TL8b, and one end of resistor R2. The other end of the transmission line TL8a is connected to one end of the resistor R1a, and the other end of the transmission line TL8b is connected to one end of the resistor R1b. The other end of the resistor R1a is connected to one end of the capacitor C2a and the gate bias terminal VGa. The other end of the resistor R1b is connected to one end of the capacitor C2b and the gate bias terminal VGb. The other end of the capacitor C2a is grounded. The other end of the capacitor C2b is also grounded, and the other end of the resistor R2 is the output end of the input stage network matching unit.
[0022] The gate of the high-power transistor HT1 is connected to the other end of the resistor R2, and its input signal comes from the output signal of the input-stage network matching unit. The source of the high-power transistor HT1 is grounded, and the drain outputs the amplified signal to the output-stage network matching unit.
[0023] The output stage network matching unit includes a transmission line TL9, a transmission line TL10a, a transmission line TL10b, a transmission line TL11, a transmission line TL12a, a transmission line TL12b, a transmission line TL13a, a transmission line TL13b, a transmission line TL14, a capacitor C3a, a capacitor C3b and a capacitor C4. One end of the transmission line TL9 is used as the input end of the output matching network, connected to the drain of the high-power transistor HT1, and connected to the amplified signal of the high-power transistor HT1; the other end is connected to one end of the transmission line TL10a, one port of the transmission line TL10b and one end of the transmission line TL11. The other end of the transmission line TL10a is connected to one end of the capacitor C3a and the drain bias port VDa. The other end of the transmission line TL10b is connected to one end of the capacitor C3b and the drain bias port VDb. The other end of the transmission line TL11 is connected to one end of the transmission line TL12a, one end of the transmission line TL12b and one port of the transmission line TL14. The other end of the transmission line TL12a is connected to a port of the transmission line TL13a. The other end of the transmission line TL13a is open. The other end of the transmission line TL12b is connected to one end of the transmission line TL13b. The other end of the transmission line TL13b is open. One end of the transmission line TL14 is connected to one end of the capacitor C4. The other end of the capacitor C4 is the output end of the output stage network matching unit, and the output signal vout.
[0024] In this embodiment, the capacitor C1 inside the power amplifier circuit is an input port DC isolation capacitor, the capacitor C4 is an output port DC isolation capacitor, the capacitors C2a and C2b are gate bias port filter capacitors with the same capacitance, and the capacitors C3a and C3b are drain bias port filter capacitors with the same capacitance. The resistors R1a, R1b, and R2 are implemented by TaN thin film resistors compatible with alumina ceramic thin film circuit technology to enhance the stability of the power amplifier, and the resistance of the resistor R1a is the same as that of the resistor R1b. The transmission lines TL1, TL2, TL3, TL4, TL5, TL6, TL7, TL8a, and TL8b achieve input matching of the power amplifier circuit by taking appropriate values, so that it has good input port return loss, and the length and width of the transmission lines TL8a and TL8b are the same, ensuring that the gate bias port has strict symmetry. Transmission lines TL9, TL10a, TL10b, TL11, TL12a, TL12b, TL13a, TL13b and TL14 achieve optimal fundamental and harmonic impedance matching of the power amplifier circuit through appropriate values, so that it has high drain output efficiency characteristics. Transmission lines TL10a and TL10b have the same length and width, ensuring that the drain bias port has strict symmetry. Transmission lines TL12a and TL12b have the same length and width, and transmission lines TL13a and TL13b have the same length and width. The high-power transistor HT1 contains multi-cell HEMT transistors, and high-power output capacity is achieved through multi-cell synthesis. The output-stage network matching units are electrically interconnected through gold wire bonding, which has the advantages of simple assembly process and high consistency.
[0025] The high-power transistor HT1 uses a GaN power transistor, which is manufactured using an industrial-grade GaN semiconductor process and has excellent high-efficiency characteristics at +48V and +28V drain voltages. Alumina ceramic is used as an impedance matching circuit network. When powered by a +48V drain power supply, the saturated output power is 51dBm under a -3V gate voltage bias. When the drain voltage +48V drops, the output power drops accordingly. During implementation, the input-stage network matching unit is integrated on a ceramic thin film circuit, and the output-stage network matching unit is integrated on a ceramic thin film circuit. There is a separate heat dissipation carrier under the GaN high-power transistor between the input-stage network matching unit and the output-stage network matching unit. The input signal port vin, the output port signal vout, the gate voltage bias ports VGa and VGb, and the drain voltage bias ports VDa and VDb are as follows. Figure 5Correspondingly, the microwave signal port, the gate voltage bias port, the drain voltage bias port, the input-stage network matching unit, the high-power transistor, and the output-stage network matching unit are electrically interconnected through gold wire bonding, which has the advantages of simple assembly process and high consistency.
[0026] The input end of the power coupling unit is connected to the output end of the power amplifier output stage network matching unit. The first output end of the power coupling unit is connected to the input port of the isolator unit, and the target amplified signal with different output powers is used as the final output signal, which is output as the final signal RFout of the transmission control system after isolation processing. The second output port of the power coupling unit is connected to the input port of the power detection unit, and the target amplified signal with different output powers is used as feedback information and transmitted to the power supply control unit after detection, low-pass filtering and analog-to-digital conversion. In this embodiment, a high-power passive coupler is integrated inside the power coupling unit, and its coupling degree is 40dB. When the input power is 43~51dBm, the output power is about 3~11dBm, and the output power is suitable for the power input range of the detector inside the power detection unit. It should be noted here that the coupling degree of the coupler can also be designed to other values (such as 35dB, 45dB, etc.). The key is to ensure that the coupled output power can adapt to the detection power input range of the detector.
[0027] See also Figure 6 , is the input return loss characteristic curve of the power amplifier circuit. Through the matching design of the input stage network matching unit and the high-power transistor, the input return loss is less than -12dB within the 1.2~1.4 GHz frequency range specified by the L-band radar.
[0028] See also Figure 7 , which is the characteristic curve of the saturated output power of the power amplifier circuit changing with the drain voltage VDD. The saturated output power can be changed by changing the value of the drain voltage VDD. When the VDD voltage changes between 18 and 48 V, the saturated output power of the power amplifier circuit can change within the range of 43 dBm to 51 dBm. It can be seen that the output power of the power amplifier can be changed by controlling the switch resistor array unit to change VDD through the data recognition control unit, and the power requirement of the sub-array weighting can be met.
[0029] The power amplifier is the core component. When implementing, refer to Figure 8 By optimizing the fundamental and harmonic impedance matching design of the output stage network matching unit and the high-power transistor, and changing the drain voltage VDD to achieve the change of saturated output power, a high-efficiency output of more than 82% is achieved. This feature is suitable for different output power values required by each sub-array, and can realize high-efficiency transmission power weighting of the phased array system. Fig. 9This is the characteristic curve of the output power and drain efficiency of the power amplifier circuit changing with the input power. Fig. 9 It can be seen that when the power back-off scheme in the existing scheme three is used to achieve the output power required by the sub-array, the drain efficiency will be significantly reduced. For example, when the input power is 28dBm, the output power is 47dBm. At this time, the drain efficiency is less than 50%, which will cause the transmission efficiency of the sub-array to be significantly lower than the transmission efficiency of this embodiment.
[0030] The power detection unit is connected to the input end of the power supply control unit via a low-pass filter unit and an analog-to-digital conversion unit. The power detection unit is used to detect the input signal of the coupler to obtain a detection signal output. The low-pass filter unit is used to filter out the high-frequency signal in the detection signal and only retain the low-frequency signal, which can determine the size of the coupled output power and its corresponding relationship, so as to evaluate the output power of the power amplifier. The analog-to-digital conversion unit is used to sample the low-frequency signal output by the low-pass filter unit and convert the sampled signal into a digital signal. In this embodiment, the analog-to-digital converter inside the analog-to-digital conversion unit can be implemented using a low-speed and high-precision sampling circuit of more than 12 bits, and the output port of the analog-to-digital conversion unit is connected to the power supply control power supply.
[0031] The power supply control unit includes a power supply voltage stabilization unit, a data identification control unit and a switch resistor array unit; wherein: The power supply voltage regulator unit is used to provide power supply voltage; the input port of the power supply voltage regulator unit is a high-voltage power supply input, and the internal part includes a DC-DC converter, an LDO voltage regulator, etc., and its function is to be able to convert the high-voltage power supply into a low-voltage power supply, while achieving a higher power conversion efficiency; it should be noted that the power supply voltage regulator unit not only generates the power supply VDD required by the power amplifier, but also generates the power required by the drive amplifier, the control circuit, etc., such as +5V, +3.3V, etc.; the output port of the power supply voltage regulator unit is connected to the second input port of the switch resistor array unit. The power supply voltage regulator unit includes a DC-DC converter and an LDO voltage regulator, the input end of the DC-DC converter is connected to the high-voltage power supply input end, and the output end is connected to the input end of the LDO voltage regulator, and the output end of the LDO voltage regulator is connected to the switch resistor array unit as the output end of the power supply voltage regulator unit.
[0032] The data identification control unit receives the initial value of the control word input and the feedback information provided by the analog-to-digital conversion unit, generates different control words according to the initial value of the control word input and the feedback information, and transmits them to the switch resistor array unit. The data identification control unit has the function of inputting the initial value of the control word, can assign the initial control word to the switch resistor array unit, and read back the VDD data according to the digital signal provided by the analog-to-digital converter, and dynamically adjusts the multi-bit control word assigned to the switch resistor array unit through the detection information, thereby realizing the regulation of the power supply voltage VDD, and finally achieving the purpose of regulating the output power of the power amplifier unit; the output port of the data identification control unit is connected to the first input port of the switch resistor array unit. The switch resistor array unit acts as a load adjustment resistor of the power supply voltage stabilization unit, and adjusts the power supply voltage according to the received control word to generate a variable VDD. The variable VDD is a voltage value with a range of 15 to 50V. The switch resistor array unit serves as the variable resistor load end of the power supply voltage stabilizing unit, and the output port can generate a variable VDD voltage value for supplying power to the power amplifier unit; the resistance value of the variable resistor load end is directly controlled by the digital signal output by the analog-to-digital conversion unit, a certain digital control word corresponds to a certain resistance value, and one control word corresponds to one VDD voltage output.
[0033] This embodiment provides a comparison of the effects of three typical existing solutions for implementing power weighting for different sub-arrays of a transmitting system and the above-mentioned transmitting control system applicable to power weighting of a phased array. To simplify the analysis, the circuit behind the power amplifier that causes insertion loss is not discussed here.
[0034] See also Figure 1 , Figure 1Here, PA1, PA2, PA3, PA4, and PA5 represent five power amplifiers with different saturated output powers, and the saturated output powers are PO1=43dBm, PO2=45dBm, PO3=47dBm, PO4=49dBm, and PO5=51dBm. In the existing solution one, a power amplifier PA1 is used. PA1 works in a saturated output state and the drain voltage is +48V. By cascading 8dB, 6dB, 4dB, 2dB, and 0dB high-power attenuators fixed attenuators behind PA1, five different power outputs PO1, PO2, PO3, PO4, and PO5 of the five sub-arrays are realized, thereby realizing power weighted processing of the sub-arrays. This solution has the disadvantages of low transmission efficiency, high energy consumption, and large size of high-power attenuators requiring additional heat dissipation measures; in the existing solution two, five different power amplifiers are used in the five sub-arrays. PA1, PA2, PA3, PA4, and PA5 all work in a saturated output state and have a drain voltage of +48V, achieving five output powers PO1, PO2, PO3, PO4, and PO5, thereby realizing power weighted processing of the subarray. This solution can achieve high transmission efficiency for each subarray, but the five power amplifiers will lead to increased costs, difficulty in controlling step accuracy, and poor flexibility in power variation. In the existing solution three, a power amplifier PA1 with a drain voltage of +48V is used, of which only one power amplifier PA1 with a subarray output power of PO5 works in a saturated state. Output state, the remaining output powers PO1, PO2, PO3, PO4 of the sub-array PA1 are all working in the power back-off state, and the five output powers PO1, PO2, PO3, PO4, PO5 are realized by controlling the input power to adjust the output power, thereby realizing the power weighted processing of the sub-array. This scheme has the problems of low transmission efficiency, difficult to control the power back-off accuracy, and sensitivity to temperature fluctuation factors. In this embodiment, only one GaN power amplifier PA1 is used, and the five output powers PO1, PO2, PO3, PO4, PO5 can also be realized by changing the drain supply voltage. O4, PO5, thereby realizing power weighting of the transmitting system, and the voltage power amplifier PA1 with different power supplies can realize high-efficiency output when working in the saturated transmitting state. When the typical value is +48V drain power supply, the output power of the transmitting channel is 51dBm. When the drain power supply is continuously reduced, the saturated output power decreases accordingly. Only one power amplifier is used to realize high-efficiency output of different sub-arrays. Compared with the three existing schemes, although they can ultimately achieve the purpose of power weighting of different sub-arrays in the phased array transmitting system, the embodiment scheme takes into account the advantages of low cost, high efficiency, and high-precision output power control.
[0035] In addition to the above implementations, the transmission control system applicable to phased array power weighting of this embodiment may also adopt traditional microwave modules, three-dimensional stacked circuits and other technical means.
[0036] The description of the above specific implementation manner should be clear to relevant technical personnel in the field. The above specific implementation manner is only a specific example of implementation and is not restrictive. The present invention is not limited to a specific transmission frequency band, a specific number of sub-arrays, a specific power range, a specific implementation process, nor is it limited to the transmission control system itself. It can also be integrated with the receiving system to realize the power weighting of the phased array transceiver system. All methods that use the same method to realize the phased array transmission power weighting are within the protection scope of the present invention.
Claims
1. A transmission control system suitable for phased array power weighting, comprising: An amplitude and phase control unit, a drive amplifier unit, a power amplifier unit, a power coupling unit, a power detection unit, a low-pass filter unit, an analog-to-digital conversion unit, a power supply control unit and an isolator unit, characterized in that: The input end of the amplitude and phase control unit is the inflow end of the radio frequency input signal RFin, and the output port is connected to the input end of the driving amplifier unit; The output end of the driving amplifier unit is connected to the first input end of the power amplifier unit; The second input end of the power amplification unit is connected to the output end of the power supply control unit, and the output end is connected to the input end of the power coupling unit; The first output end of the power coupling unit is connected to the input end of the isolator unit, and the second input end is connected to the power supply control unit after passing through the power detection unit, the low-pass filter unit, and the analog-to-digital conversion unit in sequence; The output end of the isolator unit is the final signal output end of the entire transmission control system, and the output signal is RFout; The power supply control unit includes a power supply stabilizing unit, a data identification control unit and a switch resistor array unit; the input end of the power supply stabilizing unit is a high-voltage power supply input end, and the output end is connected to the first input end of the switch resistor array unit; the first input end of the data identification control unit is connected to the analog-to-digital conversion unit, the second input end is a control word initial value input end, and the output end is connected to the second input end of the switch resistor array unit; the output end of the switch resistor array unit is the output end of the power supply control unit.
2. The transmission control system suitable for phased array power weighting according to claim 1, characterized in that: The amplitude and phase control unit comprises a digitally controlled attenuator and a digitally controlled phase shifter. The input end of the digitally controlled attenuator is the input end of the amplitude and phase control unit, and the output end of the digitally controlled phase shifter is connected to the input end of the driving amplifier unit.
3. The transmission control system suitable for phased array power weighting according to claim 2, characterized in that: A gain compensation amplifier is also provided in the amplitude and phase control unit. The input end of the gain compensation amplifier is connected to the output end of the digitally controlled attenuator, and the output end of the gain compensation amplifier is connected to the input end of the digitally controlled phase shifter.
4. The transmission control system suitable for phased array power weighting according to claim 1, characterized in that: The driving amplifier unit includes an adjustable attenuator and a driving amplifier; the input end of the adjustable attenuator is connected to the output end of the amplitude and phase control unit, and the output end is connected to the input end of the driving amplifier, which is used to adjust the input power of the driving amplifier to change the output power of the driving amplifier unit to adapt to the power required by the power amplifier unit; the output end of the driving amplifier is connected to the power amplifier unit, which is used to amplify the signal output by the amplitude and phase control unit to obtain a target amplified signal.
5. The transmission control system suitable for phased array power weighting according to claim 4, characterized in that: The adjustable attenuator is realized by using a gold wire jumper or a digitally controlled attenuator with a control port.
6. The transmission control system suitable for phased array power weighting according to claim 1, characterized in that: The power amplification unit includes a pulse modulation PMOS circuit and a power amplification circuit; The pulse modulation PMOS circuit includes a PMOS tube, whose gate is connected to the pulse control signal provided by the external radar system, the source is connected to the variable VDD provided by the power supply control unit, and the drain is connected to the power amplifier. The PMOS tube is controlled to be turned on and off by the high and low level states presented by the pulse signal to realize the on-off modulation of the power amplifier drain, thereby having a pulse working mode of the radar transmission state; The power amplifier circuit includes an input-stage network matching unit, a power transistor and an output-stage network matching unit; the input end of the input-stage network matching unit is connected to the output end of the driving amplifier, and the output end is connected to the power transistor, receiving the target amplified signal output by the driving amplifier, and is used to achieve impedance matching of the signal at the input end of the power transistor; the power amplifier is used to perform power amplification on the target amplified signal; the output-stage network matching unit is connected to the input end of the coupler, and is used to achieve impedance matching between the output end of the power amplifier and the input end of the coupler.
7. The transmission control system suitable for phased array power weighting according to claim 1, characterized in that: The coupler is a high-power passive coupler with a coupling degree of 40 dB. When the input power is 43-51 dBm, the output power is about 3-11 dBm.
8. The transmission control system suitable for phased array power weighting according to claim 1, characterized in that: The power supply voltage stabilization unit includes a DC-DC converter and an LDO voltage regulator. The input end of the DC-DC converter is connected to the high voltage power supply input end, and the output end is connected to the input end of the LDO voltage regulator. The output end of the LDO voltage regulator is connected to the switch resistor array unit as the output end of the power supply voltage stabilization unit.
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