Low-voltage distribution lightweight control chip

Abstract

The invention discloses a low-voltage power distribution lightweight control chip. The control chip comprises an embedded processor, a power monitoring and measuring module, a safety management module, a multi-power domain management module, a communication interface module, an internal memory, an intelligent relay management module and a special power IP module, the embedded processor is connected with the special electric power IP module, and the embedded processor and the special electric power IP module are respectively connected with the electric power monitoring and measuring module, the safety management module, the multi-power-domain management module, the communication interface module, the internal memory and the intelligent relay management module through high-speed buses. According to the invention, each module and the bus are in communication connection with different devices, multiple communication modes do not need to be integrated, the chip structure can be simplified, the number of integrated modules can be reduced, the chip cost is reduced, and the requirements of light weight and low power consumption are met.

Description

Background Art

[0002] The low-voltage power distribution system is an important part of the power grid, which directly affects the stable transmission of electricity and the power quality on the user side. With the massive access of distributed energy, microgrids and electric vehicle charging facilities, the low-voltage power distribution system faces multiple challenges such as increased data volume and increased communication complexity.

[0003] In order to cope with the problems of increased data volume and complex communications faced by low-voltage power distribution systems, the currently commonly used control chip integrates multiple computing units and communicates with the central processing unit separately. The central processing unit then allocates computing tasks uniformly to schedule multiple computing units for data processing, so as to complete data collection, monitoring, control and management in low-voltage power distribution, and ensure the stability and response speed of the system.

[0004] However, the commonly used control chips currently have the following technical problems: as the amount of data that needs to be communicated in the low-voltage power distribution system increases, the number of connected devices also increases dramatically. In order to match different devices, the control chip integrates multiple communication methods, resulting in the control chip structure being too complex and costly, making it difficult to meet the requirements of lightweight and low power consumption. Summary of the invention

[0005] The present invention proposes a lightweight control chip for low-voltage power distribution, a task allocation method and a device, which can solve the problem that the existing control chip integrates multiple communication modules, resulting in an overly complex structure and high integration cost.

[0006] A first aspect of an embodiment of the present invention provides a low-voltage power distribution lightweight control chip, the low-voltage power distribution lightweight control chip comprising: an embedded processor, a power monitoring and measurement module, a safety management module, a multi-power domain management module, a communication interface module, an internal memory, an intelligent relay management module and a power-specific IP module;

[0007] The embedded processor is connected to the power-specific IP module, and the embedded processor and the power-specific IP module are respectively connected to the power monitoring and measurement module, the security management module, the multi-power domain management module, the communication interface module, the internal memory and the intelligent relay management module through high-speed buses;

[0008] The embedded processor is a RISC architecture, which is used for task scheduling and control calculations, and manages and allocates computing resources;

[0009] Power monitoring and measurement module, used to collect electrical parameters of low-voltage power distribution system;

[0010] A security management module, used for performing lightweight encryption on the electrical parameters and the calculation parameters of the embedded processor;

[0011] A multi-power domain management module, used to independently power the embedded processor, the power monitoring and measurement module, the security management module, the communication interface module, the internal memory and the intelligent relay management module;

[0012] Communication interface module, used to provide a communication interface for data exchange with external devices or low-voltage power distribution systems;

[0013] Internal memory for storing operating data and control instructions;

[0014] An intelligent relay management module for selecting a communication path from power line carrier communication and high-speed wireless communication;

[0015] The power-specific IP module is used to collect and process power signals of a low-voltage power distribution system, synchronize the time of the low-voltage power distribution system, send and receive messages and parse them, detect communication networks, and perform phase noise detection and compensation during clock synchronization.

[0016] In combination with the first aspect, in one implementation, the embedded processor includes: a main task core, a computing core, and a security core;

[0017] The main task core is used to identify the current task from the task queue and assign it to the computing core;

[0018] The computing core is used to perform computing processing according to the current task;

[0019] The security core is used to encrypt the data of the computing core, perform security checks at startup, and detect abnormal tasks of the low-voltage power distribution system in real time.

[0020] A second aspect of an embodiment of the present invention provides a task allocation method based on a low-voltage power distribution lightweight control chip, the method comprising:

[0021] Acquire parameters to be processed and processing tasks corresponding to the parameters to be processed, wherein the parameters to be processed include power data collected by a built-in sensor module and environmental data for monitoring an external environment;

[0022] Analyze and process the task attributes of the current task to obtain the task priority;

[0023] The current task is sequentially allocated to the computing core according to the task priority, so that the computing core uses the parameters to be processed to process the task.

[0024] In conjunction with the second aspect, in one implementation, after the step of obtaining the parameters to be processed, the method further includes:

[0025] An abnormal value check is performed on the data of the parameter to be processed to obtain an abnormality detection result.

[0026] In conjunction with the second aspect, in one implementation, after the step of obtaining the parameters to be processed, the method further includes:

[0027] The parameters to be processed are preprocessed using a compression algorithm and a filtering algorithm to obtain processing parameters.

[0028] A third aspect of an embodiment of the present invention provides a task allocation device based on a low-voltage power distribution lightweight control chip, the device comprising:

[0029] An acquisition module, used to acquire parameters to be processed and processing tasks corresponding to the parameters to be processed, wherein the parameters to be processed include power data collected by the built-in sensor module and environmental data for monitoring the external environment;

[0030] An analysis module, used to analyze and process the task attributes of the current task to obtain the task priority;

[0031] The allocation module is used to allocate the current task to the computing core in sequence according to the priority of the task, so that the computing core uses the parameters to be processed to process the task.

[0032] In conjunction with the third aspect, in one implementation, the device further includes:

[0033] The anomaly detection module is used to perform an abnormal value check on the data of the parameters to be processed after the step of obtaining the parameters to be processed to obtain an abnormality detection result.

[0034] In conjunction with the third aspect, in one implementation, the device further includes:

[0035] The preprocessing module is used to preprocess the parameters to be processed by using a compression algorithm and a filtering algorithm to obtain processing parameters after the step of obtaining the parameters to be processed.

[0036] Compared with the prior art, the embodiments of the present invention provide a low-voltage power distribution lightweight control chip, task allocation method and device, which have the following beneficial effects: the present invention can integrate an embedded processor, a power monitoring and measurement module, a safety management module, a multi-power domain management module, a communication interface module, an internal memory, an intelligent relay management module and a power-specific IP module through a single high-speed bus, so that the chip can communicate with different devices through various modules and buses, without the need to integrate multiple communication methods, and can simplify the chip structure. At the same time, it can reduce the number of integrated modules and reduce the chip cost to meet the requirements of lightweight and low power consumption. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] Figure 1 It is a structural schematic diagram of a low-voltage power distribution lightweight control chip provided by an embodiment of the present invention;

[0038] Figure 2 is a schematic diagram of the structure of an embedded processor provided by an embodiment of the present invention;

[0039] Figure 3 It is a schematic diagram of a built-in algorithm of a low-voltage power distribution lightweight control chip provided by an embodiment of the present invention;

[0040] Figure 4 It is a schematic diagram of priority classification of a low-voltage power distribution lightweight control chip provided by an embodiment of the present invention;

[0041] Figure 5 It is a flowchart of a task allocation method based on a low-voltage power distribution lightweight control chip provided by an embodiment of the present invention;

[0042] Figure 6 It is an operation flow chart of a task allocation method based on a low-voltage power distribution lightweight control chip provided by an embodiment of the present invention;

[0043] Figure 7 It is a structural schematic diagram of a task allocation device based on a low-voltage power distribution lightweight control chip provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0044] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0045] The low-voltage power distribution system is an important part of the power grid, which directly affects the stable transmission of electricity and the power quality on the user side. With the massive access of distributed energy, microgrids and electric vehicle charging facilities, the low-voltage power distribution system faces multiple challenges such as increased data volume and increased communication complexity.

[0046] In order to cope with the problems of increased data volume and complex communications faced by low-voltage power distribution systems, the currently commonly used control chip integrates multiple computing units and communicates with the central processing unit separately. The central processing unit then allocates computing tasks uniformly to schedule multiple computing units for data processing, so as to complete data collection, monitoring, control and management in low-voltage power distribution, and ensure the stability and response speed of the system.

[0047] However, the commonly used control chips currently have the following technical problems: as the amount of data that needs to be communicated in the low-voltage power distribution system increases, the number of connected devices also increases dramatically. In order to match different devices, the control chip integrates multiple communication methods, resulting in the control chip structure being too complex and costly, making it difficult to meet the requirements of lightweight and low power consumption.

[0048] In order to solve the above problems, a low-voltage power distribution lightweight control chip, task allocation method and device provided in the embodiments of the present application will be introduced and explained in detail through the following specific embodiments.

[0049] Reference Figure 1 , showing a schematic structural diagram of a low-voltage power distribution lightweight control chip provided by an embodiment of the present invention.

[0050] Wherein, as an example, the low-voltage power distribution lightweight control chip may include: an embedded processor, a power monitoring and measurement module, a safety management module, a multi-power domain management module, a communication interface module, an internal memory, an intelligent relay management module and a power-specific IP module;

[0051] The embedded processor is connected to the power-specific IP module, and the embedded processor and the power-specific IP module are respectively connected to the power monitoring and measurement module, the security management module, the multi-power domain management module, the communication interface module, the internal memory and the intelligent relay management module through high-speed buses;

[0052] The embedded processor is a RISC architecture, which is used for task scheduling and control calculations, and manages and allocates computing resources;

[0053] Power monitoring and measurement module, used to collect electrical parameters of low-voltage power distribution system;

[0054] A security management module, used for performing lightweight encryption on the electrical parameters and the calculation parameters of the embedded processor;

[0055] A multi-power domain management module, used to independently power the embedded processor, the power monitoring and measurement module, the security management module, the communication interface module, the internal memory and the intelligent relay management module;

[0056] Communication interface module, used to provide a communication interface for data exchange with external devices or low-voltage power distribution systems;

[0057] Internal memory for storing operating data and control instructions;

[0058] An intelligent relay management module for selecting a communication path from power line carrier communication and high-speed wireless communication;

[0059] The power-specific IP module is used to collect and process power signals of a low-voltage power distribution system, synchronize the time of the low-voltage power distribution system, send and receive messages and parse them, detect communication networks, and perform phase noise detection and compensation during clock synchronization.

[0060] In a specific operation mode, the embedded processor can be a CPU processor of a chip, which is responsible for executing control logic and task scheduling, managing the allocation of on-chip resources, and ensuring real-time response. The embedded processor can adopt a RISC architecture design and support a low power consumption mode to ensure minimum power consumption during non-peak hours, as described below:

[0061] When the embedded processor receives sensor data (such as current and voltage fluctuations) and finds an anomaly, it triggers a high-priority task (such as fault protection). The control logic will quickly analyze the data to determine whether it is a short circuit, overload, or other anomaly, and decide to take appropriate measures (such as automatic tripping or sounding an alarm). For non-urgent tasks that require real-time response (such as voltage regulation), the embedded processor will dynamically allocate resources according to the current load, and call the power monitoring module through the control logic to adjust the output parameters in real time to ensure the balance and stability of the power grid.

[0062] In one embodiment, the steps of task scheduling are as follows:

[0063] The first step is priority determination: The embedded processor identifies and extracts new tasks from the task queue through the task priority determination mechanism. Tasks are divided into high priority, medium priority, and low priority according to the urgency and real-time nature of the tasks. For example, fault detection is the highest priority, and the system processes such tasks first to ensure that emergency situations can be responded to quickly.

[0064] The second step is dynamic resource allocation: According to the priority of the task, the embedded processor dynamically allocates resources. For example, under peak load, important tasks (such as voltage regulation) will be allocated more computing resources, while under low load, it will enter low power mode to reduce unnecessary energy consumption. By turning on or sleeping some cores, the embedded processor can flexibly respond to load fluctuations.

[0065] The third step is parallel execution and real-time monitoring: The embedded processor processes multiple tasks in parallel to ensure that key tasks are executed independently on different cores, improving the processing efficiency of the system. At the same time, the embedded processor monitors the execution progress and status of the task in real time, so that resources can be adjusted as needed during the task execution to ensure that the task is completed on time.

[0066] The fourth step is edge computing support: When the workload is large, the CPU will delegate some non-critical tasks to edge nodes for processing. This process not only reduces the burden on the central processor, but also improves the system's response speed. For example, when the load is low, the system will delegate big data analysis or low-priority equipment monitoring tasks to ensure that the central CPU focuses on more urgent tasks.

[0067] Step 5: Feedback and scheduling optimization: After each task is completed, the CPU records the execution results and feeds them back to the system log. The CPU analyzes the effect of task execution based on the feedback data, and dynamically adjusts the resource allocation strategy to optimize the efficiency of subsequent task scheduling. Through this feedback mechanism, the system can continuously optimize the scheduling logic to ensure that different tasks can be reasonably processed under various operating conditions.

[0068] In a specific operation mode, the power monitoring and measurement module is used to collect electrical parameters (voltage, current, power, etc.) in the power distribution system. The module has a high-precision analog-to-digital conversion function, can monitor the operating status of the low-voltage power distribution system in real time, and transmit the collected data to the embedded CPU for analysis.

[0069] In a specific operation mode, the security management module: has a built-in lightweight encryption unit to ensure the security of control signals and collected data. It supports national encryption algorithm acceleration to ensure efficient data encryption and decryption capabilities with low resource consumption and ensure the network security of the system.

[0070] In a specific operation mode, the multi-power domain management module: supports dynamic management of multiple voltage domains, provides independent power supply to different functional modules, ensures the optimal energy efficiency of each part under different working conditions, and has a power-off protection function, which can maintain the integrity of key data when power is off.

[0071] In a specific operation mode, the communication interface module provides a standardized communication interface for exchanging data with other devices or systems and supports multiple communication protocols, including RS485, CAN bus and wireless communication modules, to achieve flexible system integration.

[0072] In a specific operation mode, the internal memory is used to store operation data and control instructions. The internal memory is divided into two parts: cache and power-off saving storage. The cache is used for real-time data processing, and the power-off saving storage is used to store key configurations and fault information.

[0073] In a specific operation mode, the intelligent relay management module integrates relay interaction and communication control functions, supports dual-mode communication of power line carrier communication (HPLC) and high-speed wireless communication (RF), and ensures the communication quality and reliability of the system in complex environments by dynamically selecting the best communication path.

[0074] In a specific operation mode, the power-specific IP module may:

[0075] (1) AD control and interpolation module: used to collect and process power signals, achieve accurate analog-to-digital conversion and data interpolation, and ensure high data accuracy.

[0076] (2) B-code timing module: It realizes the time synchronization of the power system and adopts IRIG-B coding to ensure the clock consistency of the system in power communication.

[0077] (3) Power-specific MAC module: used for media access control, supports GOOSE message transmission, reception and parsing at the station control layer and process layer, and ensures the real-time and stability of power system communications.

[0078] (4) Network storm processing module: used to detect and suppress network storms caused by network topology design problems and ensure the stability of the communication network.

[0079] (5) Optical difference synchronization module: achieves high-precision clock synchronization through phase noise detection and compensation.

[0080] Data processing and security related IP includes:

[0081] (1) Data compression and encryption module: compresses and encrypts data before transmission, reducing communication load and improving data security. It ensures security in large-scale data transmission and optimizes bandwidth utilization.

[0082] (2) Dynamic permission and storage management module: Dynamically manage storage resources according to user and device permissions, monitor cache and storage status, and prevent information leakage. It is suitable for smart power systems with multi-user access rights.

[0083] Reference Figure 2 , shows a schematic diagram of the structure of an embedded processor provided by an embodiment of the present invention. In one embodiment, the embedded processor includes: a main task core, a computing core and a security core;

[0084] The main task core is used to identify the current task from the task queue and assign it to the computing core;

[0085] The computing core is used to perform computing processing according to the current task;

[0086] The security core is used to encrypt the data of the computing core, perform security checks at startup, and detect abnormal tasks of the low-voltage power distribution system in real time.

[0087] Specifically, Figure 2As shown, the embedded processor of the control chip covers three cores: communication management core, main task core, computing core and security core. Among them, the main task core, computing core and security core communicate with each other through the communication management core. Through the collaborative work of each core, the system can achieve efficient operation, stable communication and data security.

[0088] Among them, the main task core can include the following functions:

[0089] (1) Task priority scheduling function, that is, the CPU sets the priority according to the urgency and importance of different tasks. High-priority tasks such as fault detection and protection instructions will be executed first to deal with sudden power events and ensure the stable operation of the power system. The task scheduling process is as follows:

[0090] The first step is task identification and priority classification: The CPU first identifies all current tasks from the task queue and analyzes the task attributes, including the real-time requirements, urgency, and importance of the task. Based on the characteristics of the task, the tasks are divided into high priority, medium priority, and low priority. For example, fault detection and protection instructions are high priority tasks because they are related to the stability and safety of the power system. Tasks such as data recording and log storage are low priority because their delays have little impact on the system.

[0091] The second step is task allocation and dynamic resource scheduling: After a high-priority task (such as sudden fault detection) is identified, the CPU will immediately suspend ongoing low-priority tasks and allocate computing resources to high-priority tasks first. When processing high-load tasks, the CPU will dynamically allocate computing resources based on current resource usage. For example, when a current short circuit is detected, the system will allocate more CPU cores to handle fault detection tasks to ensure rapid identification and response.

[0092] The third step is real-time execution and task monitoring: If multiple high-priority tasks exist at the same time (such as multiple failures at the same time), the CPU will assign tasks to different computing cores for parallel processing to ensure that all high-priority tasks can be executed on time. During the task execution process, the CPU will monitor the task progress in real time to ensure that the task is completed within the set time frame, and reallocate resources when necessary to ensure the best execution effect.

[0093] Step 4: Task decentralization and edge computing support: When the central system is overloaded, the CPU will delegate some medium and low priority non-urgent tasks (such as data collection and storage) to the edge devices for execution, thereby freeing up core resources to handle high-priority tasks. This can reduce the burden on the central CPU and improve the response speed of key tasks. The edge device pre-processes the received task data and summarizes the processing results and transmits them back to the central system for use in subsequent tasks.

[0094] Step 5: Task completion and feedback optimization: After the task is completed, the CPU records the task execution results and transmits key data to the monitoring system or feedback log. The CPU analyzes the effect of task execution based on the feedback and dynamically adjusts the scheduling strategy. For example, if the processing of a task takes too long, the system may allocate more resources in the next scheduling to optimize the efficiency of task execution.

[0095] To explain with a practical example, when the power grid system detects that a node has a current overload, it will immediately classify the task as a high-priority task, the CPU will suspend the low-priority data recording task being executed, and dispatch all core resources to the fault detection and protection instruction generation tasks. At the same time, the fault detection task runs in parallel on multiple cores to ensure that the fault point is quickly detected and protection instructions are generated, such as circuit breaker tripping commands. After the fault is handled, the system records the location of the fault point and the cause of the fault, and feeds it back to the system log. Based on the task feedback, the CPU analyzes whether the resource allocation is sufficient and whether the response time is optimized, providing data support for subsequent tasks.

[0096] (2) Dynamic resource allocation function: The CPU dynamically allocates computing resources based on the real-time system load to ensure timely response to key tasks, allocates more resources to load control tasks during peak hours, and saves computing power and power consumption during idle hours.

[0097] In actual applications, the CPU of the low-voltage power distribution lightweight control chip dynamically allocates computing resources to optimize system performance. For example, during peak hours, the system detects large fluctuations in current and voltage, and the power load reaches the warning line. At this time, the CPU will mark the load control task as the highest priority and suspend or postpone other non-critical tasks such as log storage and status updates. In order to respond quickly to load changes, the CPU enables all available cores, splits the load control task into multiple subtasks (such as real-time voltage regulation, load forecasting and distribution), and processes these subtasks in parallel to ensure the smooth operation of the power system.

[0098] While these critical tasks are being processed, the CPU will monitor resource usage in real time and make adjustments based on the actual execution results. When the load control task is nearly completed or the load is reduced, the CPU will gradually shut down some cores and switch to low-power mode to save energy. At the same time, non-critical tasks will re-enter the execution state, and data logging tasks and system status updates will continue to be processed in low-power mode. This dynamic resource allocation strategy not only ensures efficient system response, but also optimizes power consumption during off-peak hours.

[0099] (3) Edge computing function: When the workload is too large, the CPU can delegate some data processing tasks to edge devices or other terminal nodes. This reduces the computing burden of the central system and speeds up the response. The computing core is mainly responsible for data processing tasks.

[0100] In practical applications, when the task load is too high, the CPU of the lightweight control chip of low-voltage power distribution will decentralize some tasks to the edge device through the edge computing support function to relieve pressure. Suppose in a large power distribution network, the central CPU of the system is executing a high-priority current regulation task, and the system load suddenly increases. At this time, the CPU detects that its own load is close to the limit and enters the task decentralization process. The CPU first identifies and prioritizes the current task, keeps the more urgent current regulation task on the central CPU, and marks the data acquisition tasks with lower real-time requirements (such as regional voltage and current monitoring) as decentralizable tasks. Next, the CPU splits the data acquisition task into multiple small tasks and distributes them to the corresponding edge nodes according to the power distribution area. For example, the voltage acquisition task of area A is decentralized to the edge device of area A, and the current acquisition task of area B is performed by the edge node of area B. When these edge nodes receive the acquisition instruction, they immediately start data acquisition through local sensors and perform simple data preprocessing (such as denoising and filtering). After completing the acquisition, each edge node feeds the processed data back to the central system through the communication module. In this way, the central CPU can focus on high-priority current regulation tasks, while data acquisition tasks are completed by each edge node, thereby balancing the system load and improving the overall response speed.

[0101] During the entire process, the central system will also monitor the task status of the edge devices in real time to ensure that the tasks are completed on time. If a certain edge node has a communication delay or cannot feedback data, the system will automatically select a backup node to take over the task to ensure the timeliness of data collection and the stability of the system. Through this task decentralization mechanism, the system not only ensures the rapid response of key tasks under high load, but also effectively reduces the computing pressure of the central CPU.

[0102] The computing core can include the following functions:

[0103] (1) Power data collection and analysis function: The CPU collects power parameters such as current and voltage in real time, and uses algorithms to analyze the operating status of the equipment to monitor power quality and detect power anomalies such as current overload or voltage fluctuation.

[0104] (2) Data compression and optimized transmission function: large amounts of data are compressed before transmission to reduce the burden on the communication network and ensure transmission speed and stability, reduce delays when the network load is high, and optimize power data upload.

[0105] (3) Fault detection and prediction function: The CPU uses data analysis algorithms to identify potential faults and issue early warnings to avoid equipment damage or system interruptions, thereby improving the reliability of power equipment. The specific process of fault prediction is as follows:

[0106] The first step is real-time data collection and basic preprocessing: the system collects data such as voltage, current, power factor, etc. through sensors, and performs basic preprocessing such as denoising and smoothing to ensure the accuracy of the data. For example, when the voltage fluctuation value begins to exceed the normal range, the system marks the data as "abnormal monitoring data" and prepares for further analysis.

[0107] The second step is data anomaly identification and preliminary classification: After basic preprocessing, the CPU checks the abnormal value of each data item and calls the corresponding detection algorithm according to different fault characteristics, for example:

[0108] Harmonic anomaly detection: If abnormal frequency fluctuations occur in the voltage or current waveform, a harmonic analysis algorithm (such as an FFT transform algorithm) is started to confirm the abnormal frequency.

[0109] Load anomaly detection: If the current or power factor shows a trend of deviating from the normal range, the system calls the load prediction algorithm to determine whether there is a trend of excessive load.

[0110] The third step is predictive algorithm call and data analysis: After identifying the data type, the system will enter the predictive algorithm application stage and call the most suitable algorithm according to the value and trend of the data, for example:

[0111] Harmonic analysis (FFT transformation): If the harmonic components increase, the FFT transformation algorithm will identify the harmonic frequency band and determine whether there is equipment aging caused by nonlinear loads.

[0112] Phase sequence calculation algorithm: When phase sequence imbalance is detected in a three-phase system, the phase sequence algorithm is called to identify the anomalies of the zero-sequence and negative-sequence components, and predict whether there is a phase sequence imbalance or grounding risk.

[0113] Simple harmonic and half-wave differential Fourier algorithm: used to analyze complex waveform anomalies. When an abnormal amplitude increase is detected in a specific band, the equipment failure trend is detected through specific harmonic components.

[0114] Step 4: Intelligent load forecasting and resource scheduling: If current, voltage and other data show a continuous upward trend, the system will start the load forecasting and resource scheduling algorithm to predict the load situation in the future. If the forecast results show that the load limit of the equipment is about to be reached, an early warning will be issued, and resource allocation may be adjusted in advance to avoid overload.

[0115] Step 5: Fault trend analysis and early warning: The CPU compares the predicted abnormal results with the historical data model. If the trend exceeds the preset safety threshold, it is judged as a potential fault risk. The system will issue an early warning to the maintenance team based on the severity of the fault trend and provide detailed fault type and location information.

[0116] Step 6: Data feedback and adjustment: The system archives the prediction results and feeds them back to the control center for subsequent analysis and parameter adjustment. After receiving the feedback data, the system will appropriately adjust the threshold or algorithm parameters to further optimize the accuracy and response time of fault prediction.

[0117] Through the above process, the chip can flexibly call different algorithms to analyze abnormal trends in specific data, thereby predicting potential failures in real time, preventing accidents, and improving the safety and reliability of equipment.

[0118] The communication management core can include the following functions:

[0119] (1) Dual-mode communication management function: supports dynamic switching between HPLC (power line carrier communication) and RF (wireless communication), ensures the continuity of data transmission, adapts to complex power environments, and automatically switches channels when communication is blocked.

[0120] (2) Parallel redundancy and high-availability communication function: PRP (Parallel Redundancy Protocol) and HSR (Seamless Ring Protocol) are used to improve communication reliability. Even if some paths fail, the system can still work normally, ensuring the stable transmission of key data in the power system.

[0121] (3) Data routing and management functions: Support multi-path transmission and data redundancy, improve the reliability and transmission efficiency of communication networks, optimize data routing in distributed systems, and prevent data loss.

[0122] Security core features include:

[0123] (1) Data encryption and authentication: Integrate national secret algorithms to ensure the security of data transmission and authenticate the device to prevent malicious attacks and unauthorized access, ensuring the reliability of control instructions.

[0124] (2) Secure startup and access control: The system performs a security check at startup and assigns access control based on user permissions to prevent access by unauthorized devices and to enable dynamic management of operating permissions.

[0125] (3) Anomaly detection and defense mechanism: Built-in security algorithms detect abnormal activities in the system in real time, trigger early warning and defense measures, protect the power system from cyber attacks, and improve operational safety.

[0126] Reference Figure 3, showing a schematic diagram of a built-in algorithm for a low-voltage power distribution lightweight control chip provided by an embodiment of the present invention.

[0127] In an optional embodiment, the low-voltage power distribution lightweight control chip can have multiple algorithms built in, such as Figure 3 All algorithms are packaged as independent IP cores and can be independently developed. It should be noted that the algorithms include but are not limited to Figure 3 Internal algorithm.

[0128] Reference Figure 4 , showing a schematic diagram of priority classification of a low-voltage power distribution lightweight control chip provided by an embodiment of the present invention.

[0129] The transmission data is classified and processed according to the priority, such as Figure 4 As shown in the figure. Data operations with large data volume and low real-time requirements are set to low priority, data operations with small data volume and high real-time requirements are set to high priority, and others are set to medium priority. This process is processed at the transport layer, including reliability detection and confirmation feedback, retransmission and verification, etc.

[0130] The low-voltage power distribution lightweight control chip solution significantly improves the system's operating efficiency and safety by optimizing power consumption, real-time monitoring, intelligent regulation, and efficient and secure communication. The solution implements data encryption protection, anomaly detection, fault location, and adaptive control, ensuring the reliability and scalability of the system. At the same time, the modular design supports multi-service concurrent processing and plug-and-play, enhancing future adaptability and maintainability. These optimization effects enable the chip to perform well in low power consumption, stable communication, and data security, adapting to the needs of smart grids.

[0131] In this embodiment, the embodiment of the present invention provides a low-voltage power distribution lightweight control chip, which has the beneficial effect that the present invention can integrate an embedded processor, a power monitoring and measurement module, a safety management module, a multi-power domain management module, a communication interface module, an internal memory, an intelligent relay management module and a power-specific IP module through a single high-speed bus, so that the chip can communicate with different devices through various modules and buses, without the need to integrate multiple communication methods, and can simplify the chip structure. At the same time, it can reduce the number of integrated modules and reduce the chip cost to meet the requirements of lightweight and low power consumption.

[0132] Reference Figure 5 , showing a flow chart of a task allocation method based on a low-voltage power distribution lightweight control chip provided by an embodiment of the present invention.

[0133] Wherein, as an example, the task allocation method based on the low-voltage power distribution lightweight control chip may include:

[0134] S11, obtaining parameters to be processed and processing tasks corresponding to the parameters to be processed, wherein the parameters to be processed include power data collected by a built-in sensor module and environmental data for monitoring an external environment.

[0135] In one embodiment, the parameters to be processed may be key power data collected through a built-in sensor module, such as power parameters such as voltage, current, and power; or may include and use algorithms to analyze monitoring values ​​of the equipment operating status or parameters of the external environment, such as overload current, fluctuating voltage, temperature, electromagnetic interference, etc. Subsequently, the environmental data of the monitored external environment may be analyzed to determine the impact of the external environment on the distribution network, so as to prevent the external environment from affecting the stability of the system.

[0136] At the same time, the processing task corresponding to the parameter to be processed can be obtained, which can specifically be the content of the task, including abnormal numerical value analysis task, fault analysis task, numerical value recording task, etc.

[0137] Since a lot of data is collected, in order to extract the data required for analysis and tasks from it to reduce the amount of data to be processed, as an example, after the step of obtaining the parameters to be processed, the method may further include the following sub-steps:

[0138] S21. Preprocess the parameters to be processed by using a compression algorithm and a filtering algorithm to obtain processing parameters.

[0139] The collected data is pre-processed through compression and filtering algorithms to reduce communication bandwidth usage. Subsequently, the data is analyzed using algorithms such as fault detection and harmonic analysis to detect abnormal conditions in a timely manner and trigger corresponding alarm mechanisms.

[0140] In specific operations, if data collection is started through local sensors, such as collecting data such as voltage, current, power factor, etc., simple data preprocessing (such as denoising and filtering) can be performed to ensure the accuracy of the data.

[0141] In addition, it should be noted that if tasks are assigned to edge devices for processing, the edge devices will perform pre-processing based on the received tasks and data, and summarize the processing results and transmit them back to the central system for use in subsequent tasks.

[0142] In one embodiment, the collected data may be abnormal. In order to promptly notify the user that the distribution network has abnormal data so that the user can perform troubleshooting according to the abnormal data, as an example, after the step of obtaining the parameters to be processed, or after the step of obtaining the processing parameters, the method may further include the following sub-steps:

[0143] S31, performing an abnormal value check on the data of the parameter to be processed to obtain an abnormality detection result.

[0144] For example, when the voltage fluctuation value begins to exceed the normal range, the data is marked as "abnormal monitoring data" and prepared for further analysis.

[0145] In specific operations, the chip can check for abnormal values ​​in each data item and call corresponding detection algorithms based on different fault characteristics, for example:

[0146] Harmonic anomaly: If the voltage or current waveform has abnormal frequency fluctuations, the harmonic analysis algorithm (such as FFT transformation algorithm) is started to confirm the abnormal frequency.

[0147] Load abnormality: If the current or power factor shows a tendency to deviate from the normal range, the system calls the load prediction algorithm to determine whether there is a tendency for the load to be too high.

[0148] Harmonic analysis (FFT transformation): If the harmonic components increase, the FFT transformation algorithm will identify the harmonic frequency band and determine whether there is equipment aging caused by nonlinear loads.

[0149] Phase sequence calculation algorithm: When phase sequence imbalance is detected in a three-phase system, the phase sequence algorithm is called to identify the anomalies of the zero-sequence and negative-sequence components, and predict whether there is a phase sequence imbalance or grounding risk.

[0150] Simple harmonic and half-wave differential Fourier algorithm: used to analyze complex waveform anomalies. When an abnormal amplitude increase is detected in a specific band, the equipment failure trend is detected through specific harmonic components.

[0151] If the current, voltage and other data show a continuous upward trend, the system will start the load forecasting and resource scheduling algorithm to predict the load situation in the future. If the forecast results show that the load limit of the equipment is about to be reached, an early warning will be issued and resource allocation may be adjusted in advance to avoid overload.

[0152] At the same time, the chip compares the predicted abnormal results with the historical data model. If the trend exceeds the preset safety threshold, it is judged as a potential failure risk. According to the severity of the failure trend, it will issue an early warning to the maintenance team and provide detailed information on the failure type and location.

[0153] S12: Analyze and process the task attributes of the current task to obtain the task priority.

[0154] In one embodiment, an embedded processor based on a low-voltage power distribution lightweight control chip can identify and prioritize current tasks. The embedded processor can specifically identify all current tasks from the task queue and analyze the task attributes of each current task, including the real-time requirements, urgency, and importance of the task. Based on the analysis results of the task attributes, the current tasks are divided into high priority, medium priority, and low priority. For example, fault detection and protection instructions are high priority tasks because they are related to the stability and safety of the power system. Tasks such as data recording and log storage are low priority because their delays have little impact on the system.

[0155] S13. Allocate the current task to the computing core in sequence according to the task priority, so that the computing core uses the parameters to be processed to process the task.

[0156] After determining the priority, tasks can be allocated and dynamically scheduled. For example, if the current task is a high-priority task (such as sudden fault detection), computing resources will be allocated to the high-priority task first, and ongoing low-priority tasks can be immediately suspended. When processing high-load tasks, computing resources can be dynamically allocated based on current resource usage. For example, when a current short circuit is detected, the system will allocate more CPU cores to handle fault detection tasks to ensure rapid identification and response.

[0157] Specifically, the current tasks may be allocated to the computing cores one by one according to the size or level of the task priorities, so that the computing cores can process the tasks according to the current tasks using the parameters to be processed.

[0158] Specific tasks may include data analysis, numerical detection, etc.

[0159] In addition, it should be noted that if multiple high-priority tasks exist at the same time (such as multiple failures at the same time), the tasks can be assigned to different computing cores for parallel processing to ensure that all high-priority tasks can be executed on time. During the task execution process, the task progress can also be monitored in real time to ensure that the task is completed within the set time frame, and resources can be reallocated if necessary to ensure the best execution effect.

[0160] When the central system is overloaded, some low- to medium-priority non-urgent tasks (such as data collection and storage) can be delegated to edge devices for execution, freeing up core resources to handle high-priority tasks. This can reduce the burden on the central chip and improve the response speed of key tasks.

[0161] When a task is completed, the chip can record the task execution results and transmit key data to the monitoring system or feedback log. At the same time, the chip can analyze the effect of task execution based on feedback and dynamically adjust the scheduling strategy. For example, if the processing of a task takes too long, the system may allocate more resources in the next scheduling to optimize the efficiency of task execution.

[0162] To explain with a practical example, when the power grid system detects that a node has a current overload, it will immediately classify the task as a high-priority task, the CPU will suspend the low-priority data recording task being executed, and dispatch all core resources to the fault detection and protection instruction generation tasks. At the same time, the fault detection task runs in parallel on multiple cores to ensure that the fault point is quickly detected and protection instructions are generated, such as circuit breaker tripping commands. After the fault is handled, the system records the location of the fault point and the cause of the fault, and feeds it back to the system log. Based on the task feedback, the CPU analyzes whether the resource allocation is sufficient and whether the response time is optimized, providing data support for subsequent tasks.

[0163] Reference Figure 6 , shows an operation flow chart of a task allocation method based on a low-voltage power distribution lightweight control chip provided by an embodiment of the present invention.

[0164] Specifically, the operation of the task allocation method based on the low-voltage power distribution lightweight control chip may include the following steps:

[0165] The first step is to collect electrical information and external parameters.

[0166] In the second step, the collected electrical information, external parameters and other data are preprocessed and analyzed. When the computing resources meet the task requirements, multi-core parallel computing is performed; when the computing resources do not meet the task requirements, edge computing is performed.

[0167] The third step is to schedule and make decisions based on task priorities, determine task content and perform calculations.

[0168] The fourth step is to encrypt the calculation results after completing the calculation to achieve secure communication and data transmission.

[0169] The fifth step is to feed back the calculation results to the technicians, and then perform subsequent processing according to the technicians' instructions.

[0170] In this embodiment, the embodiment of the present invention provides a task allocation method based on a low-voltage power distribution lightweight control chip, and its beneficial effects are: the present invention can obtain the parameters to be processed and the processing tasks corresponding to the parameters to be processed; analyze and process the task attributes of the current task to obtain the task priority; allocate the current task to the computing core in turn according to the size of the task priority, so that the computing core uses the parameters to be processed to perform task processing; through the technical solution of the present invention, the chip can be more reasonably allocated and called for computing and processing, and on the basis of improving resource utilization, the efficiency of task and data calculation can be effectively improved, and the processing time can be shortened.

[0171] The embodiment of the present invention also provides a task allocation device based on a low-voltage power distribution lightweight control chip, see Figure 7 , showing a structural schematic diagram of a task allocation device based on a low-voltage power distribution lightweight control chip provided by an embodiment of the present invention.

[0172] Wherein, as an example, the task allocation device based on the low-voltage power distribution lightweight control chip may include:

[0173] An acquisition module 710 is used to acquire parameters to be processed and processing tasks corresponding to the parameters to be processed, wherein the parameters to be processed include power data collected by the built-in sensor module and environmental data for monitoring the external environment;

[0174] The analysis module 720 is used to analyze and process the task attributes of the current task to obtain the task priority;

[0175] The allocation module 730 is used to allocate the current task to the computing core in sequence according to the priority of the task, so that the computing core uses the parameters to be processed to process the task.

[0176] Optionally, the device further comprises:

[0177] The anomaly detection module is used to perform an abnormal value check on the data of the parameters to be processed after the step of obtaining the parameters to be processed to obtain an abnormality detection result.

[0178] Optionally, the device further comprises:

[0179] The preprocessing module is used to preprocess the parameters to be processed by using a compression algorithm and a filtering algorithm to obtain processing parameters after the step of obtaining the parameters to be processed.

[0180] Those skilled in the art can clearly understand that, for the sake of convenience and brevity of description, the specific working process of the device described above can refer to the corresponding process in the aforementioned method embodiment, and will not be repeated here.

[0181] Furthermore, an embodiment of the present application also provides an electronic device, comprising: a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein when the processor executes the program, the task dispatching method based on the low-voltage power distribution lightweight control chip as described in the above embodiment is implemented.

[0182] Furthermore, an embodiment of the present application also provides a computer-readable storage medium, which stores a computer-executable program, and the computer-executable program is used to enable a computer to execute the task dispatching method based on the low-voltage power distribution lightweight control chip as described in the above embodiment.

[0183] It should be noted that the orientation or positional relationship indicated by the terms "upper", "lower", etc. is based on the orientation or positional relationship shown in the accompanying drawings, which is only for the convenience of describing the embodiments of the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation of the present invention. When an element such as a layer, region or substrate is referred to as being "on" or "above" another element, it can be directly on the other element, or there can also be an intermediate element. On the contrary, when an element is referred to as "directly on" or "above" another element, there is no intermediate element. It should also be understood that when an element is referred to as being "under" or "below" another element, it can be directly under or below the other element, or there can also be an intermediate element. On the contrary, when an element is referred to as being "directly under" or "below" another element, there is no intermediate element. Unless otherwise clearly specified and limited, the terms "installed", "connected" and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, or it can be the internal communication of two components. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0184] Those skilled in the art will appreciate that the embodiments of the present application may also provide computer program products. Therefore, the present application may adopt the form of complete hardware embodiments, complete software embodiments, or embodiments in combination with software and hardware. Moreover, the present application may adopt the form of computer program products implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) that contain computer-usable program codes.

[0185] The present application is described with reference to the flowcharts and / or block diagrams of the methods, devices (systems), apparatuses, and computer program products according to the embodiments of the present application. It should be understood that each process and / or block in the flowchart and / or block diagram, as well as the combination of the processes and / or blocks in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to generate a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0186] These computer program instructions may also be stored in a computer readable memory capable of directing a computer or other programmable data processing device to operate in a specific manner, so that the instructions stored in the computer readable memory produce an article of manufacture including an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.

[0187] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operating steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing instructions for implementing the process in the computer or other programmable device. Figure 1 A process or multiple processes and / or boxes Figure 1 The steps for the functions specified in one or more boxes.

[0188] The above is only a preferred embodiment of the present invention. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the technical principles of the present invention. These improvements and modifications should also be regarded as the scope of protection of the present invention.

Claims

1. A low-voltage power distribution lightweight control chip, characterized in that: The control chip includes: an embedded processor, a power monitoring and measurement module, a security management module, a multi-power domain management module, a communication interface module, an internal memory, an intelligent relay management module and a power-specific IP module; The embedded processor is connected to the power-specific IP module, and the embedded processor and the power-specific IP module are respectively connected to the power monitoring and measurement module, the security management module, the multi-power domain management module, the communication interface module, the internal memory and the intelligent relay management module through high-speed buses; The embedded processor is a RISC architecture, which is used for task scheduling and control calculations, and manages and allocates computing resources; Power monitoring and measurement module, used to collect electrical parameters of low-voltage power distribution system; A security management module, used for performing lightweight encryption on the electrical parameters and the calculation parameters of the embedded processor; A multi-power domain management module, used to independently power the embedded processor, the power monitoring and measurement module, the security management module, the communication interface module, the internal memory and the intelligent relay management module; Communication interface module, used to provide a communication interface for data exchange with external devices or low-voltage power distribution systems; Internal memory for storing operating data and control instructions; An intelligent relay management module for selecting a communication path from power line carrier communication and high-speed wireless communication; The power-specific IP module is used to collect and process power signals of a low-voltage power distribution system, synchronize the time of the low-voltage power distribution system, send and receive messages and parse them, detect communication networks, and perform phase noise detection and compensation during clock synchronization.

2. The low-voltage power distribution lightweight control chip according to claim 1, characterized in that: The embedded processor includes: a main task core, a computing core and a security core; The main task core is used to identify the current task from the task queue and assign it to the computing core; The computing core is used to perform computing processing according to the current task; The security core is used to encrypt the data of the computing core, perform security checks at startup, and detect abnormal tasks of the low-voltage power distribution system in real time.

3. A task allocation method based on the low-voltage power distribution lightweight control chip according to any one of claims 1-2, characterized in that: The method comprises: Acquire parameters to be processed and processing tasks corresponding to the parameters to be processed, wherein the parameters to be processed include power data collected by a built-in sensor module and environmental data for monitoring an external environment; Analyze and process the task attributes of the current task to obtain the task priority; The current task is sequentially allocated to the computing core according to the task priority, so that the computing core uses the parameters to be processed to process the task.

4. The method according to claim 3, characterized in that After the step of obtaining the parameters to be processed, the method further includes: An abnormal value check is performed on the data of the parameter to be processed to obtain an abnormality detection result.

5. The method according to claim 3, characterized in that: After the step of obtaining the parameters to be processed, the method further includes: The parameters to be processed are preprocessed using a compression algorithm and a filtering algorithm to obtain processing parameters.

6. A task dispatching device based on the low-voltage power distribution lightweight control chip according to any one of claims 1-2, characterized in that: The device comprises: An acquisition module, used to acquire parameters to be processed and processing tasks corresponding to the parameters to be processed, wherein the parameters to be processed include power data collected by the built-in sensor module and environmental data for monitoring the external environment; An analysis module, used to analyze and process the task attributes of the current task to obtain the task priority; The allocation module is used to allocate the current task to the computing core in sequence according to the priority of the task, so that the computing core uses the parameters to be processed to process the task.

7. The device according to claim 6, characterized in that The device also includes: The anomaly detection module is used to perform an abnormal value check on the data of the parameters to be processed after the step of obtaining the parameters to be processed to obtain an abnormality detection result.

8. The device according to claim 6, characterized in that The device also includes: The preprocessing module is used to preprocess the parameters to be processed by using a compression algorithm and a filtering algorithm to obtain processing parameters after the step of obtaining the parameters to be processed.

9. An electronic device, comprising: A memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements the task dispatching method based on a low-voltage power distribution lightweight control chip as described in any one of claims 3 to 6 when executing the computer program.

10. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer-executable program, and the computer-executable program is used to enable a computer to execute the task dispatching method based on a low-voltage power distribution lightweight control chip as described in any one of claims 3-6.

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