Digital isolator and electronic equipment

Abstract

The invention provides a digital isolator and electronic equipment. The digital isolator comprises a modulation circuit, a high-voltage isolation circuit and a demodulation circuit which are connected in series, the first end of the high-voltage isolation circuit and the modulation circuit are coupled to a first node, and the second end of the high-voltage isolation circuit and the demodulation circuit are coupled to a second node; the digital isolator further comprises a first common-mode transient anti-interference circuit coupled to the first node and / or a second common-mode transient anti-interference circuit coupled to the second node. Each of the first common-mode transient anti-interference circuit and the second common-mode transient anti-interference circuit comprises at least one common-mode transient anti-interference unit, and each common-mode transient anti-interference unit comprises a pair of diodes which are reversely connected in parallel. The digital isolator is simple in structure and easy to implement, and can effectively suppress the influence of common-mode transient interference on a signal link, so that the common-mode transient interference resistance of the digital isolator is improved, and the signal decoding success rate is remarkably improved.

Description

Technical Field

[0001] The present invention relates to the technical field of circuit design, and in particular to a digital isolator and electronic equipment. Background Art

[0002] See also Figure 1 , Figure 1 Figure 1 is a block diagram of a digital isolator in the related art. A digital isolator is an intermediate circuit between the signal output end and the signal receiving end, and is often used to solve the problem of different grounds on both sides of the digital isolator. Figure 1 As shown, the digital isolator mainly includes a modulation circuit 100, a high-voltage isolation circuit 200 and a demodulation circuit 300. The digital isolator can enable circuits in different voltage domains to maintain communication while preventing mutual interference between circuits in different voltage domains. However, when a CMT (Common Mode Transient) event occurs, it may cause a brief interruption of the signal link, affecting the accuracy of the transmitted signal.

[0003] In order to avoid signal interruption, related technologies often use methods such as filtering CMT signals to reduce the impact on the signal link, bypassing the impact of CMT signals on the signal link when determining that the CMT signal is coming, or reducing the impact of CMT signals on the signal link through different modulation methods.

[0004] After research, it was found that the above solutions in the relevant technologies have various defects such as high circuit design complexity, complex control or negative impact on chip performance indicators.

[0005] It should be noted that the information disclosed in the background technology section of the invention is only intended to deepen the understanding of the general background technology of the invention, and should not be regarded as an admission or suggestion in any form that the information constitutes prior art already known to those skilled in the art. Summary of the invention

[0006] The purpose of the present invention is to provide a digital isolator and an electronic device to address one or more of the problems of high circuit complexity, complex control and negative impact on chip performance indicators in the common-mode transient anti-suppression scheme of the digital isolator in the prior art. The present invention is not only simple in structure and easy to implement, but also can effectively suppress the influence of common-mode transient interference on the signal link, thereby improving the ability of the digital isolator to resist common-mode transient interference and significantly improving the success rate of signal decoding.

[0007] In order to achieve the above-mentioned object, the present invention is implemented through the following technical scheme: a digital isolator, the digital isolator includes a modulation circuit, a high-voltage isolation circuit and a demodulation circuit connected in series, the first end of the high-voltage isolation circuit is coupled to the modulation circuit at a first node, and the second end of the high-voltage isolation circuit is coupled to the demodulation circuit at a second node; the digital isolator also includes a first common-mode transient anti-interference circuit coupled to the first node and / or a second common-mode transient anti-interference circuit coupled to the second node; the first common-mode transient anti-interference circuit and the second common-mode transient anti-interference circuit each include at least one common-mode transient anti-interference unit, and the common-mode transient anti-interference unit includes a pair of diodes connected in reverse parallel.

[0008] Optionally, the first common-mode transient anti-interference circuit includes a common-mode transient anti-interference unit, and the common-mode transient anti-interference unit includes a first diode and a second diode;

[0009] A cathode of the first diode and an anode of the second diode are coupled to the first node, and an anode of the first diode and a cathode of the second diode are coupled to a first reference ground.

[0010] Optionally, the common-mode transient immunity unit of the first common-mode transient immunity circuit further includes a first resistor, a first end of the first resistor is coupled to the first node, and a second end of the first resistor is coupled to the first reference ground.

[0011] Optionally, the first common-mode transient anti-interference circuit further includes at least one first DC blocking capacitor, which is connected in series between the modulation circuit and the common-mode transient anti-interference unit and / or in series between two adjacent common-mode transient anti-interference units.

[0012] Optionally, the second common-mode transient anti-interference circuit includes two common-mode transient anti-interference units, at least one second DC blocking capacitor and a second resistor, wherein the first end of one of the common-mode transient anti-interference units and the first end of one of the second DC blocking capacitors are coupled to the second node, the second end of the second DC blocking capacitor, the first end of another common-mode transient anti-interference unit and the first end of the second resistor are coupled to a third node of the demodulation circuit, the second ends of the two common-mode transient anti-interference units are coupled to a second reference ground, and the second end of the second resistor is coupled to a common mode voltage.

[0013] Optionally, one of the common-mode transient anti-interference units of the second common-mode transient anti-interference circuit includes a third diode, a fourth diode and a third resistor;

[0014] The cathode of the third diode, the anode of the fourth diode and the first end of the third resistor are coupled to the second node, and the anode of the third diode, the cathode of the fourth diode and the second end of the third resistor are coupled to the second reference ground.

[0015] Optionally, another common-mode transient immunity circuit of the second common-mode transient immunity circuit comprises a pair of a fifth diode and a sixth diode connected in parallel;

[0016] A cathode of the fifth diode and an anode of the sixth diode are coupled to the third node, and an anode of the fifth diode and a cathode of the sixth diode are coupled to a second reference ground.

[0017] Optionally, the diode comprises a PN junction diode.

[0018] Optionally, the diode comprises a diode formed by connecting a MOS tube or a bipolar tube.

[0019] In order to achieve the above object, the present invention further provides an electronic device, wherein the electronic device comprises any one of the digital isolators described above.

[0020] Compared with the prior art, the digital isolator and electronic device provided by the present invention have the following advantages:

[0021] The digital isolator provided by the present invention comprises a modulation circuit, a high-voltage isolation circuit and a demodulation circuit connected in series, wherein the first end of the high-voltage isolation circuit is coupled to the modulation circuit at a first node, and the second end of the high-voltage isolation circuit is coupled to the demodulation circuit at a second node; the digital isolator further comprises a first common-mode transient anti-interference circuit coupled to the first node and / or a second common-mode transient anti-interference circuit coupled to the second node; the first common-mode transient anti-interference circuit and the second common-mode transient anti-interference circuit both comprise at least one common-mode transient anti-interference unit, and the common-mode transient anti-interference unit comprises a pair of diodes connected in reverse parallel. Therefore, the common-mode transient anti-interference unit of the digital isolator provided by the present invention comprises a pair of diodes connected in reverse parallel, which is not only simple in structure and easy to implement, but also can effectively suppress the influence of common-mode transient interference on the signal link, thereby improving the ability of the digital isolator to resist common-mode transient interference and significantly improving the success rate of signal decoding.

[0022] Since the electronic device provided by the present invention and the digital isolator provided by the present invention belong to the same inventive concept, the electronic device provided by the present invention at least has all the advantages of the digital isolator provided by the present invention. For details of the beneficial effects of the electronic device provided by the present invention, please refer to the above description of the beneficial effects of the digital isolator provided by the present invention, which will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Figure 1 is a structural block diagram of a digital isolator in the related art;

[0024] Figure 2 A schematic diagram of the overall structure of a digital isolator provided in one embodiment of the present invention;

[0025] Figure 3a A schematic diagram of a specific circuit topology structure of a digital isolator provided in a first embodiment of the present invention;

[0026] Figure 3b A schematic diagram of a specific circuit topology structure of a digital isolator provided in a second embodiment of the present invention;

[0027] Figure 3c A schematic diagram of a specific circuit topology structure of a digital isolator provided in a third embodiment of the present invention;

[0028] Figure 3d A schematic diagram of a specific circuit topology structure of a digital isolator provided in a fourth embodiment of the present invention;

[0029] Figure 3e A schematic diagram of a specific circuit topology structure of a digital isolator provided in a fifth embodiment of the present invention;

[0030] Figure 4 A waveform comparison diagram of the common-mode transient interference resistance of a digital isolator without the common-mode transient interference immunity circuit described in the present invention and the digital isolator provided by the present invention under the same CMT signal;

[0031] The reference numerals are as follows:

[0032] Modulation circuit-100, high-voltage isolation circuit-200, first high-voltage isolation capacitor-C01, second high-voltage isolation capacitor-C02, connecting wire-L0, demodulation circuit-300;

[0033] First node - N1, second node - N2, third node - N3;

[0034] A first common-mode transient immunity circuit-410, a common-mode transient immunity unit-411, a first diode-D1, a second diode-D2, a first resistor-R1, and a first DC blocking capacitor-C1;

[0035] A second common-mode transient immunity circuit 420, common-mode transient immunity units 421 and 422, a third diode D3, a fourth diode D4, a second resistor R2, a third resistor R3, a second DC blocking capacitor C2, a fifth diode D5, and a sixth diode D6;

[0036] First reference ground-GND, second reference ground-COM, common mode voltage-VCM. DETAILED DESCRIPTION

[0037] The digital isolator and electronic device proposed in the present invention are further described in detail below in conjunction with the accompanying drawings. According to the following description, the advantages and features of the present invention will be clearer. It should be noted that the drawings are in a very simplified form and are not in precise proportions, which are only used to conveniently and clearly assist in explaining the purpose of the embodiments of the present invention. In order to make the purposes, features and advantages of the present invention more obvious and easy to understand, please refer to the drawings. It should be noted that the structures, proportions, sizes, etc. illustrated in the drawings of this specification are only used to match the contents disclosed in the specification for people familiar with this technology to understand and read, and are not used to limit the limiting conditions for the implementation of the present invention. Any modification of the structure, change in the proportional relationship or adjustment of the size, in the case of the same or similar effects and purposes that can be achieved by the present invention, should still fall within the scope of the technical content disclosed by the present invention. The specific design features of the present invention disclosed herein include, for example, specific dimensions, directions, positions and shapes, which will be determined in part by the specific environment to be applied and used. And, in the embodiments described below, sometimes the same figure mark is used in common between different drawings to represent the same part or part with the same function, and its repeated description is omitted. In this specification, similar reference numerals and letters are used to refer to similar items, and therefore, once an item is defined in one figure, it need not be further discussed in subsequent figures. In addition, if the method described herein includes a series of steps, the order of these steps presented herein is not necessarily the only order in which these steps can be performed, and some of the steps described may be omitted and / or some other steps not described herein may be added to the method.

[0038] It should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the existence of other identical elements in the process, method, article or device including the elements. The singular forms "a", "an" and "the" include plural objects, the term "or" is generally used in a sense including "and / or", the term "several" is generally used in a sense including "at least one", and the term "at least two" is generally used in a sense including "two or more". In addition, the terms "first", "second" and "third" are used for descriptive purposes only and are not to be understood as indicating or suggesting relative importance or implicitly indicating the number of the indicated technical features.

[0039] It should be understood that when an element is referred to as being "connected," "connected to," or "coupled to" another element, it can be directly connected to the other element, or there can be intervening elements. Conversely, when an element is referred to as being "directly connected" or "directly connected to" another element, there are no intervening elements.

[0040] The core idea of ​​the present invention is to provide a digital isolator and an electronic device. The present invention is not only simple in structure and easy to implement, but also can effectively suppress the influence of common-mode transient interference on the signal link, thereby improving the ability of the digital isolator to resist common-mode transient interference and significantly improving the success rate of signal decoding.

[0041] In order to realize the above idea, one embodiment of the present invention provides a digital isolator. For example, see Figure 2 , Figure 3a , Figure 3b , Figure 3c , Figure 3d as well as Figure 3e , Figure 2 The overall structural diagram of a digital isolator provided in one embodiment of the present invention is as follows. Figure 3a A schematic diagram of a specific circuit topology structure of a digital isolator provided in a first embodiment of the present invention; Figure 3b A schematic diagram of a specific circuit topology structure of a digital isolator provided in a second embodiment of the present invention;

[0042] Figure 3c A schematic diagram of a specific circuit topology structure of a digital isolator provided in a third embodiment of the present invention; Figure 3d A schematic diagram of a specific circuit topology structure of a digital isolator provided in a fourth embodiment of the present invention; Figure 3e A schematic diagram of a specific circuit topology structure of a digital isolator provided in the fifth embodiment of the present invention. Figure 2 , Figure 3a , Figure 3b , Figure 3c , Figure 3d as well as Figure 3e It can be seen that the digital isolator provided in this embodiment includes a modulation circuit 100, a high-voltage isolation circuit 200 and a demodulation circuit 300 connected in series, the first end of the high-voltage isolation circuit 200 is coupled to the modulation circuit 100 at a first node N1, the second end of the high-voltage isolation circuit 200 is coupled to the demodulation circuit 300 at a second node N2, and the digital isolator further includes a first common-mode transient anti-interference circuit 410 coupled to the first node N1 and / or a second common-mode transient anti-interference circuit 420 coupled to the second node N2; the first common-mode transient anti-interference circuit 410 and the second common-mode transient anti-interference circuit 420 both include at least one common-mode transient anti-interference unit ( Figure 2 In the example, the first common-mode transient anti-interference circuit 410 includes N common-mode transient anti-interference units 411 and the second common-mode transient anti-interference circuit 420 includes M common-mode transient anti-interference units 421. Figure 3a , Figure 3b , Figure 3c , Figure 3d or Figure 3e As shown, the common-mode transient immunity unit includes a pair of diodes connected in reverse parallel.

[0043] Therefore, the common-mode transient interference suppression unit of the digital isolator provided by the present invention includes a pair of diodes connected in reverse parallel, which is not only simple in structure and easy to implement, but also can effectively suppress the influence of common-mode transient interference on the signal link, thereby improving the ability of the digital isolator to resist common-mode transient interference and significantly improving the success rate of signal decoding.

[0044] It should be noted that the present invention does not impose too many restrictions on the modulation circuit 100, the high-voltage isolation circuit 200, and the demodulation circuit 300. For example, taking the high-voltage isolation circuit 200 as an example, in some exemplary implementations, the high-voltage isolation circuit 200 may include a first high-voltage isolation capacitor C01 and a second high-voltage isolation capacitor C02. The upper plate of the first high-voltage isolation capacitor C01 is coupled to the first node N1, the lower plate of the first high-voltage isolation capacitor C01 and the upper plate of the second high-voltage isolation capacitor C02 are connected through a connecting wire L0 (Bonding wire), and the lower plate of the second high-voltage isolation capacitor C02 is coupled to the second node N2. In some other exemplary implementations, the high-voltage isolation circuit 200 may also only include the first high-voltage isolation capacitor C01 or the second high-voltage isolation capacitor C02. For more detailed information about the modulation circuit 100, the high-voltage isolation circuit 200, and the demodulation circuit 300, please refer to the relevant technology of digital isolators known to those skilled in the art. Due to space limitations, this article will not elaborate on this.

[0045] Preferably, in some exemplary embodiments, the diode comprises a PN junction diode. Thus, by using a pair of PN junction diodes connected in reverse parallel as the common-mode transient interference suppression unit 411, 421 or 422, the high reliability and stability of the PN junction diode can be fully utilized, and the ability of the digital isolator to resist common-mode transient interference can be further effectively improved.

[0046] Preferably, in some other exemplary embodiments, the diode includes a diode formed by connecting a MOS tube or a bipolar tube. Thus, by using a diode formed by connecting a MOS tube or a bipolar tube as a reverse parallel connected diode, the MOS tube or the bipolar tube can be enabled at a low level and based on the characteristics of the MOS tube or the bipolar tube being suitable for transmitting high voltage, i.e., low impedance, it can not only further effectively improve the ability of the digital isolator to resist common-mode transient interference, but also enable the digital isolator to have the advantages of better stability, low noise and low power consumption, and also enable the digital isolator to be suitable for high voltage scenarios.

[0047] It should be noted that those skilled in the art should be able to understand that the present invention does not impose too many restrictions on the MOS tube. For example, the MOS tube includes but is not limited to PMOS tube, NMOS tube, PLDMOS tube, NLDMOS tube, PDEMOS tube and NDEMOS tube. For example, taking the MOS tube as a PMOS tube as an example, a PMOS tube with a source and a gate connected can be used as a diode connected in reverse parallel; for another example, taking the MOS tube as an NMOS tube as an example, an NMOS tube with a drain and a gate connected can be used as a diode connected in reverse parallel. Similarly, the present invention does not impose too many restrictions on the Bipolar tube. For example, the Bipolar tube includes but is not limited to NPN tube and PNP tube. For more detailed information on how to connect PLDMOS tube, NLDMOS tube, PDEMOS tube, NDEMOS tube, NPN tube and PNP tube to form a diode, please refer to the relevant technology known to those skilled in the art. Due to space limitations, it will not be described in detail here.

[0048] It should be understood that the above-mentioned selection of diodes is only an exemplary description of a preferred embodiment, and not a limitation of the present invention. The present invention does not impose too many limitations on the diodes, and the "diodes" connected in reverse parallel can be used as long as they can effectively improve the ability of the digital isolator to resist common-mode transient interference.

[0049] Please continue to see Figure 3a ,like Figure 3a As shown, in some exemplary embodiments, the digital isolator includes a first common-mode transient immunity circuit 410 coupled to the first node N1 and a second common-mode transient immunity circuit 420 coupled to the second node N2.

[0050] Therefore, the digital isolator provided by the present invention can significantly improve the common-mode transient interference resistance between the modulation circuit 100 and the high-voltage isolation circuit 200 of the signal link, and can significantly improve the common-mode transient interference resistance between the high-voltage isolation circuit 200 and the demodulation circuit 300 of the signal link, by coupling the first common-mode transient interference suppression circuit 410 at the first node N1 (between the modulation circuit 100 and the high-voltage isolation circuit 200) and coupling a second common-mode transient interference suppression circuit 420 at the second node N2 (between the high-voltage isolation circuit 200 and the demodulation circuit 300), thereby effectively suppressing the influence of common-mode transient interference on the signal link, improving the ability of the digital isolator to resist common-mode transient interference, and thus significantly improving the signal decoding success rate.

[0051] It should be noted that the digital isolator provided by the present invention does not limit the number of the common-mode transient interference suppression circuits. Figure 3bAs shown, in some embodiments, only one first common-mode transient immunity circuit 410 may be coupled to the first node N1; Figure 3c As shown, in some other implementations, only one second common-mode transient immunity circuit 420 may be coupled to the second node N2.

[0052] In order to make it easier to understand and explain the present invention, the digital isolator provided by the present invention is exemplified herein by taking the first common-mode transient anti-interference circuit 410 having one common-mode transient anti-interference unit 411 and the second common-mode transient anti-interference circuit 420 having two common-mode transient anti-interference units 421 and 422. It should be understood that the present invention does not impose too many restrictions on the number of common-mode transient anti-interference units of the first common-mode transient anti-interference circuit 410 and the second common-mode transient anti-interference circuit 420. The number of common-mode transient anti-interference units of the common-mode transient anti-interference circuit can be 1, 2, 3 or more.

[0053] Please continue to see Figure 3a ,like Figure 3a As shown, in some exemplary embodiments, the first common-mode transient anti-interference circuit 410 includes a common-mode transient anti-interference unit 411, and the common-mode transient anti-interference unit 411 includes a first diode D1 and a second diode D2. Specifically, the cathode of the first diode D1 and the anode of the second diode D2 are coupled to the first node N1, and the anode of the first diode D1 and the cathode of the second diode D2 are coupled to the first reference ground GND.

[0054] Therefore, in the digital isolator provided by the present invention, the common-mode transient interference suppression unit 411 of the first common-mode transient interference suppression circuit 410 includes a first diode D1 and a second diode D2 connected in reverse parallel, so that when a CMT signal comes, the CMT signal can be released from the first diode D1 and the second diode D2, which can suppress signal decoding abnormalities caused by common-mode transient interference and improve the ability of the digital isolator to resist common-mode transient interference. Furthermore, the first common-mode transient interference suppression circuit 410 will not affect the performance indicators of the modulation circuit 100, the high-voltage isolation circuit 200 and the demodulation circuit 300 of the digital isolator.

[0055] Please continue to see Figure 3a ,like Figure 3aAs shown, in some exemplary embodiments, the common-mode transient immunity unit 411 of the first common-mode transient immunity circuit 410 further includes a first resistor R1, a first end of the first resistor R1 is coupled to the first node N1, and a second end of the first resistor R1 is coupled to the first reference ground GND. Therefore, in the digital isolator provided by the present invention, the common-mode transient immunity unit 411 of the first common-mode transient immunity circuit 410 further includes a first resistor R1, and the stability and reliability of the digital isolator can be improved by the first resistor R1.

[0056] Please continue to see Figure 2 as well as Figure 3a ,like Figure 2 and Figure 3a As shown, in some exemplary embodiments, the first common-mode transient immunity circuit 410 further includes at least one first blocking capacitor C1, and the first blocking capacitor C1 is connected in series between the modulation circuit 100 and the common-mode transient immunity unit 411, and / or is connected in series between two adjacent common-mode transient immunity units 411. Therefore, the digital isolator provided by the present invention can more effectively perform DC voltage isolation by connecting the first blocking capacitor in series between the modulation circuit 100 and the common-mode transient immunity unit 411, and / or is connected in series between two adjacent common-mode transient immunity units 411, thereby further improving the stability and reliability of the digital isolator.

[0057] It should be noted that although Figure 3a In the example, a first blocking capacitor C1 connected in series between the modulation circuit 100 and the common-mode transient interference suppression unit 411 is used, but the present invention does not impose too many restrictions on the number of the first blocking capacitors C1. In practical applications, the number of the first blocking capacitors C1 can be 0, 2, 3 or more. When the number of the first blocking capacitors C1 is multiple, multiple first blocking capacitors C1 are connected in series. Further, as Figure 2 ( Figure 2As shown in the figure (not marked with a reference numeral), the number of the first blocking capacitors C1 may be the same as or different from the number of the common-mode transient anti-interference units 411, and the present invention does not impose too many restrictions on this. It should be further explained that those skilled in the art should be able to understand that the present invention does not impose too many restrictions on the electrical parameters of the first diode D1, the second diode D2, the first resistor R1 and the first blocking capacitor C1. When implementing the digital isolator provided by the present invention, the first diode D1, the second diode D2, the first resistor R1 and the first blocking capacitor C1 should be reasonably selected according to the actual needs of the signal link. Furthermore, the present invention does not impose too many restrictions on the specific voltage value of the first reference ground GND. For example, the voltage value of the first reference ground GND can be 0V.

[0058] Please continue to see Figure 2 and Figure 3a ,like Figure 2 and Figure 3a As shown, in some exemplary embodiments, the second common-mode transient anti-interference circuit 420 includes two common-mode transient anti-interference units 421 and 422, at least one second DC blocking capacitor C2 and a second resistor R2, wherein a first end of one of the common-mode transient anti-interference units 421 and a first end of one of the second DC blocking capacitors C2 are coupled to the second node N2, a second end of the second DC blocking capacitor C2, a first end of another common-mode transient anti-interference unit 422 and a first end of the second resistor R2 are coupled to a third node N3 of the demodulation circuit 300, second ends of the two common-mode transient anti-interference units 421 and 422 are both coupled to the second reference ground COM, and a second end of the second resistor R2 is coupled to the common mode voltage VCM.

[0059] The digital isolator provided by the present invention, the second common-mode transient interference suppression circuit 420 includes two common-mode transient interference suppression units 421 and 422, at least one second DC blocking capacitor C2 and a second resistor R2, so that when the CMT signal comes, the CMT signal can be released from the common-mode transient interference suppression units 421 and 422, thereby suppressing the signal decoding abnormality caused by the common-mode transient interference, and effectively improving the ability of the digital isolator to resist the common-mode transient interference. Further, the second common-mode transient interference suppression circuit 420 will not affect the performance indicators of the modulation circuit 100, the high-voltage isolation circuit 200 and the demodulation circuit 300 of the digital isolator; further, the second DC blocking capacitor C2 can more effectively isolate the DC voltage, thereby further improving the stability of the digital isolator; further, the second resistor R2 can make the input voltage of the demodulation circuit 300 more stable, thereby being more conducive to the normal operation of the demodulation circuit 300.

[0060] It should be understood that although Figure 3a A second blocking capacitor C2 is used as an example, but the present invention does not impose too many restrictions on the number of the second blocking capacitors C2, and the number of the second blocking capacitors C2 can also be 0, 2, 3 or more. When the number of the second blocking capacitors C2 is multiple, multiple second blocking capacitors C2 are connected in series. Further, the number of the first blocking capacitors C1 can be the same as the number of the common-mode transient interference suppression units 421, or can be different, and the present invention does not impose too many restrictions on this.

[0061] Preferably, in some exemplary embodiments, one of the common-mode transient immunity units 421 of the second common-mode transient immunity circuit 420 includes a third diode D3, a fourth diode D4, and a third resistor R3. A cathode of the third diode D3, an anode of the fourth diode D4, and a first end of the third resistor R3 are coupled to the second node N2, and an anode of the third diode D3, a cathode of the fourth diode D4, and a second end of the third resistor R3 are coupled to the second reference ground COM.

[0062] Therefore, in the digital isolator provided by the present invention, the common-mode transient interference suppression unit 421 of the second common-mode transient interference suppression circuit 420 includes a third diode D3, a fourth diode D42 and a third resistor R3, so that when the CMT signal comes, the CMT signal can be released from the third resistor R3 and the third diode D3 and the fourth diode D4, thereby suppressing the signal decoding abnormality caused by the common-mode transient interference, and effectively improving the ability of the digital isolator to resist the common-mode transient interference. Furthermore, the second common-mode transient interference suppression circuit 420 will not affect the performance indicators of the modulation circuit 100, the high-voltage isolation circuit 200 and the demodulation circuit 300 of the digital isolator.

[0063] Please continue to see Figure 3a ,like Figure 3a As shown, in some exemplary embodiments, another common-mode transient interference suppression unit 422 of the second common-mode transient interference suppression circuit 420 includes a pair of fifth diodes D5 and sixth diodes D6 connected in parallel; the cathode of the fifth diode D5 and the anode of the sixth diode D6 are coupled to the third node N3, and the anode of the fifth diode D5 and the cathode of the sixth diode D6 are coupled to the second reference ground COM. Therefore, the digital isolator provided by the present invention can further improve the ability of the digital isolator to resist common-mode transient interference through the common-mode transient interference suppression unit 422, and the common-mode transient interference suppression unit 422 adopts a design method of a pair of fifth diodes D5 and sixth diodes D6 connected in parallel, which has a simple structure and is easy to implement.

[0064] It should be further explained that those skilled in the art should be able to understand that the present invention does not impose too many restrictions on the electrical parameters of the third diode D3, the fourth diode D4, the second resistor R2, the third resistor R3, the second blocking capacitor C2, the fifth diode D5 and the sixth diode D6. When implementing the digital isolator provided by the present invention, the third diode D3, the fourth diode D4, the second resistor R2, the third resistor R3, the second blocking capacitor C2, the fifth diode D5 and the sixth diode D6 should be reasonably selected according to the actual needs of the signal link. Further, the present invention does not impose too many restrictions on the specific voltage value of the second reference ground COM. Under normal circumstances, the voltage value of the second reference ground COM is determined by the demodulation circuit 300. For example, the voltage value of the second reference ground COM can be 0.3V. It should be further explained that the voltage value of the first reference ground GND and the voltage value of the second reference ground COM can be the same or different, and the present invention does not impose any restrictions on this. It should be understood that the voltage value of the second reference ground COM in this article is 0.3V for exemplary purposes only, and the voltage value of the second reference ground COM can also be other values ​​other than 0.3V.

[0065] For example, see Figure 4 , Figure 4 It is a schematic diagram comparing waveforms (simulation results) of common-mode transient interference resistance of a digital isolator without the common-mode transient immunity circuit described in the present invention and a digital isolator provided by the present invention under the same CMT signal. Figure 4In the figure, curve 1 (light blue) is the CMT signal, curve 2 (dark purple) is the signal waveform of the digital isolator at the first node without the common-mode transient interference prevention circuit of the present invention (more specifically, without the first diode D1 and the second diode D2 connected in reverse parallel), curve 3 (green) is the signal waveform of the digital isolator at the first node connected with the common-mode transient interference prevention circuit of the present invention (more specifically, with the first diode D1 and the second diode D2 connected in reverse parallel), curve 4 (light yellow) is the signal waveform of the digital isolator at the second node without the common-mode transient interference prevention circuit of the present invention (more specifically, without the third diode D3 and the fourth diode D4 connected in reverse parallel), and curve 5 (orange) is the signal waveform of the digital isolator at the second node with the common-mode transient interference prevention circuit of the present invention (more specifically, without the third diode D3 and the fourth diode D4 connected in reverse parallel). By comparing curves 2 and 3 at the first node, and curves 4 and 5 at the second node, it can be seen that the digital isolator provided by the present invention can greatly reduce the interference amplitude of the CMT signal. Therefore, by reducing the impact of common-mode transient interference on the signal link, the ability of the digital isolator to resist common-mode transient interference can be improved, thereby significantly improving the success rate of signal decoding.

[0066] Based on the same inventive concept, the present invention further provides an electronic device, the electronic device comprising the digital isolator described in any of the above embodiments. Since the electronic device provided by the present invention and the digital isolator provided by the present invention belong to the same inventive concept, the electronic device provided by the present invention at least has all the advantages of the digital isolator provided by the present invention. For details of the beneficial effects of the electronic device provided by the present invention, please refer to the above description of the beneficial effects of the digital isolator provided by the present invention, which will not be repeated here.

[0067] Specifically, it should be noted that those skilled in the art should be able to understand that the present invention does not impose any limitation on the electronic equipment. For example, the electronic equipment includes but is not limited to video products such as televisions, video recorders, and digital cameras, communication products such as mobile phones, communication switching equipment, and communication transmission equipment, learning assistance products such as translators, learning machines, and electronic dictionaries, and medical equipment products such as medical imaging equipment and medical testing equipment, etc.

[0068] Compared with the prior art, the digital isolator and electronic device provided by the present invention have the following advantages:

[0069] The digital isolator provided by the present invention comprises a modulation circuit, a high-voltage isolation circuit and a demodulation circuit connected in series. The first end of the high-voltage isolation circuit is coupled to the modulation circuit at a first node, and the second end of the high-voltage isolation circuit is coupled to the demodulation circuit at a second node; the digital isolator also comprises a first common-mode transient anti-interference circuit coupled to the first node and / or a second common-mode transient anti-interference circuit coupled to the second node; the first common-mode transient anti-interference circuit and the second common-mode transient anti-interference circuit each comprise at least one common-mode transient anti-interference unit, and the common-mode transient anti-interference unit comprises a pair of diodes connected in reverse parallel. Therefore, the common-mode transient anti-interference unit of the digital isolator provided by the present invention comprises a pair of diodes connected in reverse parallel, which is not only simple in structure and easy to implement, but also can effectively suppress the influence of common-mode transient interference on the signal link, thereby improving the ability of the digital isolator to resist common-mode transient interference and significantly improving the success rate of signal decoding.

[0070] Since the electronic device provided by the present invention and the digital isolator provided by the present invention belong to the same inventive concept, the electronic device provided by the present invention at least has all the advantages of the digital isolator provided by the present invention. For details of the beneficial effects of the electronic device provided by the present invention, please refer to the above description of the beneficial effects of the digital isolator provided by the present invention, which will not be repeated here.

[0071] It should be noted that the devices and methods disclosed in the embodiments of this article can also be implemented in other ways. The device implementation described above is only schematic. For example, the flowcharts and block diagrams in the accompanying drawings show the possible architecture, functions and operations of the devices, methods and computer program products according to multiple embodiments of this article. In this regard, each box in the flowchart or block diagram can represent a part of a module, program or code, and the module, program segment or part of the code contains one or more executable instructions for implementing the specified logical function, and the module, program segment or part of the code contains one or more executable instructions for implementing the specified logical function. It should also be noted that in some alternative implementations, the functions marked in the box can also occur in a different order from the order marked in the accompanying drawings. For example, two consecutive boxes can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each box in the block diagram and / or flowchart, and the combination of boxes in the block diagram and / or flowchart can be implemented by a dedicated hardware-based system for performing a specified function or action, or can be implemented by a combination of dedicated hardware and computer instructions.

[0072] In addition, the functional modules in the various embodiments of this document may be integrated together to form an independent part, or each module may exist independently, or two or more modules may be integrated to form an independent part.

[0073] The above description is only a description of the preferred implementation of the digital isolator and electronic device provided by the present invention, and is not intended to limit the scope of the present invention. Any changes and modifications made by ordinary technicians in the field of the present invention based on the above disclosure are within the scope of protection of the present invention. Obviously, technicians in this field can make various changes and modifications to the present invention without departing from the spirit and scope of the present invention. In this way, if these modifications and variations fall within the scope of the present invention and its equivalent technology, the present invention is also intended to include these modifications and variations.

Claims

1. A digital isolator, characterized in that: The digital isolator comprises a modulation circuit, a high-voltage isolation circuit and a demodulation circuit connected in series, wherein a first end of the high-voltage isolation circuit is coupled to a first node of the modulation circuit, and a second end of the high-voltage isolation circuit is coupled to a second node of the demodulation circuit. The digital isolator further comprises a first common-mode transient anti-interference circuit coupled to the first node and / or a second common-mode transient anti-interference circuit coupled to the second node; the first common-mode transient anti-interference circuit and the second common-mode transient anti-interference circuit each comprise at least one common-mode transient anti-interference unit, and the common-mode transient anti-interference unit comprises a pair of diodes connected in reverse parallel.

2. The digital isolator according to claim 1, characterized in that: The first common-mode transient anti-interference circuit includes a common-mode transient anti-interference unit, and the common-mode transient anti-interference unit includes a first diode and a second diode; A cathode of the first diode and an anode of the second diode are coupled to the first node, and an anode of the first diode and a cathode of the second diode are coupled to a first reference ground.

3. The digital isolator according to claim 2, characterized in that: The common-mode transient immunity unit of the first common-mode transient immunity circuit further includes a first resistor, a first end of the first resistor is coupled to the first node, and a second end of the first resistor is coupled to the first reference ground.

4. The digital isolator according to claim 1, characterized in that: The first common-mode transient anti-interference circuit further includes at least one first DC blocking capacitor, which is connected in series between the modulation circuit and the common-mode transient anti-interference unit and / or in series between two adjacent common-mode transient anti-interference units.

5. The digital isolator according to claim 1, characterized in that: The second common-mode transient anti-interference circuit includes two common-mode transient anti-interference units, at least one second DC blocking capacitor and a second resistor, wherein the first end of one of the transient anti-interference units and the first end of one of the second DC blocking capacitors are coupled to the common-mode second node, the second end of the second DC blocking capacitor, the first end of another common-mode transient anti-interference unit and the first end of the second resistor are coupled to the third node of the demodulation circuit, the second ends of the two common-mode transient anti-interference units are coupled to the second reference ground, and the second end of the second resistor is coupled to the common-mode voltage.

6. The digital isolator according to claim 5, characterized in that: One of the common-mode transient immunity units of the second common-mode transient immunity circuit includes a third diode, a fourth diode and a third resistor; The cathode of the third diode, the anode of the fourth diode and the first end of the third resistor are coupled to the second node, and the anode of the third diode, the cathode of the fourth diode and the second end of the third resistor are coupled to the second reference ground.

7. The digital isolator according to claim 5, characterized in that: Another common-mode transient interference suppression unit of the second common-mode transient interference suppression circuit includes a pair of a fifth diode and a sixth diode connected in parallel; A cathode of the fifth diode and an anode of the sixth diode are coupled to the third node, and an anode of the fifth diode and a cathode of the sixth diode are coupled to the second reference ground.

8. The digital isolator according to claim 1, characterized in that: The diode includes a PN junction diode.

9. The digital isolator according to claim 1, characterized in that: The diode includes a diode formed by connecting a MOS tube or a bipolar tube.

10. An electronic device, characterized in that: The electronic device comprises the digital isolator according to any one of claims 1 to 9.

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