Digital phase-locked amplifier with large dynamic range

Abstract

The invention belongs to the technical field of phase-locked amplifiers, and particularly discloses a large-dynamic-range digital phase-locked amplifier, which comprises a signal generator, a phase-locked amplifier, a phase-locked amplifier circuit and a phase-locked amplifier circuit, the DAC is used for performing digital-to-analog conversion on the generated reference signal and providing an analog quantity obtained by conversion to the device to be tested; the ADC is used for performing analog-to-digital conversion on a signal output by the device to be tested, and providing a digital amplitude obtained by conversion to the gain controller and the digital demodulator; the gain controller is used for comparing the difference between the expected voltage amplitude and the digital amplitude provided by the ADC and adjusting the amplitude of the reference signal according to a negative feedback mode; and the digital demodulator is used for approaching amplitude-frequency phase-frequency characteristics of the device to be tested through a fitting mode based on the reference signal and the digital amplitude provided by the ADC, and outputting an estimation vector. The amplitude of the reference signal is adjusted according to a negative feedback mode, so that a signal link is prevented from entering a nonlinear interval, and a large dynamic range can be realized.

Description

Technical Field

[0001] The present application belongs to the technical field of lock-in amplifiers, and more specifically, relates to a digital lock-in amplifier with a large dynamic range. Background Art

[0002] The lock-in amplifier is an instrument widely used in weak signal detection. It uses phase-sensitive detection technology to modulate the signal to a specific frequency and suppress noise signals at other frequencies, which enables it to extract weak signals from a noisy environment. However, the current general lock-in amplifier is bulky and consumes a lot of power, which is not suitable for the miniaturization of precision instruments.

[0003] In addition, with the development of semiconductor technology, digital lock-in amplifiers have gradually replaced traditional analog demodulation circuits. Digital lock-in amplifiers overcome the temperature drift and low-frequency non-ideal characteristics of analog components, and complete phase-sensitive detection of signals through high-performance digital signal processing algorithms. The dynamic range of digital lock-in amplifiers in the prior art is limited. How to achieve a digital lock-in amplifier with a large dynamic range is a technical problem that needs to be solved urgently in this field. Summary of the invention

[0004] In view of the defects of the prior art, the purpose of the present application is to realize a digital lock-in amplifier with a large dynamic range.

[0005] To achieve the above objectives, in a first aspect, the present application provides a digital lock-in amplifier with a large dynamic range, comprising: a signal generator, a gain controller, a digital demodulator, a digital-to-analog converter DAC and an analog-to-digital converter ADC; The signal generator is used to generate a sine reference signal and a cosine reference signal, provide one of the two reference signals to a digital-to-analog converter DAC, and provide the two reference signals to a digital demodulator, and the two reference signals have the same amplitude. and have the same frequency and remain orthogonal; The digital-to-analog converter DAC is used to convert the reference signal generated by the signal generator into digital-to-analog and convert the converted analog value into Provided to the device under test; The analog-to-digital converter (ADC) is used to convert the output signal of the device under test into , perform analog-to-digital conversion, and convert the converted digital amplitude Provided to gain controller and digital demodulator; The gain controller is used to compare the expected voltage amplitude with the digital amplitude provided by the analog-to-digital converter ADC. The difference between the two is used to adjust the amplitude of the reference signal in a negative feedback manner. ; The digital demodulator is used to generate a digital signal based on two reference signals and the digital amplitude provided by the analog-to-digital converter ADC. , approximate the amplitude-frequency and phase-frequency characteristics of the device under test by fitting, and output the estimated vector of the device under test , the estimated vector Used to characterize the estimated values ​​of the amplitude-frequency and phase-frequency characteristics of the device under test.

[0006] In a possible implementation, the gain controller includes: a rectifier module, a difference calculation module, a low-pass filter and a negative feedback adjustment module; The rectifier module is used to rectify the digital amplitude provided by the analog-to-digital converter ADC Take the absolute value ; The difference calculation module is used to calculate the absolute value The expected voltage amplitude The difference between The low-pass filter is used to perform low-pass filtering on the signal output by the difference calculation module. ; The negative feedback regulation module is used to adjust the signal Take the reciprocal , and based on Update the amplitude of the reference signal .

[0007] In a possible implementation, the digital demodulator includes: an error estimation module, an adaptive rate determination module, and an estimation vector update module; The error estimation module is used to determine the estimated error using the following formula: ; in, represents the estimation error, , represents the frequency of the reference signal, Indicates time; represents the sinusoidal reference signal, represents the cosine reference signal; The adaptive rate determination module is used to determine the estimated vector by the following formula The corresponding adaptive adjustment rate: ; in, represents the adaptive regulation rate, is a constant; represents the loss function, , Represents the descent gradient of the loss function; The estimated vector update module is used to update the estimated vector Corresponding adaptive adjustment rate , update the estimated vector .

[0008] In a possible implementation, the signal generator includes: an orthogonal digitally controlled oscillator and a multiplier; A quadrature digitally controlled oscillator is used to generate the initial sinusoidal signal and the initial cosine signal , represents the frequency of the reference signal, Indicates time; The multiplier is used to adjust the amplitude of the initial sine signal and the amplitude of the initial cosine signal to generate a sine reference signal. Sum and cosine reference signals .

[0009] In a possible implementation, it also includes: a sampling module and a serial communication module; The sampling module is used to estimate the vector of the digital demodulator output The signal is downsampled and the downsampled signal is provided to the serial communication module.

[0010] In a second aspect, the present application provides a digital phase-locked amplification method with a large dynamic range, comprising: Generates sine and cosine reference signals with the same amplitude and have the same frequency and remain orthogonal; Convert a reference signal into digital-to-analog value and convert the converted analog value into Provided to the device under test; The output signal of the device under test , perform analog-to-digital conversion, and obtain the digital amplitude ; Compare expected voltage amplitude to digital amplitude The difference between the two is used to adjust the amplitude of the reference signal in a negative feedback manner. ; Based on two reference signals and digital amplitude , approximate the amplitude-frequency and phase-frequency characteristics of the device under test by fitting, and output the estimated vector of the device under test , the estimated vector Used to characterize the estimated values ​​of the amplitude-frequency and phase-frequency characteristics of the device under test.

[0011] In one possible implementation, the expected voltage amplitude is compared with the digital amplitude The difference between the two is used to adjust the amplitude of the reference signal in a negative feedback manner. ,include: Digital Amplitude Take the absolute value ; Calculate absolute value The expected voltage amplitude The difference between The difference signal is low-pass filtered and the output signal ; Signal Take the reciprocal , and based on Update the amplitude of the reference signal .

[0012] In a possible implementation, based on two reference signals and digital amplitude , approximate the amplitude-frequency and phase-frequency characteristics of the device under test by fitting, and output the estimated vector of the device under test ,include: The estimated error is determined by the following formula: ; in, represents the estimation error, , represents the frequency of the reference signal, Indicates time; represents the sinusoidal reference signal, represents the cosine reference signal; The estimated vector is determined by the following formula The corresponding adaptive adjustment rate: ; in, represents the adaptive regulation rate, is a constant; represents the loss function, , Represents the descent gradient of the loss function; Based on the estimated vector Corresponding adaptive adjustment rate , update the estimated vector .

[0013] In a possible implementation, generating a sine reference signal and a cosine reference signal includes: Generate an initial sinusoidal signal and the initial cosine signal , represents the frequency of the reference signal, Indicates time; Adjust the amplitude of the initial sine signal and the amplitude of the initial cosine signal to generate a sine reference signal Sum and cosine reference signals .

[0014] In a possible implementation, the method further includes: Estimation vector The signal is downsampled and the downsampled signal is used for serial port communication.

[0015] In general, the above technical solutions conceived by this application have the following beneficial effects compared with the prior art: (1) Through the gain controller, the expected voltage amplitude can be compared with the digital amplitude provided by the analog-to-digital converter ADC The difference between the two is used to adjust the amplitude of the reference signal in a negative feedback manner. To avoid the signal chain entering the nonlinear range such as saturation or full deviation, the amplitude of the excitation signal The sensitivity of the circuit There is a linear relationship between them, and sensitivity is achieved without introducing additional devices. By adjusting the sensitivity The dynamic range of the lock-in amplifier is thereby adjusted to achieve a large dynamic range.

[0016] (2) Estimation vector of digital demodulator will approach the true vector, i.e. , the closed-loop demodulation function approximates the state vector It will not be affected by the gain control. Therefore, in the case of large dynamic range switching (when the excitation amplitude changes), the amplitude of the output signal of the digital lock-in amplifier maintains a constant linear relationship with the amplitude of the output signal of the device under test, ensuring the stability of the detection. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 Schematic diagram of the working principle of the digital lock-in amplifier provided in the embodiment of the present application; Figure 2 is an orthogonal digital data conversion diagram of an orthogonal digitally controlled oscillator provided in an embodiment of the present application; Figure 3 is a schematic diagram of an automatic gain control loop provided in an embodiment of the present application; Figure 4 It is a schematic diagram of the working principle of the digital demodulator provided in the embodiment of the present application; Figure 5 is a schematic diagram of a step response of a digital demodulator provided in an embodiment of the present application; Figure 6 is a schematic diagram of the frequency response of the digital demodulator provided in an embodiment of the present application; Figure 7 It is an application schematic diagram of large dynamic range capacitance detection provided by an embodiment of the present application. DETAILED DESCRIPTION

[0018] In order to facilitate a clearer understanding of the embodiments of the present application, some relevant background knowledge is first introduced as follows.

[0019] The dynamic range of a lock-in amplifier can be defined as follows: ; in, and They represent the maximum and minimum amplitudes that the lock-in amplifier can identify. The amplitudes that the system can identify are as follows: ; in, represents the amplitude component of the output voltage at the demodulation frequency, Represents the sensitivity of the circuit. Due to the existence of thermal noise in the circuit and the maximum operating range of the circuit, The dynamic range is generally 140dB. Therefore, in order to solve the limitation of circuit non-ideality, the sensitivity can be changed , thereby adjusting the dynamic range of the lock-in amplifier to achieve a lock-in amplifier with a large dynamic range.

[0020] In order to make the purpose, technical solution and advantages of the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0021] In the embodiments of the present application, words such as "exemplary" or "for example" are used to indicate examples, illustrations or descriptions. Any embodiment or design described as "exemplary" or "for example" in the embodiments of the present application should not be interpreted as being more preferred or more advantageous than other embodiments or designs. Specifically, the use of words such as "exemplary" or "for example" is intended to present related concepts in a specific way.

[0022] In the description of the embodiments of the present application, unless otherwise specified, "multiple" means two or more than two. For example, multiple processing units refer to two or more processing units, etc.; multiple elements refer to two or more elements, etc.

[0023] The embodiments of the present application are described below in conjunction with the drawings in the embodiments of the present application.

[0024] Figure 1 Schematic diagram of the working principle of the digital lock-in amplifier provided in the embodiment of the present application. Figure 1As shown, the digital lock-in amplifier includes: a signal generator, a gain controller, a digital demodulator, a digital-to-analog converter DAC and an analog-to-digital converter ADC.

[0025] The signal generator, gain controller and digital demodulator can be implemented by a field programmable gate array (FPGA) or other control unit. The demodulation algorithm based on digital signal processing replaces the phase-sensitive demodulator of analog components, improving the reliability of the system.

[0026] The signal generator is used to generate a sine reference signal and a cosine reference signal, provide one of the two reference signals (sine reference signal and cosine reference signal) to a digital-to-analog converter DAC, and provide the two reference signals to a digital demodulator. The two reference signals have the same amplitude. They have the same frequency and remain orthogonal (there is a 90-degree phase difference between the two reference signals).

[0027] The digital-to-analog converter DAC is used to convert the reference signal generated by the signal generator into digital-to-analog and convert the converted analog value into Provided to the device under test.

[0028] The analog-to-digital converter (ADC) is used to convert the output signal of the device under test into , perform analog-to-digital conversion, and convert the converted digital amplitude Provided to the gain controller and digital demodulator.

[0029] The gain controller (or gain control loop) is used to compare the desired voltage amplitude with the digital amplitude provided by the analog-to-digital converter ADC. The difference between the two is used to adjust the amplitude of the reference signal in a negative feedback manner. .

[0030] The digital demodulator is used to generate a digital signal based on two reference signals and the digital amplitude provided by the analog-to-digital converter ADC. , approximate the amplitude-frequency and phase-frequency characteristics of the device under test by fitting, and output the estimated vector of the device under test , the estimated vector Used to characterize the estimated values ​​of the amplitude-frequency and phase-frequency characteristics of the device under test.

[0031] It is understandable that a reference signal can be converted into digital-to-analog through DAC, and the converted analog quantity Provided to the device under test, the digital demodulator can be based on the two reference signals and the digital amplitude provided by the analog-to-digital converter ADC , lock the phase of the reference signal (the signal components consistent with the reference signal phase are effectively extracted, while the noise components inconsistent with it are suppressed), approximate the amplitude-frequency and phase-frequency characteristics of the device under test by fitting, and output the estimated vector of the device under test , realize the output signal of the device under test Perform phase-sensitive detection to extract the signal The phase and amplitude information can be obtained, so that the amplitude-frequency and phase-frequency characteristics of the device under test at a specified modulation frequency (the frequency of the reference signal) can be obtained in an environment with relatively high noise.

[0032] At the same time, the gain controller can compare the expected voltage amplitude with the digital amplitude provided by the analog-to-digital converter ADC. The difference between the two is used to adjust the amplitude of the reference signal in a negative feedback manner. To avoid the signal chain entering the nonlinear range such as saturation or full deviation, the amplitude of the excitation signal The sensitivity of the circuit There is a linear relationship between them, and sensitivity is achieved without introducing additional devices. By adjusting the sensitivity The dynamic range of the lock-in amplifier is thereby adjusted to achieve a large dynamic range.

[0033] It is also worth noting that traditional dynamic range adjustment methods often rely on front-end programmable amplifiers or variable gain amplifiers. The introduction of additional devices increases the complexity and power consumption of the system.

[0034] Therefore, the amplitude of the reference signal is adjusted by the gain controller in a negative feedback manner. , and the amplitude-frequency and phase-frequency characteristics of the device under test are approximated by a digital demodulator in a fitting manner, which can take into account both noise and dynamic range and realize a digital lock-in amplifier with a large dynamic range.

[0035] In a possible implementation, the gain controller includes: a rectifier module, a difference calculation module, a low-pass filter and a negative feedback adjustment module; The rectifier module is used to rectify the digital amplitude provided by the analog-to-digital converter ADC Take the absolute value ; The difference calculation module is used to calculate the absolute value The expected voltage amplitude The difference between The low-pass filter is used to perform low-pass filtering on the signal output by the difference calculation module. ; The negative feedback regulation module is used to adjust the signal Take the reciprocal , and based on Update the amplitude of the reference signal .

[0036] In a possible implementation, the digital demodulator includes: an error estimation module, an adaptive rate determination module, and an estimation vector update module; The error estimation module is used to determine the estimated error using the following formula: ; in, represents the estimation error, , represents the frequency of the reference signal, Indicates time; represents the sinusoidal reference signal, represents the cosine reference signal; The adaptive rate determination module is used to determine the estimated vector by the following formula The corresponding adaptive adjustment rate: ; in, represents the adaptation rate, is a constant (usually a positive number, used to control the speed of convergence), represents the loss function, , Represents the descent gradient of the loss function; The estimated vector update module is used to update the estimated vector Corresponding adaptive adjustment rate , update the estimated vector .

[0037] For example, the estimated vector can be updated using the following formula: : .

[0038] It is understandable that the estimation error Close to 0 ( ), the digital demodulator enters a stable state. , , since the automatic gain control factor G is not zero, and The modulus value is always 1, so the estimated vector of the digital demodulator will approach the true vector, i.e. , the closed-loop demodulation function approximates the state vector (DUT at modulation frequency Amplitude-frequency and phase-frequency characteristics under After decomposition in the complex plane, the state vector Describe, represents the in-phase component, Represents the orthogonal component) will not be affected by the gain control. Therefore, in the case of large dynamic range switching (when the excitation amplitude changes), the amplitude of the output signal of the digital phase-locked amplifier maintains a constant linear relationship with the amplitude of the output signal of the device under test, ensuring the stability of the detection.

[0039] In a possible implementation, the signal generator includes: an orthogonal digitally controlled oscillator and a multiplier; A quadrature digitally controlled oscillator is used to generate the initial sinusoidal signal and the initial cosine signal , represents the frequency of the reference signal, Indicates time; The multiplier is used to adjust the amplitude of the initial sine signal and the initial cosine signal to generate a sine reference signal. Sum and cosine reference signals .

[0040] In a possible implementation, it also includes: a sampling module and a serial communication module; The sampling module is used to estimate the vector of the digital demodulator output The signal is downsampled (to adapt to the serial communication rate) and the downsampled signal is provided to the serial communication module.

[0041] The digital lock-in amplifier with a large dynamic range provided by the application is illustrated below through several examples.

[0042] Figure 2 is an orthogonal digital data conversion diagram of the orthogonal digital controlled oscillator provided in the embodiment of the present application, such as Figure 2 As shown, the orthogonal digitally controlled oscillator can adopt Direct Digital Synthesis (DDS), which is a technology for generating waveform signals and is widely used in signal processing, communication and electronic equipment.

[0043] Orthogonal digital data conversion: In DDS, orthogonal digital data conversion mainly refers to the process of generating sine waves and cosine waves. Since there is a 90-degree phase difference between sine waves and cosine waves, the generation of orthogonal signals can be achieved through the following steps: phase generation, waveform search, and signal output. Phase generation: The phase accumulator generates a linearly increasing phase value (such as ) at a fixed frequency (the frequency can be specified by the frequency control word M). Figure 2The quantized phase N in the waveform table represents the phase at the current time point, usually expressed in binary. Waveform search: Use the phase value as an index to obtain the corresponding sine and cosine wave amplitude values ​​from the waveform lookup table. Output signal: Send the sine and cosine wave amplitude values ​​obtained from the search to the DAC to generate an analog signal.

[0044] Figure 3 is a schematic diagram of an automatic gain control loop provided in an embodiment of the present application, such as Figure 3 As shown in the figure, a gain control loop is introduced to adjust the output voltage of the device under test. Real-time adjustment of excitation signal amplitude gain , its main operations include the following parts: (1) Take the absolute value (Abs) of the ADC data to complete the signal Rectification; (2) With the expected voltage amplitude set Do the difference and get the power estimation error; (3) The error signal is used as the input of the low-pass filter and the output As a signal, the low-pass filter is equivalent to an integrator, and the output is a positive number; (4) In order to ensure negative feedback regulation, the amplitude gain should be Inversely related, for example ,because is a positive number, so It is a positive number to ensure the existence of the excitation signal to meet the requirements of the phase-locked loop.

[0045] Figure 4 is a schematic diagram of the working principle of the digital demodulator provided in the embodiment of the present application, Figure 5 is a schematic diagram of a step response of a digital demodulator provided in an embodiment of the present application, Figure 6 is a schematic diagram of the frequency response of the digital demodulator provided in the embodiment of the present application. The purpose of the digital demodulator is to complete the input signal The amplitude and phase of the device under test can be identified by The amplitude-frequency-phase-frequency characteristics under After decomposition in the complex plane, the state vector Describe, represents the in-phase component, Represents the orthogonal components, then the following conversion equation is obtained: ; ; Where a is the state vector The amplitude in polar coordinates is expressed as: express The amplitude of express phase.

[0046] The corresponding estimation vector is introduced , the estimated error is as follows: ; The signal collected by the ADC can be written in the complex plane as .

[0047] The loss function is defined as: .

[0048] The steepest gradient method can be used to find the gradient of the loss function, and the adaptive adjustment rate of the system's state vector can be obtained as follows: ; The following expressions can be obtained by calculation: ; ; The definition expression of the loss function is Substitute it into the state space representation of the system to calculate: ; Will The expression of By integrating over the period, we can get the discrete transfer function representation of the system: ; make , its equivalent transfer function can be calculated as: .

[0049] Its principle is as follows Figure 4 As shown, it is noted that the stability of the demodulator is established When the system enters a stable state, there are: ; Since the automatic gain control factor will not be zero, and The modulus value of is always 1, so the demodulator's estimated vector will approach the true vector, that is, , the closed-loop demodulation function approximates the state vector It will not be affected by the gain control. Therefore, in the case of large dynamic range switching (when the excitation amplitude changes), the amplitude of the output signal of the digital lock-in amplifier maintains a constant linear relationship with the amplitude of the output signal of the device under test, ensuring the stability of the detection.

[0050] Figure 7 is an application diagram of large dynamic range capacitance detection provided by an embodiment of the present application, such as Figure 7 As shown in the figure, in order to verify the feasibility of the proposed method, the proposed phase-locked amplifier is used to realize large dynamic range capacitance detection. By dynamically adjusting the comprehensive output of the DDS digital signal and changing the reference signal amplitude, a digital demodulator based on the least squares method is designed at the demodulation end to realize variable range capacitance measurement. The specific basic structure includes: DAC module, bandpass filter, AC charge amplifier, high-speed ADC module, control and operation unit (signal generator, digital demodulator, gain controller), etc., and its implementation process includes the following parts.

[0051] (1) Connect the capacitor to be measured to the front part of the AC charge amplifier, and connect it to the DAC module, DAC module, bandpass filter and other modules to form a phase-locked amplifier loop.

[0052] (2) The control and operation unit generates two mutually orthogonal sinusoidal signals with the same frequency and amplitude according to the digital synthesis module. , whose frequency is the same as the center frequency of the passband, and whose amplitude depends on the carrier range control factor , use one of the signals S1 as the DAC input, and configure the bandpass filter to generate a sinusoidal excitation carrier.

[0053] (3) Read the voltage signal sampled by ADC , is fitted internally by the least squares method, by sampling the signal Generating Sine Signals with DDS After calculation, the capacitance signal is obtained .

[0054] (4) In order to avoid the range limitation caused by circuit saturation, an adaptive range control loop is introduced internally to detect the voltage value sampled by the ADC , take its absolute value and pass it through the internal filter to generate the carrier range control factor , Determines the signal generated by DDS The magnitude of .

[0055] (5) In the digital demodulation, a digital phase-sensitive demodulator based on the least squares method is selected, and the approximation error is defined as: ; After convergence fitting, let it tend to 0, and the sensitivity from capacitor to digital output is: ; Always remain unchanged, the amplitude of the output signal of the digital lock-in amplifier maintains a constant linear relationship with the amplitude of the output signal of the device under test, and is not affected by changes in the carrier amplitude.

[0056] The digital phase-locked amplification method with a large dynamic range provided by the present application is described below. The digital phase-locked amplification method with a large dynamic range described below and the digital phase-locked amplifier with a large dynamic range described above can be referred to in correspondence with each other.

[0057] The present application provides a digital phase-locked amplification method with a large dynamic range, comprising: Generates sine and cosine reference signals with the same amplitude and have the same frequency and remain orthogonal; Convert a reference signal into digital-to-analog value and convert the converted analog value into Provided to the device under test; The output signal of the device under test , perform analog-to-digital conversion, and obtain the digital amplitude ; Compare expected voltage amplitude to digital amplitude The difference between the two is used to adjust the amplitude of the reference signal in a negative feedback manner. ; Based on two reference signals and digital amplitude , approximate the amplitude-frequency and phase-frequency characteristics of the device under test by fitting, and output the estimated vector of the device under test , the estimated vector Used to characterize the estimated values ​​of the amplitude-frequency and phase-frequency characteristics of the device under test.

[0058] In one possible implementation, the expected voltage amplitude is compared with the digital amplitude The difference between the two is used to adjust the amplitude of the reference signal in a negative feedback manner. ,include: Digital Amplitude Take the absolute value ; Calculate absolute value The expected voltage amplitude The difference between The difference signal is low-pass filtered and the output signal ; Signal Take the reciprocal , and based on Update the amplitude of the reference signal .

[0059] In a possible implementation, based on two reference signals and digital amplitude , approximate the amplitude-frequency and phase-frequency characteristics of the device under test by fitting, and output the estimated vector of the device under test ,include: The estimated error is determined by the following formula: ; in, represents the estimation error, , represents the frequency of the reference signal, Indicates time; represents the sinusoidal reference signal, represents the cosine reference signal; The estimated vector is determined by the following formula The corresponding adaptive adjustment rate: ; in, represents the adaptive regulation rate, is a constant; represents the loss function, , Represents the descent gradient of the loss function; Based on the estimated vector Corresponding adaptive adjustment rate , update the estimated vector .

[0060] In a possible implementation, generating a sine reference signal and a cosine reference signal includes: Generate an initial sinusoidal signal and the initial cosine signal , represents the frequency of the reference signal, Indicates time; Adjust the amplitude of the initial sine signal and the amplitude of the initial cosine signal to generate a sine reference signal Sum and cosine reference signals .

[0061] In a possible implementation, the method further includes: Estimation vector The signal is downsampled and the downsampled signal is used for serial port communication.

[0062] It should be understood that the various numerical numbers involved in the embodiments of the present application are only used for the convenience of description and are not used to limit the scope of the embodiments of the present application.

[0063] It will be easily understood by those skilled in the art that the above description is only a preferred embodiment of the present application and is not intended to limit the present application. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present application shall be included in the scope of protection of the present application.

Claims

1. A digital lock-in amplifier with a large dynamic range, characterized in that: include: Signal generator, gain controller, digital demodulator, digital-to-analog converter DAC and analog-to-digital converter ADC; The signal generator is used to generate a sine reference signal and a cosine reference signal, provide one of the two reference signals to a digital-to-analog converter DAC, and provide the two reference signals to a digital demodulator, and the two reference signals have the same amplitude. and have the same frequency and remain orthogonal; The digital-to-analog converter DAC is used to convert the reference signal generated by the signal generator into digital-to-analog and convert the converted analog value into Provided to the device under test; The analog-to-digital converter (ADC) is used to convert the output signal of the device under test into , perform analog-to-digital conversion, and convert the converted digital amplitude Provided to gain controller and digital demodulator; The gain controller is used to compare the expected voltage amplitude with the digital amplitude provided by the analog-to-digital converter ADC. The difference between the two is used to adjust the amplitude of the reference signal in a negative feedback manner. ; The digital demodulator is used to generate a digital signal based on two reference signals and the digital amplitude provided by the analog-to-digital converter ADC. , approximate the amplitude-frequency and phase-frequency characteristics of the device under test by fitting, and output the estimated vector of the device under test , the estimated vector Used to characterize the estimated values ​​of the amplitude-frequency and phase-frequency characteristics of the device under test.

2. The digital lock-in amplifier with a large dynamic range according to claim 1, characterized in that: The gain controller comprises: a rectifier module, a difference calculation module, a low-pass filter and a negative feedback adjustment module; The rectifier module is used to rectify the digital amplitude provided by the analog-to-digital converter ADC Take the absolute value ; The difference calculation module is used to calculate the absolute value The expected voltage amplitude The difference between The low-pass filter is used to perform low-pass filtering on the signal output by the difference calculation module. ; The negative feedback regulation module is used to adjust the signal Take the reciprocal , and based on Update the amplitude of the reference signal .

3. The digital lock-in amplifier with a large dynamic range according to claim 1, characterized in that: The digital demodulator comprises: an error estimation module, an adaptive rate determination module and an estimation vector update module; The error estimation module is used to determine the estimated error using the following formula: ； in, represents the estimation error, , represents the frequency of the reference signal, Indicates time; represents the sinusoidal reference signal, represents the cosine reference signal; The adaptive rate determination module is used to determine the estimated vector by the following formula The corresponding adaptive adjustment rate: ； in, represents the adaptive regulation rate, is a constant; represents the loss function, , Represents the descent gradient of the loss function; The estimated vector update module is used to update the estimated vector Corresponding adaptive adjustment rate , update the estimated vector .

4. The digital lock-in amplifier with a large dynamic range according to claim 1, characterized in that: The signal generator comprises: an orthogonal digitally controlled oscillator and a multiplier; A quadrature digitally controlled oscillator is used to generate the initial sinusoidal signal and the initial cosine signal , represents the frequency of the reference signal, Indicates time; The multiplier is used to adjust the amplitude of the initial sine signal and the amplitude of the initial cosine signal to generate a sine reference signal. and cosine reference signal .

5. The digital lock-in amplifier with a large dynamic range according to any one of claims 1 to 4, characterized in that: Also includes: Sampling module and serial communication module; The sampling module is used to estimate the vector of the digital demodulator output The signal is downsampled and the downsampled signal is provided to the serial communication module.

6. A digital phase-locked amplification method with a large dynamic range, characterized in that: include: Generates sine and cosine reference signals with the same amplitude and have the same frequency and remain orthogonal; Convert a reference signal into digital-to-analog value and convert the converted analog value into Provided to the device under test; The output signal of the device under test , perform analog-to-digital conversion, and obtain the digital amplitude ; Compare expected voltage amplitude to digital amplitude The difference between the two is used to adjust the amplitude of the reference signal in a negative feedback manner. ; Based on two reference signals and digital amplitude , approximate the amplitude-frequency and phase-frequency characteristics of the device under test by fitting, and output the estimated vector of the device under test , the estimated vector Used to characterize the estimated values ​​of the amplitude-frequency and phase-frequency characteristics of the device under test.

7. The method for digital phase-locked amplification with a large dynamic range according to claim 6, characterized in that: The comparison of the expected voltage amplitude and the digital amplitude The difference between the two is used to adjust the amplitude of the reference signal in a negative feedback manner. ,include: Digital Amplitude Take the absolute value ; Calculate absolute value The expected voltage amplitude The difference between The difference signal is low-pass filtered and the output signal ; Signal Take the reciprocal , and based on Update the amplitude of the reference signal .

8. The method for digital phase-locked amplification with a large dynamic range according to claim 6, characterized in that: The method is based on two reference signals and digital amplitude , approximate the amplitude-frequency and phase-frequency characteristics of the device under test by fitting, and output the estimated vector of the device under test ,include: The estimated error is determined by the following formula: ； in, represents the estimation error, , represents the frequency of the reference signal, Indicates time; represents the sinusoidal reference signal, represents the cosine reference signal; The estimated vector is determined by the following formula The corresponding adaptive adjustment rate: ； in, represents the adaptive regulation rate, is a constant; represents the loss function, , Represents the descent gradient of the loss function; Based on the estimated vector Corresponding adaptive adjustment rate , update the estimated vector .

9. The method for digital phase-locked amplification with a large dynamic range according to claim 6, characterized in that: The generating of the sine reference signal and the cosine reference signal comprises: Generate an initial sinusoidal signal and the initial cosine signal , represents the frequency of the reference signal, Indicates time; Adjust the amplitude of the initial sine signal and the amplitude of the initial cosine signal to generate a sine reference signal Sum and cosine reference signals .

10. The digital phase-locked amplification method with a large dynamic range according to any one of claims 6 to 9, characterized in that: Also includes: Estimation vector The signal is downsampled and the downsampled signal is used for serial port communication.

Images