Spin-orbit moment magnetic memory and preparation method thereof

Abstract

The invention provides a spin-orbit torque magnetic memory and a preparation method thereof. The method comprises the following steps: providing a substrate; forming a track layer on the substrate; depositing a dielectric layer covering the track layer on the substrate; planarizing the dielectric layer to expose the track layer; depositing a stack layer structure for forming a magnetic tunnel junction on the track layer; depositing a hard mask layer on the stack layer structure, and etching the hard mask layer; and etching the stack layer structure and the dielectric layer according to the hard mask layer to form a magnetic tunnel junction, and forming a sinking groove in the top of the dielectric layer. According to the invention, the problem of metal redeposition and the problem of over-etching of the track layer can be effectively avoided.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a spin-orbit moment magnetic memory and a preparation method thereof. Background Art

[0002] Spin-orbit torque magnetic memory (SOT-MRAM) has the advantages of high access speed, low power consumption, non-volatility, etc. Generally, the structure of SOT-MRAM is to sequentially arrange a free layer, a barrier layer, a reference layer, and a pinning layer on a spin-orbit torque providing layer (orbital layer).

[0003] However, in the etching process of the free layer, barrier layer, reference layer and pinned layer, metal sputtering on the sidewalls of the magnetic tunnel junction usually occurs, that is, the problem of metal re-deposition and the problem of over-etching of the track layer occur, which leads to device failure. Summary of the invention

[0004] In order to solve the above problems, the spin-orbit moment magnetic memory and the preparation method thereof provided by the present invention can effectively avoid the metal redeposition problem and the track layer over-etching problem by providing a dielectric layer.

[0005] In a first aspect, the present invention provides a method for preparing a spin-orbit moment magnetic memory, the method comprising:

[0006] providing a substrate;

[0007] forming a track layer on a substrate;

[0008] depositing a dielectric layer covering the track layer;

[0009] planarizing the dielectric layer to expose the track layer;

[0010] Depositing a stacked layer structure for forming a magnetic tunnel junction on the track layer;

[0011] depositing a hard mask layer on the stacked layer structure, and etching the hard mask layer;

[0012] The stacked layer structure and the dielectric layer are etched according to the hard mask layer to form a magnetic tunnel junction, and a sinker groove is formed on the top of the dielectric layer.

[0013] Optionally, before the step of forming a track layer on the substrate, the method further comprises:

[0014] forming an insulating layer on a substrate;

[0015] The steps of forming a track layer on a substrate include:

[0016] A track layer is deposited on the substrate covering the insulating layer.

[0017] Optionally, the material of the insulating layer includes at least one of SiO2, Si3N4, Al2O3, Gd2O3, HfO2 and ZrO2.

[0018] Optionally, after the steps of etching the stacked layer structure and the dielectric layer according to the hard mask layer to form a magnetic tunnel junction and forming a sinker groove on the top of the dielectric layer, the method further comprises:

[0019] A protective layer is deposited covering the magnetic tunnel junction.

[0020] Optionally, the pattern shape of the hard mask is rectangular, circular or elliptical.

[0021] Optionally, the substrate includes a first bottom electrode, a second bottom electrode and an isolation layer;

[0022] The isolation layer isolates the first bottom electrode from the second bottom electrode;

[0023] The track layer is connected to the first bottom electrode and the second bottom electrode.

[0024] Optionally, the size of the hard mask layer is larger than the size of the surface of the track layer in contact with the magnetic tunnel junction.

[0025] Optionally, the step of depositing a stacked layer structure for forming a magnetic tunnel junction on the track layer includes:

[0026] A free layer, a barrier layer, a reference layer and a pinning layer are sequentially deposited on the track layer to form a stacked layer structure.

[0027] Optionally, before the step of forming the track layer on the substrate, the method further comprises: forming a magnetic bias layer on the substrate;

[0028] Alternatively, after the steps of depositing a hard mask layer on the stacked layer structure and etching the hard mask layer, the method further comprises: forming a magnetic bias layer on the upper surface of the hard mask layer.

[0029] In a second aspect, the present invention provides a spin-orbit torque magnetic memory, which is prepared by any of the methods described above.

[0030] The spin-orbit torque magnetic memory and the preparation method thereof provided by the embodiment of the present invention form a dielectric layer on the peripheral side of the track layer, so that the metal generated by the etching solution can be translated downward into the sinking groove during the etching of the stacked layer structure, effectively avoiding the problem of the free layer and the reference layer being connected due to the metal adhering to the side wall of the magnetic tunnel junction, thereby causing a short circuit; at the same time, the sinking groove formed on the top of the dielectric layer will not cause damage to the track layer, thereby improving the yield of device preparation. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the conventional technology, the drawings required for use in the embodiments or the conventional technology descriptions are briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0032] Figures 1a to 1f Schematic structural diagram of each stage of preparing a magnetic memory according to an embodiment of the present application;

[0033] Figure 2a to Figure 2f This is a schematic structural diagram of various stages in the preparation of a magnetic memory according to another embodiment of the present application.

[0034] Reference numerals:

[0035] 1. Substrate; 11. First bottom electrode; 12. Second bottom electrode; 13. Isolation layer; 2. Track layer; 3. Dielectric layer; 31. Sinking groove; 41. Stacked layer structure; 411. Free layer; 412. Barrier layer; 413. Reference layer; 414. Pinned layer; 42. Magnetic tunnel junction; 5. Hard mask layer; 6. Protective layer; 7. Insulating layer. DETAILED DESCRIPTION

[0036] In order to facilitate understanding of the present application, the present application will be described more fully below with reference to the relevant drawings. Embodiments of the present application are provided in the drawings. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present application more thorough and comprehensive.

[0037] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used herein in the specification of this application are only for the purpose of describing specific embodiments and are not intended to limit this application.

[0038] Spatially relative terms such as "under," "beneath," "below," "under," "above," "above," and the like may be used herein to describe the relationship of an element or feature shown in the figures to other elements or features. It should be understood that, in addition to the orientations shown in the figures, spatially relative terms also include different orientations of the device in use and operation. For example, if the device in the accompanying drawings is flipped, an element or feature described as "under other elements" or "under it" or "under it" will be oriented as being "above" the other elements or features. Thus, the exemplary terms "under" and "under" may include both upper and lower orientations. In addition, the device may also include additional orientations (e.g., rotated 90 degrees or other orientations), and the spatial descriptors used herein are interpreted accordingly.

[0039] It should be noted that when an element is referred to as being "fixedly connected" to another element, it may be directly on the other element or there may also be a central element. When an element is considered to be "connected" to another element, it may be directly connected to the other element or there may be a central element at the same time. In contrast, when an element is referred to as being "directly on" another element, there is no intermediate element. The terms "vertical", "horizontal", "left", "right" and similar expressions used herein are for illustrative purposes only.

[0040] When used herein, the singular forms "a", "an", and "said / the" may also include plural forms, unless the context clearly indicates otherwise. It should also be understood that the terms "include / comprise" or "have" etc. specify the presence of stated features, wholes, steps, operations, components, parts or combinations thereof, but do not exclude the possibility of the presence or addition of one or more other features, wholes, steps, operations, components, parts or combinations thereof.

[0041] In a first aspect, this embodiment provides a method for preparing a spin-orbit moment magnetic memory, see Figures 1a to 1f , the method comprises steps S101 to S108:

[0042] Step S101: providing a substrate 1.

[0043] In the embodiment, the substrate 1 includes a first bottom electrode 11, a second bottom electrode 12 and an isolation layer 13. The isolation layer 13 is an insulating material; the first bottom electrode 11 and the second bottom electrode 12 are located on both sides of the isolation layer 13 in the horizontal direction, so that the isolation layer 13 isolates the first bottom electrode 11 from the second bottom electrode 12.

[0044] Step S102: See Figure 1a , a track layer 2 is formed on a substrate 1.

[0045] It should be noted that the method of forming the track layer 2 includes depositing a track layer material on the substrate 1 to obtain the track layer 2, or performing patterning on the layer structure formed by the track layer material after depositing the track layer material on the substrate 1 to obtain the track layer 2.

[0046] In this embodiment, the track layer 2 is formed by performing patterning after depositing a track layer material on the substrate 1. Among them, the track layer 2 is a columnar structure, and its cross-section can be in the shape of a rectangle, a circle, an ellipse, etc.; the material of the track layer 2 includes at least one of W, Ta, Pt, Pd, Au, Cu, Ru, Hf, Mo, Ti, Ir, Mn, Bi x Se (1-x) 、Sb x Te (1-x) and Bi x Te (1-x) where 0 < x < 1. In this embodiment, the cross-section of the track layer 2 is circular; both ends of the track layer 2 are respectively connected to the first bottom electrode 11 and the second bottom electrode 12.

[0047] Step S103: Refer to Figure 1b , deposit a dielectric layer 3 covering the track layer 2.

[0048] Step S104: Refer to Figure 1c , planarize the dielectric layer 3 to expose the track layer 2.

[0049] Among them, the remaining dielectric layer 3 is located on opposite sides of the track layer 2 in the horizontal direction.

[0050] Step S105: Refer to Figure 1d , deposit a stacked layer structure 41 for forming the magnetic tunnel junction 42 on the track layer 2.

[0051] In this embodiment, the step of depositing the stacked layer structure 41 for forming the magnetic tunnel junction 42 on the track layer 2 includes: sequentially depositing a free layer 411, a barrier layer 412, a reference layer 413, and a pinning layer 414 on the track layer 2 to form the stacked layer structure 41, that is, the stacked layer structure 41 is stacked with the free layer 411, the barrier layer 412, the reference layer 413, and the pinning layer 414 from bottom to top in sequence.

[0052] Among them, the materials of the free layer 411, the reference layer 413, and the pinning layer 414 can be respectively a first material composed of at least one of Co, Fe, Ni, and B, or a multilayer film formed by the first material and at least one of Co, Fe, Ni, Pt, Pd, Mo, W, Ir, Ta, Tb, Ru, Nb, Hf, and Mn, but are not limited thereto. The material of the barrier layer 412 can be at least one of MgO, MgAl2O4, Al2O3, Gd2O3, and HfO2, but is not limited thereto.

[0053] Step S106 : depositing a hard mask layer 5 on the stacked layer structure 41 , and etching the hard mask layer 5 by photolithography.

[0054] The material of the hard mask layer 5 includes, but is not limited to, at least one of TaN, Ta, TiN, Ti, WN and W.

[0055] Preferably, the size of the hard mask layer 5 is larger than the size of the surface of the track layer 2 that contacts the magnetic tunnel junction 42. By limiting the relative size of the hard mask relative to the surface of the track layer 2 that contacts the magnetic tunnel junction 42, it is possible to ensure that during the formation of the sinker groove 31, the redeposited metal impurities do not contact the track layer 2, the first bottom electrode 11, and the second bottom electrode 12, thereby reducing the influence of metal impurities on the conductivity of the device.

[0056] It should be noted that the pattern of the hard mask layer 5 determines the shape of the cross section of the magnetic tunnel junction 42. In an optional embodiment, the pattern shape of the hard mask is rectangular, circular or elliptical.

[0057] Step S107: See Figure 1e , the stacked layer structure 41 and the dielectric layer 3 are etched according to the hard mask layer 5 to form a magnetic tunnel junction 42, and a sinking groove 31 is formed on the top of the dielectric layer 3

[0058] By forming the sinking groove 31 , it is possible to effectively avoid the problem that the redeposited metal impurities adhere to the side wall of the magnetic tunnel junction 42 , causing the free layer 411 and the reference layer 413 to be interconnected under the action of the metal impurities.

[0059] It can be understood that the sinking groove 31 is formed by over-etching the top of the dielectric layer 3 during the etching process of the stacked layer structure 41 with the hard mask layer 5 as a pattern.

[0060] Step S108: See Figure 1f , depositing a protective layer 6.

[0061] The protection layer 6 covers the magnetic tunnel junction 42 .

[0062] It should be noted that the materials of the isolation layer 13, the dielectric layer 3 and the protective layer 6 can be at least one of SiO2, Si3N4, Al2O3, Gd2O3, HfO2 and ZrO2, respectively, but are not limited thereto; the free layer 411 and the reference layer 413 mentioned above can be in-plane magnetized or perpendicularly magnetized. At the same time, after executing step S108, the process operation of flattening the protective layer 6 and generating the top electrode can be continued, which is not specifically limited in this embodiment.

[0063] In this embodiment, after depositing the hard mask layer 5 on the stacked layer structure 41 and etching the hard mask layer 5, the method further includes: forming a magnetic bias layer on the upper surface of the hard mask layer 5. In this way, a magnetic tunnel junction 42 with a perpendicular magnetization structure can be formed.

[0064] In a second aspect, this embodiment provides a method for preparing a spin-orbit moment magnetic memory, see Figure 2a to Figure 2f The method includes steps S201 to S208:

[0065] Step S201: providing a substrate 1.

[0066] Step S202: See Figure 2a , an insulating layer 7 is formed on the substrate 1.

[0067] In this embodiment, the insulating layer 7 is formed by depositing an insulating material on the substrate 1 and then performing a patterning process. This embodiment will not elaborate on the patterning process.

[0068] The insulating layer material includes at least one of SiO2, Si3N4, Al2O3, Gd2O3, HfO2 and ZrO2, but is not limited thereto. The insulating layer 7 is a columnar structure, and its cross section can be rectangular, circular or elliptical.

[0069] Step S203 : depositing a track layer 2 covering the insulating layer 7 on the substrate 1 .

[0070] In this embodiment, the track layer 2 is formed by depositing a track layer material covering the insulating layer 7 on the substrate 1. The track layer 2 is a cap structure, including a horizontal cap brim portion in contact with the substrate 1 and a cap top portion covering the insulating layer 7.

[0071] Step S204: See Figure 2b , a dielectric layer 3 covering the track layer 2 is deposited on the track layer 2 .

[0072] Step S205: See Figure 2c , planarize the dielectric layer 3 to expose the track layer 2.

[0073] Step S206: See Figure 2d , a stacked layer structure 41 for forming a magnetic tunnel junction 42 is deposited on the track layer 2.

[0074] Step S207 : depositing a hard mask layer 5 on the stacked layer structure 41 , and etching the hard mask layer 5 by photolithography.

[0075] Step S208: See Figure 2e , the stacked layer structure 41 and the dielectric layer 3 are etched according to the hard mask layer 5 to form a magnetic tunnel junction 42 , and a sinker groove 31 is formed on the top of the dielectric layer 3 .

[0076] Step S209: See Figure 2f , a protection layer 6 is deposited, and the protection layer 6 covers the magnetic tunnel junction 42 .

[0077] In this embodiment, before forming the track layer 2 on the substrate 1, the method further includes: forming a magnetic bias layer on the substrate 1, and then forming an insulating layer 7 on the magnetic bias layer. In this way, a magnetic tunnel junction 42 with a perpendicular magnetization structure can be formed.

[0078] It should be noted that forming a magnetic bias layer on the substrate 1 includes: forming a magnetic bias layer on the upper surface or the lower surface of the substrate 1 .

[0079] The method for preparing the spin-orbit moment magnetic memory provided by the present invention is simple to operate and has low manufacturing cost. By forming the dielectric layer 3 on the peripheral side of the track layer 2, the metal impurities generated by the etched portion of the stacked layer structure 41 can be translated downward into the sinking groove 31 during the etching process of the stacked layer structure 41, thereby effectively avoiding the metal adhering to the side wall of the magnetic tunnel junction 42, thereby causing the free layer 411 and the reference layer 413 to be connected. At the same time, the formation of the sinking groove 31 on the top of the dielectric layer 3 will not cause damage to the track layer 2, thereby improving the yield of device preparation.

[0080] In a third aspect, an embodiment of the present invention provides a spin-orbit torque magnetic memory, and the spin-orbit torque magnetic memory is prepared by the method in any of the above aspects.

[0081] In the description of this specification, the description with reference to the terms "some embodiments", "other embodiments", "ideal embodiments", etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic descriptions of the above terms do not necessarily refer to the same embodiment or example.

[0082] The technical features of the above embodiments may be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0083] The above-mentioned embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the present application. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the present application shall be subject to the attached claims.

Claims

1. A method for preparing a spin-orbit moment magnetic memory, characterized in that: The method comprises: providing a substrate; forming a track layer on the substrate; depositing a dielectric layer covering the track layer; planarizing the dielectric layer to expose the track layer; Depositing a stacked layer structure for forming a magnetic tunnel junction on the track layer; Depositing a hard mask layer on the stacked layer structure, and etching the hard mask layer; The stacked layer structure and the dielectric layer are etched according to the hard mask layer to form a magnetic tunnel junction, and a sinker groove is formed on the top of the dielectric layer.

2. The method according to claim 1, characterized in that Before the step of forming a track layer on the substrate, the method further comprises: forming an insulating layer on the substrate; The step of forming a track layer on the substrate comprises: A track layer is deposited on the substrate covering the insulating layer.

3. The method according to claim 2, characterized in that The material of the insulating layer includes at least one of SiO2, Si3N4, Al2O3, Gd2O3, HfO2 and ZrO2.

4. The method according to claim 1, characterized in that: After the step of etching the stacked layer structure and the dielectric layer according to the hard mask layer to form the magnetic tunnel junction, and forming a sinker groove on the top of the dielectric layer, the method further includes: A protection layer is deposited covering the magnetic tunnel junction.

5. The method according to claim 1, characterized in that The pattern shape of the hard mask is rectangular, circular or elliptical.

6. The method according to claim 1, characterized in that The substrate comprises a first bottom electrode, a second bottom electrode and an isolation layer; The isolation layer isolates the first bottom electrode from the second bottom electrode; The track layer is connected to the first bottom electrode and the second bottom electrode.

7. The method according to claim 1, characterized in that The hard mask layer has a size greater than a size of a surface of the track layer that contacts the magnetic tunnel junction.

8. The method according to claim 1, characterized in that The step of depositing a stacked layer structure for forming a magnetic tunnel junction on the track layer comprises: A free layer, a barrier layer, a reference layer and a pinning layer are sequentially deposited on the track layer to form a stacked layer structure.

9. The method according to any one of claims 1 to 8, characterized in that Before the step of forming a track layer on the substrate, the method further comprises: forming a magnetic bias layer on the substrate; Alternatively, after the steps of depositing a hard mask layer on the stacked layer structure and etching the hard mask layer, the method further comprises: forming a magnetic bias layer on an upper surface of the hard mask layer.

10. A spin-orbit moment magnetic memory, characterized in that: The spin-orbit torque magnetic memory is prepared by the method according to any one of claims 1 to 9.

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