Unit synchronous loop logic optimization method and device, electronic equipment and storage medium

Abstract

The invention provides a unit synchronous loop logic optimization method and device, electronic equipment and a storage medium, and the method comprises the steps: determining a key node according to a multi-unit connection relation table, and connecting a second control circuit to a first control circuit of the key node in parallel, namely enabling the first control circuit and the second control circuit to have the same effect, and improving the reliability of the unit synchronous loop logic optimization. And the on-off of the unit can be controlled. When one control circuit goes wrong, the other control circuit is used for control, and stable operation of the unit is guaranteed. When the signal data of the first control circuit is not received, the second control circuit is switched on, namely the first control circuit cannot be switched on, the second control circuit is switched on, and all the units operate stably. When the signal data of the first control line or the second control line is received, the line of the unit is conducted, and the multiple units can be controlled to operate synchronously, so that synchronous operation of the units can be guaranteed, synchronous operation of the units is guaranteed, and stable operation of all the units in the power station is guaranteed.

Description

Technical Field

[0001] The present application relates to the technical field of power plant units, and in particular to a method, device, electronic equipment and storage medium for optimizing the logic of a synchronous loop of a unit. Background Art

[0002] If there is a fault point in the existing power station unit, such as the relay of one unit cannot be closed or cannot operate, all units will be unable to operate, thus affecting the operation of the entire power station and causing great losses. In the unit synchronization circuit, the synchronous control of the unit is also particularly important. In the existing technology, the running units cannot guarantee synchronous operation, which also has a certain impact on the operation of the power station. Summary of the invention

[0003] In view of this, the purpose of this application is to propose a method, device, electronic device and storage medium for optimizing the logic of the synchronous loop of a unit to solve some or all of the technical problems raised in the background technology.

[0004] Based on the above purpose, the present application provides a method for optimizing the logic of a synchronous circuit of a unit, comprising:

[0005] Determine a key node according to the multi-unit connection relationship table, and connect a second control line in parallel to the first control line of the key node;

[0006] In response to not receiving the signal data of the first control line, turning on the second control line;

[0007] The signal data of the first control line or the second control line is received to control the multiple units to operate synchronously.

[0008] Optionally, the multi-unit connection relationship table includes node tags;

[0009] Determining the key nodes according to the connection relationship of multiple units includes:

[0010] Searching for a node marked with an asterisk in the multi-unit connection relationship table;

[0011] The found nodes marked with asterisks are used as the key nodes.

[0012] Optionally, controlling the multiple units to operate synchronously includes:

[0013] Acquire synchronization signal data of different units, and adjust each synchronization signal data to obtain adjusted signal data;

[0014] parsing the adjusted signal data to obtain synchronous operation data;

[0015] According to the synchronous operation data, the multiple units are controlled to operate synchronously.

[0016] Optionally, the adjusting each of the synchronization signal data to obtain adjusted signal data includes:

[0017] Performing time alignment on each of the synchronization signal data to obtain time-aligned synchronization signal data;

[0018] Performing frequency adjustment on the time-aligned synchronization signal to obtain frequency-adjusted synchronization signal data;

[0019] The frequency-adjusted synchronization signal data is demodulated by a signal demodulation module to obtain demodulated signal data.

[0020] Optionally, the performing time alignment on each of the synchronization signal data to obtain the time-aligned synchronization signal data includes:

[0021] Determine phase change data and amplitude change data of each synchronization signal data according to each synchronization signal data;

[0022] Time alignment is performed on each of the synchronization signal data according to the phase change data and the amplitude change data to obtain time-aligned synchronization signal data.

[0023] Optionally, determining the phase change data and the amplitude change data of each synchronization signal data according to each synchronization signal data includes:

[0024] Filtering the synchronization signal data by a filter to obtain the synchronization signal data after interference is removed;

[0025] According to the synchronization signal data after interference removal, a phase detection algorithm is used to detect the phase change information of each synchronization signal to obtain the phase change data of each signal;

[0026] The amplitude detection algorithm is used to detect the synchronization signal data after the interference is removed to obtain the amplitude change data.

[0027] Optionally, the frequency-adjusting the time-aligned synchronization signal to obtain frequency-adjusted synchronization signal data includes:

[0028] The frequency detection module detects each synchronization signal data after time alignment to obtain frequency difference data;

[0029] According to the frequency difference data, a frequency matching algorithm is used to adjust the frequency of the synchronization signals of different units to obtain the synchronization signal data after frequency adjustment.

[0030] Based on the same inventive concept, the present application also provides a unit synchronization loop logic optimization device, comprising:

[0031] A determination module is configured to determine a key node according to a multi-unit connection relationship table, and connect a second control line in parallel to the first control line of the key node;

[0032] an action module, configured to, in response to not receiving the signal data of the first control line, turn on the second control line;

[0033] The execution module is configured to receive the signal data of the first control circuit or the second control circuit and control the synchronous operation of the multiple units.

[0034] Based on the same inventive concept, the present application also provides an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements the method described above when executing the program.

[0035] Based on the same inventive concept, the present application also provides a non-transitory computer-readable storage medium, which stores computer instructions, and the computer instructions are used to enable a computer to execute the method described above.

[0036] As can be seen from the above, the present application provides a method, device, electronic device and storage medium for optimizing the logic of the synchronous circuit of a unit. The method determines the key node according to the multi-unit connection relationship table, and connects the second control circuit in parallel to the first control circuit of the key node, that is, the first control circuit and the second control circuit can have the same function, and both can control the on and off of the unit. When a problem occurs in one of the control circuits, the other control circuit can be used for control to ensure the stable operation of the unit. When the signal data of the first control circuit is not received, the second control circuit is turned on, that is, the first control circuit cannot be turned on, then the second control circuit is turned on, so that all units can operate stably. When the signal data of the first control circuit or the second control circuit is received, it means that the unit circuit is turned on, and the synchronous operation of multiple units can be controlled, so that the synchronous operation of each unit can be ensured, and the stable operation of all units in the power station can be ensured. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] In order to more clearly illustrate the technical solutions in the present application or related technologies, the drawings required for use in the embodiments or related technical descriptions are briefly introduced below. Obviously, the drawings described below are only embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0038] Figure 1A schematic flow chart of a method for optimizing the logic of a synchronous circuit of a unit according to an embodiment of the present application;

[0039] Figure 2 This is a schematic diagram of the structure of a unit synchronization loop logic optimization device according to an embodiment of the present application;

[0040] Figure 3 A schematic diagram of the hardware structure of an electronic device according to an embodiment of the present application. DETAILED DESCRIPTION

[0041] In order to make the objectives, technical solutions and advantages of the present application more clearly understood, the present application is further described in detail below in combination with specific embodiments and with reference to the accompanying drawings.

[0042] It should be noted that, unless otherwise defined, the technical terms or scientific terms used in the embodiments of the present application should be the usual meanings understood by people with ordinary skills in the field to which the present application belongs. The "first", "second" and similar words used in the embodiments of the present application do not represent any order, quantity or importance, but are only used to distinguish different components. "Including" or "comprising" and similar words mean that the elements or objects appearing in front of the word cover the elements or objects listed after the word and their equivalents, without excluding other elements or objects. "Connect" or "connected" and similar words are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. "Up", "down", "left", "right" and the like are only used to indicate relative positional relationships. When the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0043] The embodiments of the present application are described in detail below with reference to the accompanying drawings.

[0044] Reference Figure 1 The present application provides a method for optimizing the logic of a synchronous circuit of a unit, comprising the following steps:

[0045] Step 102: determine a key node according to the multi-unit connection relationship table, and connect a second control line in parallel to the first control line of the key node.

[0046] In this step, the multi-unit connection relationship table is pre-arranged, and includes the connection relationship between each unit and the connection node or the description of each unit. Each node has a label, which can be marked to explain the connection of the unit. Directly determine the key nodes between each unit according to the multi-unit connection relationship table, and directly find the key nodes in the multi-unit connection relationship table, and connect the second control line in parallel to the first control line of the key node. For example, a relay is provided on the first control line of the key node, and another relay can be connected in parallel to the relay. When the original relay cannot be closed or does not respond, the second relay can be turned on to work to ensure the stable operation of the power station unit.

[0047] Step 104: In response to not receiving the signal data of the first control line, turn on the second control line.

[0048] In this step, during the operation of the power station unit, the signal data of each line is continuously detected to ensure that each line can operate normally. When the signal data of the first control line is not received, it means that the first control line is damaged. Therefore, the second control line is turned on to ensure the normal operation of the power station unit.

[0049] Step 106: receiving the signal data of the first control line or the second control line, and controlling the multiple units to operate synchronously.

[0050] In this step, when the first control line is normal, the second control line is disconnected to avoid line short circuit. Therefore, when the signal data of the first control line or the second control line is received, it means that the line of the power station unit is conductive, which can ensure that each unit can operate normally, and by controlling the synchronous operation of multiple units, the stable operation of the power station is guaranteed.

[0051] Through steps 102-106, according to the multi-unit connection relationship table, the key node is determined, and the second control line is connected in parallel to the first control line of the key node, that is, the first control line and the second control line can have the same function, and both can control the on and off of the unit. When there is a problem in one of the control lines, the other control line can be used for control to ensure the stable operation of the unit. When the signal data of the first control line is not received, the second control line is turned on, that is, the first control line cannot be turned on, then the second control line is turned on, so that all units can operate stably. When the signal data of the first control line or the second control line is received, it means that the unit line is turned on, and multiple units can be controlled to operate synchronously, thereby ensuring the synchronous operation of each unit, ensuring the synchronous operation of each unit, and at the same time ensuring the stable operation of all units in the power station.

[0052] In some embodiments, the multi-unit connection relationship table includes node tags;

[0053] Determining the key nodes according to the connection relationship of multiple units includes:

[0054] Searching for a node marked with an asterisk in the multi-unit connection relationship table;

[0055] The found nodes marked with asterisks are used as the key nodes.

[0056] Specifically, the multi-unit connection relationship table records the connection relationship between each unit and the description of the connection node or each unit. Each node has a label to indicate the connection of the unit. The key nodes have model identifications. Therefore, when determining the key nodes, you only need to find the nodes marked with asterisks in the multi-unit connection relationship table and use the nodes marked with asterisks as key nodes. In this way, after determining the key nodes, you can add a second control line to the key nodes to ensure the stable operation of the unit.

[0057] In some embodiments, controlling the multiple units to operate synchronously includes:

[0058] Acquire synchronization signal data of different units, and adjust each synchronization signal data to obtain adjusted signal data;

[0059] parsing the adjusted signal data to obtain synchronous operation data;

[0060] According to the synchronous operation data, the multiple units are controlled to operate synchronously.

[0061] Exemplarily, the power station includes 12 units, the master controller sends synchronization signal data to each unit, and the main control unit of each unit feeds back the signal data of each unit to the master controller, so that the master controller can obtain the synchronization signal data of different units, adjust the synchronization signal data, and obtain the adjusted signal data. In this way, the synchronization signal data is adjusted to ensure the consistency of the synchronization signal data. The adjusted signal data is parsed to obtain the synchronization operation data, and the synchronous operation of multiple units is controlled according to the synchronization operation data. Therefore, the operation of multiple units is controlled according to the adjusted signal data (that is, consistent signal data), so that each unit can be more accurately controlled synchronously.

[0062] In some embodiments, the step of adjusting each of the synchronization signal data to obtain adjusted signal data includes:

[0063] Performing time alignment on each of the synchronization signal data to obtain time-aligned synchronization signal data;

[0064] Performing frequency adjustment on the time-aligned synchronization signal to obtain frequency-adjusted synchronization signal data;

[0065] The frequency-adjusted synchronization signal data is demodulated by a signal demodulation module to obtain demodulated signal data.

[0066] In this embodiment, the step of performing time alignment on each synchronization signal data to obtain the time-aligned synchronization signal data includes:

[0067] Determine the phase change data and amplitude change data of each synchronization signal data according to each synchronization signal data;

[0068] Time alignment is performed on each of the synchronization signal data according to the phase change data and the amplitude change data to obtain time-aligned synchronization signal data.

[0069] Specifically, determining the phase change data and the amplitude change data of each synchronization signal data according to each synchronization signal data comprises the following steps:

[0070] The synchronization signal data are filtered by a filter to obtain the synchronization signal data after interference is removed.

[0071] In this step, the filter sets the filter value according to the preset rules, filters the synchronization signal data of each unit according to the preset filter value, and outputs the filtered signal data, which is equivalent to removing interference from the synchronization signal data, that is, obtaining each synchronization data after interference removal. In this way, the signal data is time-aligned using the synchronization signal data after interference removal, making the synchronization signal data time alignment process faster, saving time, and the synchronization signal data obtained after time alignment is more accurate.

[0072] According to the synchronization signal data after interference removal, a phase detection algorithm is used to detect the phase change information of each synchronization signal to obtain the phase change data of each signal.

[0073] In this step, the phase detection algorithm can adopt any one of the phase difference calculation method, oscilloscope method, zero indication method, direct reading phase meter method, phase-locked amplifier method, etc. In this application, the phase difference calculation method is taken as an example. For example, for two sinusoidal signals of the same frequency, the phase difference can be calculated by comparing their initial phases. If the angular frequencies of the two signals are the same (ω1=ω2), the phase difference Φ is equal to the difference between their initial phases (Φ01-Φ02). By calculating the synchronization signal data of all units with the preset synchronization signal data, the phase change data of each signal is obtained.

[0074] The amplitude detection algorithm is used to detect the synchronization signal data after the interference is removed to obtain the amplitude change data.

[0075] In this step, illustratively, the amplitude detection algorithm adopts a comparison method, which is to compare the signal to be tested with a known reference signal to determine its amplitude. For example, a signal of known amplitude can be used as a reference, and its amplitude can be measured by comparing the amplitude difference between the signal to be tested and the reference signal. This method requires an accurate reference signal and a comparison circuit, but has a high measurement accuracy. In this application, the synchronous signal data of all winning units are compared with the preset signal data to obtain the amplitude change data.

[0076] In some embodiments, the frequency adjustment of the time-aligned synchronization signal to obtain frequency-adjusted synchronization signal data includes:

[0077] The frequency detection module detects each synchronization signal data after time alignment to obtain frequency difference data;

[0078] According to the frequency difference data, a frequency matching algorithm is used to adjust the frequency of the synchronization signals of different units to obtain the synchronization signal data after frequency adjustment.

[0079] Specifically, the frequency detection module can be a frequency detector, which compares the frequency of each synchronization signal data with the preset synchronization signal data to obtain frequency difference data; according to the frequency difference data, the frequency matching algorithm is used to adjust the frequency of the synchronization signal of each unit, that is, the frequency of the synchronization signal data of each unit is adjusted to be consistent with the frequency of the preset synchronization preference data, and the synchronization signal data after frequency adjustment is obtained. In this way, the use of synchronization signal data with the same frequency is more conducive to synchronous control of the units.

[0080] It should be noted that the method of the embodiment of the present application can be performed by a single device, such as a computer or server. The method of this embodiment can also be applied to a distributed scenario and completed by multiple devices cooperating with each other. In the case of such a distributed scenario, one of the multiple devices can only perform one or more steps in the method of the embodiment of the present application, and the multiple devices will interact with each other to complete the described method.

[0081] It should be noted that the above describes some embodiments of the present application. Other embodiments are within the scope of the appended claims. In some cases, the actions or steps recorded in the claims can be performed in an order different from that in the above embodiments and still achieve the desired results. In addition, the processes depicted in the accompanying drawings do not necessarily require the specific order or continuous order shown to achieve the desired results. In some embodiments, multitasking and parallel processing are also possible or may be advantageous.

[0082] Based on the same inventive concept, corresponding to any of the above-mentioned embodiment methods, the present application also provides a unit synchronization loop logic optimization device.

[0083] refer to Figure 2 , the unit synchronous loop logic optimization device comprises:

[0084] The determination module 202 is configured to determine a key node according to the multi-unit connection relationship table, and connect a second control line in parallel to the first control line of the key node;

[0085] An action module 204 is configured to, in response to not receiving the signal data of the first control line, turn on the second control line;

[0086] The execution module 206 is configured to receive the signal data of the first control line or the second control line and control the synchronous operation of the multiple units.

[0087] Specifically, according to the multi-unit connection relationship table, the key node is determined, and the second control line is connected in parallel to the first control line of the key node, that is, the first control line and the second control line can have the same function, and both can control the on and off of the unit. When a problem occurs in one of the control lines, the other control line can be used for control to ensure the stable operation of the unit. When the signal data of the first control line is not received, the second control line is turned on, that is, the first control line cannot be turned on, then the second control line is turned on, so that all units can operate stably. When the signal data of the first control line or the second control line is received, it means that the unit line is turned on, and multiple units can be controlled to operate synchronously, thereby ensuring the synchronous operation of each unit, ensuring the synchronous operation of each unit, and at the same time ensuring the stable operation of all units in the power station.

[0088] The execution module 206 is also configured to control the synchronous operation of the multiple units, including: obtaining synchronization signal data of different units, adjusting each synchronization signal data to obtain adjusted signal data; parsing the adjusted signal data to obtain synchronization operation data; and controlling the synchronous operation of the multiple units according to the synchronization operation data.

[0089] The execution module 206 is also configured to adjust each of the synchronization signal data to obtain adjusted signal data, including: time aligning each of the synchronization signal data to obtain time-aligned synchronization signal data; frequency adjusting the time-aligned synchronization signal to obtain frequency-adjusted synchronization signal data; demodulating the frequency-adjusted synchronization signal data through a signal demodulation module to obtain demodulated signal data.

[0090] The execution module 206 is also configured to perform time alignment on each of the synchronization signal data to obtain the time-aligned synchronization signal data, including: determining the phase change data and amplitude change data of each of the synchronization signal data according to each of the synchronization signal data; and performing time alignment on each of the synchronization signal data according to the phase change data and the amplitude change data to obtain the time-aligned synchronization signal data.

[0091] The execution module 206 is also configured to determine the phase change data and amplitude change data of each synchronization signal data based on each synchronization signal data, including: filtering each synchronization signal data through a filter to obtain each synchronization signal data after interference is removed; using a phase detection algorithm to detect the phase change information of each synchronization signal based on each synchronization signal data after interference is removed to obtain the phase change data of each signal; detecting each synchronization signal data after interference is removed through an amplitude detection algorithm to obtain the amplitude change data.

[0092] The execution module 206 is further configured to perform frequency adjustment on the time-aligned synchronization signal to obtain frequency-adjusted synchronization signal data, including: detecting each synchronization signal data after time alignment through a frequency detection module to obtain frequency difference data; and adjusting the frequency of the synchronization signals of different units using a frequency matching algorithm according to the frequency difference data to obtain frequency-adjusted synchronization signal data.

[0093] For the convenience of description, the above device is described in terms of functions divided into various modules. Of course, when implementing the present application, the functions of each module can be implemented in the same or multiple software and / or hardware.

[0094] The device of the above embodiment is used to implement a corresponding unit synchronization loop logic optimization method in any of the above embodiments, and has the beneficial effects of the corresponding method embodiment, which will not be repeated here.

[0095] Based on the same inventive concept, corresponding to any of the above-mentioned embodiments and methods, the present application also provides an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein when the processor executes the program, a method for optimizing the logic of a unit synchronization loop as described in any of the above embodiments is implemented.

[0096] Figure 3A more specific schematic diagram of the hardware structure of an electronic device provided in this embodiment is shown, and the device may include: a processor 1010, a memory 1020, an input / output interface 1030, a communication interface 1040, and a bus 1050. The processor 1010, the memory 1020, the input / output interface 1030, and the communication interface 1040 are connected to each other through the bus 1050 in the device.

[0097] The processor 1010 can be implemented by a general-purpose CPU (Central Processing Unit), a microprocessor, an application-specific integrated circuit (ASIC), or one or more integrated circuits, and is used to execute relevant programs to implement the technical solutions provided in the embodiments of this specification.

[0098] The memory 1020 may be implemented in the form of ROM (Read Only Memory), RAM (Random Access Memory), static storage device, dynamic storage device, etc. The memory 1020 may store an operating system and other application programs. When the technical solutions provided in the embodiments of this specification are implemented by software or firmware, the relevant program codes are stored in the memory 1020 and are called and executed by the processor 1010.

[0099] The input / output interface 1030 is used to connect the input / output module to realize information input and output. The input / output module can be configured in the device as a component (not shown in the figure), or it can be externally connected to the device to provide corresponding functions. The input device may include a keyboard, a mouse, a touch screen, a microphone, various sensors, etc., and the output device may include a display, a speaker, a vibrator, an indicator light, etc.

[0100] The communication interface 1040 is used to connect a communication module (not shown) to realize communication interaction between the device and other devices. The communication module can realize communication through a wired mode (such as USB, network cable, etc.) or a wireless mode (such as mobile network, WIFI, Bluetooth, etc.).

[0101] The bus 1050 includes a path that transmits information between the various components of the device (eg, the processor 1010, the memory 1020, the input / output interface 1030, and the communication interface 1040).

[0102] It should be noted that, although the above device only shows the processor 1010, the memory 1020, the input / output interface 1030, the communication interface 1040 and the bus 1050, in the specific implementation process, the device may also include other components necessary for normal operation. In addition, it can be understood by those skilled in the art that the above device may also only include the components necessary for implementing the embodiments of the present specification, and does not necessarily include all the components shown in the figure.

[0103] The electronic device of the above embodiment is used to implement a corresponding unit synchronization loop logic optimization method in any of the above embodiments, and has the beneficial effects of the corresponding method embodiment, which will not be repeated here.

[0104] Based on the same inventive concept, corresponding to any of the above-mentioned embodiment methods, the present application also provides a non-transitory computer-readable storage medium, wherein the non-transitory computer-readable storage medium stores computer instructions, and the computer instructions are used to enable the computer to execute a unit synchronization loop logic optimization method as described in any of the above embodiments.

[0105] The computer-readable medium of this embodiment includes permanent and non-permanent, removable and non-removable media, and information storage can be implemented by any method or technology. Information can be computer-readable instructions, data structures, modules of programs, or other data. Examples of computer storage media include, but are not limited to, phase change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technology, read-only compact disk read-only memory (CD-ROM), digital versatile disk (DVD) or other optical storage, magnetic cassettes, tape disk storage or other magnetic storage devices or any other non-transmission media that can be used to store information that can be accessed by a computing device.

[0106] The computer instructions stored in the storage medium of the above embodiment are used to enable the computer to execute a unit synchronization loop logic optimization method as described in any of the above embodiments, and have the beneficial effects of the corresponding method embodiments, which will not be repeated here.

[0107] It is understandable that before using the technical solutions of each embodiment of the present disclosure, the type, scope of use, usage scenarios, etc. of the personal information involved will be informed to the user in an appropriate manner, and the user's authorization will be obtained.

[0108] For example, in response to receiving an active request from a user, a prompt message is sent to the user to clearly remind the user that the operation requested to be performed will require obtaining and using the user's personal information. Thus, the user can independently choose whether to provide personal information to software or hardware such as an electronic device, application, server, or storage medium that performs the operation of the technical solution of the present disclosure according to the prompt message.

[0109] As an optional but non-limiting implementation, in response to receiving the user's active request, the prompt information may be sent to the user in the form of a pop-up window, in which the prompt information may be presented in text form. In addition, the pop-up window may also carry a selection control for the user to choose "agree" or "disagree" to provide personal information to the electronic device.

[0110] It is understandable that the above notification and the process of obtaining user authorization are merely illustrative and do not constitute a limitation on the implementation of the present disclosure. Other methods that meet relevant laws and regulations may also be applied to the implementation of the present disclosure.

[0111] Those skilled in the art should understand that the discussion of any of the above embodiments is merely illustrative and is not intended to imply that the scope of the present application (including the claims) is limited to these examples. In line with the concept of the present application, the technical features in the above embodiments or different embodiments may be combined, the steps may be implemented in any order, and there are many other variations of the different aspects of the embodiments of the present application as described above, which are not provided in detail for the sake of simplicity.

[0112] In addition, to simplify the description and discussion, and in order not to make the embodiments of the present application difficult to understand, the known power supply / ground connection with the integrated circuit (IC) chip and other components may or may not be shown in the provided drawings. In addition, the device can be shown in the form of a block diagram to avoid making the embodiments of the present application difficult to understand, and this also takes into account the fact that the details of the implementation of these block diagram devices are highly dependent on the platform to be implemented in the embodiments of the present application (that is, these details should be fully within the scope of understanding of those skilled in the art). In the case of elaborating specific details (e.g., circuits) to describe exemplary embodiments of the present application, it is obvious to those skilled in the art that the embodiments of the present application can be implemented without these specific details or when these specific details are changed. Therefore, these descriptions should be considered to be illustrative rather than restrictive.

[0113] Although the present application has been described in conjunction with specific embodiments of the present application, many replacements, modifications and variations of these embodiments will be apparent to those skilled in the art from the foregoing description. For example, other memory architectures (e.g., dynamic RAM (DRAM)) may use the embodiments discussed.

[0114] The embodiments of the present application are intended to cover all such substitutions, modifications and variations that fall within the broad scope of the appended claims. Therefore, any omissions, modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the embodiments of the present application should be included in the scope of protection of the present application.

Claims

1. A method for optimizing the logic of a unit synchronization loop, characterized in that: include: Determine a key node according to the multi-unit connection relationship table, and connect a second control line in parallel to the first control line of the key node; In response to not receiving the signal data of the first control line, turning on the second control line; The signal data of the first control line or the second control line is received to control the multiple units to operate synchronously.

2. The method according to claim 1, characterized in that The multi-unit connection relationship table includes node tags; Determining the key nodes according to the connection relationship of multiple units includes: Searching for a node marked with an asterisk in the multi-unit connection relationship table; The found nodes marked with asterisks are used as the key nodes.

3. The method according to claim 1, characterized in that The controlling the multiple units to operate synchronously includes: Acquire synchronization signal data of different units, and adjust each synchronization signal data to obtain adjusted signal data; parsing the adjusted signal data to obtain synchronous operation data; According to the synchronous operation data, the multiple units are controlled to operate synchronously.

4. The method according to claim 3, characterized in that The step of adjusting each of the synchronization signal data to obtain adjusted signal data includes: Performing time alignment on each of the synchronization signal data to obtain time-aligned synchronization signal data; Performing frequency adjustment on the time-aligned synchronization signal to obtain frequency-adjusted synchronization signal data; The frequency-adjusted synchronization signal data is demodulated by a signal demodulation module to obtain demodulated signal data.

5. The method according to claim 4, characterized in that The step of performing time alignment on each of the synchronization signal data to obtain the time-aligned synchronization signal data includes: Determine phase change data and amplitude change data of each synchronization signal data according to each synchronization signal data; Time alignment is performed on each of the synchronization signal data according to the phase change data and the amplitude change data to obtain time-aligned synchronization signal data.

6. The method according to claim 5, characterized in that Determining the phase change data and the amplitude change data of each synchronization signal data according to each synchronization signal data includes: Filtering the synchronization signal data by a filter to obtain the synchronization signal data after interference is removed; According to the synchronization signal data after interference removal, a phase detection algorithm is used to detect the phase change information of each synchronization signal to obtain the phase change data of each signal; The amplitude detection algorithm is used to detect the synchronization signal data after the interference is removed to obtain the amplitude change data.

7. The method according to claim 5, characterized in that The step of frequency-adjusting the time-aligned synchronization signal to obtain frequency-adjusted synchronization signal data includes: The frequency detection module detects each synchronization signal data after time alignment to obtain frequency difference data; According to the frequency difference data, a frequency matching algorithm is used to adjust the frequency of the synchronization signals of different units to obtain the synchronization signal data after frequency adjustment.

8. A unit synchronization loop logic optimization device, characterized in that: include: A determination module is configured to determine a key node according to a multi-unit connection relationship table, and connect a second control line in parallel to the first control line of the key node; an action module, configured to, in response to not receiving the signal data of the first control line, turn on the second control line; The execution module is configured to receive the signal data of the first control circuit or the second control circuit and control the synchronous operation of the multiple units.

9. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that: When the processor executes the program, the method according to claims 1 to 7 is implemented.

10. A non-transitory computer-readable storage medium storing computer instructions, characterized in that: The computer instructions are used to enable a computer to execute the method according to claims 1-7.

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