Improved CCFAD control method

Abstract

The invention provides an improved CCFAD control method, and belongs to the technical field of power generation systems. Firstly, the voltage vPCC of a common coupling point is collected for phase locking, SOGI-PLL is used for obtaining the phase theta of the voltage of the common coupling point, and the phase is combined with a current reference amplitude signal Iref to generate a reference value Iref of grid-connected current; acquiring the difference between the grid-connected current iL2 and the current instruction value, and performing current loop calculation; capacitance current ic is integrated, and a damping function is realized through an HPF link and a proportional link; the capacitance current ic is added to the output end of the current controller to realize resonance suppression of the LCL filter; and the output of the control algorithm is sent to modulation for SPWM modulation. According to the method, the stable interval of the system can be expanded from (0, fs / 6) to (0, fs / 3), the qualitative interval is wider, the robustness is higher, and when the impedance of the power grid changes, the system is still in the stable area.

Description

Technical Field

[0001] The invention provides an improved CCFAD control method, belonging to the technical field of power generation systems. Background Art

[0002] The suppression measures for the resonance peak of the LCL filter mainly include active damping and passive damping. Among the passive damping methods, the method of connecting the filter capacitor in parallel with the resistor has the best resonance suppression effect, but its loss is large. The emergence of the active damping method avoids the power loss of the system. The active damping method is to perform damping on the system control loop to obtain the same effect as passive damping.

[0003] Most of the existing active damping methods are dual current closed-loop control, which requires a large number of sensors and increases the system cost. Therefore, the single current dual closed-loop control method has attracted attention. The inverter-side single current control method and the grid-side single current control only need to measure one current to achieve the functions of active damping and output current grid-connected regulation. Existing literature has conducted in-depth research on the control method, resonance suppression and system stability of the inverter from multiple angles. However, there is a lack of research on the range of active damping parameters and the selection of the optimal virtual damping value, and there is little research on the digital delay caused by digital control. The traditional digitally controlled capacitor current active damping feedback control method can only ensure that the capacitor current is less than f s / 6 frequency band to maintain system stability. However, in a weak grid, changes in grid impedance will affect the resonant frequency f r When f r Falling into (0,f s / 6), the system can remain stable; if f r Close to or even exceeding f s / 6, the robustness of the system will change, causing the system to become unstable.

[0004] Moreover, with the increase in the scale of distributed power generation systems, the grid impedance, voltage fluctuations and harmonics at the common coupling point, and series-parallel resonance will also seriously affect the current control performance. Therefore, it is necessary to consider the impact of grid impedance on the grid-connected inverter under the microgrid, optimize and upgrade the existing control methods, and propose a more robust control method. Summary of the invention

[0005] In view of the above technical problems, the present invention provides an improved CCFAD control method to broaden the stability range of the system and improve the robustness of the system.

[0006] The specific technical solution is:

[0007] An improved CCFAD control method changes the system stability interval from (0,f s / 6) is expanded to (0,fs / 3); including the following steps:

[0008] Step 1: First, collect the voltage at the common coupling point for phase locking. The single-phase phase-locked loop uses SOGI-PLL to obtain the phase of the common coupling point voltage. This phase is combined with the current reference amplitude signal to generate a reference value of the grid-connected current.

[0009] Step 2: Collect the grid-connected current and the current command value, make the difference, perform current loop calculation, and use the QPR controller as the current controller;

[0010] Step 3: Collect capacitor current i c , through the HPF link and the proportional link, the damping function is realized; the resonance suppression of the LCL filter is realized by adding the capacitor current to the output end of the current controller;

[0011] Step 4: Send the output of the control algorithm to the modulation for SPWM modulation.

[0012] The improved CCFAD control method provided by the present invention can change the system stability range from (0,f s / 6) is expanded to (0,f s / 3), compared with the traditional control method, the control method proposed in the present invention has a wider stability range and stronger robustness. When the grid impedance changes, the system remains in a stable area. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Figure 1 is a control block diagram of an improved CCFAD control method of an embodiment;

[0014] Figure 2 1 is a control structure diagram of a single-phase LCL type grid-connected inverter of an embodiment;

[0015] Figure 3 is a mathematical model of the improved CCFAD control method of the embodiment;

[0016] Figure 4 is the LV25-P circuit diagram of the embodiment;

[0017] Figure 5 is the LV25-P circuit diagram of the embodiment;

[0018] Figure 6 is a flow chart of an embodiment;

[0019] Figure 7 It is the traditional CCFAD g =0mH steady state waveform;

[0020] Figure 8 It is the traditional CCFAD g=0.24mH steady state waveform;

[0021] Fig. 9 It is the traditional CCFAD g =0.5mH steady state waveform;

[0022] Fig.10 The present invention improves CCFAD when L g =0mH steady state waveform;

[0023] Fig.11 The present invention improves CCFAD when L g =0.24mH steady state waveform;

[0024] Fig.12 The present invention improves CCFAD when L g =0.5mH steady-state waveform. DETAILED DESCRIPTION

[0025] The specific technical solution of the present invention is explained in conjunction with embodiments.

[0026] This embodiment is directed to a single-phase LCL type grid-connected inverter, such as Figure 1 As shown, it mainly includes two parts: (1) power circuit: including DC side voltage stabilizing capacitor, DC side absorption capacitor, IGBT module, SCR absorption circuit, LCL filter, autocoupler voltage regulator, isolation transformer; (2) control circuit: DSP minimum system control board, AC voltage and current sampling circuit, IGBT drive circuit, DC power supply, etc.

[0027] The DC side voltage stabilizing capacitor acts as a buffer for energy storage and release, avoiding violent fluctuations in the DC bus voltage and ensuring a stable output current; the DC side absorption capacitor suppresses the peak voltage induced by the busbar to avoid damage to the switch tube. The single-phase H-bridge main circuit consists of two IGBT half-bridge modules in parallel. The LCL filter consists of the inverter side inductor L1, the filter capacitor C, and the grid side inductor L2. The sampling circuit selects LV25-P Hall voltage sensor and LA25-P Hall current sensor for acquisition. Its purpose is to convert the required collected signal into a 0-3V DC signal and send it to the DSP. The circuit diagram is as follows Figure 4 and Figure 5 shown.

[0028] The purpose of this invention is to propose an improved CCFAD control method, whose mathematical model is as follows: Figure 3 As shown, this control method can change the system stability interval from (0,f s / 6) is expanded to (0,f s / 3). Figure 2 As shown, the implementation of the control method includes the following steps:

[0029] Step 1: First collect the voltage ν at the common coupling point PCC The single-phase phase-locked loop uses SOGI-PLL to obtain the phase θ of the common coupling point voltage, which is consistent with the current reference amplitude signal I ref Combined with the reference value I of the grid current ref ;

[0030] Step 2: Collect the grid current i L2 Subtract the current command value and perform current loop calculation, G i (s) is a current controller, which adopts a QPR controller;

[0031] Step 3: Collect capacitor current i c , through the HPF link and the proportional link, the damping function is realized; G d (s) is the digital control delay, which is achieved by c Added to the output of the current controller to achieve the resonance suppression of the LCL filter, H i is the capacitor current feedback coefficient.

[0032] Step 4: Send the output of the control algorithm to the modulation for SPWM modulation.

[0033] Figure 3 Medium G HPF (s) is a first-order high-pass filter, and its expression is as shown in formula (1), where K HPF is the gain coefficient of the first-order high-pass filter, ω HPF is the cutoff frequency of the first-order high-pass filter, and s is a complex variable in the complex plane.

[0034]

[0035] The cutoff frequency of the first-order high-pass filter is selected by equation (2), where ω R is the positive and negative dividing frequency required for expansion, T s is the sampling period.

[0036] ω HPF =-ω R / tan(1.5ω R T s ) (2)

[0037] From the analysis of formula (2), we can see that the system positive and negative damping boundary angular frequency ω R It depends only on the cutoff frequency ω of the first-order HPF HPF , therefore, the maximum positive and negative damping boundary angular frequency ω can be expanded according to the required R Determine HPF The value of .

[0038] Continuous systems need to be discretized in practical applications. There are many discretization methods, such as forward difference, backward difference, bilinear transformation, zero-order holder, etc. Among them, bilinear transformation (TustinMethod) has good discrete accuracy, so it is more commonly used in engineering. The present invention uses bilinear transformation to achieve, and the SOGI and QPR discretization processes used in this technology are introduced below.

[0039] (1) SOGI discretization

[0040] According to the derivation of bilinear transformation, the discrete equation of SOGI can be obtained as follows:

[0041] u α (n) = b0u(n) + b2u(n-2) + a1u α (n-1)+a2u α (n-2) (3)

[0042] u β (n)=qb0u(n)+qb1u(n-1)+qb2u(n-2)+a1u β (n-1)+a2u β (n-2) (4)

[0043] In the formula, u α (n) is the current output α-axis component, u α (n-1) is the α-axis component output in the previous cycle, u α (n-2) is the α-axis component output in the last two cycles; u β (n) is the current output β-axis component, u β (n-1) is the β-axis component output in the previous cycle, u β (n-2) is the output β-axis component of the last two cycles; u(n) is the current grid voltage value, u(n-1) is the grid voltage value of the last cycle, and u(n-2) is the grid voltage value of the last two cycles. The coefficients are as follows:

[0044]

[0045] Where k is the kth sampling point of the discrete transform, ω is the angular frequency, T s is the sampling period.

[0046] (2) QPR discretization

[0047] According to the continuous domain model of QPR, the discrete equation of QPR is obtained as follows:

[0048] u(n)=b0e(n)+b1e(n-1)+b2e(n-2)-a1u(n-1)-a2u(n-2) (5)

[0049] In the formula, u(n) is the current output, u(n-1) is the output of the previous cycle, and u(n-2) is the output of the previous two cycles; e(n) is the current error value, e(n-1) is the error value of the previous cycle, and e(n-2) is the error value of the previous two cycles. The coefficients of each item are as follows:

[0050]

[0051] In the formula, K p is the proportionality coefficient, K r is the resonance coefficient, ω0 is the resonance angular frequency, ω c is the cut-off frequency, T s is the sampling period.

[0052] The present invention realizes the process as follows Figure 6 As shown, firstly, the DSP is initialized and configured, including the initialization of EPWM, ADC, QPR, SOGI, etc., and then the interrupt is enabled for sampling. After the sampling is completed, the protection judgment is first performed. If the inverter works normally, the phase-locked algorithm is calculated. After the phase-locked is completed, the grid-connected status is queried. If the inverter has not been connected to the grid, wait for the grid voltage to cross the zero point for grid connection. If the grid connection has been completed, the current loop control algorithm is calculated, and then SPWM modulation is performed. After the modulation is completed, the interrupt is exited and wait for the arrival of the next interrupt.

[0053] In this embodiment, an experimental prototype is built, and its parameters are shown in Table 1:

[0054] Table 1 Experimental prototype parameters

[0055]

[0056] Experimental verification was carried out on this prototype, and the experimental results are as follows:

[0057] Figure 7 , Figure 8 and Fig. 9 The experimental results of the traditional CCFAD control method are shown in Figure 2. It can be seen that when L g =0mH, the grid-connected current is stable and THD is 3.13%; when L g When it increases to 0.24mH, the resonant frequency f r ≈f s / 6, the system is in an unstable state. Figure 8 It can be seen that when the grid inductance changes, the grid-connected current begins to oscillate, the voltage at the PCC point also oscillates, the system becomes unstable, and the protection is triggered; when L g When it increases to 0.5mH, f r <f s / 6, when the controller parameters remain unchanged, the original f r >f s / 6 satisfies the controller parameters for system stability, at f r <f s / 6 will cause system instability. Fig. 9 It can be seen that at this time, the grid-connected current and the voltage at the PCC point oscillate more violently, and the protection is quickly triggered and the machine shuts down.

[0058] Fig.10 , Fig.11 and Fig.12 The experimental results of the improved CCFAD control method are shown in Figure 2. Since the improved CCFAD control method broadens the positive damping region, the system remains stable when the grid inductance changes. Fig.10 , Fig.11 and Fig.12 L g =0mH, 0.24mH, 0.5mH steady-state waveform, when L g =0mH, the grid-connected current THD is 3.26%, the system is stable and meets the 5% grid-connected harmonic requirement; when L g =0.24mH, the resonant frequency is f r ≈f s / 6, the system is still stable, the grid current THD is 3.18%, and the PCC point voltage is not distorted; due to the improved CCFAD, only L g = 0mH, the system is stable, and the system remains stable when the grid inductance changes. g =0.5mH, the resonant frequency is f r <f s / 6, the system is still stable, and the grid current THD is 2.98%.

Claims

1. An improved CCFAD control method, which changes the system stability interval from (0,f s / 6) is expanded to (0,f s / 3); it is characterized by: The following steps are involved: Step 1: First, collect the voltage at the common coupling point for phase locking. The single-phase phase-locked loop uses SOGI-PLL to obtain the phase of the common coupling point voltage. This phase is combined with the current reference amplitude signal to generate a reference value of the grid-connected current. Step 2: Collect the grid-connected current and the current command value, make the difference, perform current loop calculation, and use the QPR controller as the current controller; Step 3: Collect capacitor current i c , through the HPF link and the proportional link, the damping function is realized; the resonance suppression of the LCL filter is realized by adding the capacitor current to the output end of the current controller; Step 4: Send the output of the control algorithm to the modulation for SPWM modulation.

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