High-robustness distributed amplifier

Abstract

The invention discloses a high-robustness distributed amplifier, and belongs to the technical field of communication circuit design, the distributed amplifier is a Cascode architecture of four stages of amplification circuits, in each stage of amplification circuit, a grid electrode of a common-gate transistor is connected with one end of a reconfigurable capacitor through a grid electrode inductor, and the other end of the reconfigurable capacitor is grounded; the reconfigurable capacitor is adjusted to have different capacitance values at different process corners, supply voltages and temperatures. The reconfigurable capacitor can be adjusted to different capacitance values under different process corners, power supply voltages and temperatures, and can act together with the grid inductor to adjust the position of a split pole, so that the amplifier works in an area with the highest gain, the widest bandwidth and no oscillation.

Description

Technical Field

[0001] The invention belongs to the technical field of communication circuit design, and in particular relates to a highly robust distributed amplifier. Background Art

[0002] Distributed amplifiers are used in wireless communications and fiber optic communications. In distributed amplifiers, the gate inductor of the Cascode architecture is widely used to improve gain and bandwidth. However, inappropriate gate inductor values ​​may cause the circuit to work in an unstable state, especially under different power supply voltages, different process angles and different temperatures. It is difficult to find a suitable value that meets all conditions. Even if the gate inductor is not used, the parasitic inductance of the distributed amplifier power ground will play the same role, making it difficult to obtain high robustness and high performance. Summary of the invention

[0003] In view of the above-mentioned deficiencies in the prior art, the highly robust distributed amplifier provided by the present invention solves the problem that the gate capacitance of the common-gate transistor of the existing distributed amplifier cannot be taken as its optimal working state under most working conditions, and thus it is difficult to obtain high robustness. In order to achieve the above-mentioned invention object, the technical solution adopted by the present invention is: a highly robust distributed amplifier, the distributed amplifier is a Cascode architecture of a four-stage amplifier circuit, in each stage of the amplifier circuit, the gate of the common-gate transistor is connected to one end of a reconfigurable capacitor through a gate inductor, and the other end of the reconfigurable capacitor is grounded; The reconfigurable capacitor is adjusted to different capacitance values ​​under different process corners, power supply voltages and temperatures.

[0004] Further, the distributed amplifier includes a first-stage amplifier circuit, a second-stage amplifier circuit, a third-stage amplifier circuit and a fourth-stage amplifier circuit connected in sequence; Each stage of the amplifier circuit includes a common-gate transistor, a common-source transistor, an input inductor, a first bias resistor, a second bias resistor, a gate inductor, an output inductor, and a reconfigurable capacitor; In the first stage amplifier circuit, the second stage amplifier circuit and the third stage amplifier circuit: The gate of the common-gate transistor is connected to one end of the gate inductor, the other end of the gate inductor is respectively connected to one end of the first bias resistor and one end of the reconfigurable capacitor, the other end of the reconfigurable capacitor is grounded, and the other end of the first bias resistor is respectively connected to the bias voltage 20 and the other end of the first bias resistor in the subsequent amplifier circuit; The drain of the common-gate transistor is respectively connected to the other end of the output inductor and one end of the output inductor in the subsequent stage amplifier circuit; The source of the common-gate transistor is connected to the drain of the common-source transistor, the source of the common-source transistor is grounded, the gate of the common-source transistor is respectively connected to one end of the second bias resistor, the other end of the input inductor and one end of the input inductor in the subsequent amplifier circuit, and the other end of the second bias resistor is connected to the other end of the second bias resistor in the subsequent amplifier circuit and the bias voltage 10; In the first-stage amplifier circuit, one end of the input inductor is connected to one end of the DC blocking capacitor Cb1, the other end of the DC blocking capacitor Cb1 serves as the input end of the distributed amplifier, one end of the output inductor is connected to one end of the characteristic impedance resistor Ro2, the other end of the characteristic impedance resistor Ro2 is connected to one end of the DC blocking capacitor Cb3, and the other end of the DC blocking capacitor Cb3 is grounded.

[0005] Further, in the fourth-stage amplifier circuit, the gate of the common-gate transistor is connected to one end of the gate inductor, the other end of the gate inductor is respectively connected to one end of the first bias resistor and one end of the reconfigurable capacitor, the other end of the reconfigurable capacitor is grounded, and the other end of the first bias resistor is respectively connected to the bias voltage 20; The drain of the common-gate transistor is respectively connected to the other end of the output inductor and one end of the output inductor Ld5, the other end of the output inductor Ld5 is respectively connected to one end of the DC blocking capacitor Cb4 and one end of the AC choke inductor Lb1, the other end of the AC choke inductor Lb1 is connected to the power supply, and the other end of the DC blocking capacitor Cb4 serves as the output end of the distributed amplifier.

[0006] The source of the common-gate transistor is connected to the drain of the common-source transistor, the source of the common-source transistor is grounded, the gate of the common-source transistor is respectively connected to one end of the second bias resistor, the other end of the input inductor and one end of the input inductor Li5, the other end of the second bias resistor is connected to the bias voltage 10, the other end of the input inductor Li5 is connected to one end of the characteristic impedance resistor Ro1, the other end of the characteristic impedance resistor Ro1 is connected to one end of the DC blocking capacitor Cb2, and the other end of the DC blocking capacitor Cb2 is grounded.

[0007] Further, in the first stage amplifying circuit, the second stage amplifying circuit, the third stage amplifying circuit and the fourth stage amplifying circuit, the reconfigurable capacitor includes a capacitor switch Mr1, a capacitor switch Mr2 and a capacitor switch Mr3; The gate of the capacitor switch Mr1 is connected to the control signal CT1 through the gate resistor Rr1, the drain of the capacitor switch Mr1 is respectively connected to one end of the fixed capacitor Cr0, the drain of the capacitor switch Mr2 and the drain of the capacitor switch Mr3, and is connected to the other end of the corresponding gate inductor as the input end of the reconfigurable capacitor, and the source of the capacitor switch Mr1 is connected to one end of the adjustable capacitor Cr1; The gate of the capacitor switch Mr2 is connected to the control signal CT2 through the gate resistor Rr2, the source of the capacitor switch Mr2 is connected to one end of the adjustable capacitor Cr2, the gate of the capacitor switch Mr2 is connected to the control signal CT3 through the gate resistor Rr3, and the source of the capacitor switch Mr3 is connected to one end of the adjustable capacitor Cr3; The other ends of the adjustable capacitors Cr1 , Cr2 and Cr3 are all connected to the other end of the fixed capacitor Cr0 and are grounded as output ends of the reconfigurable capacitors.

[0008] Further, in the reconfigurable capacitor, the control signals CT1, CT2 and CT3 are digital signals 1 or 0. When they are 1, the corresponding capacitor switch is turned on, and when they are 0, the corresponding capacitor switch is turned off.

[0009] The beneficial effects of the present invention are: (1) In the amplifier structure provided by the present invention, the other end of the gate inductor is connected to a reconfigurable capacitor and then grounded. The reconfigurable capacitor can be adjusted to different capacitance values ​​under different process angles, power supply voltages and temperatures. The distributed amplifier can achieve high gain and wide bandwidth through the gate inductor without oscillation under different process angles, power supply voltages and temperatures, thereby improving the robustness of the distributed amplifier.

[0010] (2) Based on the reconfigurable capacitor and inductor resonance, the present invention can suppress the pole splitting caused by the inductor, thereby achieving stable operation of the circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] Figure 1 A circuit diagram of a highly robust distributed amplifier provided by an embodiment of the present invention.

[0012] Figure 2 A schematic diagram of a circuit of a reconfigurable capacitor provided in an embodiment of the present invention. DETAILED DESCRIPTION

[0013] The specific implementation modes of the present invention are described below so that those skilled in the art can understand the present invention. However, it should be clear that the present invention is not limited to the scope of the specific implementation modes. For those of ordinary skill in the art, as long as various changes are within the spirit and scope of the present invention as defined and determined by the attached claims, these changes are obvious, and all inventions and creations utilizing the concept of the present invention are protected.

[0014] The embodiment of the present invention provides a highly robust distributed amplifier, such as Figure 1As shown, the distributed amplifier in the present invention is a Cascode architecture of a four-stage amplifier circuit. In each stage of the amplifier circuit, the gate of the common-gate transistor is connected to one end of the reconfigurable capacitor through a gate inductor, and the other end of the reconfigurable capacitor is grounded; The reconfigurable capacitor is adjusted to different capacitance values ​​under different process corners, power supply voltages and temperatures.

[0015] Specifically, in Figure 1 In the embodiment, the distributed amplifier includes a first-stage amplifier circuit, a second-stage amplifier circuit, a third-stage amplifier circuit and a fourth-stage amplifier circuit connected in sequence; Each stage of the amplifier circuit includes a common-gate transistor (M110, M210, M310 and M410), a common-source transistor (M10, M20, M30 and M40), an input inductor (Li1, Li2, Li3 and Li4), a first bias resistor (Rb5, Rb6, Rb7, Rb8), a second bias resistor (Rb1, Rb2, Rb3, Rb4), a gate inductor (Lg1, Lg2, Lg3, Lg4), an output inductor (Ld1, Ld2, Ld3, Ld4) and a reconfigurable capacitor (Cb4, Cb5, Cb6, Cb7); In the first stage amplifier circuit, the second stage amplifier circuit and the third stage amplifier circuit: The gate of the common-gate transistor (M110, M210, M310) is connected to one end of the gate inductor (Lg1, Lg2, Lg3), the other end of the gate inductor (Lg1, Lg2, Lg3) is respectively connected to one end of the first bias resistor (Rb5, Rb6, Rb7) and one end of the reconfigurable capacitor (Cb4, Cb5, Cb6), the other end of the reconfigurable capacitor (Cb4, Cb5, Cb6) is grounded, and the other end of the first bias resistor (Rb5, Rb6, Rb7) is respectively connected to the bias voltage 20 and the other end of the first bias resistor (Rb6, Rb7, Rb8) in the subsequent amplifier circuit; The drains of the common-gate transistors (M110, M210, M310) are respectively connected to the other end of the output inductor (Ld1, Ld2, Ld3) and one end of the output inductor (Ld2, Ld3, Ld4) in the subsequent amplifier circuit; The source of the common-gate transistor (M110, M210, M310) is connected to the drain of the common-source transistor (M10, M20, M30), the source of the common-source transistor (M10, M20, M30) is grounded, the gate of the common-source transistor (M10, M20, M30) is respectively connected to one end of the second bias resistor (Rb1, Rb2, Rb3), the other end of the input inductor (Li1, Li2, Li3) and one end of the input inductor (Li2, Li3, Li4) in the subsequent stage amplifier circuit, and the other end of the second bias resistor (Rb1, Rb2, Rb3) is connected to the other end of the second bias resistor (Rb2, Rb3, Rb4) in the subsequent stage amplifier circuit and a bias voltage 10; In the first-stage amplifier circuit, one end of the input inductor (Li1) is connected to one end of the DC blocking capacitor Cb1, and the other end of the DC blocking capacitor Cb1 serves as the input end of the distributed amplifier. One end of the output inductor (Ld1) is connected to one end of the characteristic impedance resistor Ro2, and the other end of the characteristic impedance resistor Ro2 is connected to one end of the DC blocking capacitor Cb3, and the other end of the DC blocking capacitor Cb3 is grounded.

[0016] exist Figure 1 In the fourth-stage amplifier circuit shown, the gate of the common-gate transistor (M410) is connected to one end of the gate inductor (Lg4), the other end of the gate inductor (Lg4) is respectively connected to one end of the first bias resistor (Rb8) and one end of the reconfigurable capacitor (Cb7), the other end of the reconfigurable capacitor (Cb7) is grounded, and the other end of the first bias resistor (Rb8) is respectively connected to the bias voltage 20; The drain of the common-gate transistor (M410) is respectively connected to the other end of the output inductor (Ld4) and one end of the output inductor Ld5, the other end of the output inductor Ld5 is respectively connected to one end of the DC blocking capacitor Cb4 and one end of the AC choke inductor Lb1, the other end of the AC choke inductor Lb1 is connected to the power supply, and the other end of the DC blocking capacitor Cb4 serves as the output end of the distributed amplifier; wherein the AC choke inductor Lb1 introduces the DC voltage and DC current of the power supply into the circuit, and then suppresses the radio frequency signal from entering the voltage; The source of the common-gate transistor (M410) is connected to the drain of the common-source transistor (M40), the source of the common-source transistor (M40) is grounded, the gate of the common-source transistor (M40) is respectively connected to one end of the second bias resistor (Rb4), the other end of the input inductor (Li4) and one end of the input inductor Li5, the other end of the second bias resistor (Rb4) is connected to the bias voltage 10, the other end of the input inductor Li5 is connected to one end of the characteristic impedance resistor Ro1, the other end of the characteristic impedance resistor Ro1 is connected to one end of the DC blocking capacitor Cb2, and the other end of the DC blocking capacitor Cb2 is grounded.

[0017] In the first stage amplifier circuit, the second stage amplifier circuit, the third stage amplifier circuit and the fourth stage amplifier circuit of the embodiment of the present invention, Figure 2 As shown, the reconfigurable capacitor includes a capacitor switch Mr1, a capacitor switch Mr2, and a capacitor switch Mr3; The gate of the capacitor switch Mr1 is connected to the control signal CT1 through the gate resistor Rr1, the drain of the capacitor switch Mr1 is respectively connected to one end of the fixed capacitor Cr0, the drain of the capacitor switch Mr2 and the drain of the capacitor switch Mr3, and is connected to the other end of the corresponding gate inductor as the input end of the reconfigurable capacitor, and the source of the capacitor switch Mr1 is connected to one end of the adjustable capacitor Cr1; The gate of the capacitor switch Mr2 is connected to the control signal CT2 through the gate resistor Rr2, the source of the capacitor switch Mr2 is connected to one end of the adjustable capacitor Cr2, the gate of the capacitor switch Mr2 is connected to the control signal CT3 through the gate resistor Rr3, and the source of the capacitor switch Mr3 is connected to one end of the adjustable capacitor Cr3; The other ends of the adjustable capacitors Cr1 , Cr2 and Cr3 are all connected to the other end of the fixed capacitor Cr0 and are grounded as output ends of the reconfigurable capacitors.

[0018] Among them, the gate resistors Rr1, Rr2 and Rr3 can reduce the loss of the capacitor switch.

[0019] In this embodiment, for Figure 2 The control signals CT1, CT2 and CT3 in the circuit are digital signals 1 or 0. When they are 1, the corresponding capacitor switch is turned on, and when they are 0, the corresponding capacitor switch is turned off. This allows the connection relationship between capacitors Cr0, Cr1, Cr2 and Cr3 to be adjusted by adjusting the value of the control signal, thereby achieving the purpose of adjusting the capacitor and realizing the capacitor reconfiguration function. By adjusting the opening and closing of different switches, the capacitance of the reconfigurable capacitor can be adjusted, achieving performance improvement at different process angles, voltages and temperatures, and enhancing the robustness of the amplifier.

[0020] In the embodiment of the present invention, in the above circuit structure, Lg1, Lg2, Lg3 and Lg4 serve as gate inductors of common-gate transistors, and their purpose is to widen and enhance bandwidth. However, even if their values ​​are all 0, since the ground loop also has ground inductance, the gate will also have parasitic inductance. Therefore, the single-ended distributed common-source common-gate amplifier architecture will have gate inductance that causes the circuit to oscillate.

[0021] In order to suppress the oscillation of the circuit, the traditional method is to connect a resistor in series with the inductor. However, this resistor will reduce the gain of the circuit, affecting the bandwidth and high-frequency characteristics of the circuit. However, the instability introduced by the inductor does not exist in the full frequency band. As long as the inductor is unstable in the frequency band, the pole splitting caused by the inductor can be suppressed by using the resonance of the capacitor and the inductor, thereby achieving stable operation of the circuit. Based on this, in the embodiment of the present invention, the other end of the gate inductor Lg is connected to the reconfigurable capacitor Cb4~Cb7 and then grounded. Generally, this capacitor is selected as a capacitor with a sufficiently high capacitance to achieve the coupling of the AC signal to the ground. However, the selection of the capacitor of the present invention is not just high enough, but to provide a high impedance at a specific frequency where the amplifier may oscillate, thereby ensuring the full-band stability of the amplifier; at the same time, the reconfigurable capacitor can be adjusted to different capacitance values ​​at different process angles, power supply voltages and temperatures, and can work together with the gate inductor to adjust the position of the split pole, so that the amplifier works in the area with the highest gain, the widest bandwidth and no oscillation.

[0022] In actual use, reconfigurable capacitors can only achieve robustness at different process angles and temperatures in terms of capacitance values. In fact, the parasitics of active devices and the overall gain at different temperatures and process angles as well as the power supply voltage must also be considered in the amplifier to achieve improved robustness. This requires the reconfigurable capacitor to switch to different values ​​at different process angles and temperatures, and then comprehensively consider the performance of the overall circuit to achieve the effect of improved robustness.

[0023] The present invention uses specific embodiments to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only used to help understand the method of the present invention and its core idea. At the same time, for those skilled in the art, according to the idea of ​​the present invention, there will be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as a limitation on the present invention.

[0024] Those skilled in the art will appreciate that the embodiments described herein are intended to help readers understand the principles of the present invention, and should be understood that the protection scope of the present invention is not limited to such specific statements and embodiments. Those skilled in the art can make various other specific variations and combinations that do not deviate from the essence of the present invention based on the technical revelations disclosed by the present invention, and these variations and combinations are still within the protection scope of the present invention.

Claims

1. A highly robust distributed amplifier, characterized in that: The distributed amplifier is a Cascode architecture of a four-stage amplifier circuit. In each stage of the amplifier circuit, the gate of the common-gate transistor is connected to one end of a reconfigurable capacitor through a gate inductor, and the other end of the reconfigurable capacitor is grounded. The reconfigurable capacitor is adjusted to different capacitance values ​​under different process corners, power supply voltages and temperatures.

2. The highly robust distributed amplifier according to claim 1, characterized in that: The distributed amplifier comprises a first-stage amplifier circuit, a second-stage amplifier circuit, a third-stage amplifier circuit and a fourth-stage amplifier circuit connected in sequence; Each stage of the amplifier circuit includes a common-gate transistor, a common-source transistor, an input inductor, a first bias resistor, a second bias resistor, a gate inductor, an output inductor, and a reconfigurable capacitor; In the first stage amplifier circuit, the second stage amplifier circuit and the third stage amplifier circuit: The gate of the common-gate transistor is connected to one end of the gate inductor, the other end of the gate inductor is respectively connected to one end of the first bias resistor and one end of the reconfigurable capacitor, the other end of the reconfigurable capacitor is grounded, and the other end of the first bias resistor is respectively connected to the bias voltage 20 and the other end of the first bias resistor in the subsequent amplifier circuit; The drain of the common-gate transistor is respectively connected to the other end of the output inductor and one end of the output inductor in the subsequent stage amplifier circuit; The source of the common-gate transistor is connected to the drain of the common-source transistor, the source of the common-source transistor is grounded, the gate of the common-source transistor is respectively connected to one end of the second bias resistor, the other end of the input inductor and one end of the input inductor in the subsequent amplifier circuit, and the other end of the second bias resistor is connected to the other end of the second bias resistor in the subsequent amplifier circuit and the bias voltage 10; In the first-stage amplifier circuit, one end of the input inductor is connected to one end of the DC blocking capacitor Cb1, the other end of the DC blocking capacitor Cb1 serves as the input end of the distributed amplifier, one end of the output inductor is connected to one end of the characteristic impedance resistor Ro2, the other end of the characteristic impedance resistor Ro2 is connected to one end of the DC blocking capacitor Cb3, and the other end of the DC blocking capacitor Cb3 is grounded.

3. The highly robust distributed amplifier according to claim 2, characterized in that: In the fourth-stage amplifier circuit, the gate of the common-gate transistor is connected to one end of the gate inductor, the other end of the gate inductor is respectively connected to one end of the first bias resistor and one end of the reconfigurable capacitor, the other end of the reconfigurable capacitor is grounded, and the other end of the first bias resistor is respectively connected to the bias voltage 20; The drain of the common-gate transistor is respectively connected to the other end of the output inductor and one end of the output inductor Ld5, the other end of the output inductor Ld5 is respectively connected to one end of the DC blocking capacitor Cb4 and one end of the AC choke inductor Lb1, the other end of the AC choke inductor Lb1 is connected to the power supply, and the other end of the DC blocking capacitor Cb4 serves as the output end of the distributed amplifier; The source of the common-gate transistor is connected to the drain of the common-source transistor, the source of the common-source transistor is grounded, the gate of the common-source transistor is respectively connected to one end of the second bias resistor, the other end of the input inductor and one end of the input inductor Li5, the other end of the second bias resistor is connected to the bias voltage 10, the other end of the input inductor Li5 is connected to one end of the characteristic impedance resistor Ro1, the other end of the characteristic impedance resistor Ro1 is connected to one end of the DC blocking capacitor Cb2, and the other end of the DC blocking capacitor Cb2 is grounded.

4. The highly robust distributed amplifier according to claim 3, characterized in that: In the first stage amplifying circuit, the second stage amplifying circuit, the third stage amplifying circuit and the fourth stage amplifying circuit, the reconfigurable capacitor includes a capacitor switch Mr1, a capacitor switch Mr2 and a capacitor switch Mr3; The gate of the capacitor switch Mr1 is connected to the control signal CT1 through the gate resistor Rr1, the drain of the capacitor switch Mr1 is respectively connected to one end of the fixed capacitor Cr0, the drain of the capacitor switch Mr2 and the drain of the capacitor switch Mr3, and is connected to the other end of the corresponding gate inductor as the input end of the reconfigurable capacitor, and the source of the capacitor switch Mr1 is connected to one end of the adjustable capacitor Cr1; The gate of the capacitor switch Mr2 is connected to the control signal CT2 through the gate resistor Rr2, the source of the capacitor switch Mr2 is connected to one end of the adjustable capacitor Cr2, the gate of the capacitor switch Mr2 is connected to the control signal CT3 through the gate resistor Rr3, and the source of the capacitor switch Mr3 is connected to one end of the adjustable capacitor Cr3; The other ends of the adjustable capacitors Cr1 , Cr2 and Cr3 are all connected to the other end of the fixed capacitor Cr0 and are grounded as output ends of the reconfigurable capacitors.

5. The highly robust distributed amplifier according to claim 4, characterized in that: In the reconfigurable capacitor, the control signals CT1, CT2 and CT3 are digital signals 1 or 0. When they are 1, the corresponding capacitor switches are turned on, and when they are 0, the corresponding capacitor switches are turned off.

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