Self-checking method of vehicle-gauge-level chip transceiver circuit and related equipment

Abstract

The invention provides a self-checking method and related equipment for a vehicle-gauge-level chip transceiver circuit, and the method comprises the steps: obtaining and comparing the corresponding frequency and amplitude information under the opening and closing states of an RFLB loop after a vehicle-gauge-level chip is powered on, so as to verify an RFLB function; acquiring and comparing the corresponding frequency and amplitude information in the on and off states of the I FLB loop to verify the I FLB function; after verification of the RFLB function and the I FLB function is completed, activating an RFLB loop and an I FLB loop, obtaining radio frequency signal information corresponding to the RFLB loop, determining the working state of the RFLB loop according to the radio frequency signal information, obtaining intermediate frequency signal information corresponding to the I FLB loop, determining the working state of the I FLB loop according to the intermediate frequency signal information, and sending a data frame based on the RFLB loop and the I FLB loop; according to the method and the device, the functions of RFLB and I FLB are verified before signal detection, so that the effectiveness and the accuracy of the self-checking process are ensured, the dependence on external test equipment is reduced, the production efficiency can be improved, and the production cost can be reduced.

Description

Technical Field

[0001] The embodiments of the present application relate to the field of radar chip technology, and more particularly to a self-test method and related equipment for an automotive-grade chip transceiver circuit. Background Art

[0002] With the rapid development of the automotive industry, automotive-grade radar chips, as one of the core components of automotive advanced driver assistance systems, are facing increasing safety and reliability requirements. Automotive-grade radar chips not only need to work stably in various extreme environments, but also meet strict functional safety standards. They also need to integrate complex digital and analog circuits to handle high-speed data transmission and high-precision signal processing tasks.

[0003] However, in the design and production process of automotive-grade radar chips, testing methods are needed to ensure that the performance of their transceiver circuits in RF and IF signal processing meets the predetermined requirements. Traditional testing methods mainly rely on external testing equipment, which requires additional hardware costs. In addition, the testing process is cumbersome and time-consuming, affecting the production efficiency and production cost of automotive-grade chips. Summary of the invention

[0004] The embodiments of the present application provide a self-test method and related equipment for the transceiver circuit of an automotive-grade chip, which can ensure that the performance of the transceiver circuit in radio frequency and intermediate frequency signal processing can meet predetermined requirements through the built-in RFLB and I FLB detection mechanisms, thereby reducing dependence on external testing equipment, thereby improving the overall performance and reliability of the radar chip while improving the production efficiency of the automotive-grade chip and reducing its production cost.

[0005] To achieve the above-mentioned purpose, a first aspect of an embodiment of the present application provides a self-test method for a transceiver circuit of an automotive-grade chip, the method being applied to an automotive-grade chip, the automotive-grade chip comprising an RFLB loop and an I FLB loop, the method comprising: after the automotive-grade chip is powered on, obtaining and comparing the frequency and amplitude information corresponding to the RFLB loop in the on and off states to verify the RFLB function; obtaining and comparing the frequency and amplitude information corresponding to the I FLB loop in the on and off states to verify the I FLB function; after the verification of the RFLB function and the I FLB function is completed, activating the RFLB loop and the I FLB loop, obtaining the radio frequency signal information corresponding to the RFLB loop, and determining the working state of the RFLB loop according to the radio frequency signal information, obtaining the intermediate frequency signal information corresponding to the I FLB loop, and determining the working state of the I FLB loop according to the intermediate frequency signal information; when the RFLB loop and the I FLB loop are both in normal operating states, sending data frames based on the RFLB loop and the I FLB loop.

[0006] In some embodiments, the obtaining and comparing of the corresponding frequency and amplitude information in the open and closed states of the RFLB loop to verify the RFLB function includes: when the RFLB loop is in the open state, collecting the data of the corresponding analog-to-digital converter and performing a fast Fourier transform to obtain first frequency and amplitude information; when the RFLB loop is in the closed state, collecting the data of the analog-to-digital converter again and performing a fast Fourier transform to obtain second frequency and amplitude information; if the first frequency and amplitude information and the second frequency and amplitude information both meet the corresponding preset ranges, it is determined that the RFLB function verification is completed; if not, the automotive-grade chip is controlled to perform an interrupt action.

[0007] In some embodiments, if the first frequency and amplitude information and the second frequency and amplitude information both meet the corresponding preset ranges, the RFLB function verification is determined to be completed, including: when the first frequency in the first frequency and amplitude information meets the first frequency range, the first amplitude in the first frequency and amplitude information is greater than the first amplitude threshold, and the second amplitude in the second frequency and amplitude information is less than the second amplitude threshold, the RFLB function verification is determined to be completed.

[0008] In some embodiments, the obtaining and comparing of the corresponding frequency and amplitude information in the on and off states of the I FLB loop to verify the I FLB function includes: when the I FLB loop is in the on state, collecting the data of the corresponding analog-to-digital converter and performing a fast Fourier transform to obtain third frequency and amplitude information; when the I FLB loop is in the off state, collecting the data of the analog-to-digital converter again and performing a fast Fourier transform to obtain fourth frequency and amplitude information; if the third frequency and amplitude information and the fourth frequency and amplitude information both meet the corresponding preset ranges, it is determined that the I FLB function verification is completed; if not, the automotive-grade chip is controlled to perform an interrupt action.

[0009] In some embodiments, if the third frequency and amplitude information and the fourth frequency and amplitude information both meet the corresponding preset ranges, then it is determined that the I FLB function verification is completed, including: when the third frequency in the third frequency and amplitude information meets the second frequency range, the third amplitude in the third frequency and amplitude information is greater than the third amplitude threshold, and the fourth amplitude in the fourth frequency and amplitude information is less than the fourth amplitude threshold, then it is determined that the I FLB function verification is completed.

[0010] In some embodiments, the obtaining of the RF signal information corresponding to the RFLB loop and determining the working state of the RFLB loop according to the RF signal information, the obtaining of the intermediate frequency signal information corresponding to the I FLB loop and determining the working state of the I FLB loop according to the intermediate frequency signal information, include: acquiring data of an analog-to-digital converter corresponding to the RFLB loop and performing a fast Fourier transform to obtain RF frequency information of the RF signal; comparing the RF frequency information with a preset first standard value, and if the difference is within a first target range, determining that the RFLB loop is in a normal operating state; acquiring data of the analog-to-digital converter corresponding to the I FLB loop and performing a fast Fourier transform to obtain intermediate frequency information of the intermediate frequency signal; comparing the intermediate frequency information with a preset second standard value, and if the difference is within a second target range, determining that the I FLB loop is in a normal operating state.

[0011] In some embodiments, the data frame sending based on the RFLB loop and the I FLB loop includes: obtaining a target sending requirement input by a user; sending multiple data frames according to the target sending requirement; or, according to the target sending requirement, re-determining the working status of the RFLB loop and the I FLB loop, and sending the next data frame.

[0012] To achieve the above-mentioned purpose, a second aspect of an embodiment of the present application provides a self-test device for a transceiver circuit of an automotive-grade chip, the device being applied to an automotive-grade chip, the automotive-grade chip comprising an RFLB loop and an I FLB loop, the device comprising: a power-on detection module, for obtaining and comparing the frequency and amplitude information corresponding to the RFLB loop in the on and off states after the automotive-grade chip is powered on, so as to verify the RFLB function; obtaining and comparing the frequency and amplitude information corresponding to the I FLB loop in the on and off states, so as to verify the I FLB function; an activation detection module, for activating the RFLB loop and the I FLB loop after the verification of the RFLB function and the I FLB function is completed, obtaining the radio frequency signal information corresponding to the RFLB loop, and determining the working state of the RFLB loop according to the radio frequency signal information, obtaining the intermediate frequency signal information corresponding to the I FLB loop, and determining the working state of the I FLB loop according to the intermediate frequency signal information; a data sending module, for, when both the RFLB loop and the I FLB loop are in a normal operating state, based on the RFLB loop and the I The FLB loop sends data frames.

[0013] To achieve the above-mentioned purpose, the third aspect of an embodiment of the present application provides an electronic device, comprising: at least one processor; at least one memory for storing at least one program; when at least one of the programs is executed by at least one of the processors, a self-test method for the automotive-grade chip transceiver circuit as described in any one of the first aspects is implemented.

[0014] To achieve the above-mentioned purpose, the fourth aspect of an embodiment of the present application provides a computer-readable storage medium storing computer-executable instructions, wherein the computer-executable instructions are used to execute the self-test method of the automotive-grade chip transceiver circuit as described in any one of the fourth aspects.

[0015] The embodiment of the present application provides a self-test method and related equipment for a transceiver circuit of an automotive-grade chip, which can be applied to an automotive-grade chip, wherein the automotive-grade chip includes an RFLB loop and an I FLB loop, and the method includes: after the automotive-grade chip is powered on, obtaining and comparing the frequency and amplitude information corresponding to the RFLB loop in the on and off states to verify the RFLB function; obtaining and comparing the frequency and amplitude information corresponding to the I FLB loop in the on and off states to verify the I FLB function; after the RFLB function and the I FLB function are verified, activating the RFLB loop and the I FLB loop, obtaining the radio frequency signal information corresponding to the RFLB loop, and determining the working state of the RFLB loop according to the radio frequency signal information, obtaining the intermediate frequency signal information corresponding to the I FLB loop, and determining the working state of the I FLB loop according to the intermediate frequency signal information; when the RFLB loop and the I FLB loop are both in a normal operating state, sending data frames based on the RFLB loop and the I FLB loop; it can be understood that the present application verifies the RFLB and I FLB loops before signal detection through the built-in RFLB and I FLB detection mechanisms. The function of FLB ensures the effectiveness and accuracy of the self-test process, ensures the high standard of signal quality, thereby improving the overall performance and reliability of the radar chip, reducing the dependence on external test equipment, and reducing the test cost. In addition, the present application method allows for rapid self-testing after the chip is powered on, shortens the test time, and improves production efficiency, thereby meeting the automotive industry's demand for high-performance, high-reliability radar chips, and also provides a strong guarantee for the functional safety of automotive chips. In addition, based on the above steps, the present application method also allows the independent startup of the safety mechanisms of RFLB and I FLB, as well as the flexible selection of the data frame sending type, and can adjust the execution of the safety mechanism according to actual needs, thereby improving the adaptability and flexibility of the system. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 A flow chart of a self-test method for a vehicle-grade chip transceiver circuit provided in an embodiment of the present application;

[0017] Figure 2 A schematic diagram of an RFLB loop provided in an embodiment of the present application;

[0018] Figure 3 A schematic diagram of an I FLB loop provided in an embodiment of the present application;

[0019] Figure 4 A flowchart for verifying the RFLB function in a self-test method for a transceiver circuit of an automotive-grade chip provided in an embodiment of the present application;

[0020] Figure 5 Another flow chart for verifying the I FLB function in the self-test method of the automotive-grade chip transceiver circuit provided in one embodiment of the present application;

[0021] Figure 6 A flowchart for verifying the I FLB function in a self-test method for a vehicle-grade chip transceiver circuit provided in an embodiment of the present application;

[0022] Figure 7 Another flow chart for verifying the I FLB function in the self-test method of the automotive-grade chip transceiver circuit provided in one embodiment of the present application;

[0023] Figure 8 A flow chart for determining a working state in a self-test method for a transceiver circuit of an automotive-grade chip provided in an embodiment of the present application;

[0024] Fig. 9 A specific flow chart of a self-test method for a vehicle-grade chip transceiver circuit provided in an embodiment of the present application;

[0025] Fig.10 A schematic diagram of the structure of an electronic device provided in one embodiment of the present application. DETAILED DESCRIPTION

[0026] In order to make the purpose, technical solution and advantages of the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0027] In some embodiments, although the functional modules are divided in the system schematic diagram and the logical order is shown in the flowchart, in some cases, the steps shown or described may be performed in a different order than the module division in the system or the order in the flowchart. The terms first, second, etc. in the specification, claims and the above drawings are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence.

[0028] In addition, unless otherwise clearly specified and limited, the term "connected" should be understood in a broad sense. For example, it can be a fixed connection or a movable connection, a detachable connection or a non-detachable connection, or an integral connection; it can be a mechanical connection, an electrical connection, or the two can communicate with each other; it can be a direct connection or an indirect connection through an intermediate medium.

[0029] In the description of the embodiments of the present application, the description of reference terms "one embodiment / implementation", "another embodiment / implementation" or "certain embodiments / implementations", "in the above embodiments / implementations", etc. means that the specific features, structures, materials or characteristics described in combination with the implementation or example are included in at least two embodiments or implementations disclosed in the present application. In the disclosure of this application, the schematic representation of the above terms does not necessarily refer to the same embodiment or implementation. It should be noted that although the logical order is shown in the flowchart, in some cases, the steps shown or described may be performed in an order different from that in the flowchart.

[0030] With the rapid development of the automotive industry, as one of the core components of the automotive advanced driver assistance system, the safety and reliability requirements of automotive-grade radar chips are also constantly increasing. Automotive-grade radar chips not only need to work stably in various extreme environments, but also meet strict functional safety standards. They also need to integrate complex digital and analog circuits to handle high-speed data transmission and high-precision signal processing tasks. However, in the design and production process of automotive-grade radar chips, it is necessary to use test methods to ensure that the performance of its transceiver circuits in RF and IF signal processing meets the predetermined requirements. Traditional test methods mainly rely on external test equipment, which requires additional hardware costs, and the test process is cumbersome and time-consuming, affecting the production efficiency and production cost of automotive-grade chips.

[0031] Based on this, the embodiments of the present application provide a self-test method and related equipment for the transceiver circuit of an automotive-grade chip, which can ensure that the performance of the transceiver circuit in radio frequency and intermediate frequency signal processing can meet the predetermined requirements through the built-in RFLB and I FLB detection mechanisms, thereby reducing dependence on external testing equipment, thereby improving the overall performance and reliability of the radar chip while improving the production efficiency of the automotive-grade chip and reducing its production cost.

[0032] The present application scheme is further described below with reference to the accompanying drawings.

[0033] refer to Figure 1 , Figure 1A flowchart of a self-test method for a transceiver circuit of an automotive-grade chip provided in an embodiment of the present application; a first aspect of an embodiment of the present application provides a self-test method for a transceiver circuit of an automotive-grade chip, the method is applied to an automotive-grade chip, the automotive-grade chip includes an RFLB loop and an I FLB loop, the method includes:

[0034] Step S110, after the automotive-grade chip is powered on, the frequency and amplitude information corresponding to the RFLB loop being turned on and turned off is obtained and compared to verify the RFLB function;

[0035] Step S120, obtaining and comparing the frequency and amplitude information corresponding to the I FLB loop on and off states to verify the I FLB function;

[0036] Step S130, after the RFLB function and the I FLB function are verified, the RFLB loop and the I FLB loop are activated, the RF signal information corresponding to the RFLB loop is obtained, and the working state of the RFLB loop is determined according to the RF signal information, the intermediate frequency signal information corresponding to the I FLB loop is obtained, and the working state of the I FLB loop is determined according to the intermediate frequency signal information;

[0037] Step S140: When both the RFLB loop and the I FLB loop are in a normal operating state, data frames are sent based on the RFLB loop and the I FLB loop.

[0038] Among them, it can be understood that the present application verifies the functions of RFLB and I FLB before signal detection through the built-in RFLB and I FLB detection mechanism, ensures the effectiveness and accuracy of the self-test process, and ensures the high standard of signal quality, thereby improving the overall performance and reliability of the radar chip, reducing the dependence on external test equipment, and reducing the testing cost. In addition, the present application method allows for rapid self-checking after the chip is powered on, shortens the test time, and improves production efficiency, thereby meeting the automotive industry's demand for high-performance, high-reliability radar chips, and also provides a strong guarantee for the functional safety of automotive chips. In addition, based on the above steps, the present application method also allows the independent startup of the safety mechanisms of RFLB and I FLB, as well as the flexible selection of the data frame sending type, and can adjust the execution of the safety mechanism according to actual needs, thereby improving the adaptability and flexibility of the system.

[0039] In some embodiments, the RFLB loop (RFLBLoop) is a RF loop test loop, which is used to test the integrity and performance of the RF signal path. The chip is powered on and starts working, collects data through the analog-to-digital converter (ADC), and performs a fast Fourier transform (FFT) to analyze the frequency and amplitude of the signal. The frequency and amplitude information collected when the RFLB loop is turned on and off can be compared to ensure that it is within a predetermined range, thereby verifying the normality of the RFLB function.

[0040] In some embodiments, the I FLB loop (I FLBLoop) is an intermediate frequency loop test loop, which is used to test the integrity and performance of the intermediate frequency signal path, collect data through an analog-to-digital converter, perform a fast Fourier transform, analyze the frequency and amplitude of the signal, and compare the frequency and amplitude information collected when the I FLB loop is turned on and off to ensure that it is within a predetermined range, thereby verifying the normality of the I FLB function.

[0041] In some embodiments, after verifying that RFLB and I FLB function normally, the present application activates the two loops, collects data through an analog-to-digital converter, performs a fast Fourier transform, analyzes the frequency and amplitude of the RF signal and the intermediate frequency signal, compares the acquired frequency and amplitude information with preset standard values, determines the working state of the loop, and sends data frames based on the RFLB loop and the I FLB loop when both the RFLB loop and the I FLB loop are in normal operating state. The normal operating state represents ensuring that the working states of the RFLB loop and the I FLB loop are normal, and then data frames can be sent based on the verified normal RFLB loop and the I FLB loop. Through the above steps, the present application can provide an efficient and reliable automotive-grade chip transceiver circuit self-test method, ensuring the stability and reliability of the radar chip in various environments.

[0042] refer to Figure 2 and Figure 3 , Figure 2 A schematic diagram of an RFLB loop provided in an embodiment of the present application, Figure 3 A schematic diagram of an I FLB loop provided in an embodiment of the present application; wherein, Figure 2 and Figure 3 The basic architectures of the RFLB loop and I FLB loop are shown respectively, which include the process from signal reception, amplification, mixing to final analog-to-digital conversion and analysis. The RFLB loop is mainly responsible for the processing of RF signals, while the I FLB loop focuses on the processing of intermediate frequency signals. Through these loops, the performance of the radar chip can be effectively monitored and evaluated to ensure its stable operation in complex environments.

[0043] Figure 2The components and signals of the RFLB loop are described as follows:

[0044] RX_IN: receives input signal;

[0045] LNA: Low noise amplifier, used to amplify the weak received signal;

[0046] Mixer: A mixer that converts high-frequency signals into intermediate-frequency signals.

[0047] I FBlock: IF module, including filters and other IF processing circuits;

[0048] ADC: Analog-to-digital converter, converts analog signals into digital signals;

[0049] FFT: Fast Fourier Transform, used to analyze the frequency components of a signal;

[0050] TX_OUT: sends output signal;

[0051] Combiner: A synthesizer used to synthesize signals from different paths;

[0052] PA: power amplifier, used to amplify the transmitted signal;

[0053] VCO: Voltage controlled oscillator, generates a tunable high frequency signal;

[0054] X6: frequency multiplier, which increases the frequency of the signal generated by the VCO by six times;

[0055] PLL: Phase-locked loop, used to stabilize and adjust the frequency of the VCO;

[0056] Phase_ctr l: Phase control signal, used to adjust the phase of VCO.

[0057] Figure 3 The components and signals of the I FLB loop are described as follows:

[0058] DDS: Direct Digital Synthesizer, used to generate precise sine wave signals;

[0059] DAC: Digital-to-analog converter, converts digital signals into analog signals;

[0060] TP_I F: positive intermediate frequency signal;

[0061] TN_I F: negative intermediate frequency signal;

[0062] I FBlock: IF module, including filters and other IF processing circuits;

[0063] I FOP_I F1: positive polarity output signal of IF block;

[0064] I FON_I F1: negative polarity output signal of IF block;

[0065] ADC: Analog-to-digital converter, converts analog signals into digital signals;

[0066] FFT: Fast Fourier Transform, used to analyze the frequency content of a signal.

[0067] In some embodiments, Figure 2 As shown in the figure, the principle of the RFLB loop is to realize the circulation of RF signals inside the chip and directly feed back the signal of the transmitting path to the receiving path; first, the receiving end (RX_IN) captures the signal and performs preliminary amplification processing through a low noise amplifier (LNA); then, the amplified signal passes through the mixer and the intermediate frequency (IF) function module to provide the ADC with a signal suitable for sampling; after the ADC acquires the signal, it performs FFT analysis on it to evaluate whether the frequency and amplitude of the signal are within a predetermined reasonable range; if an abnormality is detected, the system will send an interrupt signal to the central processing unit (CPU) to trigger the corresponding processing flow; in addition, this safety mechanism also includes a phase adjustment circuit, whose function is to adjust the phase of the signal to ensure that the phase characteristics of the signal in the RFLB loop meet specific test requirements; in order to enhance the signal strength and ensure effective testing, a power amplifier (PA) is used to amplify the signal.

[0068] In some embodiments, Figure 3 As shown in FIG. 1 , the principle of the I FLB loop is to first generate a digital frequency signal using direct digital synthesis (DDS) technology. The signal can be selected in the form of a sine wave, square wave, triangle wave, etc. to meet different test requirements; the digital signal generated by the DDS is converted into an analog signal via a digital-to-analog converter (DAC), and the analog signal is then recognized and processed by an intermediate frequency (IF) module; the processed signal is sent to the ADC for acquisition, and the acquired digital signal is then handed over to the digital part for FFT processing; the subsequent judgment process is similar to the RFLB test, by calculating the frequency and amplitude of the signal and comparing it with the preset reasonable range to determine whether the signal meets the expected performance standards; based on this judgment, the system will decide whether to send an interrupt request to the CPU, thereby triggering the corresponding exception handling process.

[0069] It is understandable that based on the above Figure 2 and Figure 3In the middle loop, the present application can implement the solution process in steps S110 to S160. After the chip is powered on, the safety mechanism detection of RFLB and I FLB is started first to ensure the correctness of its function. If the frequency and amplitude calculated by FFT are not within the range during the process, the safety mechanism will actively generate an interrupt to the CPU to terminate the operation. If it is normal, the next process can be executed. This detection only needs to be performed once after power-on; next, RFLB and I FLB will be activated, and the system will continue to evaluate the frequency and amplitude of the signal to determine whether an interrupt needs to be triggered; if the safety mechanism operates normally, data frames can be started to be sent; after the data frame is sent, the system will decide whether to stop or continue to send the next frame according to the user's choice; in addition, the user can also freely choose the sending type of the next frame, whether it is a data frame with RFLB and I FLB, or a data frame without these safety mechanisms; this flexibility allows the system to balance the security and efficiency of data frames according to actual needs.

[0070] refer to Figure 4 , Figure 4 A flowchart for verifying the RFLB function in a self-test method for a transceiver circuit of an automotive-grade chip provided in an embodiment of the present application; in some embodiments, obtaining and comparing the corresponding frequency and amplitude information in the open and closed states of the RFLB loop to verify the RFLB function includes:

[0071] Step S410, when the RFLB loop is turned on, collect data from the corresponding analog-to-digital converter and perform a fast Fourier transform to obtain first frequency and amplitude information;

[0072] Step S420, in the RFLB loop closed state, again collect data from the analog-to-digital converter and perform a fast Fourier transform to obtain second frequency and amplitude information;

[0073] Step S430: If both the first frequency and amplitude information and the second frequency and amplitude information meet the corresponding preset ranges, it is determined that the RFLB function verification is completed; if not, the automotive-grade chip is controlled to perform an interrupt action.

[0074] In some embodiments, the present application can activate the RFLB loop to form a closed loop between the transmitting end and the receiving end of the RF signal, corresponding to Figure 2 The analog-to-digital converter is used to convert the analog signal into a digital signal, and the fast Fourier transform is used to analyze the frequency and amplitude of the signal. The first frequency and amplitude information is the frequency and amplitude information obtained after the data collected when the RFLB loop is turned on is processed by FFT; correspondingly, the RFLB loop is disconnected so that the RF signal no longer forms a closed loop between the transmitter and the receiver. The second frequency and amplitude information is the frequency and amplitude information obtained after the data collected when the RFLB loop is turned off is processed by FFT.

[0075] In some embodiments, if the first frequency and amplitude information and the second frequency and amplitude information both meet the corresponding preset ranges, it is determined that the RFLB function verification is completed; if not, the automotive-grade chip is controlled to perform an interrupt action, wherein the preset range is a reasonable range of pre-set frequency and amplitude, and the interrupt action is to send an interrupt signal to the central processing unit (CPU) inside the automotive-grade chip when an abnormality is detected, triggering the corresponding processing flow.

[0076] It can be understood that the above steps compare the first and second groups of frequency and amplitude information to ensure that they are within a preset range. If the frequency in the first group of frequency and amplitude information meets the first frequency range, the amplitude is greater than the first amplitude threshold, and the amplitude in the second group of frequency and amplitude information is less than the second amplitude threshold, then the RFLB function verification is determined to be completed. If not, the automotive-grade chip is controlled to execute an interrupt action, sending an interrupt signal to the central processing unit (CPU) to trigger further diagnosis and processing procedures.

[0077] refer to Figure 5 , Figure 5 Another flowchart for verifying the IFLB function in the self-test method of the automotive-grade chip transceiver circuit provided in one embodiment of the present application; in some embodiments, if the first frequency and amplitude information and the second frequency and amplitude information both meet the corresponding preset ranges, it is determined that the RFLB function verification is completed, including:

[0078] Step S510, when the first frequency in the first frequency and amplitude information meets the first frequency range, the first amplitude in the first frequency and amplitude information is greater than the first amplitude threshold, and the second amplitude in the second frequency and amplitude information is less than the second amplitude threshold, it is determined that the RFLB function verification is completed.

[0079] It can be understood that the first frequency range is a reasonable range of the first set of frequencies; the first amplitude threshold is the lowest threshold of the first set of amplitudes; and the second amplitude threshold is the highest threshold of the second set of amplitudes. When the RFLB loop is on, the data of the analog-to-digital converter is collected and a fast Fourier transform is performed to obtain the first set of frequency and amplitude information. When the RFLB loop is closed, the data of the ADC is collected again and an FFT is performed to obtain the second set of frequency and amplitude information. The first and second sets of frequency and amplitude information are compared to ensure that they are both within the predetermined range to verify the RFLB function. If the frequency in the first set of frequency and amplitude information meets the first frequency range, the amplitude is greater than the first amplitude threshold, and the amplitude in the second set of frequency and amplitude information is less than the second amplitude threshold, the RFLB function verification is determined to be completed. If not, the automotive-grade chip is controlled to perform an interrupt action.

[0080] In some embodiments, corresponding to steps S410 to S430, the present application can test the correctness of the RFLB safety mechanism function through the following specific steps: first, the corresponding transceiver channels are connected, and the working state of RFLB is detected by monitoring the signal loop from the transmitter to the receiver. Subsequently, all modules related to the transmitter and the receiver are configured to work mode. Then, the system will periodically traverse the phase control word, perform multiple phase switches at the selected clock frequency, and start ADC sampling for a period of time after the circuit is stable for a certain period of time, and perform FFT on the sampling results. By analyzing the FFT results, the frequency domain BIN with the largest amplitude is extracted (to reduce errors, and the 5 BINs adjacent to the DC are not calculated), and the frequency and amplitude information is obtained. If the measured frequency is within the first frequency range and the amplitude is greater than the first amplitude threshold, it is determined that RFLB is working properly. Then, an injection error verification is performed. By turning off the first stage of the power amplifier (PA) at the transmitter, the RFLB loop will be disconnected. After the circuit stabilizes again, the phase control word is continued to be periodically traversed, and ADC sampling and FFT data processing are performed in the new stable state. The frequency domain BIN with the largest amplitude is extracted again, and its amplitude information is obtained. In this step, the frequency is not compared, but if the amplitude is less than the second amplitude threshold, the RFLB is also considered to be working properly. If it is not working properly, the safety mechanism system will generate an interrupt behavior to the CPU to indicate that the chip is in an abnormal state, thereby triggering further diagnosis and processing procedures.

[0081] refer to Figure 6 , Figure 6 A flowchart for verifying the IFLB function in a self-test method for a transceiver circuit of an automotive-grade chip provided in an embodiment of the present application; in some embodiments, obtaining and comparing the frequency and amplitude information corresponding to the IFLB loop on and off states to verify the IFLB function includes:

[0082] Step S610, when the I FLB loop is turned on, collect data from the corresponding analog-to-digital converter and perform fast Fourier transform to obtain third frequency and amplitude information;

[0083] Step S620, in the closed state of the I FLB loop, the data of the analog-to-digital converter is collected again and a fast Fourier transform is performed to obtain fourth frequency and amplitude information;

[0084] Step S630: If the third frequency and amplitude information and the fourth frequency and amplitude information both meet the corresponding preset ranges, it is determined that the I FLB function verification is completed; if not, the automotive-grade chip is controlled to perform an interrupt action.

[0085] In some embodiments, the present application can activate the I FLB loop to form a closed loop inside the intermediate frequency signal, corresponding to Figure 3The analog-to-digital converter is used to convert the analog signal into a digital signal, and the fast Fourier transform is used to analyze the frequency and amplitude of the signal. The third frequency and amplitude information is the frequency and amplitude information obtained after the data collected when the I FLB loop is turned on is processed by FFT; conversely, the I FLB loop is disconnected so that the intermediate frequency signal no longer forms a closed loop inside. The fourth frequency and amplitude information is the frequency and amplitude information obtained after the data collected when the I FLB loop is turned off is processed by FFT.

[0086] In some embodiments, if the third frequency and amplitude information and the fourth frequency and amplitude information are both within the corresponding preset range, it is determined that the I FLB function verification is completed. If not, the automotive-grade chip is controlled to perform an interrupt action; it can be understood that the present application can ensure that they are within the preset range by comparing the third and fourth sets of frequency and amplitude information. If the frequency in the third set of frequency and amplitude information is within the second frequency range, the amplitude is greater than the third amplitude threshold, and the amplitude in the fourth set of frequency and amplitude information is less than the fourth amplitude threshold, it is determined that the I FLB function verification is completed. If not, the automotive-grade chip is controlled to perform an interrupt action, sending an interrupt signal to the central processing unit (CPU) to trigger further diagnosis and processing procedures.

[0087] refer to Figure 7 , Figure 7 Another flowchart for verifying the IFLB function in the self-test method for the automotive-grade chip transceiver circuit provided in one embodiment of the present application; in some embodiments, if the third frequency and amplitude information and the fourth frequency and amplitude information both meet the corresponding preset ranges, it is determined that the IFLB function verification is completed, including:

[0088] Step S710, when the third frequency in the third frequency and amplitude information conforms to the second frequency range, the third amplitude in the third frequency and amplitude information is greater than the third amplitude threshold, and the fourth amplitude in the fourth frequency and amplitude information is less than the fourth amplitude threshold, it is determined that the I FLB function verification is completed.

[0089] It can be understood that the second frequency range is a reasonable range of the third group of frequencies set in advance; the third amplitude threshold is the lowest threshold of the third group of amplitudes set in advance; the fourth amplitude threshold is the highest threshold of the fourth group of amplitudes set in advance; when the I FLB loop is in the on state, the data of the analog-to-digital converter is collected and the fast Fourier transform is performed to obtain the third group of frequency and amplitude information; when the I FLB loop is in the off state, the data of the ADC is collected again and the FFT is performed to obtain the fourth group of frequency and amplitude information; the third and fourth groups of frequency and amplitude information are compared to ensure that they are both within the predetermined range to verify the I FLB function; if the frequency in the third group of frequency and amplitude information meets the second frequency range, the amplitude is greater than the third amplitude threshold, and the amplitude in the fourth group of frequency and amplitude information is less than the fourth amplitude threshold, then it is determined that the I FLB function verification is completed; if not, the automotive-grade chip is controlled to execute an interrupt action.

[0090] In some embodiments, corresponding to steps S610 to S630, the present application can test the correctness of the I FLB safety mechanism function through the following specific steps. Enable I FLB and ensure that it is in working state, activate DAC to let it work at the same time, and the DDS of the digital circuit provides a digital frequency signal. At this stage, the IF signal is interrupted so that the IF module stops working, so that no signal is sent to the ADC. Therefore, the data output by the ADC should only contain noise after FFT processing. At this time, the amplitude of the frequency domain BIN with the largest amplitude (reducing errors, not calculating the 5 BINs adjacent to the direct current) should be less than the fourth amplitude threshold. Subsequently, the IF module is turned on, and the ADC can collect a single-tone signal at this time, perform FFT processing on the signal, extract the frequency domain BIN with the largest amplitude, and obtain its frequency and amplitude information. If the measured frequency is within the second frequency range and the amplitude is greater than the third amplitude threshold, it is considered that the system is working properly. If it is normal in the above two modes, it means that the I FLB safety mechanism is working properly. If it does not work properly, the safety mechanism system will generate an interrupt behavior to the CPU to prompt that the chip is in an abnormal state.

[0091] refer to Figure 8 , Figure 8 A flowchart for determining a working state in a self-test method for a transceiver circuit of an automotive-grade chip provided in an embodiment of the present application; in some embodiments, obtaining radio frequency signal information corresponding to the RFLB loop, and determining the working state of the RFLB loop according to the radio frequency signal information, obtaining intermediate frequency signal information corresponding to the I FLB loop, and determining the working state of the I FLB loop according to the intermediate frequency signal information, including:

[0092] Step S810, collecting data from the analog-to-digital converter corresponding to the RFLB loop and performing a fast Fourier transform to obtain RF frequency information of the RF signal;

[0093] Step S820, comparing the radio frequency information with a preset first standard value, and if the difference is within a first target range, determining that the RFLB loop is in a normal operating state;

[0094] Step S830, collecting data from the analog-to-digital converter corresponding to the I FLB loop and performing a fast Fourier transform to obtain intermediate frequency information of the intermediate frequency signal;

[0095] Step S840: compare the intermediate frequency information with a preset second standard value. If the difference is within a second target range, it is determined that the I FLB loop is in a normal operating state.

[0096] It can be understood that the present application activates the RFLB loop, collects ADC data and performs FFT to obtain frequency information of the RF signal, compares the RF frequency information with a preset first standard value, and if the difference is within the first target range, determines that the RFLB loop is in a normal operating state; activates the I FLB loop, collects ADC data and performs FFT to obtain frequency information of the intermediate frequency signal, and compares the intermediate frequency information with a preset second standard value. If the difference is within the second target range, determines that the I FLB loop is in a normal operating state.

[0097] In some embodiments, specifically, corresponding to step S810 to step S820, the RFLB safety mechanism is activated. First, the receiving channel and the transmitting channel are powered off to ensure the safety and stability of the system. Subsequently, the transceiver channel is powered on again to start the RFLB safety mechanism. After activation, the system will operate the phase control word and perform multiple phase switches according to the selected clock frequency. After completing the phase switch, the system will wait for a period of time to ensure that the RF signal is stable. After stabilization, the ADC starts to collect signal data for a period of time and performs FFT processing on the collected data. Finally, the working state of RFLB is determined by accurately judging the frequency component in the FFT analysis result and comparing it with the theoretical value obtained by dividing the predetermined clock frequency by the number of phase switches. If the frequency matches, RFLB is considered to be working normally; if it does not match, it is considered abnormal. When an abnormality occurs, the safety mechanism system will send an interrupt to the CPU.

[0098] In some embodiments, specifically, corresponding to step S830 to step S840, the I FLB safety mechanism is activated. Enable the DAC and I FLB in sequence. Since the intermediate frequency signal requires a certain amount of stabilization time, the system will start the ADC data sampling after the I FLB is enabled and fully stabilized. During the sampling process, the system will perform FFT analysis on the data collected by the ADC. By comparing the signal frequency obtained by the FFT analysis with the set frequency of the input DAC, the working state of the I FLB can be evaluated. If the frequencies of the two are consistent, it is determined that the I FLB is working normally; if they are inconsistent, it is considered that the I FLB is working abnormally. When the behavior is abnormal, an interrupt will be sent to the CPU.

[0099] In some embodiments, data frame sending is performed based on the RFLB loop and the I FLB loop, including: obtaining a target sending requirement input by a user; sending multiple data frames according to the target sending requirement; or, according to the target sending requirement, determining the working status of the RFLB loop and the I FLB loop again, and sending the next data frame.

[0100] It can be understood that the present application can configure the format and quantity of data frames according to the target sending requirements input by the user. Before sending each data frame, steps S810 to S840 are re-executed to determine the working status of the RFLB loop and the I FLB loop again. If both loops are in normal operating state, the next data frame is sent. If any loop is not in normal operating state, the automotive-grade chip is controlled to execute an interrupt action, and an interrupt signal is sent to the central processing unit (CPU) to trigger further diagnosis and processing procedures.

[0101] In some embodiments, the present application can start sending data frames after all security mechanism detections are completed. After this step is completed, this step can be selected to be executed cyclically to start sending multiple data frames. To further ensure the security of the system, steps 3 and 4 can also be selected to be re-executed before each data frame is started. This will ensure that the security mechanisms of RFLB and I FLB are verified again, thereby confirming the stability and reliability of the system before each data frame is sent.

[0102] refer to Fig. 9 , Fig. 9A specific flow chart of the self-test method of the automotive-grade chip transceiver circuit provided in an embodiment of the present application; In some embodiments, the present application scheme includes verifying the functions of RFLB and I FLB before enabling RFLB and I FLB for signal detection; For RFLB, first collect analog-to-digital converter (ADC) data and perform fast Fourier transform in the loop connection state, then disconnect the RFLB loop, collect ADC data again and perform FFT. By comparing the results of the two FFTs, including frequency and amplitude, ensure that they are both within the predetermined reasonable range, thereby verifying whether the function of RFLB is normal; For I FLB, take similar steps, first turn on I FLB, then turn off IF, calculate and compare frequency and amplitude information respectively. After detecting RFLB and I FLB, if the safety mechanism function itself has no impact, the RFLB and I FLB safety mechanisms can be activated normally; start RFLB and I FLB respectively, collect ADC data for FFT, calculate their respective frequencies and amplitudes, and judge their reasonable ranges, thereby ensuring the stability of RF and IF signals; After completing the inspection of the safety mechanism, the chip can start to send data frames. In order to improve the convenience of enabling and self-testing, the present invention allows the independent startup of the security mechanisms of RFLB and I FLB, and the independent startup of data frame sending with or without RFLB and I FLB, which helps to simplify the chip testing process and supports regular self-testing after the product is launched on the market, while providing flexible options for selecting the execution of the security mechanism.

[0103] It can be understood that through the above embodiments, the method of the present application allows for rapid self-checking after the chip is powered on, improves production efficiency, supports regular self-checking after the product is launched, ensures long-term stable operation of the chip, and can independently start the safety mechanisms of RFLB and I FLB, as well as flexibly select the data frame sending type, providing higher operational flexibility and allowing the execution of the safety mechanism to be adjusted according to actual needs. In addition, when an abnormality occurs, the system can send an interrupt signal to the CPU in a timely manner, quickly respond to and handle potential faults, and improve the system's response speed and fault handling capabilities.

[0104] To achieve the above-mentioned purpose, a second aspect of an embodiment of the present application provides a self-test device for a transceiver circuit of an automotive-grade chip, the device being applied to an automotive-grade chip, the automotive-grade chip including an RFLB loop and an I FLB loop, the device including: a power-on detection module, for obtaining and comparing the frequency and amplitude information corresponding to the RFLB loop in the on and off states after the automotive-grade chip is powered on, so as to verify the RFLB function; obtaining and comparing the frequency and amplitude information corresponding to the I FLB loop in the on and off states, so as to verify the I FLB function; an activation detection module, for activating the RFLB loop and the I FLB loop after the RFLB function and the I FLB function are verified, obtaining the radio frequency signal information corresponding to the RFLB loop, and determining the working state of the RFLB loop according to the radio frequency signal information, obtaining the intermediate frequency signal information corresponding to the I FLB loop, and determining the working state of the I FLB loop according to the intermediate frequency signal information; a data sending module, for sending data frames based on the RFLB loop and the I FLB loop when both the RFLB loop and the I FLB loop are in normal operating states.

[0105] Some embodiments of the present application provide an electronic device, Fig.10 A schematic diagram of the structure of an electronic device provided in an embodiment of the present application, referring to Fig.10 The electronic device includes a memory, a processor, and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, the self-test method of the automotive-grade chip transceiver circuit of any of the above embodiments is implemented, for example, the self-test method described above is implemented. Figure 1 Steps S110 to S140 of the method, Figure 4 Steps S410 to S430 of the method, Figure 5 In method step S510, Figure 6 Steps S610 to S630 of the method, Figure 7 In method step S710, Figure 8 Method steps S810 to S840.

[0106] The electronic device 1000 of the embodiment of the present application includes one or more processors 1010 and a memory 1020. Fig.10 In the figure, a processor 1010 and a memory 1020 are taken as an example.

[0107] The processor 1010 and the memory 1020 may be connected via a bus or other means. Fig.10 The example of connecting through bus is taken in the following.

[0108] The memory 1020, as a non-transitory computer-readable storage medium, can be used to store non-transitory software programs and non-transitory computer executable programs. In addition, the memory 1020 may include a high-speed random access memory, and may also include a non-transitory memory, such as at least one disk storage device, a flash memory device, or other non-transitory solid-state storage device. In some embodiments, the memory 1020 may optionally include a memory 1020 remotely disposed relative to the processor 1010, and these remote memories may be connected to the electronic device 1000 via a network. At the same time, examples of the above-mentioned network include but are not limited to the Internet, an intranet, a local area network, a mobile communication network, and a combination thereof.

[0109] In some embodiments, when the processor executes a computer program, the self-test method for the automotive-grade chip transceiver circuit of any one of the above embodiments is performed at preset intervals.

[0110] Those skilled in the art will understand that Fig.10 The device structure shown in the figure does not constitute a limitation on the electronic device 1000, and may include more or less components than shown in the figure, or combine certain components, or arrange the components differently.

[0111] exist Fig.10 In the electronic device 1000 shown, the processor 1010 can be used to call the self-test method of the automotive-grade chip transceiver circuit stored in the memory 1020, thereby implementing the self-test method of the automotive-grade chip transceiver circuit.

[0112] Based on the hardware structure of the above-mentioned electronic device 1000, various embodiments of the self-test device for the automotive-grade chip transceiver circuit of the present application are proposed. At the same time, the non-transient software programs and instructions required to implement the self-test method for the automotive-grade chip transceiver circuit of the above-mentioned embodiments are stored in the memory. When executed by the processor, the self-test method for the automotive-grade chip transceiver circuit of the above-mentioned embodiments is executed.

[0113] The embodiment of the present application also provides a computer-readable storage medium, which stores computer-executable instructions, which are used to execute the self-test method of the automotive-grade chip transceiver circuit described above, and can enable the one or more processors to execute the self-test method of the automotive-grade chip transceiver circuit described above in any of the above embodiments, for example, to execute the self-test method of the automotive-grade chip transceiver circuit described above. Figure 1 Steps S110 to S140 of the method, Figure 4 Steps S410 to S430 of the method, Figure 5 In method step S510, Figure 6 Steps S610 to S630 of the method, Figure 7 In method step S710, Figure 8 Method steps S810 to S840.

[0114] The embodiment of the present application also provides a computer program product, which includes a computer program, which is stored in a computer-readable storage medium. The processor of the computer device reads the computer program from the computer-readable storage medium, and the processor executes the computer program, so that the computer device executes the self-test method of the automotive-grade chip transceiver circuit implementing any one of the above embodiments, for example, executing the above described Figure 1 Steps S110 to S140 of the method, Figure 4 Steps S410 to S430 of the method, Figure 5 In method step S510, Figure 6 Steps S610 to S630 of the method, Figure 7 In method step S710, Figure 8 Method steps S810 to S840.

[0115] It will be appreciated by those skilled in the art that all or some of the steps and systems in the disclosed method above may be implemented as software, firmware, hardware and appropriate combinations thereof. Some physical components or all physical components may be implemented as software executed by a processor, such as a central processing unit, a digital signal processor or a microprocessor, or may be implemented as hardware, or may be implemented as an integrated circuit, such as an application specific integrated circuit. Such software may be distributed on a computer-readable medium, which may include a computer-readable storage medium (or a non-transitory medium) and a communication medium (or a temporary medium). As known to those skilled in the art, the term computer-readable storage medium includes volatile and non-volatile, removable and non-removable media implemented in any method or technology for storing information (such as computer-readable instructions, data structures, program modules or other data). Computer-readable storage media include, but are not limited to, RAM, ROM, EEPROM, flash memory or other memory technologies, CD to ROM, digital versatile disk (DVD) or other optical disk storage, magnetic cassettes, magnetic tapes, disk storage or other magnetic storage devices, or any other medium that may be used to store desired information and may be accessed by a computer. In addition, it is well known to those skilled in the art that communication media typically include computer-readable instructions, data structures, program modules, or other data in modulated data signals such as carrier waves or other transmission mechanisms, and may include any information delivery media. The above is a specific description of the preferred implementation of the present application, but the present application is not limited to the above implementation mode. Those skilled in the art may make various equivalent modifications or substitutions without violating the spirit of the present application, and these equivalent modifications or substitutions are all included in the scope defined by the claims of the present application.

Claims

1. A self-test method for a transceiver circuit of an automotive-grade chip, characterized in that: The method is applied to an automotive-grade chip, the automotive-grade chip includes an RFLB loop and an IFLB loop, and the method includes: After the automotive-grade chip is powered on, the frequency and amplitude information corresponding to the RFLB loop in the open and closed states are obtained and compared to verify the RFLB function; the frequency and amplitude information corresponding to the IFLB loop in the open and closed states are obtained and compared to verify the IFLB function; After the verification of the RFLB function and the IFLB function is completed, the RFLB loop and the IFLB loop are activated, the radio frequency signal information corresponding to the RFLB loop is obtained, and the working state of the RFLB loop is determined according to the radio frequency signal information, and the intermediate frequency signal information corresponding to the IFLB loop is obtained, and the working state of the IFLB loop is determined according to the intermediate frequency signal information; When both the RFLB loop and the IFLB loop are in a normal operating state, data frames are sent based on the RFLB loop and the IFLB loop.

2. The self-test method for the automotive-grade chip transceiver circuit according to claim 1, characterized in that: The obtaining and comparing the frequency and amplitude information corresponding to the RFLB loop being turned on and turned off to verify the RFLB function includes: When the RFLB loop is in an on state, collecting data from a corresponding analog-to-digital converter and performing a fast Fourier transform to obtain first frequency and amplitude information; In the closed state of the RFLB loop, the data of the analog-to-digital converter is collected again and a fast Fourier transform is performed to obtain second frequency and amplitude information; If the first frequency and amplitude information and the second frequency and amplitude information both meet the corresponding preset ranges, it is determined that the RFLB function verification is completed; if not, the automotive-grade chip is controlled to perform an interrupt action.

3. The self-test method for the automotive-grade chip transceiver circuit according to claim 2, characterized in that: If the first frequency and amplitude information and the second frequency and amplitude information both meet the corresponding preset ranges, determining that the RFLB function verification is completed includes: When the first frequency in the first frequency and amplitude information conforms to the first frequency range, the first amplitude in the first frequency and amplitude information is greater than the first amplitude threshold, and the second amplitude in the second frequency and amplitude information is less than the second amplitude threshold, it is determined that the RFLB function verification is completed.

4. The self-test method for the automotive-grade chip transceiver circuit according to claim 1, characterized in that: The obtaining and comparing the frequency and amplitude information corresponding to the IFLB loop in the on and off states to verify the IFLB function includes: When the IFLB loop is in an open state, data of the corresponding analog-to-digital converter is collected and a fast Fourier transform is performed to obtain third frequency and amplitude information; In the closed state of the IFLB loop, the data of the analog-to-digital converter is collected again and a fast Fourier transform is performed to obtain fourth frequency and amplitude information; If the third frequency and amplitude information and the fourth frequency and amplitude information both meet the corresponding preset ranges, it is determined that the IFLB function verification is completed; if not, the automotive-grade chip is controlled to perform an interrupt action.

5. The self-test method for the automotive-grade chip transceiver circuit according to claim 4, characterized in that: If the third frequency and amplitude information and the fourth frequency and amplitude information both meet the corresponding preset ranges, determining that the IFLB function verification is completed includes: When the third frequency in the third frequency and amplitude information conforms to the second frequency range, the third amplitude in the third frequency and amplitude information is greater than the third amplitude threshold, and the fourth amplitude in the fourth frequency and amplitude information is less than the fourth amplitude threshold, it is determined that the IFLB function verification is completed.

6. The self-test method for the automotive-grade chip transceiver circuit according to claim 1, characterized in that: The obtaining of radio frequency signal information corresponding to the RFLB loop, and determining the working state of the RFLB loop according to the radio frequency signal information, and the obtaining of intermediate frequency signal information corresponding to the IFLB loop, and determining the working state of the IFLB loop according to the intermediate frequency signal information, include: Collecting data from an analog-to-digital converter corresponding to the RFLB loop and performing a fast Fourier transform to obtain radio frequency information of the radio frequency signal; Comparing the radio frequency information with a preset first standard value, and if the difference is within a first target range, determining that the RFLB loop is in a normal operating state; Collecting data from an analog-to-digital converter corresponding to the IFLB loop and performing a fast Fourier transform to obtain intermediate frequency information of an intermediate frequency signal; The intermediate frequency information is compared with a preset second standard value, and if the difference is within a second target range, it is determined that the IFLB loop is in a normal operating state.

7. The self-test method for the automotive-grade chip transceiver circuit according to claim 1, characterized in that: The sending of data frames based on the RFLB loop and the IFLB loop includes: Get the target sending requirements input by the user; Sending multiple data frames according to the target sending requirement; Alternatively, according to the target transmission requirement, the working status of the RFLB loop and the IFLB loop is determined again, and the next data frame is transmitted.

8. A self-test device for a transceiver circuit of an automotive-grade chip, characterized in that: The device is applied to a vehicle-grade chip, the vehicle-grade chip includes an RFLB loop and an IFLB loop, and the device includes: A power-on detection module, used for obtaining and comparing the frequency and amplitude information corresponding to the on and off states of the RFLB loop after the automotive-grade chip is powered on, so as to verify the RFLB function; obtaining and comparing the frequency and amplitude information corresponding to the on and off states of the IFLB loop, so as to verify the IFLB function; An activation detection module is used to activate the RFLB loop and the IFLB loop after the verification of the RFLB function and the IFLB function is completed, obtain the radio frequency signal information corresponding to the RFLB loop, and determine the working state of the RFLB loop according to the radio frequency signal information, obtain the intermediate frequency signal information corresponding to the IFLB loop, and determine the working state of the IFLB loop according to the intermediate frequency signal information; The data sending module is used to send data frames based on the RFLB loop and the IFLB loop when both the RFLB loop and the IFLB loop are in a normal operating state.

9. An electronic device, characterized in that: include: at least one processor; at least one memory for storing at least one program; When at least one of the programs is executed by at least one of the processors, the self-test method for the automotive-grade chip transceiver circuit as described in any one of claims 1 to 7 is implemented.

10. A computer-readable storage medium storing computer-executable instructions, wherein the computer-executable instructions are used to execute the self-test method for the automotive-grade chip transceiver circuit as described in any one of claims 1 to 7.

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