Surface insulation coating method of bonding wire

Abstract

The invention relates to the technical field of integrated circuit packaging, and discloses a surface insulation coating method of a bonding wire, which comprises the following steps of: 1, forming a gold plating layer in a chip mounting area of a ceramic shell; 2, forming an Al coating on the bonding surface of the bare chip of the integrated circuit, and scribing the wafer into an independent chip; step 3, dispensing epoxy resin in a bonding area of the ceramic packaging shell, pasting a chip at a bonding position, and then performing high-temperature curing; 4, connecting the bare chip PAD with the packaging shell bonding finger by adopting a bonding wire; 5, carrying out integral insulation coating on all bonding wires in the device by adopting a micromolecule coating material; step 6, performing high-temperature baking treatment before sealing; and seventhly, sealing and covering are conducted on parallel seam welding equipment, and packaging of the integrated circuit device is completed. According to the bonding wire insulation coating method, after the bonding process is completed, the bonding wire is subjected to overall or local coating treatment, and then a uniform and compact protective coating is formed.

Description

Technical Field

[0001] The invention relates to the technical field of integrated circuit packaging, and in particular to a surface insulation coating method suitable for bonding wires inside hybrid integrated circuits. Background Art

[0002] For semiconductor integrated circuits (ICs), thick / thin film hybrid integrated circuits (HICs), multi-chip modules (MCMs) and other microelectronic devices, the internal bare chip and the package shell are generally interconnected by bonding wires of 18μm to 50μm to achieve functional interconnection between the bare chip PAD and the package shell pins, where the bonding wires include gold wires, aluminum wires, copper wires, silver wires, etc. For large-scale integrated circuit devices with small bonding wire spacing (10μm to 50μm) and large numbers (IO ≥ 2000), such as FPGAs, memories, SiP modules, etc., since the bonding wires are made of conductive metal materials, in the subsequent device packaging production, testing, and use, especially under test conditions such as mechanical shock and random vibration, it is easy for bonding wires with different potentials to unexpectedly overlap and short-circuit, causing crosstalk and interruption of data processing inside the device, and even causing device function failure.

[0003] The insulation coating of the bonding wire inside the hybrid integrated circuit is generally done by the packaging factory using plastic encapsulation or potting, that is, using organic adhesive materials to form a partial or full encapsulation to ensure the insulation and fixation of the bare chip, bonding wire, etc. inside the device. However, due to the presence of organic adhesives, there are often large stress problems, and process problems such as stratification and voids at the bonding interface are prone to occur, resulting in limited application of devices using plastic encapsulation or potting processes in the field of high reliability.

[0004] With the urgent demand for bonding wire surface insulation coating technology in the field of high-reliability semiconductor integrated circuits and hybrid integrated circuits, and the stress matching problem of conventional plastic encapsulation or potting methods, it is urgent to study a method suitable for the surface insulation coating of bonding wires inside hybrid integrated circuits. Summary of the invention

[0005] The purpose of the present invention is to overcome the shortcomings of the prior art and provide a method for surface insulation coating of a bonding wire.

[0006] In order to achieve the above object, the technical solution of the present invention is: a method for surface insulation coating of bonding wire, comprising the following steps:

[0007] The first step is to form a gold plating layer on the ceramic shell mounting area;

[0008] The second step is to form an Al coating on the bonding surface of the bare IC chip and then slice the wafer into independent chips.

[0009] The third step is to apply epoxy resin on the bonding area of ​​the ceramic package shell, use an automatic chip mounter to place the chip on the bonding position, and then perform high-temperature curing;

[0010] The fourth step is to use gold wire ball bonding or aluminum wire wedge bonding process to connect the bare chip PAD with the package shell bonding finger using bonding wire according to the design drawing requirements;

[0011] The fifth step is to use small molecule coating materials to perform overall insulation coating on all bonding wires inside the device;

[0012] Step 6: High temperature baking treatment before sealing;

[0013] The seventh step is to perform capping in parallel seam welding equipment to complete the packaging of the integrated circuit device.

[0014] Furthermore, the thickness of the gold-plated layer in the first step is 0.8 μm to 2 μm.

[0015] Further, the thickness of the Al coating in the second step is ~1μm.

[0016] Furthermore, the epoxy resin in the third step is a silver-containing epoxy resin, wherein the silver content is 70% to 95%, and the curing temperature is 120°C to 160°C.

[0017] Furthermore, the bonding wire in the fourth step is a gold wire or an aluminum wire, and the diameter of the bonding wire is 18μm to 40μm.

[0018] Furthermore, the coating material in the fifth step is a fluorine-containing benzene organic substance with a material purity of ≥99.9%. After coating, it undergoes pretreatment, material sublimation, high-temperature decomposition, and low-temperature polymerization reaction in sequence to form a dense coating layer on the surface of the bonding wire.

[0019] Furthermore, the fluorine-containing benzene organic compound is selected from one of 5-bromo-2-fluoro-1,3-dimethylbenzene, 2,4-difluorotoluene and 1,5-dibromo-2,4-difluorobenzene.

[0020] Further, after coating, plasma activation treatment is performed in sequence, and the vacuum degree is ≤4×10 -2 The material was treated under vacuum conditions of mbar for 16 hours, the temperature was raised from room temperature to 150°C for 12 hours, and maintained at 150°C for 5 hours for material sublimation, the temperature was raised from 700°C to 850°C for 16 hours for high-temperature decomposition, then dropped to 0°C, and then raised from 0°C to 45°C for 16 hours for low-temperature polymerization reaction to form a dense coating layer on the surface of the bonding wire.

[0021] Furthermore, the baking treatment temperature in the sixth step is 120°C to 150°C, and the time is 12h to 24h.

[0022] Beneficial effects of the present invention:

[0023] (1) The coating material selected in the present invention is a fluorine-containing benzene organic substance with a temperature resistance range of -200°C to 350°C, which is much higher than the use requirements of conventional bonding wire surface insulation plastic sealing or potting (-45°C to 85°C), thereby improving the temperature resistance and reliability of the device;

[0024] (2) The bonding wire insulation coating method of the present invention has good compatibility with the existing packaging process. It is not necessary to pre-treat the bonding wire before the device packaging production. It only needs to perform overall or partial coating after the bonding process is completed to form a uniform and dense protective coating.

[0025] (3) The insulating coating formed by the present invention has high coating adhesion, is transparent and colorless, and has great advantages in terms of device optical characteristic indicators;

[0026] (4) The coating process window is wide and the process implementation is flexible. Coating layers of different thicknesses can be produced according to the device packaging characteristics requirements, such as withstand voltage, reflection / refractive index, etc. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Figure 1 It is a schematic diagram of the internal bonding wire of the semiconductor integrated circuit of the present invention. DETAILED DESCRIPTION

[0028] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0029] Example:

[0030] As shown, a method for surface insulation coating of a bonding wire comprises the following steps:

[0031] The first step is to form a gold plating layer on the ceramic shell mounting area, wherein the thickness of the gold plating layer is 0.8 μm to 2 μm.

[0032] In the second step, a layer of Al coating is formed on the bonding surface of the bare semiconductor integrated circuit chip, and the wafer is diced into independent chips. The thickness of the bare chip is 250μm to 350μm, the chip size is 5mm×5mm, and the thickness of the Al coating on the bonding area is ~1μm;

[0033] The third step is to apply silver-containing epoxy resin with a silver content of 90% on the bonding area of ​​the ceramic package shell, and use an automatic chip mounter to pick up and mount the bare chip, and then put it into a high-temperature curing oven, heated to 150°C under a nitrogen protective atmosphere, maintained for 1 hour, and then cooled to room temperature to complete the bonding and fixing of the chip;

[0034] The fourth step is wire bonding of the bare chip to the package shell, such as Figure 1 , using fully automatic gold wire bonding equipment, the diameter of the bonding wire 1 is 18μm, the chip end PAD spacing is 25μm, and the bonding wire is gold wire;

[0035] In the fifth step, 2,4-difluorotoluene is used to perform overall insulation coating on all bonding wires 1 inside the device. After coating, plasma activation treatment is performed in sequence. -2 mbar vacuum condition for 16 hours, heating from room temperature to 150°C for 12 hours, maintaining at 150°C for 5 hours for material sublimation, heating from 700°C to 850°C for 16 hours for high temperature decomposition, then dropping to 0°C, and then heating from 0°C to 45°C for 16 hours for low temperature polymerization reaction, to form a dense coating layer on the surface of bonding wire 1;

[0036] Step 6: Baking at 150°C for 12 hours before sealing;

[0037] The seventh step is to perform capping in parallel seam welding equipment to complete the packaging of the integrated circuit device.

[0038] Compare the visual inspection quality of semiconductor integrated circuit bare chips before and after bonding, observe the uniform overflow of adhesive around the chip under a 30x to 50x microscope, and perform X-ray inspection at the same time. The chip bonding void rate is within 10%, meeting the relevant requirements of GJB548B-2005. Compare the quality of the insulation on the bonding wire surface, and inspect the appearance defects of the coating layer. The coating is uniform without defects such as bubbles, cracks, and pinholes.

[0039] The present invention can realize surface insulation coating of internal bonding wires in the packaging production process of microelectronic devices such as semiconductor integrated circuits and hybrid integrated circuits, is suitable for customized, automated and mass production, and significantly improves production quality and consistency.

[0040] The above-described embodiments are only preferred solutions of the present invention and are not intended to limit the present invention in any form. Other variations and modifications are possible without exceeding the technical solutions described in the claims.

[0041] In the description of the present invention, it is necessary to understand that the terms indicating orientation or positional relationship are based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present invention.

Claims

1. A method for surface insulation coating of a bonding wire, characterized in that: The following steps are involved: The first step is to form a gold plating layer on the ceramic shell mounting area; The second step is to form an Al coating on the bonding surface of the bare IC chip and then slice the wafer into independent chips. The third step is to apply epoxy resin on the bonding area of ​​the ceramic package shell, use an automatic chip mounter to place the chip on the bonding position, and then perform high-temperature curing; The fourth step is to use bonding wire to connect the bare chip PAD with the package shell bonding finger; The fifth step is to use small molecule coating materials to perform overall insulation coating on all bonding wires inside the device; Step 6: High temperature baking treatment before sealing; The seventh step is to perform capping in parallel seam welding equipment to complete the packaging of the integrated circuit device.

2. The method for surface insulation coating of bonding wire according to claim 1, characterized in that: The thickness of the gold-plated layer in the first step is 0.8 μm to 2 μm.

3. The method for surface insulation coating of bonding wire according to claim 1, characterized in that: The thickness of the Al coating in the second step is 4. The method for surface insulation coating of bonding wire according to claim 1, characterized in that: The epoxy resin in the third step is a silver-containing epoxy resin, wherein the silver content is 70% to 95%, and the curing temperature is 120° C. to 160° C.

5. The method for surface insulation coating of bonding wire according to claim 1, characterized in that: The bonding wire in the fourth step is a gold wire or an aluminum wire, and the diameter of the bonding wire is 18 μm to 40 μm.

6. The method for surface insulation coating of bonding wire according to claim 1, characterized in that: The coating material in the fifth step is a fluorine-containing benzene organic substance with a material purity of ≥99.9%. After coating, it undergoes pretreatment, material sublimation, high-temperature decomposition, and low-temperature polymerization reaction in sequence to form a dense coating layer on the surface of the bonding wire.

7. The method for surface insulation coating of bonding wire according to claim 6, characterized in that: The fluorine-containing benzene organic compound is selected from one of 5-bromo-2-fluoro-1,3-xylene, 2,4-difluorotoluene and 1,5-dibromo-2,4-difluorobenzene.

8. The method for surface insulation coating of bonding wire according to claim 6, characterized in that: After coating, plasma activation treatment is carried out in sequence, and the vacuum degree is ≤4×10 -2 The material was treated under vacuum conditions of mbar for 16 hours, the temperature was raised from room temperature to 150°C for 12 hours, and maintained at 150°C for 5 hours for material sublimation, the temperature was raised from 700°C to 850°C for 16 hours for high-temperature decomposition, then dropped to 0°C, and then raised from 0°C to 45°C for 16 hours for low-temperature polymerization reaction to form a dense coating layer on the surface of the bonding wire.

9. The method for surface insulation coating of bonding wire according to claim 1, characterized in that: The baking treatment temperature in the sixth step is 120° C. to 150° C., and the time is 12 h to 24 h.

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