Composite waveguide structure and preparation method

Abstract

The invention provides a composite waveguide structure and a preparation method, and relates to the technical field of semiconductor processing, the composite waveguide structure comprises a waveguide wafer, the waveguide wafer comprises a Si substrate layer, a SiO2 layer arranged on the top surface of the Si substrate layer, a waveguide structure, a metal electrode and at least one bonding groove, the waveguide structure and the metal electrode are arranged in the SiO2 layer, and the layer position of the waveguide structure is higher than the layer position of the metal electrode; the bonding groove is formed in the SiO2 layer and located above the waveguide structure of the to-be-bonded area; the electro-optical thin film layers correspond to the bonding grooves in a one-to-one mode and are bonded in the corresponding bonding grooves, and the electro-optical thin film layers and the waveguide structures below the corresponding bonding grooves form a composite waveguide structure. During bonding, the electro-optical thin film layer is pressed into the bonding groove after the supporting connection points are broken through a pressing technology, so that the processing of the composite waveguide structure in the small-size hole is realized.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor processing technology, and in particular to a composite waveguide structure and a preparation method thereof. Background Art

[0002] Optical communications, radio frequency photonic systems, millimeter wave measuring instruments and other equipment using optical devices have increasingly higher requirements for bandwidth. In semiconductor photonic modulators, the limitation of electron carrier transmission time fundamentally affects the high-frequency working characteristics of diode-based electro-optic modulators (EOM), which has aroused great interest in the research of materials with high-frequency electro-optic modulation characteristics. Lithium niobate (LN) has attracted extensive attention in integrated optics due to its superior electro-optical and nonlinear optical properties. Its Mach-Zehnder modulators (MZM) heterogeneously integrated with silicon or waveguide structures have been proven to achieve very high modulation bandwidths and can support high-frequency modulation far exceeding 100 GHz.

[0003] The processing method of this electro-optic modulator is preferably compatible with the traditional CMOS process used in silicon photonic devices, so as to obtain higher performance, lower cost and better manufacturing scalability. For the electro-optic modulation (composite waveguide) structure composed of thin-film lithium niobate and silicon nitride, it can usually be realized by die-to-wafer (D2W), wafer-to-wafer (W2W) and chip-to-chip (Die-to-die) bonding methods.

[0004] It can be seen from the prior art that the chemical mechanical polishing method (CMP) flattens the entire surface of the wafer, resulting in poor process structure compatibility between the bonding area (the area that needs to form a composite waveguide with LN) and the non-bonding area (e.g., the SiO2 in the bonding area needs to be thin enough <150nm as the interlayer spacing of the LN-SiNx composite waveguide, and the SiO2 in the non-bonding area needs to be thick enough >1μm as the cladding layer of the independent SiNx waveguide), which limits the diversity of device structures and functions that can be processed on the same wafer. In fact, for heterogeneous integration technology using traditional bonding methods, whether W2W, D2W or D2D, as well as micro-transfer technology suitable for integrating smaller chip sizes, they are all implemented on the surface of the bonded sample, which limits their application on chip samples with special structures (such as grooves). Summary of the invention

[0005] In view of this, the embodiments of this specification provide a composite waveguide structure and a preparation method, which have achieved the purpose of solving the lack of diversity in the same wafer and the limited application of special structures in chips.

[0006] The embodiments of this specification provide the following technical solutions:

[0007] A composite waveguide structure, comprising:

[0008] A waveguide wafer, the waveguide wafer comprising a Si substrate layer, a SiO2 layer arranged on the top surface of the Si substrate layer, a waveguide structure, a metal electrode and at least one bonding groove, wherein the waveguide structure and the metal electrode are arranged in the SiO2 layer and the layer position of the waveguide structure is higher than the layer position of the metal electrode;

[0009] The bonding groove is arranged in the SiO2 layer and is located above the waveguide structure in the area to be bonded;

[0010] The electro-optical film layer corresponds to the bonding groove one by one and is bonded in the corresponding bonding groove. The electro-optical film layer and the waveguide structure below the corresponding bonding groove constitute a composite waveguide structure, wherein the electro-optical film layer is in the electro-optical film wafer, and adjacent electro-optical film layers are connected through supporting connection points formed by SiO2 processing. During bonding, the supporting connection points are broken by pressing down technology and then the electro-optical film layer is pressed into the bonding groove.

[0011] Furthermore, the thickness of SiO2 between the bottom surface of the bonding groove and the top surface of the waveguide structure in the area to be bonded is less than 150 nm.

[0012] A method for preparing a composite waveguide structure, comprising:

[0013] Processing and preparing a waveguide layer including a metal electrode and a waveguide structure, and processing and preparing a metal electrode and a thermal adjustment structure in the waveguide layer;

[0014] Processing at least one bonding groove above the waveguide structure to generate a waveguide wafer including the bonding groove;

[0015] Processing to produce an electro-optical thin film wafer including an electro-optical thin film layer;

[0016] One side of the electro-optic film layer of the electro-optic film wafer is facing the bonding groove and the electro-optic film layer corresponds to the bonding groove of the waveguide wafer one by one. The electro-optic film layer is pressed into the bonding groove for bonding using the press-down bonding technology, so that the electro-optic film layer and the waveguide structure below the corresponding bonding groove form a composite waveguide.

[0017] Further, a waveguide layer including a metal electrode and a waveguide structure is processed and prepared, and a metal electrode and a thermal adjustment structure are processed and prepared in the waveguide layer including the metal electrode and the waveguide structure, including: preparing a first SiO2 layer on a Si substrate layer;

[0018] Prepare a metal film on the upper layer of the first SiO2 layer, and process the metal film to generate at least one metal electrode;

[0019] Depositing a first SiO2 passivation layer on the metal electrode and performing a planarization process on the first SiO2 passivation layer;

[0020] Depositing a waveguide film on the upper layer of the first SiO2 passivation layer to form a waveguide structure;

[0021] Depositing a first SiO2 waveguide cladding layer on the upper layer of the waveguide structure, and flattening the first SiO2 waveguide cladding layer until the thickness of the first SiO2 waveguide cladding layer located on the upper layer of the waveguide structure is 1 μm to 3 μm;

[0022] Etching above the metal electrode in the SiO2 layer to generate interconnection through holes, filling the interconnection through holes to generate through-hole metal, and planarizing the through-hole metal;

[0023] A metal film is prepared on the upper layer of the SiO2 layer and patterned to form a metal electrode, and a TiN layer is deposited on the upper layer of the metal electrode and patterned to form a thermal adjustment structure;

[0024] Depositing a second SiO2 passivation layer on the upper layer of the thermal adjustment structure, and performing a planarization process on the second SiO2 passivation layer, wherein the first SiO2 layer, the first SiO2 passivation layer, the first SiO2 waveguide cladding layer, and the second SiO2 passivation layer constitute a SiO2 layer;

[0025] The pin pad holes are etched above the metal electrodes.

[0026] Further, at least one bonding groove is processed above the waveguide structure to generate a waveguide wafer including the bonding groove, including:

[0027] A bonding groove is generated by etching the SiO2 layer above the waveguide structure, so that the remaining thickness of the SiO2 layer above the waveguide structure is less than 150 nm.

[0028] Furthermore, a planar size of the bonding groove is greater than 1 μm×1 μm.

[0029] Further, the electro-optical thin film wafer including the electro-optical thin film layer is processed and manufactured, including:

[0030] Processing and preparing a LNOI substrate, wherein the LNOI substrate comprises, from bottom to top, a Si base layer, a second SiO2 layer and an electro-optical thin film layer;

[0031] Performing electro-optic thin film wafer patterning on the LNOI substrate, and using the electro-optic thin film layer covered with the hard mask as the electro-optic thin film wafer;

[0032] Depositing a second SiO2 waveguide cladding layer on the upper layer of the electro-optical thin film wafer, and performing a planarization process on the second SiO2 waveguide cladding layer, wherein the second SiO2 and the second SiO2 waveguide cladding layer constitute a SiO2 layer;

[0033] Etching in the SiO2 layer until bonding alignment holes and supporting connection points are generated between the SiO2 layer and the Si substrate layer;

[0034] The hard mask is removed and processed into an electro-optical film wafer containing bonding alignment holes.

[0035] Further, the LNOI substrate is subjected to electro-optical thin film wafer patterning processing, and the electro-optical thin film layer covered with the hard mask is used as an electro-optical thin film wafer, including:

[0036] Depositing a hard mask on the LNOI substrate, wherein the material of the hard mask includes amorphous silicon and / or chromium;

[0037] According to the position of the electro-optic thin film wafer, the hard mask is first dry-etched after photolithography, and then the electro-optic thin film layer is etched to form the electro-optic thin film wafer.

[0038] Further, the electro-optical thin film layer is pressed into the bonding groove for bonding by using a push-down bonding technology, including:

[0039] The electro-optical film wafer is bonded to the waveguide wafer with one side of the electro-optical film layer of the electro-optical film wafer facing the bonding groove and the electro-optical film layer corresponding to the bonding groove of the waveguide wafer one by one, to generate an initial bonded wafer;

[0040] Removing the Si substrate layer of the electro-optical thin film wafer in the initial bonding wafer, so that adjacent electro-optical thin film layers are connected through supporting connection points to form a suspended structure;

[0041] Using a pressing tool, press down the suspended structure of the electro-optical thin film wafer in the initial bonded wafer to break the suspended structure from the supporting connection point;

[0042] The suspended structure is moved down to the bottom of the bonding groove of the waveguide wafer in the initial bonding wafer, and the electro-optical film layer is bonded to the bonding bottom to generate a composite waveguide.

[0043] Furthermore, the pressing tool is a pressing tool comprising a microneedle array, and the material of the microneedle array is a soft elastic material.

[0044] Compared with the prior art, the at least one technical solution adopted in the embodiments of this specification can achieve the following beneficial effects:

[0045] By processing and manufacturing the supporting connection points of the electro-optical thin film wafer, it is suspended above the groove of the bonding area of ​​the waveguide structure, and then vertically pressed down to break the electro-optical thin film layer of the electro-optical thin film wafer from the connection point, thereby bonding the electro-optical thin film wafer to the bottom of the groove, and realizing the processing of the composite waveguide structure in the small-sized gap; in addition, the groove is located above the waveguide structure in the bonding area, so that the cladding layer thickness and functional structure of the waveguide structure in the bonding area and the non-bonding area can be different, which improves the process structure compatibility of the bonding area and the non-bonding area, and the electro-optical thin film layer is bonded in the groove structure to realize the composite waveguide structure of the electro-optical thin film layer and the waveguide structure below the groove, which limits the requirement for flattening the surface of the entire waveguide wafer to the requirement for flattening the bottom of the groove in the bonding area, thereby improving the process processing flexibility and expanding the application scope and scenarios of the D2W heterogeneous integration technology. BRIEF DESCRIPTION OF THE DRAWINGS

[0046] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0047] Figure 1 is a schematic diagram of the overall structure of a composite waveguide according to an embodiment of the present invention;

[0048] Figure 2 is a flow chart of a method for preparing a composite waveguide according to an embodiment of the present invention;

[0049] Figure 3 is one of the flow charts of processing a waveguide wafer according to an embodiment of the present invention;

[0050] Figure 4 This is the second flow chart of processing a waveguide wafer according to an embodiment of the present invention;

[0051] Figure 5 This is the third flow chart of processing a waveguide wafer according to an embodiment of the present invention;

[0052] Figure 6 This is the fourth flow chart of processing a waveguide wafer according to an embodiment of the present invention;

[0053] Figure 7 This is the fifth flow chart of processing a waveguide wafer according to an embodiment of the present invention;

[0054] Figure 8 This is the sixth flow chart of processing a waveguide wafer according to an embodiment of the present invention;

[0055] Fig. 9 This is the seventh flow chart of processing a waveguide wafer according to an embodiment of the present invention;

[0056] Fig.10 This is the eighth flow chart of processing a waveguide wafer according to an embodiment of the present invention;

[0057] Fig.11 This is the ninth flowchart of processing a waveguide wafer according to an embodiment of the present invention;

[0058] Fig.12 is the tenth flowchart of processing a waveguide wafer according to an embodiment of the present invention;

[0059] Fig.13 This is the eleventh flowchart of processing a waveguide wafer according to an embodiment of the present invention;

[0060] Fig.14 This is the twelfth flow chart of processing a waveguide wafer according to an embodiment of the present invention;

[0061] Fig.15 This is the thirteenth flow chart of processing a waveguide wafer according to an embodiment of the present invention;

[0062] Fig.16 This is the fourteenth flow chart of processing a waveguide wafer according to an embodiment of the present invention;

[0063] Fig.17 This is the fifteenth flowchart of processing a waveguide wafer according to an embodiment of the present invention;

[0064] Fig.18 This is one of the flow charts of processing an electro-optical thin film wafer according to an embodiment of the present invention;

[0065] Fig.19 This is the second flow chart of processing an electro-optical thin film wafer according to an embodiment of the present invention;

[0066] Fig. 20 This is the third flow chart of processing an electro-optical thin film wafer according to an embodiment of the present invention;

[0067] Fig.21 This is the fourth flow chart of processing an electro-optical thin film wafer according to an embodiment of the present invention;

[0068] Fig. 22 yes Fig.21 A top view of

[0069] Fig.23 This is the fifth flow chart of processing an electro-optical thin film wafer according to an embodiment of the present invention;

[0070] Fig.24 yes Fig.23 A top view of

[0071] Fig.25 is one of the flow charts for processing a composite waveguide according to an embodiment of the present invention;

[0072] Fig.26This is the second flow chart of processing a composite waveguide according to an embodiment of the present invention;

[0073] Fig. 27 This is the third flow chart of processing a composite waveguide according to an embodiment of the present invention;

[0074] Fig.28 This is the fourth flow chart of processing a composite waveguide according to an embodiment of the present invention.

[0075] Reference numerals in the figure: 1. Si substrate layer; 2. SiO2 layer; 201. first SiO2 layer; 202. first SiO2 passivation layer; 203. first SiO2 waveguide cladding; 204. second SiO2 passivation layer; 205. second SiO2 layer; 206. second SiO2 waveguide cladding; 3. metal electrode; 4. waveguide structure; 5. interconnection through hole; 6. through hole metal; 7. TiN layer; 8. pin pad hole; 9. bonding groove; 10. electro-optical thin film layer; 11. hard mask; 12. bonding alignment hole. DETAILED DESCRIPTION

[0076] The embodiments of the present application are described in detail below with reference to the accompanying drawings.

[0077] It should be noted that, in the absence of conflict, the embodiments and features in the embodiments of the present application can be combined with each other. The present invention will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.

[0078] Composite waveguide structures such as Figure 1 As shown, it includes: a waveguide wafer, the waveguide wafer includes a Si substrate layer 1, a SiO2 layer 2 arranged on the top surface of the Si substrate layer 1, a waveguide structure 4, a metal electrode 3 and at least one bonding groove 9, the waveguide structure 4 and the metal electrode 3 are arranged in the SiO2 layer 2 and the layer position of the waveguide structure 4 is higher than the layer position of the metal electrode 3;

[0079] The bonding groove 9 is arranged in the SiO2 layer 2 and is located above the waveguide structure 4 in the area to be bonded;

[0080] The electro-optical thin film layer 10 corresponds to the bonding groove 9 one by one and is bonded in the corresponding bonding groove 9. The electro-optical thin film layer 10 and the waveguide structure 4 below the corresponding bonding groove 9 constitute a composite waveguide structure, wherein the electro-optical thin film layer 10 is in the electro-optical thin film wafer, and adjacent electro-optical thin film layers 10 are connected through supporting connection points formed by SiO2 processing. During bonding, the supporting connection points are broken by pressing down technology and then the electro-optical thin film layer 10 is pressed into the bonding groove 9.

[0081] In specific implementation, in order to ensure that the electro-optical thin film layer 10 and the waveguide structure 4 below the bonding groove 9 form a composite waveguide structure, it is proposed that the SiO2 thickness between the bottom surface of the bonding groove 9 and the top surface of the waveguide structure 4 in the bonding area is less than 150nm.

[0082] In specific implementation, the electro-optical thin film layer 10 can be any one of the electro-optical materials such as lithium niobate, lithium tantalate, barium titanate, etc. The material of the waveguide structure 4 can be SiNx, Si, etc.

[0083] In specific implementation, the above-mentioned composite waveguide preparation method can be compatible with CMOS process. For example, a composite waveguide preparation method is as follows: Figure 2 As shown, the following steps are included:

[0084] Processing and preparing a waveguide layer including a metal electrode 3 and a waveguide structure 4, and processing and preparing the metal electrode 3 and the thermal adjustment structure in the waveguide layer;

[0085] Processing at least one bonding groove 9 above the waveguide structure 4 to generate a waveguide wafer including the bonding groove 9;

[0086] Processing to produce an electro-optical thin film wafer including the electro-optical thin film layer 10;

[0087] One side of the electro-optical film layer 10 of the electro-optical film wafer is facing the bonding groove 9 and the electro-optical film layer 10 corresponds one to one with the bonding groove 9 of the waveguide wafer. The electro-optical film layer 10 is pressed into the bonding groove 9 for bonding using the press-down bonding technology, so that the electro-optical film layer 10 and the waveguide structure 4 under the corresponding bonding groove 9 form a composite waveguide.

[0088] In a specific implementation, when the electro-optical thin film layer 10 is bonded in the bonding groove 9, the spacing between the electro-optical thin film layer 10 and each side of the bonding groove 9 is greater than or equal to 10 μm. There may be one or more bonding grooves 9. When there are multiple bonding grooves 9, in order to avoid the adjacent bonding grooves 9 affecting the performance of the composite waveguide structure due to the setting of the grooves, it is proposed that the distance between two adjacent bonding grooves 9 is greater than 10 μm.

[0089] Specifically, the process of manufacturing a waveguide wafer including a bonding groove 9 by using a CMOS process includes the following steps:

[0090] The first step, such as Figure 3 As shown, a first SiO2 layer 201 with a thickness of 1 μm to 8 μm is prepared on the Si substrate layer 1 by a chemical vapor deposition method or a thermal oxidation growth method;

[0091] Step 2: Figure 4 and Figure 5As shown, a metal film such as Al, Cu, Au, etc. is prepared on the upper layer of the first SiO2 layer 201 by a physical vapor deposition method, and the metal film is processed by a graphic process to generate at least one metal electrode 3, wherein the thickness of the metal film is 0.5 μm to 1.5 μm;

[0092] Step 3: Figure 6 As shown, a first SiO2 passivation layer 202 is deposited on the metal electrode 3 by a chemical vapor deposition method, and the first SiO2 passivation layer 202 is planarized by a chemical mechanical polishing technique until the thickness of the first SiO2 passivation layer 202 located on the upper layer of the metal electrode 3 is 200nm to 500nm;

[0093] Step 4: Figure 7 and Figure 8 As shown, a waveguide film (a silicon nitride film may be used) with a thickness of 100 to 500 nm and a refractive index of 1.9 to 2.2 is deposited on the upper layer of the first SiO2 passivation layer 202 by a chemical vapor deposition method, and the silicon nitride film is formed into a waveguide structure 4 by a patterning process such as photolithography and etching;

[0094] Step 5: Fig. 9 As shown, a first SiO2 waveguide cladding 203 (SiO2 film) is deposited on the upper layer of the waveguide structure 4 by a chemical vapor deposition method, and the first SiO2 waveguide cladding 203 is flattened by a chemical mechanical polishing technique until the thickness of the first SiO2 waveguide cladding 203 located on the upper layer of the waveguide structure 4 is 1 μm to 3 μm, wherein the first SiO2 layer 201, the first SiO2 passivation layer 202 and the first SiO2 waveguide cladding 203 constitute the SiO2 layer 2.

[0095] Step 6: Fig.10 and Fig.11 As shown, an interconnection through hole 5 is etched in the SiO2 layer 2 by a dry etching technique for etching SiO2, the interconnection through hole 5 is filled by a chemical vapor deposition method or an electroplating process of tungsten (W) to generate a through hole metal 6, and the through hole metal 6 is planarized by a chemical mechanical polishing method;

[0096] Step 7: Fig.12 , Fig.13 and Fig.14 As shown, a 0.5 μm to 1.5 μm metal film is prepared on the upper layer of the SiO2 layer 2 by a physical vapor deposition method and patterned to form a metal electrode 3, and a 50 nm to 150 nm TiN layer 7 is deposited on the upper layer of the metal electrode 3 by a physical vapor deposition method and patterned to form a thermal adjustment structure;

[0097] Step 8: Fig.15As shown, a second SiO2 passivation layer 204 with a thickness of 1 μm to 3 μm is deposited on the upper layer of the thermal adjustment structure by a chemical vapor deposition method, and the second SiO2 passivation layer 204 is planarized by a chemical mechanical polishing method, wherein the first SiO2 layer 201, the first SiO2 passivation layer 202, the first SiO2 waveguide cladding layer 203 and the second SiO2 passivation layer 204 constitute the SiO2 layer 2;

[0098] Step 9: Fig.16 As shown, the metal pad is etched above the metal electrode 3 by dry etching technology for etching SiO2, thereby forming a pin pad hole 8.

[0099] Step 10: Fig.17 As shown, a bonding groove 9 is etched above the waveguide structure 4 by dry etching technology of etching SiO2, so that the remaining thickness of the SiO2 layer 2 above the waveguide structure 4 is less than 150nm; the planar size of the bonding groove 9 is greater than 1μm×1μm.

[0100] Specifically, the process of manufacturing the electro-optical thin film wafer includes the following steps:

[0101] The first step, such as Fig.18 As shown, a LNOI substrate is processed and prepared, wherein the LNOI substrate includes, from bottom to top, a Si base layer 1, a second SiO2 layer 205 and an electro-optical thin film layer 10;

[0102] Specifically, the electro-optical thin film layer 10 has a thickness of 100nm to 500nm, and its preparation method can adopt Smart-cut process technology, also called intelligent shearing technology, a process technology that forms a damaged layer by ion implantation of bulk material LN and annealing at 200 to 300°C to cause splitting and shedding along the damaged layer, and the buried oxide layer BOX (i.e., the second SiO2 layer 205) has a thickness of 1 to 8μm and is a SiO2 thin film prepared by thermal oxidation growth;

[0103] Step 2: Fig.19 As shown, the LNOI substrate is subjected to electro-optical thin film wafer patterning, and the electro-optical thin film layer 10 covered with the hard mask 11 is used as the electro-optical thin film wafer;

[0104] Specifically, a 50nm to 150nm hard mask 11 is deposited on the LNOI substrate, wherein the material of the hard mask 11 includes amorphous silicon and / or chromium; according to the W2W bonding alignment relationship between the electro-optical thin film wafer and the waveguide wafer, the hard mask 11 is first dry-etched after photolithography, and the electro-optical thin film layer 10 is etched by inductively coupled plasma-reactive ion etching to form an electro-optical thin film wafer with a one-to-one correspondence between the electro-optical thin film structure and the bonding groove structure on the waveguide wafer. That is, firstly deposit a 50-150nm hard mask 11 such as amorphous silicon, chromium, etc., then dry-etch the hard mask after photolithography, and then dry-etch the electro-optical thin film wafer by inductively coupled plasma-reactive ion etching ICP-RIE to form a waveguide structure, wherein the hard mask 11 is a hard mask material such as a-Si and Cr.

[0105] Step 3: Fig. 20 As shown, a second SiO2 waveguide cladding 206 is deposited on the upper layer of the electro-optical thin film wafer by a chemical vapor deposition method, and the second SiO2 waveguide cladding 206 is planarized by a chemical mechanical polishing method until the thickness of the second SiO2 waveguide cladding 206 located on the upper layer of the electro-optical thin film wafer (hard mask) is 0.1 μm to 2 μm, wherein the second SiO2 layer 205 and the second SiO2 waveguide cladding 206 constitute the SiO2 layer 2;

[0106] Step 4: Fig.21 and Fig. 22 As shown, etching is performed in the SiO2 layer 2 by a dry etching technique for etching SiO2 until a bonding alignment hole 12 and a supporting connection point are generated between the SiO2 layer 2 and the Si substrate layer 1;

[0107] Step 5: Fig.23 and Fig.24 As shown, the hard mask 11 is removed and processed into an electro-optical thin film wafer including bonding alignment holes 12.

[0108] Specifically, a composite waveguide structure is generated by bonding a waveguide wafer including a bonding groove 9 to an electro-optical thin film wafer using a push-down bonding technique, including:

[0109] The first step, such as Fig.25 As shown, the waveguide structure and the electro-optical thin film wafer are subjected to surface treatment respectively; the electro-optical thin film wafer is combined with the waveguide wafer through alignment pre-bonding and annealing treatment to generate an initial bonded wafer, wherein in the alignment pre-bonding operation, the flipped electro-optical thin film wafer is aligned one by one with the bonding groove 9 of the waveguide structure, wherein the temperature of the annealing treatment is less than 250° C.; the surface treatment includes surface cleaning and plasma activation of the waveguide structure and the electro-optical thin film wafer;

[0110] Step 2: Fig.26As shown, the Si base layer 1 of the electro-optical thin film wafer in the initial bonded wafer is removed by grinding and chemical mechanical polishing;

[0111] Step 3: Fig. 27 As shown, a pressing tool is used to press down the suspended structure of the electro-optical thin film wafer in the initial bonded wafer, so that the suspended structure is broken from the supporting connection point, wherein the pressing tool can be a pressing tool including a microneedle array, etc., and the microneedle array is made of a soft elastic material, and the soft elastic material can be PDMS, etc.;

[0112] Step 4: Fig.28 As shown, the suspended structure is moved down to the bottom of the hole of the waveguide structure in the initial bonding wafer, and the electro-optical thin film layer 10 is bonded to the bottom of the hole to generate a composite waveguide structure (LN-SiN composite waveguide).

[0113] Beneficial effects of the embodiments of the present invention:

[0114] By processing and manufacturing the support connection points of the electro-optic film wafer, after bonding it with the waveguide wafer, the electro-optic film structure is suspended above the bonding area groove of the waveguide wafer, and then vertically pressed down to break the electro-optic film wafer from the support connection points, so that the electro-optic film wafer is bonded to the bottom of the groove, realizing the processing of the composite waveguide structure in the small-sized pore; by utilizing the support connection structure characteristics in the micro-transfer technology and combining the mature W2W / D2W bonding technology, the complex pick-up and transfer process in micro-transfer is avoided, and the small-sized electro-optic film wafer and SiN( The heterogeneous integration of SiN (silicon nitride) waveguides in tiny pores has the advantages of simple process, high alignment accuracy, and high integration density, and can also improve the bonding alignment accuracy; the Si substrate of the electro-optical thin film wafer is removed before bonding, which reduces the risks of chip falling off and SiN waveguide damage when Si is removed after bonding in D2W; the SiN (silicon nitride) waveguide and the electro-optical thin film wafer are processed independently, which not only has good CMOS process compatibility, but also the process structure of the bonding area and the non-bonding area has better compatibility, which can make the process structure and device functions richer.

[0115] The above is only a specific embodiment of the present invention, and cannot be used to limit the scope of the invention. Therefore, the replacement of equivalent components, or equivalent changes and modifications made according to the scope of protection of the patent of the present invention, should still fall within the scope of this patent. In addition, the technical features of the present invention can be freely combined with each other, with each other, and with each other.

Claims

1. A composite waveguide structure, characterized in that: include: A waveguide wafer, the waveguide wafer comprising a Si substrate layer (1), a SiO2 layer (2) arranged on the top surface of the Si substrate layer (1), a waveguide structure (4), a metal electrode (3) and at least one bonding groove (9), the waveguide structure (4) and the metal electrode (3) being arranged in the SiO2 layer (2) and the waveguide structure (4) being located at a layer higher than the metal electrode (3); The bonding groove (9) is arranged in the SiO2 layer (2) and is located above the waveguide structure (4) in the area to be bonded; An electro-optical film layer (10), the electro-optical film layer (10) corresponds to the bonding groove (9) one by one and is bonded in the corresponding bonding groove (9), the electro-optical film layer (10) and the waveguide structure (4) below the corresponding bonding groove (9) form a composite waveguide structure, wherein the electro-optical film layer (10) is in an electro-optical film wafer, and adjacent electro-optical film layers (10) are connected through supporting connection points formed by SiO2 processing, and during bonding, the supporting connection points are broken by a downward pressing technology, and then the electro-optical film layer (10) is pressed into the bonding groove (9).

2. The composite waveguide structure according to claim 1, characterized in that: The thickness of SiO2 between the bottom surface of the bonding groove (9) and the top surface of the waveguide structure (4) in the area to be bonded is less than 150 nm.

3. A method for preparing a composite waveguide structure according to any one of claims 1 to 2, characterized in that: include: Processing and preparing a waveguide layer comprising the metal electrode (3) and the waveguide structure (4), and processing and preparing the metal electrode (3) and the heat adjustment structure in the waveguide layer; Processing at least one bonding groove (9) above the waveguide structure (4) to generate a waveguide wafer including the bonding groove (9); Processing to produce the electro-optical thin film wafer comprising the electro-optical thin film layer (10); One side of the electro-optical film layer (10) of the electro-optical film wafer is oriented toward the bonding groove (9), and the electro-optical film layer (10) corresponds one-to-one with the bonding groove (9) of the waveguide wafer. The electro-optical film layer (10) is pressed into the bonding groove (9) for bonding using a press-down bonding technique, so that the electro-optical film layer (10) and the waveguide structure (4) below the corresponding bonding groove (9) form a composite waveguide.

4. The preparation method according to claim 3, characterized in that: Processing and preparing a waveguide layer comprising the metal electrode (3) and the waveguide structure (4), and processing and preparing the metal electrode (3) and the heat adjustment structure in the waveguide layer, comprising: Preparing a first SiO2 layer (201) on a Si substrate layer (1); Preparing a metal film on the upper layer of the first SiO2 layer (201), and processing the metal film to generate at least one metal electrode (3); Depositing a first SiO2 passivation layer (202) on the metal electrode (3), and performing a planarization process on the first SiO2 passivation layer (202); Depositing a waveguide film on the upper layer of the first SiO2 passivation layer (202), and manufacturing the waveguide film to form a waveguide structure (4); Depositing a first SiO2 waveguide cladding (203) on the upper layer of the waveguide structure (4), and performing a planarization process on the first SiO2 waveguide cladding (203) until the thickness of the first SiO2 waveguide cladding (203) located on the upper layer of the waveguide structure (4) is 1 μm to 3 μm, wherein the first SiO2 layer (201), the first SiO2 passivation layer (202) and the first SiO2 waveguide cladding (203) constitute the SiO2 layer (2); Etching above the metal electrode (3) in the SiO2 layer (2) to generate an interconnection through hole (5), filling the interconnection through hole (5) to generate a through hole metal (6), and flattening the through hole metal (6); A metal film is prepared on the upper layer of the SiO2 layer (2) and patterned to form a metal electrode (3), and a TiN layer (7) is deposited on the upper layer of the metal electrode (3) and patterned to form the thermal adjustment structure; Depositing a second SiO2 passivation layer (204) on the upper layer of the thermal adjustment structure, and performing a planarization process on the second SiO2 passivation layer (204), wherein the first SiO2 layer (201), the first SiO2 passivation layer (202), the first SiO2 waveguide cladding layer (203) and the second SiO2 passivation layer (204) constitute the SiO2 layer (2); A pin pad hole (8) is formed by etching above the metal electrode (3).

5. The preparation method according to claim 3, characterized in that: Processing at least one bonding groove (9) above the waveguide structure (4) to generate a waveguide wafer containing the bonding groove (9), comprising: The SiO2 layer (2) is etched above the waveguide structure (4) to generate a bonding groove (9), so that the remaining thickness of the SiO2 layer (2) above the waveguide structure (4) is less than 150 nm.

6. The preparation method according to claim 5, characterized in that: The planar size of the bonding groove (9) is greater than 1 μm×1 μm.

7. The preparation method according to claim 3, characterized in that: The electro-optical thin film wafer including the electro-optical thin film layer (10) is processed and manufactured, comprising: Processing and preparing a LNOI substrate, wherein the LNOI substrate comprises, from bottom to top, a Si base layer (1), a second SiO2 layer (205) and an electro-optical thin film layer (10); Performing electro-optical thin film wafer patterning processing on the LNOI substrate, and using the electro-optical thin film layer (10) covered with a hard mask (11) as an electro-optical thin film wafer; Depositing a second SiO2 waveguide cladding (206) on the upper layer of the electro-optical thin film wafer, and performing a planarization process on the second SiO2 waveguide cladding (206), wherein the second SiO2 layer (205) and the second SiO2 waveguide cladding (206) constitute the SiO2 layer (2); Etching in the SiO2 layer (2) until a bonding alignment hole (12) and the supporting connection point are generated between the SiO2 layer (2) and the Si substrate layer (1); The hard mask (11) is removed and processed into the electro-optical thin film wafer including the bonding alignment hole (12).

8. The preparation method according to claim 7, characterized in that: The LNOI substrate is subjected to electro-optical thin film wafer patterning processing, and the electro-optical thin film layer (10) covered with a hard mask (11) is used as an electro-optical thin film wafer, comprising: Depositing the hard mask (11) on the LNOI substrate, wherein the material of the hard mask (11) includes amorphous silicon and / or chromium; According to the position of the electro-optic thin film wafer, the hard mask (11) is first dry-etched after photolithography, and then the electro-optic thin film layer (10) is etched to form the electro-optic thin film wafer.

9. The preparation method according to claim 3, characterized in that: The electro-optical thin film layer (10) is pressed into the bonding groove (9) for bonding by using a press-down bonding technology, comprising: The electro-optical thin film wafer is bonded to the waveguide wafer with one side of the electro-optical thin film layer (10) facing the bonding groove (9) and the electro-optical thin film layer (10) corresponding to the bonding groove (9) of the waveguide wafer one by one, thereby generating an initial bonded wafer; Removing the Si base layer (1) of the electro-optical thin film wafer in the initial bonding wafer, so that the adjacent electro-optical thin film layers (10) are connected through the supporting connection points to form a suspended structure; Using a pressing tool, pressing downwardly the suspended structure of the electro-optical thin film wafer in the initial bonded wafer, so that the suspended structure breaks from the supporting connection point; The suspended structure is moved down to the bottom of the bonding groove (9) of the waveguide wafer in the initial bonding wafer, and the electro-optical thin film layer (10) is bonded to the bottom of the bonding groove (9) to generate the composite waveguide.

10. The preparation method according to claim 9, characterized in that: The pressing tool is a pressing tool comprising a microneedle array, and the material of the microneedle array is a soft elastic material.

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