Voltage gating circuit and voltage detection device

Abstract

The invention relates to the technical field of battery voltage detection, and discloses a voltage gating circuit and a voltage detection device, the voltage gating circuit and the voltage detection device are used for gating output voltage output of at least one battery cell, the voltage gating circuit comprises a plurality of first level conversion circuits, a second level conversion circuit and a plurality of gating switch circuits, and when any gating switch circuit needs to be switched on, the first level conversion circuit and the second level conversion circuit are switched on. A first level conversion circuit connected with the gating switch circuit boosts the voltage of the input end of the gating switch circuit based on a gating signal and then outputs a first conduction signal, and a second level conversion circuit boosts the voltage of the output end of the gating switch circuit based on the gating signal and then outputs a second conduction signal. Then, the gating switch circuit is turned on based on the first turn-on signal and the second turn-on signal. According to the gating switch circuit, the risk of breakdown of the gating switch circuit can be avoided without using a thick gate oxide high-voltage MOS (Metal Oxide Semiconductor), and the process selection range of the voltage gating circuit is widened.

Description

Technical Field

[0001] The present invention relates to the technical field of battery voltage detection, and in particular to a voltage gating circuit and a voltage detection device. Background Art

[0002] The multi-cell battery protection chip needs to detect the voltage of each cell, so the voltage of each cell needs to be introduced into the voltage detection module through the selection switch. Since multiple cells are connected in series, when each cell has output, the selection switch needs to be able to withstand the sum of the output voltages of multiple cells, that is, it needs to have high voltage tolerance.

[0003] In the related technology, high-voltage symmetrical MOSFET with thick gate oxide is usually used to form a voltage gating circuit. However, many monolithic integrated process technologies (Bipolar-CMOS-DMOS, BCD) only provide LDMOS with thin gate oxide, resulting in that the multi-cell battery protection chip is highly dependent on high-voltage MOSFET with thick gate oxide, which greatly limits the range of process options. Summary of the invention

[0004] In view of this, the present invention provides a voltage gating circuit and a voltage detection device to solve the problem that a gating switch in the existing voltage gating circuit is easily broken down by high voltage.

[0005] In a first aspect, the present invention provides a voltage gating circuit for gating the output voltage output of at least one battery cell, the voltage gating circuit comprising: a plurality of first level conversion circuits, a second level conversion circuit and a plurality of gating switch circuits, wherein the input end of each first level conversion circuit inputs one of a plurality of switch control signals, and the input end of the second level conversion circuit inputs a plurality of switch control signals; the first control end of each gating switch circuit is respectively connected to the output end of a first level conversion circuit, the input end of each gating switch circuit is respectively connected to the first end of a first level conversion circuit and respectively inputs the output voltage of a battery cell; the second control end of each gating switch circuit is respectively connected to a corresponding output end of the second level conversion circuit, and the output end of each gating switch circuit is connected to the second level conversion circuit. The first end of the level conversion circuit is connected to the first end of the level conversion circuit; when any one of the gating switch circuits needs to be turned on, the first level conversion circuit connected to the gating switch circuit boosts or reduces the input terminal voltage of the gating switch circuit based on the corresponding switch control signal and outputs a first turn-on signal, and at the same time, the second level conversion circuit boosts or reduces the output terminal voltage of the gating switch circuit based on the switch control signal corresponding to the gating switch circuit and outputs a second turn-on signal, and then the gating switch circuit is turned on based on the first turn-on signal and the second turn-on signal, and at this time, the other gating switch circuits are all disconnected; when any one of the gating switch circuits is turned off, the voltage difference between the first control terminal and the input terminal of the gating switch circuit, and the voltage difference between the output terminal and the second control terminal of the gating switch circuit are both less than the breakdown voltage of the switch in the gating switch circuit.

[0006] The voltage gating circuit provided by the present invention has a first conduction signal obtained by boosting the voltage at the input end of the gating switch circuit, and the voltage between the first conduction signal and the input end of the gating switch circuit is less than the breakdown voltage of the switch in the gating switch circuit; the second conduction signal is obtained by boosting the voltage at the output end of the gating switch circuit, and the voltage between the second conduction signal and the output end of the gating switch circuit is less than the breakdown voltage of the switch in the gating switch circuit; therefore, both conduction signals for controlling the gating switch circuit will not exceed the breakdown voltage drop of the switch in the gating switch circuit, which greatly reduces the risk of breakdown, and the gating switch circuit does not need to use a thick gate oxide high-voltage MOS switch to prevent breakdown, which reduces the dependence of the voltage gating circuit on the thick gate oxide high-voltage MOS switch and improves the process selection range of circuit design.

[0007] In an optional embodiment, when any one of the gating switch circuits needs to be turned off, a first level conversion circuit connected to the gating switch circuit steps down or steps up the input voltage of the gating switch circuit based on a corresponding switch control signal and outputs a first shutdown signal, while a second level conversion circuit steps down or steps up the output voltage of the gating switch circuit based on a switch control signal corresponding to the gating switch circuit and outputs a second shutdown signal, after which the gating switch circuit is turned off based on the first shutdown signal and the second shutdown signal; when the switch control signal is a first logic level, it indicates that the corresponding gating switch circuit needs to be turned on; when the switch control signal is a second logic level, it indicates that the corresponding gating switch circuit needs to be turned off; the first logic level is opposite to the second logic level.

[0008] In an optional embodiment, each selection switch circuit includes: a first controllable switch and a second controllable switch, wherein the first end of the first controllable switch inputs the output voltage of a battery cell, the second end of the first controllable switch is connected to the first end of the second controllable switch, and the control end of the first controllable switch is connected to the output end of the first level conversion circuit connected to the battery cell; the second end of the second controllable switch is connected to the first end of the second level conversion circuit, and the control end of the second controllable switch is connected to an output end of the second level conversion circuit; the first controllable switch and the second controllable switch are turned on based on the first turn-on signal and the second turn-on signal, respectively; the first controllable switch and the second controllable switch are turned off based on the first turn-off signal and the second turn-off signal, respectively; when the first controllable switch is turned off, the voltage difference between the control end of the first controllable switch and its first end is less than the breakdown voltage of the first controllable switch; when the second controllable switch is turned off, the voltage difference between the second end of the second controllable switch and its control end is less than the breakdown voltage of the second controllable switch.

[0009] In the voltage gating circuit provided by the present invention, each gating switch circuit is provided with two controllable switches. When the voltages at the input and output ends of the gating switch circuit are inconsistent, one of the switches can be switched to a cut-off state based on the voltage difference and bear most of the voltage drop between the input and output ends of the gating switch circuit, thereby avoiding breakdown failure of the entire gating switch circuit and improving the reliability of the circuit.

[0010] In an optional embodiment, each first level conversion circuit includes: a first voltage regulating unit, a second voltage regulating unit and a first output unit, wherein the input end of the first voltage regulating unit is connected to the input end of the second voltage regulating unit and the input end of a corresponding selection switch circuit, the output end of the first voltage regulating unit is connected to the first input end of the first output unit, and the first voltage regulating unit is used to boost the input end voltage of the selection switch circuit and output a first reference voltage; the output end and the first end of the second voltage regulating unit are respectively connected to the second input end and the first end of the first output unit, and the second voltage regulating unit is used to output the second reference voltage after stepping down the input end voltage of the selection switch circuit; the output end of the first output unit is connected to the first control end of a corresponding selection switch circuit, the control end of the first output unit is connected to the corresponding switch control signal, and the first output unit is used to output a first conduction signal based on the corresponding switch control signal and the first reference voltage, or output a first shutdown signal based on the corresponding switch control signal and the second reference voltage.

[0011] In an optional embodiment, the first voltage regulating unit includes: a first current source, a first voltage stabilizing unit and a first voltage following unit, wherein the first end of the first voltage stabilizing unit is connected to the first end of the first voltage following unit and the first end of the first current source and outputs a first reference voltage, the second end of the first voltage stabilizing unit is connected to the input end of a gate switch circuit, and the magnitude of the first reference voltage is adjusted by adjusting the parameters of the voltage stabilizing device in the first voltage stabilizing unit; the second end of the first voltage following unit is connected to the second end of the first current source, the third end of the first voltage following unit is connected to the first input end of the first output unit, and the first voltage following unit is used to improve the driving capability of the first reference voltage; the first reference voltage is equal to the sum of the voltage drop of the first voltage stabilizing unit itself and the input voltage of the gate switch circuit.

[0012] In the voltage gating circuit provided by the present invention, the first voltage follower unit can change the high-impedance output node into a low-impedance output node, thereby improving the driving capability of the first reference voltage.

[0013] In an optional embodiment, the second voltage regulating unit includes: a second current source and a second voltage stabilizing unit, wherein the first end of the second voltage stabilizing unit is connected to the input end of a gate switch circuit, the second end of the second voltage stabilizing unit is connected to the first end of the second current source and the second input end of the first output unit and outputs a second reference voltage, and the magnitude of the second reference voltage is adjusted by adjusting the parameters of the voltage stabilizing device in the second voltage stabilizing unit; the second end of the second current source is connected to the first end of the first output unit; the second reference voltage is equal to the difference between the input end voltage of the gate switch circuit and the voltage drop of the second voltage stabilizing unit itself.

[0014] In an optional embodiment, the first output unit includes: a first output driving unit and a second output driving unit, wherein the first end of the first output driving unit is connected to the output end of the first voltage regulating unit, the second end of the first output driving unit is connected to the first end of the second output driving unit and the first control end of a corresponding selection switch circuit, and the first output driving unit is used to convert the first reference voltage into a first conduction signal based on a corresponding switch control signal; the second end and the third end of the second output driving unit are respectively connected to the output end and the first end of the second voltage regulating unit, the fourth end of the second output driving unit is connected to the corresponding switch control signal, and the second output driving unit is used to convert the second reference voltage into a first shutdown signal based on the corresponding switch control signal; when the switch control signal is a first logic level, the first output driving unit converts the first reference voltage into a first conduction signal; when the switch control signal is a second logic level, the second output driving unit converts the second reference voltage into a first shutdown signal.

[0015] In an optional embodiment, the second level conversion circuit includes: a third voltage regulating unit, a fourth voltage regulating unit and a second output unit, wherein the input end of the third voltage regulating unit is connected to the input end of the fourth voltage regulating unit and the output end of each gate switch circuit, the output end of the third voltage regulating unit is connected to the first input end of the second output unit, and the third voltage regulating unit is used to boost the output end voltage of the gate switch circuit and output a third reference voltage; the output end and the first end of the fourth voltage regulating unit are respectively connected to the second input end and the first end of the second output unit, and the fourth voltage regulating unit is used to step down the output end voltage of the gate switch circuit and output a fourth reference voltage; one of the multiple input ends of the second output unit inputs one of the multiple switch control signals, one of the multiple output ends of the second output unit is connected to the second control end of a corresponding gate switch circuit, and the second output unit is used to output a second turn-on signal of the corresponding gate switch circuit based on the corresponding switch control signal and the third reference voltage, or output a second turn-off signal of the corresponding gate switch circuit based on the corresponding switch control signal and the fourth reference voltage.

[0016] In an optional embodiment, the third voltage regulating unit includes: a third current source, a third voltage stabilizing unit and a second voltage following unit, wherein the first end of the third voltage stabilizing unit is connected to the first end of the second voltage following unit and the first end of the third current source and outputs a third reference voltage, the second end of the third voltage stabilizing unit is connected to the output end of each selection switch circuit, and the magnitude of the third reference voltage is adjusted by adjusting the parameters of the voltage stabilizing device in the third voltage stabilizing unit; the second end of the second voltage following unit is connected to the second end of the third current source, the third end of the second voltage following unit is connected to the first input end of the second output unit, and the second voltage following unit is used to improve the driving capability of the third reference voltage; the third reference voltage is equal to the sum of the voltage drop of the third voltage stabilizing unit itself and the output voltage of the selection switch circuit.

[0017] In the voltage gating circuit provided by the present invention, the second voltage follower unit can change the high-impedance output node into a low-impedance output node, thereby improving the driving capability of the third reference voltage.

[0018] In an optional embodiment, the fourth voltage regulating unit includes: a fourth current source and a fourth voltage stabilizing unit, wherein the first end of the fourth voltage stabilizing unit is connected to the output end of a gate switch circuit, the second end of the fourth voltage stabilizing unit is connected to the first end of the fourth current source and the second input end of the second output unit and outputs a fourth reference voltage, and the magnitude of the fourth reference voltage is adjusted by adjusting the parameters of the voltage stabilizing device in the fourth voltage stabilizing unit; the second end of the fourth current source is connected to the first end of the second output unit; the fourth reference voltage is equal to the difference between the output voltage of the gate switch circuit and the voltage drop of the fourth voltage stabilizing unit itself.

[0019] In an optional embodiment, the second output unit includes: a plurality of output drive branches, wherein each output drive branch includes an output end, the output end of each output drive branch is connected to the second control end of a corresponding gate switch circuit, the control end of each output drive branch is connected to a corresponding switch control signal, the first end of each output drive branch is connected to the output end of the third voltage regulating unit and receives a third reference voltage, the second end of each output drive branch is connected to the output end of the third voltage regulating unit after being connected to each other, the second end of each output drive branch is connected to the output end of the fourth voltage regulating unit and receives a fourth reference voltage, each output drive branch outputs a second turn-on signal of the corresponding gate switch circuit based on a corresponding switch control signal and the third reference voltage, or outputs a second turn-off signal of the corresponding gate switch circuit based on the corresponding switch control signal and the fourth reference voltage; each output drive branch includes a third output an output drive unit and a fourth output drive unit, wherein a first end of the third output drive unit is connected to the output end of the third voltage regulating unit and receives a third reference voltage, a second end of the third output drive unit is connected to the first end of the fourth output drive unit and a second control end of a corresponding selection switch circuit, and the third output drive unit is used to convert the third reference voltage into a second conduction signal based on a corresponding switch control signal; a second end of the fourth output drive unit is connected to the output end of the fourth voltage regulating unit, a third end of the fourth output drive unit is connected to a corresponding switch control signal, and the fourth output drive unit is used to convert the fourth reference voltage into a second shutdown signal based on the corresponding switch control signal; when the switch control signal is a first logic level, the third output drive unit converts the third reference voltage into a second conduction signal; when the switch control signal is a second logic level, the fourth output drive unit converts the fourth reference voltage into a second shutdown signal.

[0020] In a second aspect, the present invention provides a voltage detection circuit, comprising: a control module, a voltage detection module and a voltage gating circuit of the above-mentioned first aspect or any corresponding embodiment thereof, wherein the output end of the control module is connected to the input end of each first level conversion circuit and the input end of the second level conversion circuit, and the control module is used to output multiple switch control signals; the input end of the voltage detection module is connected to the output end of each gating switch circuit, and the voltage detection module is used to detect the input voltage; when it is necessary to detect the output voltage of any battery cell, the first level conversion circuit connected to the battery cell outputs a first conduction signal based on the corresponding switch control signal, and the second level conversion circuit outputs a second conduction signal, and then the gating switch circuit connected to the battery cell is turned on and outputs the output voltage of the battery cell.

[0021] The voltage detection circuit provided by the present invention has a first conduction signal obtained by boosting the voltage of the input end of the gate switch circuit, and the voltage between the voltage of the first conduction signal and the input end of the gate switch circuit is less than the breakdown voltage of the switch in the gate switch circuit; the second conduction signal is obtained by boosting the voltage of the output end of the gate switch circuit, and the voltage between the voltage of the second conduction signal and the output end of the gate switch circuit is less than the breakdown voltage of the switch in the gate switch circuit; when the output voltages of multiple battery cells are detected at the same time, no matter how high the total output voltage is, the two conduction signals controlling the gate switch circuit will not exceed the breakdown voltage drop of the switch in the gate switch circuit, which greatly reduces the risk of breakdown, and the gate switch circuit does not need to use a thick gate oxide high-voltage MOS switch to prevent breakdown, which reduces the dependence of the voltage gate circuit on the thick gate oxide high-voltage MOS switch and improves the process selection range of circuit design. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] In order to more clearly illustrate the specific implementation methods of the present invention or the technical solutions in the prior art, the drawings required for use in the specific implementation methods or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some implementation methods of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0023] Figure 1 is a schematic diagram of a gating circuit in the related art;

[0024] Figure 2 is a composition diagram of a voltage gating circuit according to an embodiment of the present invention;

[0025] Figure 3 is a specific circuit structure diagram of a gate switch circuit according to an embodiment of the present invention;

[0026] Figure 4 is a specific circuit structure diagram of a voltage gating circuit according to an embodiment of the present invention;

[0027] Figure 5 FIG. 4 is a diagram showing a voltage detection circuit according to an embodiment of the present invention. DETAILED DESCRIPTION

[0028] In order to make the purpose, technical solution and advantages of the embodiments of the present invention clearer, the technical solution in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present invention.

[0029] In the description of the present invention, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc., indicating the orientation or positional relationship, are based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present invention. In addition, the terms "first", "second", and "third" are used for descriptive purposes only, and cannot be understood as indicating or implying relative importance.

[0030] In the description of the present invention, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, it can also be the internal connection of two components, it can be a wireless connection, or it can be a wired connection. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0031] In the description of the present invention, words such as "connect", "connected", "connected", "coupled", "interconnected" and the like indicating electrical connection, unless otherwise specified, indicate direct or indirect electrical connection. The direct electrical connection indicates a direct connection between two or more objects without any intervening objects, and the indirect electrical connection indicates an electrical connection between two or more objects with one or more objects (such as electrical components or electrical units such as resistors, capacitors, inductors, switches, filters, etc.) intervening.

[0032] In addition, the technical features involved in the different embodiments of the present invention described below can be combined with each other as long as they do not conflict with each other.

[0033] The multi-cell battery protection chip needs to detect the voltage of each cell, so the voltage of each cell needs to be introduced into the voltage detection module through the gate switch. Since multiple cells are connected in series, the gate switch needs to be able to withstand higher voltages. In related technologies, high-voltage symmetrical MOSFETs with thick gate oxides are usually used to implement voltage gate circuits. The symmetrical structure ensures that both the drain and source can withstand high voltages. However, many BCD processes only provide LDMOS with thin gate oxides. Therefore, the existing practice relies on high-voltage MOSFETs with thick gate oxides, which greatly limits the range of process options. Figure 1The schematic diagram of the existing gating circuit is shown in FIG. 1 . The two-way switches SW1 and SW2 are implemented with thick-gate-oxide symmetrical high-voltage PMOS or thick-gate-oxide symmetrical high-voltage NMOS. Since the NMOS bulk must be connected to the lowest potential VSS of the system, and the PMOS bulk must be connected to the highest potential VCC of the system, and SW_ON1 and SW_ON2 are logic signals under the VDD_LV low-voltage power domain, they are converted into high-voltage control signals with a swing from VSS to VCC by the level conversion module level_shift to control the on and off of the switches SW1 and SW2. Therefore, in the prior art, the two-way gating switches SW1 and SW2 usually use thick-gate-oxide symmetrical high-voltage MOS switches to avoid being broken down by the high-voltage control signals with a swing from VSS to VCC.

[0034] In order to get rid of the reliance of the gating circuit on the thick gate oxide symmetrical high-voltage MOS switch and reduce the risk of the gating circuit being broken down, this embodiment provides a voltage gating circuit for gating the output voltage output of at least one battery cell, each battery cell is connected in series, such as Figure 2 As shown, the voltage gating circuit includes: a plurality of first level conversion circuits (#11-#1n), a second level conversion circuit 2 and a plurality of gating switch circuits (#31-#3n).

[0035] Figure 2 In the embodiment, the input end of each first level conversion circuit (#11~#1n) inputs one of the multiple switch control signals (SW_ON1~SW_ONn), and the input end of the second level conversion circuit 2 inputs the multiple switch control signals (SW_ON1~SW_ONn); the first control end of each selection switch circuit (#31~#3n) is respectively connected to the output end (i.e., GATEB1~GATEBn end) of a first level conversion circuit (#11~#1n), the input end of each selection switch circuit (#31~#3n) is respectively connected to the first end of a first level conversion circuit (#11~#1n), and the output voltage (VCELL_1~VCELL_n) of a battery cell is respectively input; the second control end of each selection switch circuit (#31~#3n) is respectively connected to an output end (i.e., GATEA1~GATEAn end) of the second level conversion circuit 2, and the output end of each selection switch circuit (#31~#3n) is connected to the first end (i.e., VISO end) of the second level conversion circuit 2.

[0036] Specifically, Figure 2In the embodiment, the internal structure of each first level conversion circuit (#11~#1n) is consistent, and the internal structure of each gate switch circuit (#31~#3n) is consistent. VISO is a node connected to the gated potential, VCELL_1~VCELL_n are the output voltage nodes of the cells to be selected, and at any time, one of the switch control signals in SW_ON1~SW_ONn is logically opposite to the other switch control signals. The switch control signal is input to the corresponding first level conversion circuit and the second level conversion circuit 2, so as to connect the output voltage node of a certain cell to be selected to the VISO node; GATEB1~GATEBn are control signals for controlling the on / off of the corresponding gate switch circuit (#31~#3n) obtained by boosting or stepping down the corresponding switch control signal of each first level conversion circuit (#11~#1n), and GATEA1~GATEAn are control signals for controlling the on / off of the corresponding gate switch circuit (#31~#3n) obtained by boosting or stepping down the corresponding switch control signal of each second level conversion circuit 2.

[0037] For example, Figure 2 When the output voltage VCELL_1 of the first battery cell needs to be selected, the selection switch circuit #31 needs to be controlled to be turned on, and the level state of the switch control signal SW_ON1 should be opposite to the level states of the other switch control signals; when the output voltage VCELL_2 of the second battery cell needs to be selected, the selection switch circuit #32 needs to be controlled to be turned on, and the level state of the switch control signal SW_ON2 should be opposite to the level states of the other switch control signals, and so on.

[0038] Figure 2 In the embodiment, when any one of the selection switch circuits (#31 to #3n) needs to be turned on, the first level conversion circuit connected to the selection switch circuit boosts or drops the input voltage of the selection switch circuit based on the corresponding switch control signal and outputs a first turn-on signal. At the same time, the second level conversion circuit 2 boosts or drops the output voltage of the selection switch circuit based on the switch control signal corresponding to the selection switch circuit and outputs a second turn-on signal. Thereafter, the selection switch circuit is turned on based on the first turn-on signal and the second turn-on signal, and at this time, the remaining selection switch circuits are all disconnected.

[0039] For example, Figure 2In the example, taking the output voltage VCELL_1 of the first battery cell that needs to be selected as an example, the first selection switch circuit #31 connected to the battery cell needs to be controlled to be turned on. After setting SW_ON1 to a low level and the remaining switch control signals (SW_ON2 to SW_ONn) to high levels, the first first level conversion circuit #11 boosts the voltage of VCELL_1 and outputs a high level GATEB1, and the first output end of the second level conversion circuit 2 boosts the voltage of VISO and outputs a high level GATEA1, so that the first selection switch circuit #31 is turned on based on the high levels of GATEB1 and GATEA1; at this time, the voltage difference between GATEB1 and VCELL_1 does not exceed the breakdown voltage between the first control end and the input end of the first selection switch circuit #31, and the voltage difference between GATEA1 and VISO does not exceed the breakdown voltage between the output end and the second control end of the first selection switch circuit #31, thereby preventing the first selection switch circuit #31 from being broken down by high voltage. At the same time, the remaining output terminals of the remaining first level conversion circuits and the second level conversion circuit 2 do not operate under the action of the high-level switch control signal, so that the remaining gate switch circuits all remain in the disconnected state.

[0040] It should be noted that the generation method of the first conduction signal and the second conduction signal is related to the type of switches in the selection switch circuit. For example, when the switches in the selection switch circuit are all NMOS, the first conduction signal is obtained by boosting the voltage of VCELL_1, and the second conduction signal is obtained by boosting the voltage of VISO; when the switches in the selection switch circuit are all PMOS, the first conduction signal is obtained by stepping down the voltage of VCELL_1, and the second conduction signal is obtained by stepping down the voltage of VISO.

[0041] Figure 2 In the embodiment, when any of the selection switch circuits (#31 to #3n) is turned off, the voltage difference between the first control terminal and the input terminal of the selection switch circuit (#31 to #3n), and the voltage difference between the output terminal and the second control terminal of the selection switch circuit (#31 to #3n) are both smaller than the breakdown voltage of the switch in the selection switch circuit (#31 to #3n).

[0042] It should be noted that, during the circuit design process, by reasonably setting the degree of boost or buck of each first level conversion circuit (#11~#1n) and the second level conversion circuit 2, the voltage difference between the control end of each selection switch circuit (#31~#3n) and its second control end is made smaller than the breakdown voltage.

[0043] In the voltage gating circuit provided in this embodiment, the first conduction signal is obtained by boosting the voltage at the input end of the gating switch circuit, and the voltage between the first conduction signal and the input end of the gating switch circuit is less than the breakdown voltage of the switch in the gating switch circuit; the second conduction signal is obtained by boosting the voltage at the output end of the gating switch circuit, and the voltage between the second conduction signal and the output end of the gating switch circuit is less than the breakdown voltage of the switch in the gating switch circuit; therefore, both conduction signals controlling the gating switch circuit will not exceed the breakdown voltage drop of the switch in the gating switch circuit, which greatly reduces the risk of breakdown, and the gating switch circuit does not need to use a thick gate oxide high-voltage MOS switch to prevent breakdown, which reduces the dependence of the voltage gating circuit on the thick gate oxide high-voltage MOS switch and improves the process selection range of circuit design.

[0044] In some optional embodiments, Figure 2 In the embodiment, when any one of the selection switch circuits (#31~#3n) needs to be turned off, the first level conversion circuit (#11~#1n) connected to the selection switch circuit (#31~#3n) steps down or steps up the input voltage of the selection switch circuit (#31~#3n) based on the corresponding switch control signal and outputs a first shutdown signal. At the same time, the second level conversion circuit 2 steps down or steps up the output voltage of the selection switch circuit (#31~#3n) based on the switch control signal corresponding to the selection switch circuit and outputs a second shutdown signal. Thereafter, the selection switch circuit (#31~#3n) is turned off based on the first shutdown signal and the second shutdown signal.

[0045] For example, Figure 2 In the example, taking the output voltage VCELL_1 of the first battery cell that needs to be selected off as an example, the first selection switch circuit #31 connected to the battery cell needs to be controlled to be turned off, after setting SW_ON1 to a high level and the remaining switch control signals (SW_ON2 to SW_ONn) to a low level, the first first level conversion circuit #11 steps down the voltage of VCELL_1 and outputs a low level GATEB1, and the first output end of the second level conversion circuit 2 steps down the voltage of VISO and outputs a low level GATEA1, so that the first selection switch circuit #31 is turned off based on the low levels of GATEB1 and GATEA1; at this time, the voltage difference between GATEB1 and VCELL_1 does not exceed the breakdown voltage between the first control end and the input end of the first selection switch circuit #31, and the voltage difference between GATEA1 and VISO does not exceed the breakdown voltage between the output end and the second control end of the first selection switch circuit #31, thereby preventing the first selection switch circuit #31 from being broken down by high voltage.

[0046] It should be noted that when the switch control signal is at the first logic level, it indicates that the corresponding gate switch circuit needs to be turned on; when the switch control signal is at the second logic level, it indicates that the corresponding gate switch circuit needs to be turned off; the first logic level is opposite to the second logic level.

[0047] It should be noted that the generation method of the first shutdown signal and the second shutdown signal is related to the type of switches in the selection switch circuit. For example, when the switches in the selection switch circuit are all NMOS, the first shutdown signal is obtained by stepping down the voltage of VCELL_1, and the second shutdown signal is obtained by stepping down the voltage of VISO; when the switches in the selection switch circuit are all PMOS, the first shutdown signal is obtained by stepping up the voltage of VCELL_1, and the second shutdown signal is obtained by stepping up the voltage of VISO.

[0048] In some optional embodiments, such as Figure 3 As shown, taking two gate switch circuits #31 and #32 as an example, each gate switch circuit includes: a first controllable switch (ie, SW1_MB or SW2_MB) and a second controllable switch (ie, SW1_MA or SW2_MA).

[0049] Specifically, Figure 3 Taking the first selection switch circuit #31 in the example, the first end of the first controllable switch SW1_MB inputs the output voltage VCELL_1 of a battery cell, the second end of the first controllable switch SW1_MB is connected to the first end of the second controllable switch SW1_MA, and the control end of the first controllable switch SW1_MB is connected to the output end of the first level conversion circuit #11 connected to the battery cell; the second end of the second controllable switch SW1_MA is connected to the first end of the second level conversion circuit 2, and the control end of the second controllable switch SW1_MA is connected to the output end of the second level conversion circuit 2 An output terminal is connected; the first controllable switch SW1_MB and the second controllable switch SW1_MA are turned on based on the first turn-on signal and the second turn-on signal respectively; the first controllable switch SW1_MB and the second controllable switch SW1_MA are turned off based on the first turn-off signal and the second turn-off signal respectively. Since the first controllable switch SW1_MB and the second controllable switch SW1_MA are both NMOS, SW_ON1 is set to a high level and SW_ON2 is set to a low level to control the first controllable switch SW1_MB and the second controllable switch SW1_MA to turn off.

[0050] Specifically, Figure 3 When the first controllable switch SW1_MB is turned off, the voltage difference between the control end and the first end of the first controllable switch SW1_MB is less than the breakdown voltage of the first controllable switch SW1_MB; when the second controllable switch SW1_MA is turned off, the voltage difference between the second end and the control end of the second controllable switch SW1_MA is less than the breakdown voltage of the second controllable switch SW1_MA.

[0051] It should be noted that the number of the first controllable switches and the second controllable switches can be set as required and connected in series.

[0052] In some optional embodiments, such as Figure 4 As shown, taking the second first level conversion circuit # 12 as an example, the second first level conversion circuit # 12 includes: a first voltage regulating unit 11 , a second voltage regulating unit 12 and a first output unit 13 .

[0053] Figure 4 In the embodiment, the input end of the first voltage regulating unit 11 is connected to the input end of the second voltage regulating unit 12 and the input end of the corresponding selection switch circuit #32, and the output end of the first voltage regulating unit 11 is connected to the first input end of the first output unit 13. The first voltage regulating unit 11 is used to boost the input end voltage VCELL_2 of the selection switch circuit #32 and then output the first reference voltage VCELL2_H.

[0054] Figure 4 In the embodiment, the first voltage regulating unit 11 includes: a first current source ibiasB5, a first voltage stabilizing unit and a first voltage following unit, wherein the first voltage stabilizing unit is composed of four PMOSs MPB0, MPB1, MPB2 and MPB3 connected in series, and the first voltage following unit is composed of a source follower MNSFB. The first end of the first voltage stabilizing unit is connected to the first end of the first voltage following unit and the first end of the first current source ibiasB5, and the second end of the first voltage stabilizing unit is connected to the input end of a gate switch circuit #32; the second end of the first voltage following unit is connected to the second end of the first current source ibiasB5, and the third end of the first voltage following unit is connected to the first input end of the first output unit 13 and outputs the first reference voltage VCELL2_H.

[0055] Specifically, Figure 4 In the example, the first reference voltage VCELL2_H is equal to the sum of the voltage drop of the first voltage stabilizing unit and the input voltage VCELL_2 of the gate switch circuit #32, that is, the potential of the first reference voltage VCELL2_H is equal to the voltage drop generated by the pull-up current of the first current source ibiasB5 flowing through four series-connected PMOS, and the voltage drop of the voltage follower MNSFB is subtracted after the potential of VCELL_2 is superimposed. By adjusting the size of the PMOS, the number of series connections, or changing the connection relationship of the circuit, the voltage difference between VCELL2_H and VCELL_2 is adjusted by the body effect to ensure that the voltage difference is lower than the gate oxide breakdown voltage of SW2_MB in the gate switch circuit #32. The output resistance of the source follower MNSFB is very low, which can provide a large current to drive the load while maintaining the stability of the output signal, and can be used to provide driving capability for its voltage output node.

[0056] Optionally, the first voltage stabilizing unit is used to output a first reference voltage VCELL2_H after boosting VCELL_2. Its structure can be formed by a mixed cascade of multiple NMOS and PMOS, or realized by using a resistor voltage drop, or by a PN junction voltage drop. Its specific structure is not limited here.

[0057] Figure 4 In the embodiment, the output terminal (i.e., VCELL2_L) and the first terminal (i.e., VSS) of the second voltage regulating unit 12 are respectively connected to the second input terminal and the first terminal of the first output unit 13. The second voltage regulating unit 12 is used to output a second reference voltage VCELL2_L after reducing the input voltage VCELL_2 of the selection switch circuit #32.

[0058] Figure 4 In the embodiment, the second voltage regulating unit 12 includes: a second current source ibiasB1 and a second voltage stabilizing unit, wherein the second voltage stabilizing unit is composed of three NMOSs MNB1, MNB2, and MNB3 connected in series. The first end of the second voltage stabilizing unit is connected to the input end of a gate switch circuit #32, the second end of the second voltage stabilizing unit is connected to the first end of the second current source ibiasB1 and the second input end of the first output unit 13 and outputs the second reference voltage VCELL2_L; the second end of the second current source ibiasB1 is connected to the first end (i.e., VSS) of the first output unit 13;

[0059] Specifically, Figure 4 In the embodiment, the second reference voltage VCELL2_L is equal to the difference between the input voltage of the gate switch circuit (#31~#3n) and the voltage drop of the second voltage stabilizing unit, that is, the potential of the second reference voltage VCELL2_L is equal to the potential of VCELL_2 minus the voltage drop caused by the pull-down current of the second current source ibiasB1 flowing through three series-connected NMOS. By adjusting the size of the NMOS, the number of series connections, or changing the connection relationship of the circuit, the voltage difference between VCELL_2 and VCELL2_L is adjusted by the body effect to ensure that the voltage difference is lower than the gate oxide breakdown voltage of SW2_MB in the gate switch circuit #32.

[0060] Figure 4 In the embodiment, the output end of the first output unit 13 (i.e., GATEB2) is connected to the first control end of a corresponding selection switch circuit #32, and the control end of the first output unit 13 is connected to the corresponding switch control signal. The first output unit 13 is used to output a first turn-on signal (i.e., GATEB2 is a high level) based on the corresponding switch control signal and the first reference voltage VCELL2_H, or to output a first turn-off signal (i.e., GATEB2 is a low level) based on the corresponding switch control signal and the second reference voltage VCELL2_L.

[0061] Figure 4In the embodiment, the first output unit 13 includes: a first output driving unit 131 and a second output driving unit 132, wherein a first end of the first output driving unit 131 is connected to the output end (i.e., VCELL2_H) of the first voltage regulating unit 11, and a second end of the first output driving unit 131 is connected to a first end of the second output driving unit 132 and a first control end of a corresponding selection switch circuit #32; a second end (i.e., VCELL2_L) and a third end (i.e., VSS) of the second output driving unit 132 are respectively connected to the output end and the first end of the second voltage regulating unit 12, and a fourth end of the second output driving unit 132 is connected to a corresponding switch control signal.

[0062] Specifically, Figure 4 In the embodiment, the first output driver unit 131 includes a common source and common gate current mirror composed of MPB4 and MPB5. MPB5 and MPB4 have the same size, so the VGS and VDS of the two PMOS are the same. The second output driver unit 132 includes two NMOS: MNB4 and MNB5. The first output driver unit 131 is used to convert the first reference voltage VCELL2_H into a first turn-on signal (i.e., GATEB2 is a high level) based on the corresponding switch control signal, and the second output driver unit 132 is used to convert the second reference voltage VCELL2_L into a first turn-off signal (i.e., GATEB2 is a low level) based on the corresponding switch control signal; when the switch control signal is a first logic level, the first output driver unit 131 converts the first reference voltage into a first turn-on signal; when the switch control signal is a second logic level, the second output driver unit 132 converts the second reference voltage into a first turn-off signal.

[0063] For example, Figure 4 In the example, taking the output voltage VCELL_2 of the second battery cell that needs to be selected as an example, the second selection switch circuit #32 connected to the battery cell needs to be controlled to be turned on. When SW2_MB needs to be turned on, after setting SW_ON1 to a high level and SW_ON2 to a low level, MNB4 is cut off based on the low level SW_ON2, and after the drain potential of the current mirror MPB5 is pulled up to the source potential VCELL2_H, GATEB2 becomes a high level to drive SW2_MB to turn on. At this time, the voltage difference between GATEB2 and VCELL_2 is lower than the gate oxide breakdown voltage of SW2_MB in the selection switch circuit #32.

[0064] For example, Figure 4In the example, the output voltage VCELL_2 of the second battery cell needs to be selected and cut off. The corresponding second selection switch circuit #32 connected to the battery cell needs to be controlled to be turned off. When SW2_MB needs to be turned off, after SW_ON1 is set to a low level and SW_ON2 is set to a high level, MNB4 is turned on based on the high level SW_ON2. Since the current pull-down capability of the current source ibiasB3 is set to be greater than the pull-up capability of MPB5 in the current mirror, the drain voltage of MNB4 will be continuously pulled down. Due to the clamping effect of MNB5, the lower limit of the voltage pull-down will not exceed the on-state voltage drop of MNB5, that is, the drain voltage of MNB4 is pulled down to the second reference voltage VCELL2_L minus the VGS of MNB5, so that SW2_MB is turned off after GATEB2 becomes a low level. At this time, the voltage difference between VCELL_2 and GATEB2 is lower than the gate oxide breakdown voltage of SW2_MB in the selection switch circuit #32.

[0065] It should be noted that the clamping function of MNB5 can also be achieved by other PMOS or by a diode.

[0066] It should be noted that the present embodiments are all illustrated by examples when the switches in the selection switch circuit are all NMOS. When the switches in the selection switch circuit are all PMOS, those skilled in the art can set the boost and buck processes of the first voltage regulating unit and the second voltage regulating unit according to actual circuit logic requirements to adapt to changes in the sizes of the first reference voltage and the second reference voltage.

[0067] In some optional embodiments, such as Figure 4 As shown, the second level conversion circuit 2 includes: a third voltage regulating unit 21 , a fourth voltage regulating unit 22 and a second output unit 23 .

[0068] Figure 4 In the embodiment, the input end of the third voltage regulating unit 21 is connected to the input end of the fourth voltage regulating unit 22 and the output end (i.e., VISO) of each gate switch circuit, and the output end (i.e., VISO_H) of the third voltage regulating unit 21 is connected to the first input end of the second output unit 23. The third voltage regulating unit 21 is used to boost the output end voltage VISO of the gate switch circuit (#31~#3n) and output a third reference voltage VISO_H.

[0069] Figure 4In the embodiment, the third voltage regulating unit 21 includes: a third current source ibiasA5, a fifth voltage stabilizing unit and a second voltage following unit, wherein the third voltage stabilizing unit is composed of four PMOSs MPA0, MPA1, MPA2 and MPA3 connected in series, and the second voltage following unit is composed of a source follower MNSFA. The first end of the third voltage stabilizing unit is connected to the first end of the second voltage following unit and the first end of the third current source ibiasA5, and the second end of the third voltage stabilizing unit is connected to the output end of each gate switch circuit; the second end of the second voltage following unit is connected to the second end of the third current source ibiasA5, and the third end of the second voltage following unit is connected to the first input end of the second output unit 23 and outputs the third reference voltage VISO_H.

[0070] Specifically, Figure 4 In the example of the second gate switch circuit #32, the third reference voltage VISO_H is equal to the sum of the voltage drop of the third voltage stabilizing unit and the voltage VISO at the output end of the gate switch circuit, that is, the potential of the third reference voltage VISO_H is equal to the voltage drop generated by the pull-up current of the third current source ibiasA5 flowing through four PMOS in series, and the voltage drop of the voltage follower MNSFA is subtracted after the potential of VISO is superimposed. By adjusting the size of the PMOS, the number of series connections, or changing the connection relationship of the circuit, the voltage difference between VISO_H and VISO is adjusted by the body effect to ensure that the voltage difference is lower than the gate oxide breakdown voltage of SW2_MA in the gate switch circuit #32. The output resistance of the source follower MNSFA is very low, which can provide a large current to drive the load while maintaining the stability of the output signal, and can be used to provide driving capability for its voltage output node.

[0071] Optionally, the third voltage stabilizing unit is used to output a third reference voltage VISO_H after boosting VISO. Its structure can be formed by a mixed cascade of multiple NMOS and PMOS, or realized by using a voltage drop of a resistor, or by a PN junction voltage drop. Its specific structure is not limited here.

[0072] Figure 4 In the embodiment, the output end (i.e., VISO_L) and the first end (i.e., VSS) of the fourth voltage regulating unit 22 are respectively connected to the second input end and the first end of the second output unit 23. The fourth voltage regulating unit 22 is used to step down the output end voltage VISO of the selection switch circuit (#31~#3n) and then output a fourth reference voltage VISO_L.

[0073] Figure 4In the embodiment, the fourth voltage regulating unit 22 includes: a fourth current source ibiasA1 and a fourth voltage stabilizing unit, wherein the fourth voltage stabilizing unit is composed of three NMOSs MNA1, MNA2, and MNA3 connected in series. The first end of the fourth voltage stabilizing unit is connected to the output end (i.e., VISO) of each gate switch circuit #32, the second end of the fourth voltage stabilizing unit is connected to the first end of the fourth current source ibiasA1 and the second input end of the second output unit 23 and outputs the fourth reference voltage VISO_L; the second end of the fourth current source ibiasA1 is connected to the first end (i.e., VSS) of the second output unit 23.

[0074] Specifically, Figure 4 In the embodiment, the fourth reference voltage VISO_L is equal to the difference between the output voltage VISO of the gate switch circuit and the voltage drop of the fourth voltage stabilizing unit, that is, the potential of the fourth reference voltage VISO_L is equal to the potential of VISO minus the voltage drop caused by the pull-down current of the fourth current source ibiasA1 flowing through three series-connected NMOS. By adjusting the size of the NMOS, the number of series connections, or changing the connection relationship of the circuit, the voltage difference between VISO and VISO_L is adjusted by the body effect to ensure that the voltage difference is lower than the gate oxide breakdown voltage of SW2_MB in the gate switch circuit #32.

[0075] Figure 4 In the embodiment, one of the multiple input terminals of the second output unit 23 (i.e., the gate of MNA4 or the gate of MNA6) inputs one of the multiple switch control signals, and one of the multiple output terminals of the second output unit 23 (i.e., GATEA1 or GATEA2) is connected to the second control terminal of the corresponding gate switch circuit #32. The second output unit 23 is used to output a second turn-on signal of the corresponding gate switch circuit based on the corresponding switch control signal (SW_ON1 or SW_ON2) and the third reference voltage VISO_H (i.e., GATEA1 or GATEA2 is a high level), or output a second turn-off signal of the corresponding gate switch circuit based on the corresponding switch control signal and the fourth reference voltage VISO_L (i.e., GATEA1 or GATEA2 is a low level).

[0076] Figure 4In the embodiment, the second output unit 23 includes: a plurality of output drive branches (231-23n) connected in parallel. In this embodiment, 23 includes two output drive branches 231 and 232 as an example for explanation, wherein each output drive branch includes an output end, the output end of each output drive branch is connected to the second control end of a corresponding selection switch circuit, the control end of each output drive branch is connected to a corresponding switch control signal, the first end of each output drive branch is connected to the output end of the third voltage regulating unit and receives the third reference voltage VISO_H, and the second end of each output drive branch is connected to the output end of the fourth voltage regulating unit and receives the fourth reference voltage VISO_L.

[0077] Specifically, Figure 4 In the embodiment, each output driving branch outputs a second on-signal corresponding to the gate switch circuit based on a corresponding switch control signal and a third reference voltage, or outputs a second off-signal corresponding to the gate switch circuit based on a corresponding switch control signal and a fourth reference voltage.

[0078] Specifically, Figure 4 In the embodiment, each output driving branch includes a third output driving unit and a fourth output driving unit. Taking the output driving branch 231 as an example, the third output driving unit includes a switch MPA5, and the fourth output driving unit includes a switch MNA4 and a switch MNA5; taking the output driving branch 232 as an example, the third output driving unit includes a switch MPA6, and the fourth output driving unit includes a switch MNA6 and a switch MNA7. The control ends of the switches MPA5 and MPA6 are connected to the control end of the switch MPA4 and form a current mirror with the switch MPA4 respectively.

[0079] Specifically, Figure 4 Taking the output drive branch 231 as an example, the first end of the third output drive unit is connected to the output end of the third voltage regulating unit 21 and receives the third reference voltage VISO_H, the second end of the third output drive unit is connected to the first end of the fourth output drive unit and the second control end of a corresponding selection switch circuit, and the third output drive unit is used to convert the third reference voltage VISO_H into a second conduction signal based on the corresponding switch control signal.

[0080] Specifically, Figure 4Taking the output drive branch 231 as an example, the second end of the fourth output drive unit is connected to the output end of the fourth voltage regulating unit 22, and the third end of the fourth output drive unit is connected to a corresponding switch control signal (i.e., SW_ON2). The fourth output drive unit is used to convert the fourth reference voltage VISO_L into a second shutdown signal based on the corresponding switch control signal; when the switch control signal is at a first logic level, the third output drive unit converts the third reference voltage VISO_H into a second conduction signal; when the switch control signal is at a second logic level, the fourth output drive unit converts the fourth reference voltage VISO_L into a second shutdown signal.

[0081] For example, Figure 4 In the example, taking the output voltage VCELL_2 of the second battery cell that needs to be selected as an example, the second selection switch circuit #32 connected to the battery cell needs to be controlled to be turned on. When SW2_MA needs to be turned on, after setting SW_ON1 to a high level and SW_ON2 to a low level, MNA4 is cut off based on the low level SW_ON2, and after the drain potential of the current mirror MPA5 is pulled up to the source potential VISO_H, GATEA2 becomes a high level to drive SW2_MA to turn on. At this time, the voltage difference between GATEA2 and VISO is lower than the gate oxide breakdown voltage of SW2_MA in the selection switch circuit #32.

[0082] For example, Figure 4 In the example, the output voltage VCELL_2 of the second battery cell needs to be selected and cut off. The second selection switch circuit #32 connected to the battery cell needs to be controlled to be turned off. When SW2_MA needs to be turned off, after SW_ON1 is set to a low level and SW_ON2 is set to a high level, MNA4 is turned on based on the high level SW_ON2. Since the current pull-down capability of the current source ibiasA3 is set to be greater than the pull-up capability of MPA5 in the current mirror, the drain voltage of MNA4 will be continuously pulled down. Due to the clamping effect of MNA5, the lower limit of the voltage pull-down will not exceed the on-state voltage drop of MNA5, that is, the drain voltage of MNA4 is pulled down to the fourth reference voltage VISO_L minus the VGS of MNA5, so that SW2_MA is turned off after GATEA2 becomes a low level. At this time, the voltage difference between VISO and GATEA2 is lower than the gate oxide breakdown voltage of SW2_MA in the selection switch circuit #32.

[0083] It should be noted that the clamping function of MNA5 can also be equivalently realized by the connection mode of MNA7, or by other PMOS, or by a diode.

[0084] It should be noted that, under the premise of ensuring that the level logic of the switch control signal corresponding to the selection switch circuit that needs to be turned on is opposite to the level logic of the switch control signal corresponding to the other selection switch circuits, technical personnel in this field can set the level logic of the switch control signal according to actual needs.

[0085] This embodiment provides a voltage detection circuit, such as Figure 5 As shown, it includes: a control module, a voltage detection module and a voltage gating circuit of the above embodiment or any corresponding implementation method thereof, wherein the output end of the control module is connected to the input end of each first level conversion circuit (#11~#1n) and the input end of the second level conversion circuit 2, and the control module is used to output multiple switch control signals; the input end of the voltage detection module is connected to the output end of each gating switch circuit (#31~#3n), and the voltage detection module is used to detect the input voltage; when it is necessary to detect the output voltage of any battery cell, the first level conversion circuit (#11~#1n) connected to the battery cell outputs a first conduction signal based on the corresponding switch control signal, and the second level conversion circuit 2 outputs a second conduction signal, and then the gating switch circuit (#31~#3n) connected to the battery cell is turned on and outputs the output voltage of the battery cell.

[0086] It should be noted that the method of gating or disconnecting the voltage gating circuit in this embodiment is consistent with the contents of the above embodiment and any corresponding implementation method thereof, and will not be repeated here.

[0087] In the voltage detection circuit provided in this embodiment, the first conduction signal is obtained by boosting the voltage of the input end of the gate switch circuit, and the voltage between the first conduction signal and the input end of the gate switch circuit is less than the breakdown voltage of the switch in the gate switch circuit; the second conduction signal is obtained by boosting the voltage of the output end of the gate switch circuit, and the voltage between the second conduction signal and the output end of the gate switch circuit is less than the breakdown voltage of the switch in the gate switch circuit; when the output voltages of multiple battery cells are detected at the same time, no matter how high the total output voltage is, the two conduction signals controlling the gate switch circuit will not exceed the breakdown voltage drop of the switch in the gate switch circuit, which greatly reduces the risk of breakdown. The gate switch circuit does not need to use a thick gate oxide high-voltage MOS switch to prevent breakdown, which reduces the dependence of the voltage gate circuit on the thick gate oxide high-voltage MOS switch and improves the process selection range of the circuit design.

[0088] Although the embodiments of the present invention have been described in conjunction with the accompanying drawings, those skilled in the art may make various modifications and variations without departing from the spirit and scope of the present invention, and such modifications and variations are all within the scope defined by the appended claims.

Claims

1. A voltage gating circuit, characterized in that: The voltage gating circuit is used to select the output voltage of at least one battery cell, and the voltage gating circuit includes: a plurality of first level conversion circuits, a second level conversion circuit and a plurality of gating switch circuits, wherein: An input terminal of each of the first level conversion circuits inputs one of a plurality of switch control signals, and an input terminal of the second level conversion circuit inputs the plurality of switch control signals; The first control end of each of the gating switch circuits is respectively connected to the output end of one of the first level conversion circuits, and the input end of each of the gating switch circuits is respectively connected to the first end of one of the first level conversion circuits and inputs the output voltage of one of the cells; the second control end of each of the gating switch circuits is respectively connected to a corresponding output end of the second level conversion circuit, and the output end of each of the gating switch circuits is connected to the first end of the second level conversion circuit; When any of the gate switch circuits needs to be turned on, the first level conversion circuit connected to the gate switch circuit boosts or drops the voltage at the input end of the gate switch circuit based on the corresponding switch control signal and outputs a first turn-on signal, and at the same time, the second level conversion circuit boosts or drops the voltage at the output end of the gate switch circuit based on the switch control signal corresponding to the gate switch circuit and outputs a second turn-on signal, and then the gate switch circuit is turned on based on the first turn-on signal and the second turn-on signal, and at this time, the other gate switch circuits are all disconnected; When any of the gate switch circuits is turned off, the voltage difference between the first control terminal and the input terminal of the gate switch circuit, and the voltage difference between the output terminal and the second control terminal of the gate switch circuit are both less than the breakdown voltage of the switch in the gate switch circuit.

2. The voltage gating circuit according to claim 1, characterized in that: When any of the gate switch circuits needs to be turned off, the first level conversion circuit connected to the gate switch circuit outputs a first shutdown signal after reducing or increasing the voltage at the input end of the gate switch circuit based on the corresponding switch control signal, and the second level conversion circuit outputs a second shutdown signal after reducing or increasing the voltage at the output end of the gate switch circuit based on the switch control signal corresponding to the gate switch circuit, and then the gate switch circuit is turned off based on the first shutdown signal and the second shutdown signal; When the switch control signal is at a first logic level, it indicates that the corresponding gate switch circuit needs to be turned on; When the switch control signal is at the second logic level, it indicates that the corresponding gate switch circuit needs to be disconnected; The first logic level is opposite to the second logic level.

3. The voltage gating circuit according to claim 2, characterized in that: Each of the gate switch circuits comprises: a first controllable switch and a second controllable switch, wherein: The first end of the first controllable switch inputs the output voltage of a battery cell, the second end of the first controllable switch is connected to the first end of the second controllable switch, and the control end of the first controllable switch is connected to the output end of the first level conversion circuit connected to the battery cell; The second end of the second controllable switch is connected to the first end of the second level conversion circuit, and the control end of the second controllable switch is connected to an output end of the second level conversion circuit; The first controllable switch and the second controllable switch are turned on based on the first turn-on signal and the second turn-on signal respectively; The first controllable switch and the second controllable switch are turned off based on the first turn-off signal and the second turn-off signal respectively; When the first controllable switch is turned off, a voltage difference between the control end and the first end of the first controllable switch is less than a breakdown voltage of the first controllable switch; When the second controllable switch is turned off, a voltage difference between the second end of the second controllable switch and the control end thereof is smaller than a breakdown voltage of the second controllable switch.

4. The voltage gating circuit according to claim 2, characterized in that: Each of the first level conversion circuits includes: a first voltage regulating unit, a second voltage regulating unit and a first output unit, wherein: The input end of the first voltage regulating unit is connected to the input end of the second voltage regulating unit and the input end of a corresponding one of the gate switch circuits, the output end of the first voltage regulating unit is connected to the first input end of the first output unit, and the first voltage regulating unit is used to boost the input end voltage of the gate switch circuit and then output a first reference voltage; The output end and the first end of the second voltage regulating unit are respectively connected to the second input end and the first end of the first output unit, and the second voltage regulating unit is used to output a second reference voltage after reducing the input voltage of the gate switch circuit; The output end of the first output unit is connected to the first control end of a corresponding one of the selection switch circuits, the control end of the first output unit is connected to the corresponding switch control signal, and the first output unit is used to output a first conduction signal based on the corresponding switch control signal and the first reference voltage, or to output a first shutdown signal based on the corresponding switch control signal and the second reference voltage.

5. The voltage gating circuit according to claim 4, characterized in that: The first voltage regulating unit includes: a first current source, a first voltage stabilizing unit and a first voltage following unit, wherein: The first end of the first voltage stabilizing unit is connected to the first end of the first voltage follower unit and the first end of the first current source and outputs the first reference voltage. The second end of the first voltage stabilizing unit is connected to an input end of the gate switch circuit. The magnitude of the first reference voltage is adjusted by adjusting the parameters of the voltage stabilizing device in the first voltage stabilizing unit. The second end of the first voltage follower unit is connected to the second end of the first current source, the third end of the first voltage follower unit is connected to the first input end of the first output unit, and the first voltage follower unit is used to improve the driving ability of the first reference voltage; The first reference voltage is equal to the sum of the voltage drop of the first voltage stabilizing unit itself and the input terminal voltage of the gate switch circuit.

6. The voltage gating circuit according to claim 5, characterized in that: The second voltage regulating unit includes: a second current source and a second voltage stabilizing unit, wherein: The first end of the second voltage stabilizing unit is connected to an input end of the gate switch circuit, the second end of the second voltage stabilizing unit is connected to the first end of the second current source and the second input end of the first output unit and outputs the second reference voltage, and the magnitude of the second reference voltage is adjusted by adjusting the parameters of the voltage stabilizing device in the second voltage stabilizing unit; The second end of the second current source is connected to the first end of the first output unit; The second reference voltage is equal to the difference between the input terminal voltage of the gate switch circuit and the voltage drop of the second voltage stabilizing unit itself.

7. The voltage gating circuit according to claim 4 or 6, characterized in that: The first output unit includes: a first output driving unit and a second output driving unit, wherein: The first end of the first output driving unit is connected to the output end of the first voltage regulating unit, the second end of the first output driving unit is connected to the first end of the second output driving unit and the first control end of a corresponding one of the gating switch circuits, and the first output driving unit is used to convert the first reference voltage into a first conduction signal based on a corresponding switch control signal; The second end and the third end of the second output driving unit are respectively connected to the output end and the first end of the second voltage regulating unit, the fourth end of the second output driving unit is connected to the corresponding switch control signal, and the second output driving unit is used to convert the second reference voltage into a first shutdown signal based on the corresponding switch control signal; When the switch control signal is at a first logic level, the first output driving unit converts the first reference voltage into a first conduction signal; When the switch control signal is at a second logic level, the second output driving unit converts the second reference voltage into a first shutdown signal.

8. The voltage gating circuit according to claim 2, characterized in that: The second level conversion circuit includes: a third voltage regulating unit, a fourth voltage regulating unit and a second output unit, wherein: The input end of the third voltage regulating unit is connected to the input end of the fourth voltage regulating unit and the output end of each of the gate switch circuits, the output end of the third voltage regulating unit is connected to the first input end of the second output unit, and the third voltage regulating unit is used to boost the output end voltage of the gate switch circuit and then output a third reference voltage; The output end and the first end of the fourth voltage regulating unit are respectively connected to the second input end and the first end of the second output unit, and the fourth voltage regulating unit is used to output a fourth reference voltage after reducing the output end voltage of the gate switch circuit; One of the multiple input terminals of the second output unit is input with one of the multiple switch control signals, one of the multiple output terminals of the second output unit is connected to the second control terminal of a corresponding one of the gating switch circuits, and the second output unit is used to output a second on-signal corresponding to the gating switch circuit based on the corresponding switch control signal and the third reference voltage, or to output a second off-signal corresponding to the gating switch circuit based on the corresponding switch control signal and the fourth reference voltage.

9. The voltage gating circuit according to claim 8, characterized in that: The third voltage regulating unit includes: a third current source, a third voltage stabilizing unit and a second voltage following unit, wherein: The first end of the third voltage stabilizing unit is connected to the first end of the second voltage follower unit and the first end of the third current source and outputs the third reference voltage. The second end of the third voltage stabilizing unit is connected to the output end of each of the gate switch circuits. The magnitude of the third reference voltage is adjusted by adjusting the parameters of the voltage stabilizing device in the third voltage stabilizing unit. The second end of the second voltage following unit is connected to the second end of the third current source, the third end of the second voltage following unit is connected to the first input end of the second output unit, and the second voltage following unit is used to improve the driving capability of the third reference voltage; The third reference voltage is equal to the sum of the voltage drop of the third voltage stabilizing unit itself and the output terminal voltage of the gate switch circuit.

10. The voltage gating circuit according to claim 9, characterized in that: The fourth voltage regulating unit includes: a fourth current source and a fourth voltage stabilizing unit, wherein: The first end of the fourth voltage stabilizing unit is connected to the output end of one of the gate switch circuits, the second end of the fourth voltage stabilizing unit is connected to the first end of the fourth current source and the second input end of the second output unit and outputs the fourth reference voltage, and the magnitude of the fourth reference voltage is adjusted by adjusting the parameters of the voltage stabilizing device in the fourth voltage stabilizing unit; The second end of the fourth current source is connected to the first end of the second output unit; The fourth reference voltage is equal to the difference between the output terminal voltage of the gate switch circuit and the voltage drop of the fourth voltage stabilizing unit itself.

11. The voltage gating circuit according to claim 8 or 10, characterized in that: The second output unit comprises: a plurality of output drive branches, wherein: Each output drive branch includes an output terminal, the output terminal of each output drive branch is connected to the second control terminal of a corresponding gate switch circuit, the control terminal of each output drive branch is connected to a corresponding switch control signal, the first terminal of each output drive branch is connected to the output terminal of the third voltage regulating unit and receives a third reference voltage, the second terminal of each output drive branch is connected to the output terminal of the fourth voltage regulating unit and receives a fourth reference voltage, and each output drive branch outputs a second on-signal corresponding to the gate switch circuit based on a corresponding switch control signal and the third reference voltage, or outputs a second off-signal corresponding to the gate switch circuit based on a corresponding switch control signal and the fourth reference voltage; Each output driving branch includes a third output driving unit and a fourth output driving unit, wherein: The first end of the third output driving unit is connected to the output end of the third voltage regulating unit and receives the third reference voltage, the second end of the third output driving unit is connected to the first end of the fourth output driving unit and the second control end of a corresponding one of the gating switch circuits, and the third output driving unit is used to convert the third reference voltage into a second conduction signal based on a corresponding switch control signal; The second end of the fourth output driving unit is connected to the output end of the fourth voltage regulating unit, the third end of the fourth output driving unit is connected to a corresponding switch control signal, and the fourth output driving unit is used to convert the fourth reference voltage into a second shutdown signal based on the corresponding switch control signal; When the switch control signal is at a first logic level, the third output driving unit converts the third reference voltage into a second conduction signal; When the switch control signal is at a second logic level, the fourth output driving unit converts the fourth reference voltage into a second shutdown signal.

12. A voltage detection circuit, characterized in that: include: A control module, a voltage detection module, and a voltage gating circuit according to any one of claims 1 to 11, wherein: The output end of the control module is connected to the input end of each first level conversion circuit and the input end of the second level conversion circuit, and the control module is used to output a plurality of switch control signals; The input end of the voltage detection module is connected to the output end of each gate switch circuit, and the voltage detection module is used to detect the input voltage; When it is necessary to detect the output voltage of any battery cell, the first level conversion circuit connected to the battery cell outputs a first conduction signal based on the corresponding switch control signal, and the second level conversion circuit outputs a second conduction signal, and then the selection switch circuit connected to the battery cell is turned on and outputs the output voltage of the battery cell.

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