Negative pressure drive circuit and energy storage system

Abstract

The application relates to a negative voltage driving circuit and an energy storage system. The input end of the negative voltage driving circuit is connected with a power supply and a pulse driving signal respectively, and the negative voltage driving circuit comprises a first capacitor and a second capacitor. The second capacitor is connected with the gate of a P-type switch tube, and the P-type switch tube is connected between a battery and a conversion circuit. The negative voltage driving circuit is used for charging the first capacitor by the power supply when the pulse driving signal is a first level; and charging the second capacitor by the first capacitor when the pulse driving signal is a second level, so that the second capacitor generates a negative voltage. The second capacitor is also used for maintaining the negative voltage based on the stored electric energy of the second capacitor when the negative voltage driving circuit receives the pulse driving signal with the first level. The negative voltage driving circuit can pull up the driving voltage of the PMOSFET, so as to reduce the on-resistance and improve the reliability.

Description

Technical Field

[0001] This application relates to the field of power supply technology, and in particular to a negative voltage drive circuit and energy storage system. Background Technology

[0002] When the battery in an energy storage system supplies power to the conversion circuit, a switch is usually installed between the battery and the conversion circuit to turn the power supply to the conversion circuit on or off.

[0003] In related technologies, the switch is implemented using a P-type metal-oxide-semiconductor field-effect transistor (PMOSFET). To maintain the integrity of the printed circuit board (PCB) ground plane, the switch is usually placed on the high side. When the battery's state of charge (SOC) is low, the PMOSFET's drive voltage is low, its on-resistance increases, leading to increased losses, higher device temperature, and reduced reliability. Summary of the Invention

[0004] Therefore, it is necessary to provide a negative voltage drive circuit and energy storage system to address the above-mentioned technical problems, which can increase the drive voltage of the PMOSFET to reduce the on-resistance and improve reliability.

[0005] In a first aspect, this application provides a negative voltage driving circuit. The input terminal of the negative voltage driving circuit is connected to a power supply and a pulse driving signal, respectively. The negative voltage driving circuit includes a first capacitor and a second capacitor. The second capacitor is connected to the gate of a P-type switch. The P-type switch is connected between a battery and a conversion circuit.

[0006] The negative voltage drive circuit is used to control the power supply to charge the first capacitor when the pulse drive signal is at the first level; and to control the first capacitor to charge the second capacitor when the pulse drive signal is at the second level, so that the second capacitor generates a negative voltage.

[0007] The second capacitor is also used to maintain the negative voltage based on its stored electrical energy when the negative voltage drive circuit receives a pulse drive signal at the first level.

[0008] In one embodiment, the negative pressure drive circuit further includes a first charging control circuit and a second charging control circuit, wherein the first capacitor is connected between the input terminal and the output terminal of the first charging control circuit, and the second capacitor is connected between the input terminal and the output terminal of the second charging control circuit.

[0009] The first charging control circuit is used to turn on the path between the power supply and the first capacitor when the pulse drive signal is at the first level, and control the power supply to charge the first capacitor; and to turn off the path between the power supply and the first capacitor when the pulse drive signal is at the second level, and control the power supply to stop charging the first capacitor.

[0010] The second charging control circuit is used to cut off the path between the first capacitor and the second capacitor when the pulse drive signal is at the first level, and maintain the negative voltage based on its own stored electrical energy; when the pulse drive signal is at the second level, it controls the first capacitor to charge the second capacitor so that the second capacitor generates a negative voltage.

[0011] In one embodiment, the first charging control circuit includes a first switching subunit and a second switching subunit. The first switching subunit is connected between the power supply and the positive terminal of the first capacitor, and the second switching subunit is connected between the negative terminal of the first capacitor and ground and the gate of the P-type switching transistor.

[0012] When the pulse drive signal is at the first level, both the first and second switch subunits are in the on state to connect the power supply and the first capacitor; when the pulse drive signal is at the second level, both the first and second switch subunits are in the off state to disconnect the power supply and the first capacitor.

[0013] In one embodiment, the first switching subunit includes a resistor and a first switching transistor. The collector of the first switching transistor is connected to a power supply, and the base and emitter of the first switching transistor are both connected to a second charging control circuit. The emitter of the first switching transistor is also connected to a first terminal of the resistor, and the second terminal of the resistor is connected to the positive terminal of the first capacitor.

[0014] In one embodiment, the second switching subunit includes a first diode, a second diode, a resistor, and a second switching transistor. The cathode of the first diode and the anode of the second diode are both connected to the negative terminal of the first capacitor. The anode of the first diode is connected to the gate of the second capacitor and the P-type switching transistor, respectively. The cathode of the second diode is connected to the collector of the second switching transistor. The base of the second switching transistor is connected to the second charging control circuit through the resistor. The emitter of the second switching transistor is grounded.

[0015] In one embodiment, the second charging control circuit includes a third switch subunit, a fourth switch subunit, and a fifth switch subunit. The input terminals of the third switch subunit and the fourth switch subunit are both connected to the power supply and the pulse drive signal. The output terminal of the fourth switch subunit is connected to the input terminal of the fifth switch subunit. The output terminals of the third switch subunit, the fourth switch subunit, and the fifth switch subunit are all connected to the first charging control circuit.

[0016] When the pulse drive signal is at the first level, the third, fourth, and fifth switch subunits are all in the off state to cut off the path between the first and second capacitors; when the pulse drive signal is at the second level, the third, fourth, and fifth switch subunits are all in the on state to open the path between the first and second capacitors.

[0017] In one embodiment, the third switch subunit includes resistor three, resistor four, resistor five and a third switch transistor. The first ends of resistor three and resistor five are both connected to the power supply. The second end of resistor three is connected to the pulse drive signal, the first end of resistor four and the fourth switch subunit, respectively. The second end of resistor four is connected to the base of the third switch transistor. The collector of the third switch transistor is connected to the second end of resistor five and the first charging control circuit, respectively. The emitter of the third switch transistor is grounded.

[0018] In one embodiment, the fourth switching subunit includes a resistor six and a fourth switching transistor. The first end of the resistor six is ​​connected to the pulse drive signal and the third switching subunit, respectively. The second end of the resistor six is ​​connected to the base of the fourth switching transistor. The collector of the fourth switching transistor is connected to the fifth switching subunit, and the emitter of the fourth switching transistor is grounded.

[0019] In one embodiment, the fifth switching subunit includes a resistor seven and a fifth switching transistor. The first end of the resistor seven is connected to a power supply, and the second end of the resistor seven is connected to the fourth switching subunit, the base of the fifth switching transistor, and the first charging control circuit, respectively. The emitter of the fifth switching transistor is connected to the first charging control circuit, and the collector of the fifth switching transistor is grounded.

[0020] Secondly, this application also provides an energy storage system, which includes a battery, any one of the negative pressure drive circuits and conversion circuits in the first aspect.

[0021] The aforementioned negative voltage drive circuit and energy storage system have their input terminals connected to a power supply and a pulse drive signal, respectively. The negative voltage drive circuit includes a first capacitor and a second capacitor. The second capacitor is connected to the gate of a P-type switch, which is connected between the battery and the conversion circuit. The negative voltage drive circuit controls the power supply to charge the first capacitor when the pulse drive signal is at a first level; and controls the first capacitor to charge the second capacitor when the pulse drive signal is at a second level, thus generating a negative voltage in the second capacitor. The second capacitor also maintains a negative voltage based on its stored energy when the negative voltage drive circuit receives a first-level pulse drive signal. This negative voltage drive circuit, through the coordinated connection of its input terminals to the power supply and the pulse drive signal, combined with the graded charging design of the first and second capacitors, achieves charging of the first capacitor and maintenance of a negative voltage in the second capacitor when the pulse drive signal is at a first level. When the pulse drive signal is at a second level, the first capacitor charges the second capacitor to generate a negative voltage, increasing the absolute value of the drive voltage of the P-type switch connected to the second capacitor, reducing its on-resistance, and improving the reliability of the P-type switch. Attached Figure Description

[0022] To more clearly illustrate the technical solutions in the embodiments of this application or related technologies, the drawings used in the description of the embodiments of this application or related technologies will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0023] Figure 1 This is a schematic diagram of the first circuit structure of the negative voltage drive circuit in one embodiment;

[0024] Figure 2 This is a schematic diagram of the second circuit structure of the negative voltage drive circuit in one embodiment;

[0025] Figure 3 This is a circuit diagram of a negative voltage drive circuit in one embodiment.

[0026] Explanation of reference numerals in the attached figures:

[0027] Negative pressure drive circuit 10; first charging control circuit 11; first switch subunit 111; second switch subunit 112; second charging control circuit 12; third switch subunit 121; fourth switch subunit 122; fifth switch subunit 123; conversion circuit 20. Detailed Implementation

[0028] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0029] In the description of this application, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this application, "multiple" means at least two, for example, two, three, etc., unless otherwise explicitly specified.

[0030] In this application, unless otherwise expressly specified and limited, the terms "connected" and "linked" should be interpreted broadly. For example, they can refer to electrical connections, direct connections, or indirect connections via an intermediate medium, unless otherwise expressly limited. Those skilled in the art can understand the specific meaning of the above terms in this application based on the specific circumstances.

[0031] In one embodiment, such as Figure 1 As shown, a negative voltage drive circuit 10 is provided. The input terminal of the negative voltage drive circuit 10 is connected to the power supply VCC and the pulse drive signal PWM_EN respectively. The negative voltage drive circuit 10 includes a first capacitor C1 and a second capacitor C2. The second capacitor C2 is connected to the gate of the P-type switch. The P-type switch is connected between the battery BAT and the conversion circuit 20.

[0032] The negative voltage drive circuit 10 is used to control the power supply VCC to charge the first capacitor C1 when the pulse drive signal PWM_EN is at the first level; and to control the first capacitor C1 to charge the second capacitor C2 when the pulse drive signal PWM_EN is at the second level, so that the second capacitor C2 generates a negative voltage.

[0033] The second capacitor C2 is also used to maintain the negative voltage based on its stored electrical energy when the negative voltage drive circuit 10 receives the pulse drive signal PWM_EN at the first level.

[0034] In this embodiment, a P-type switch is provided between the battery BAT and the conversion circuit 20. When the P-type switch is in the on state, the battery BAT can supply power to the conversion circuit 20; when the P-type switch is in the off state, the battery BAT cannot supply power to the conversion circuit 20. For the negative voltage drive circuit 10 as a whole, the input terminal of the negative voltage drive circuit 10 is connected to the power supply VCC and the pulse drive signal PWM_EN, and the output terminal of the negative voltage drive circuit 10 is connected to the gate of the P-type switch. The main purpose is to control the on and off of the P-type switch, thereby achieving power supply control.

[0035] The negative voltage drive circuit 10 includes a first capacitor C1 and a second capacitor C2. The power supply VCC is connected to the first capacitor C1 through some electronic components, and charges the first capacitor C1 under certain conditions. The second capacitor C2 is connected to the gate of the P-type switch, and the second capacitor C2 is also connected to the first capacitor C1 through some electronic components. Under certain conditions, the second capacitor C2 can be charged through the first capacitor C1.

[0036] In the initial stage of power-on at VCC, battery BAT cannot charge the first capacitor C1. Therefore, there is no charge in the first capacitor C1, and its voltage remains at its initial zero voltage. Under these circumstances, the first capacitor C1 also cannot charge the second capacitor C2, and its voltage also remains at its initial zero voltage. Consequently, the second capacitor C2 cannot drive the P-type switch to conduct; that is, the P-type switch is in the off state, and battery BAT cannot charge the conversion circuit 20.

[0037] After the power supply VCC is powered on and the output voltage of the power supply VCC is stable, the charging process of the first capacitor C1 and the second capacitor C2 still needs to be determined based on the pulse drive signal PWM_EN. The pulse drive signal PWM_EN can be a signal output by the controller. When it is not necessary to charge the conversion circuit 20 through the battery BAT, it is necessary to control the P-type switch to be in the off state, and the controller does not need to output the pulse drive signal PWM_EN.

[0038] When the conversion circuit 20 needs to be charged via the battery BAT, the P-type switch needs to be turned on. At this time, the controller can output a pulse drive signal PWM_EN. It should be noted that this pulse drive signal PWM_EN is in continuous pulse width modulation mode, meaning the controller continuously outputs a periodic pulse signal with a fixed period and no interruption interval. The duty cycle can be dynamically adjusted or maintained at a fixed value according to control requirements. In this state, the pulse drive signal PWM_EN is continuously and uninterruptedly transmitted to the negative voltage drive circuit 10.

[0039] The pulse drive signal PWM_EN includes two distinct discrete voltage levels, namely the first level and the second level. It can be understood that the first level and the second level represent different high and low voltage states, and their alternation constitutes a complete pulse signal cycle. For example, the first level can be high and the second level low, or the configuration can be reversed according to the design requirements of the negative voltage drive circuit 10.

[0040] When the pulse drive signal PWM_EN is at the first level, the negative voltage drive circuit 10 can control the path between the power supply VCC and the first capacitor C1 to be turned on, thus controlling the power supply VCC to charge the first capacitor C1. When the pulse drive signal PWM_EN is at the second level, the negative voltage drive circuit 10 can control the first capacitor C1, which already has charging charge, to charge the second capacitor C2. That is, within one cycle corresponding to the pulse drive signal PWM_EN, the first capacitor C1 and the second capacitor C2 complete one charge cycle in sequence. After multiple cycles, the voltage across the second capacitor C2 remains negative.

[0041] It should also be noted that when the pulse drive signal PWM_EN is at the first level, the second capacitor C2 can maintain a negative voltage based on its stored electrical energy. When the second capacitor C2 maintains a negative voltage, the absolute value of the drive voltage of the P-type switch increases, the on-resistance decreases, and the reliability of the P-type switch is improved.

[0042] The input terminals of the aforementioned negative voltage drive circuit 10 are connected to the power supply VCC and the pulse drive signal PWM_EN, respectively. The negative voltage drive circuit 10 includes a first capacitor C1 and a second capacitor C2. The second capacitor C2 is connected to the gate of a P-type switch, which is connected between the battery BAT and the conversion circuit 20. The negative voltage drive circuit 10 is used to control the power supply VCC to charge the first capacitor C1 when the pulse drive signal PWM_EN is at the first level; and to control the first capacitor C1 to charge the second capacitor C2 when the pulse drive signal PWM_EN is at the second level, so that the second capacitor C2 generates a negative voltage. The second capacitor C2 is also used to maintain a negative voltage based on its stored electrical energy when the negative voltage drive circuit 10 receives the pulse drive signal PWM_EN at the first level. The negative voltage drive circuit 10 is connected to the power supply VCC and the pulse drive signal PWM_EN through the input terminal. Combined with the graded charging design of the first capacitor C1 and the second capacitor C2, when the pulse drive signal PWM_EN is at the first level, the first capacitor C1 is charged and the second capacitor C2 is maintained at a negative voltage. When the pulse drive signal PWM_EN is at the second level, the first capacitor C1 charges the second capacitor C2 to generate a negative voltage, which increases the absolute value of the drive voltage of the P-type switch connected to the second capacitor C2, reduces the on-resistance, and improves the reliability of the P-type switch.

[0043] The following example illustrates the other circuitry in the negative voltage drive circuit 10 described above, excluding the first capacitor C1 and the second capacitor C2. Figure 2 As shown, the negative pressure drive circuit 10 also includes a first charging control circuit 11 and a second charging control circuit 12. The first capacitor C1 is connected between the input and output terminals of the first charging control circuit 11, and the second capacitor C2 is connected between the input and output terminals of the second charging control circuit 12.

[0044] The first charging control circuit 11 is used to turn on the path between the power supply VCC and the first capacitor C1 when the pulse drive signal PWM_EN is at the first level, and control the power supply VCC to charge the first capacitor C1; when the pulse drive signal PWM_EN is at the second level, it cuts off the path between the power supply VCC and the first capacitor C1, and controls the power supply VCC to stop charging the first capacitor C1.

[0045] The second charging control circuit 12 is used to cut off the path between the first capacitor C1 and the second capacitor C2 when the pulse drive signal PWM_EN is at the first level, and maintain the negative voltage based on its own stored electrical energy; when the pulse drive signal PWM_EN is at the second level, it controls the first capacitor C1 to charge the second capacitor C2 so that the second capacitor C2 generates a negative voltage.

[0046] In this embodiment of the application, the negative voltage driving circuit 10 involves the charging process of the first capacitor C1 and the second capacitor C2 during operation. In order to accurately control the charging of the first capacitor C1 and the second capacitor C2, the negative voltage driving circuit 10 also includes a first charging control circuit 11 and a second charging control circuit 12.

[0047] The first charging control circuit 11 is mainly used to turn on or off the path between the power supply VCC and the first capacitor C1. Therefore, the first capacitor C1 can be connected between the input and output terminals of the first charging control circuit 11. The first charging control circuit 11 also needs to be connected to the power supply VCC and the pulse drive signal PWM_EN.

[0048] The second charging control circuit 12 is mainly used to turn on or off the path between the first capacitor C1 and the second capacitor C2. Therefore, the second capacitor C2 can be connected between the input and output terminals of the second charging control circuit 12. The second charging control circuit 12 also needs to be connected to the first capacitor C1, the power supply VCC, and the pulse drive signal PWM_EN.

[0049] When the controller outputs the pulse drive signal PWM_EN, both the first charging control circuit 11 and the second charging control circuit 12 begin to operate. When the pulse drive signal PWM_EN output by the controller is at the first level, the first charging control circuit 11 can conduct the path between the power supply VCC and the first capacitor C1. At the same time, the second charging control circuit 12 can cut off the path between the first capacitor C1 and the second capacitor C2, controlling the power supply VCC to charge the first capacitor C1.

[0050] When the pulse drive signal PWM_EN output by the controller is at the second level, the first charging control circuit 11 can cut off the path between the power supply VCC and the first capacitor C1. At the same time, the second charging control circuit 12 can open the path between the first capacitor C1 and the second capacitor C2, controlling the first capacitor C1 to charge the second capacitor C2.

[0051] It should be noted that both the first charging control circuit 11 and the second charging control circuit 12 can be composed of multiple switching transistors and other electronic components.

[0052] The aforementioned negative voltage driving circuit 10 further includes a first charging control circuit 11 and a second charging control circuit 12. A first capacitor C1 is connected between the input and output terminals of the first charging control circuit 11, and a second capacitor C2 is connected between the input and output terminals of the second charging control circuit 12. The first charging control circuit 11 is used to turn on the path between the power supply VCC and the first capacitor C1 when the pulse driving signal PWM_EN is at a first level, controlling the power supply VCC to charge the first capacitor C1; and to turn off the path between the power supply VCC and the first capacitor C1 when the pulse driving signal PWM_EN is at a second level, controlling the power supply VCC to stop charging the first capacitor C1. The second charging control circuit 12 is used to turn off the path between the first capacitor C1 and the second capacitor C2 when the pulse driving signal PWM_EN is at a first level, maintaining a negative voltage based on its stored electrical energy; and to control the first capacitor C1 to charge the second capacitor C2 when the pulse driving signal PWM_EN is at a second level, so that the second capacitor C2 generates a negative voltage. Based on the first capacitor C1 and the second capacitor C2, the negative voltage drive circuit 10 also adds a first charging control circuit 11 and a second charging control circuit 12 that cooperate with each other. These circuits control the charging paths of the first capacitor C1 and the second capacitor C2 respectively. They can control the charging of the first capacitor C1 and the second capacitor C2 respectively when the pulse drive signal PWM_EN is at different levels, so that the second capacitor C2 generates a negative voltage and accurately provides negative voltage drive for the P-type switching transistor.

[0053] In one embodiment, see continue to see Figure 2The details of the first charging control circuit 11 mentioned in the above embodiment will be described. The first charging control circuit 11 includes a first switching subunit 111 and a second switching subunit 112. The first switching subunit 111 is connected between the power supply VCC and the positive terminal of the first capacitor C1, and the second switching subunit 112 is connected between the negative terminal of the first capacitor C1 and ground and the gate of the P-type switching transistor.

[0054] When the pulse drive signal PWM_EN is at the first level, both the first switch subunit 111 and the second switch subunit 112 are in the on state to conduct the path between the power supply VCC and the first capacitor C1; when the pulse drive signal PWM_EN is at the second level, both the first switch subunit 111 and the second switch subunit 112 are in the off state to cut off the path between the power supply VCC and the first capacitor C1.

[0055] In this embodiment of the application, the first charging control circuit 11 may consist of two switching sub-units, namely the first switching sub-unit 111 and the second switching sub-unit 112. The two ends of the first switching sub-unit 111 are respectively connected to the power supply VCC and the positive terminal of the first capacitor C1, and the three ends of the second switching sub-unit 112 are respectively connected to the negative terminal of the first capacitor C1, ground, and the gate of the P-type switching transistor.

[0056] When the pulse drive signal PWM_EN output by the controller is at the first level, the first switching subunit 111 conducts the path between the power supply VCC and the positive terminal of the first capacitor C1. At the same time, the second switching subunit 112 conducts the path between the negative terminal of the first capacitor C1 and ground and the gate of the P-type switch. At this time, the power supply VCC can charge the first capacitor C1.

[0057] In one embodiment, such as Figure 3 As shown, the first switch subunit 111 includes a resistor R1 and a first switch transistor Q1. The collector of the first switch transistor Q1 is connected to the power supply VCC. The base and emitter of the first switch transistor Q1 are both connected to the second charging control circuit 12. The emitter of the first switch transistor Q1 is also connected to the first end of the resistor R1. The second end of the resistor R1 is connected to the positive terminal of the first capacitor C1.

[0058] Continue as Figure 3As shown, the second switch subunit 112 includes a first diode D1, a second diode D2, a resistor R2, and a second switch Q2. The cathode of the first diode D1 and the anode of the second diode D2 are both connected to the negative terminal of the first capacitor C1. The anode of the first diode D1 is connected to the second capacitor C2 and the gate of the P-type switch, respectively. The cathode of the second diode D2 is connected to the collector of the second switch Q2. The base of the second switch Q2 is connected to the second charging control circuit 12 through the resistor R2. The emitter of the second switch Q2 is grounded.

[0059] In the initial stage of power-on VCC, both the first switching transistor Q1 and the second switching transistor Q2 are in the off state.

[0060] When the pulse drive signal PWM_EN output by the controller is at the first level, both the first switch Q1 and the second switch Q2 are in the on state. The power supply VCC can charge the first capacitor C1 through the first switch Q1, resistor R1, second diode D2, and second switch Q2. The voltage across the first capacitor C1 is negative on the left and positive on the right. When the first capacitor C1 is fully charged, its absolute voltage Vc1 can be expressed as: Vc1 = VCC - Vce1 - VD2 - Vce2, where Vce1 represents the saturation on-state voltage drop of the first switch Q1, VD2 represents the on-state voltage drop of the second diode D2, and Vce2 represents the saturation on-state voltage drop of the second switch Q2.

[0061] When the pulse drive signal PWM_EN output by the controller is at the second level, both the first switch Q1 and the second switch Q2 are in the off state, the path between the first capacitor C1 and the power supply VCC is cut off, so that the first capacitor C1 cannot be charged through the power supply VCC.

[0062] The aforementioned first charging control circuit 11 includes a first switching subunit 111 and a second switching subunit 112. The first switching subunit 111 is connected between the power supply VCC and the positive terminal of the first capacitor C1, and the second switching subunit 112 is connected between the negative terminal of the first capacitor C1 and ground, and the gate of the P-type switching transistor. When the pulse drive signal PWM_EN is at the first level, both the first switching subunit 111 and the second switching subunit 112 are in the on state to conduct the path between the power supply VCC and the first capacitor C1. When the pulse drive signal PWM_EN is at the second level, both the first switching subunit 111 and the second switching subunit 112 are in the off state to cut off the path between the power supply VCC and the first capacitor C1. By configuring the first charging control circuit 11 into a cooperative structure including a first switching subunit 111 and a second switching subunit 112, the first switching subunit 111 is connected to the power supply VCC and the positive terminal of the first capacitor C1, and the second switching subunit 112 is connected to the negative terminal of the first capacitor C1 and ground and the gate of the P-type switching transistor. The synchronous conduction and shutdown of the two switching subunits are achieved by means of the level switching of the pulse drive signal PWM_EN, which can realize the precise timing control of the charging of the first capacitor C1.

[0063] In one embodiment, see continue to see Figure 2 The details of the second charging control circuit 12 mentioned in the above embodiment will be described. The second charging control circuit 12 includes a third switch subunit 121, a fourth switch subunit 122 and a fifth switch subunit 123. The input terminals of the third switch subunit 121 and the fourth switch subunit 122 are both connected to the power supply VCC and the pulse drive signal PWM_EN. The output terminal of the fourth switch subunit 122 is connected to the input terminal of the fifth switch subunit 123. The output terminals of the third switch subunit 121, the fourth switch subunit 122 and the fifth switch subunit 123 are all connected to the first charging control circuit 11.

[0064] When the pulse drive signal PWM_EN is at the first level, the third switch subunit 121, the fourth switch subunit 122, and the fifth switch subunit 123 are all in the off state to cut off the path between the first capacitor C1 and the second capacitor C2; when the pulse drive signal PWM_EN is at the second level, the third switch subunit 121, the fourth switch subunit 122, and the fifth switch subunit 123 are all in the on state to open the path between the first capacitor C1 and the second capacitor C2.

[0065] In this embodiment of the application, the second charging control circuit 12 may consist of three switch subunits, namely the third switch subunit 121, the fourth switch subunit 122 and the fifth switch subunit 123.

[0066] When the pulse drive signal PWM_EN output by the controller is at the first level, the third switch subunit 121, the fourth switch subunit 122, and the fifth switch subunit 123 are all turned off, thus cutting off the path between the first capacitor C1 and the second capacitor C2. The first capacitor C1 cannot charge the second capacitor C2, and the second capacitor C2 can maintain a negative voltage based on its stored electrical energy. When the pulse drive signal PWM_EN output by the controller is at the second level, the third switch subunit 121, the fourth switch subunit 122, and the fifth switch subunit 123 are all turned on, thus opening the path between the first capacitor C1 and the second capacitor C2. The first capacitor C1 can then charge the second capacitor C2, causing the second capacitor C2 to generate a negative voltage.

[0067] In one embodiment, see continue to see Figure 3 As shown, the third switch subunit 121 includes resistor R3, resistor R4, resistor R5 and third switch transistor Q3. The first ends of resistors R3 and R5 are both connected to the power supply VCC. The second end of resistor R3 is connected to the pulse drive signal PWM_EN, the first end of resistor R4, and the fourth switch subunit 122, respectively. The second end of resistor R4 is connected to the base of the third switch transistor Q3. The collector of the third switch transistor Q3 is connected to the second end of resistor R5 and the first charging control circuit 11, respectively. The emitter of the third switch transistor Q3 is grounded.

[0068] The fourth switch subunit 122 includes a resistor R6 and a fourth switch transistor Q4. The first end of the resistor R6 is connected to the pulse drive signal PWM_EN and the third switch subunit 121, respectively. The second end of the resistor R6 is connected to the base of the fourth switch transistor Q4. The collector of the fourth switch transistor Q4 is connected to the fifth switch subunit 123. The emitter of the fourth switch transistor Q4 is grounded.

[0069] The fifth switch subunit 123 includes a resistor R7 and a fifth switch transistor Q5. The first end of the resistor R7 is connected to the power supply VCC. The second end of the resistor R7 is connected to the fourth switch subunit 122, the base of the fifth switch transistor Q5, and the first charging control circuit 11. The emitter of the fifth switch transistor Q5 is connected to the first charging control circuit 11. The collector of the fifth switch transistor Q5 is grounded.

[0070] In the embodiments of this application, during the initial stage of power supply VCC being powered on, since resistor R3 is connected between the pulse drive signal PWM_EN and power supply VCC, the third switch Q3, the fourth switch Q4, and the fifth switch Q5 are all turned on.

[0071] When the pulse drive signal PWM_EN output by the controller is at the first level, the third switch Q3, the fourth switch Q4, and the fifth switch Q5 are all in the off state. When the pulse drive signal PWM_EN output by the controller is at the second level, the third switch Q3, the fourth switch Q4, and the fifth switch Q5 are all in the on state. The first capacitor C1 charges the second capacitor C2 through resistor R1, the fifth switch Q5, the third diode D3, and the first diode D1. After several cycles, the voltage Vc2 across the second capacitor C2 stabilizes at a negative voltage. The absolute value of the voltage Vc2 across the second capacitor C2 can be expressed as: Vc2 = Vc1 - VD1 - Vce5 - VD3, where Vc1 represents the absolute value of the voltage across the first capacitor C1, VD1 represents the forward voltage drop of the first diode D1, Vce5 represents the saturation forward voltage drop of the fifth switch Q5, and VD3 represents the forward voltage drop of the third diode D3. At this time, the driving voltage of the P-type switch is -VBat-Vce1-VD3.

[0072] The second charging control circuit 12 includes a third switch subunit 121, a fourth switch subunit 122, and a fifth switch subunit 123. The input terminals of the third switch subunit 121 and the fourth switch subunit 122 are both connected to the power supply VCC and the pulse drive signal PWM_EN. The output terminal of the fourth switch subunit 122 is connected to the input terminal of the fifth switch subunit 123, and the output terminals of the third switch subunit 121, the fourth switch subunit 122, and the fifth switch subunit 123 are all connected to the first charging control circuit 11. When the pulse drive signal PWM_EN is at the first level, the third switch subunit 121, the fourth switch subunit 122, and the fifth switch subunit 123 are all in the off state to cut off the path between the first capacitor C1 and the second capacitor C2. When the pulse drive signal PWM_EN is at the second level, the third switch subunit 121, the fourth switch subunit 122, and the fifth switch subunit 123 are all in the on state to open the path between the first capacitor C1 and the second capacitor C2. By setting the second charging control circuit 12 as a collaborative architecture of the third, fourth, and fifth switching sub-units 123, and combining the connection of the input terminals of the three switching sub-units to the power supply VCC and the pulse drive signal PWM_EN, as well as the connection of the output terminals to the first charging control circuit 11, the synchronous on / off control of the three sub-units under the switching level of the pulse drive signal PWM_EN is realized, which can ensure the charging process of the second capacitor C2.

[0073] The above embodiments have provided a detailed description of the internal circuit structure of the negative voltage drive circuit 10. The following section will describe the details of the second capacitor C2 in the negative voltage drive circuit 10. (See also...) Figure 3As shown, the first terminal of the second capacitor C2 is connected to the gate of the P-type switch, the second terminal of the second capacitor C2 is connected to the cathode of the third diode D3, and the anode of the third diode D3 is grounded.

[0074] The negative voltage drive circuit 10 is used to control the first capacitor C1 to charge the second capacitor C2 when the pulse drive signal PWM_EN is at the second level. The charge flows from the second end of the second capacitor C2 to the first end. The second end of the second capacitor C2 is fixed at zero potential through a grounding loop. The potential of the first end of the second capacitor C2 decreases so that the second capacitor C2 generates a negative voltage.

[0075] In this embodiment, the second capacitor C2 is connected between the gate of the P-type switch and the cathode of the third diode D3. During the charging process of the second capacitor C2 by the first capacitor C1, charge flows out from the positive terminal of the first capacitor C1, passes through the fifth switch Q5 and the third diode D3, and flows into the positive terminal of the second capacitor C2. The charge then flows out from the negative terminal of the second capacitor C2 back to the negative terminal of the first capacitor C1. It should be noted that the positive terminal of the second capacitor C2 is the second terminal, and the negative terminal is the first terminal. Since the second terminal of the second capacitor C2 is fixed at zero potential through a grounding loop, after being charged by the first capacitor C1, the potential of the negative terminal of the second capacitor C2 decreases, thereby generating a negative voltage in the second capacitor C2.

[0076] See also Figure 3 The first terminal of the second capacitor C2 can also be connected to the first terminal of resistor R8, and the second terminal of resistor R8 is connected to the battery BAT and the source of the P-type switching transistor respectively.

[0077] During the initial power-on phase of VCC, the third diode D3 ensures that the battery BAT does not charge the second capacitor C2 through resistor R8, thus keeping the P-type switch transistor in the off state. Additionally, by increasing the value of resistor R1 and decreasing the value of resistor R8, the first switch transistor Q1 is controlled to be in the off state.

[0078] The first terminal of the second capacitor C2 is connected to the gate of the P-type switch, and the second terminal of the second capacitor C2 is connected to the cathode of the third diode D3. The anode of the third diode D3 is grounded. The negative voltage drive circuit 10 is used to control the first capacitor C1 to charge the second capacitor C2 when the pulse drive signal PWM_EN is at the second level. The charge flows from the second terminal of the second capacitor C2 to the first terminal. The second terminal of the second capacitor C2 is fixed at zero potential through a grounding loop, and the potential of the first terminal of the second capacitor C2 is reduced, so that the second capacitor C2 generates a negative voltage. By connecting the cathode and anode of the third diode D3 between the second capacitor C2 and ground, when the pulse drive signal PWM_EN is at the second level, the first capacitor C1 is controlled to charge the second capacitor C2 in a directional manner, and the charging charge flows from the second terminal of the second capacitor C2 to the first terminal. With the help of the unidirectional conduction characteristic of the third diode D3, the second terminal of the second capacitor C2 can be effectively fixed at the zero potential reference, thereby reducing the potential of the first terminal of the second capacitor C2 and stabilizing the generation of a negative voltage, avoiding negative voltage drift, and ensuring the stability of the output negative voltage.

[0079] In one embodiment, an energy storage system is also provided, which includes a battery BAT, a negative pressure drive circuit 10 and a conversion circuit 20 as described in any of the above embodiments.

[0080] The above description provides a further detailed explanation of the embodiments of this application in conjunction with specific / preferred implementation methods. It should not be construed that the specific implementation of the embodiments of this application is limited to these descriptions. For those skilled in the art, various substitutions or modifications can be made to these described embodiments without departing from the concept of the embodiments of this application, and such substitutions or modifications should be considered within the protection scope of the embodiments of this application. In the description of this specification, the reference to terms such as "an embodiment," "some embodiments," "preferred embodiment," "example," "specific example," or "some examples," etc., indicates that the specific features, structures, materials, or characteristics described in connection with that embodiment or example are included in at least one embodiment or example of the embodiments of this application. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the described specific features, structures, materials, or characteristics can be combined in a suitable manner in any one or more embodiments or examples. The technical features of the above embodiments can be combined arbitrarily. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described; however, as long as the combination of these technical features does not contradict each other, it should be considered within the scope of this specification.

[0081] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this application.

[0082] The above embodiments are merely illustrative of several implementation methods of this application, and their descriptions are relatively specific and detailed. However, they should not be construed as limiting the scope of this application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this application should be determined by the appended claims.

[0083] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this application, and not to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features therein. These modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this application, and they should all be covered within the scope of the claims and specification of this application. In particular, as long as there is no structural conflict, the various technical features mentioned in the embodiments can be combined in any way. This application is not limited to the specific embodiments disclosed herein, but includes all technical solutions falling within the scope of the claims.

Claims

1. A negative voltage driving circuit, characterized in that, The input terminals of the negative voltage drive circuit are connected to the power supply and the pulse drive signal, respectively. The negative voltage drive circuit includes a first capacitor and a second capacitor. The second capacitor is connected to the gate of the P-type switch. The P-type switch is connected between the battery and the conversion circuit. The negative voltage drive circuit is used to control the power supply to charge the first capacitor when the pulse drive signal is at the first level. When the pulse drive signal is at the second level, the first capacitor is controlled to charge the second capacitor so that the second capacitor generates a negative voltage; The second capacitor is further configured to maintain the negative voltage based on its stored electrical energy when the negative voltage drive circuit receives the pulse drive signal at the first level. The negative pressure drive circuit further includes a first charging control circuit and a second charging control circuit. The first capacitor is connected between the input terminal and the output terminal of the first charging control circuit, and the second capacitor is connected between the input terminal and the output terminal of the second charging control circuit. The first charging control circuit is used to open the path between the power supply and the first capacitor when the pulse drive signal is at the first level, and control the power supply to charge the first capacitor. When the pulse drive signal is at the second level, the path between the power supply and the first capacitor is cut off, and the power supply is controlled to stop charging the first capacitor. The second charging control circuit is used to cut off the path between the first capacitor and the second capacitor when the pulse drive signal is at the first level, and maintain the negative voltage based on its own stored electrical energy. When the pulse drive signal is at the second level, the first capacitor is controlled to charge the second capacitor so that the second capacitor generates the negative voltage.

2. The negative voltage driving circuit according to claim 1, characterized in that, The first charging control circuit includes a first switching subunit and a second switching subunit. The first switching subunit is connected between the power supply and the positive terminal of the first capacitor, and the second switching subunit is connected between the negative terminal of the first capacitor and ground and the gate of the P-type switching transistor. When the pulse drive signal is at the first level, both the first switch subunit and the second switch subunit are in the on state to connect the power supply and the first capacitor. When the pulse drive signal is at the second level, both the first switch subunit and the second switch subunit are in the off state to cut off the path between the power supply and the first capacitor.

3. The negative voltage driving circuit according to claim 2, characterized in that, The first switching subunit includes a resistor and a first switching transistor. The collector of the first switching transistor is connected to the power supply. The base and emitter of the first switching transistor are both connected to the second charging control circuit. The emitter of the first switching transistor is also connected to the first end of the resistor and the second end of the resistor is connected to the positive terminal of the first capacitor.

4. The negative voltage driving circuit according to claim 2, characterized in that, The second switching subunit includes a first diode, a second diode, a second resistor, and a second switching transistor. The cathode of the first diode and the anode of the second diode are both connected to the negative terminal of the first capacitor. The anode of the first diode is connected to the second capacitor and the gate of the P-type switching transistor. The cathode of the second diode is connected to the collector of the second switching transistor. The base of the second switching transistor is connected to the second charging control circuit through the second resistor. The emitter of the second switching transistor is grounded.

5. The negative voltage drive circuit according to any one of claims 1-4, characterized in that, The second charging control circuit includes a third switch subunit, a fourth switch subunit, and a fifth switch subunit. The input terminals of the third switch subunit and the fourth switch subunit are both connected to the power supply and the pulse drive signal. The output terminal of the fourth switch subunit is connected to the input terminal of the fifth switch subunit. The output terminals of the third switch subunit, the fourth switch subunit, and the fifth switch subunit are all connected to the first charging control circuit. When the pulse drive signal is at the first level, the third switch subunit, the fourth switch subunit, and the fifth switch subunit are all in the off state to cut off the path between the first capacitor and the second capacitor; When the pulse drive signal is at the second level, the third switch subunit, the fourth switch subunit, and the fifth switch subunit are all in the on state to open the path between the first capacitor and the second capacitor.

6. The negative voltage driving circuit according to claim 5, characterized in that, The third switch subunit includes resistor three, resistor four, resistor five, and a third switch transistor. The first ends of resistor three and resistor five are both connected to the power supply. The second end of resistor three is connected to the pulse drive signal, the first end of resistor four, and the fourth switch subunit. The second end of resistor four is connected to the base of the third switch transistor. The collector of the third switch transistor is connected to the second end of resistor five and the first charging control circuit. The emitter of the third switch transistor is grounded.

7. The negative voltage driving circuit according to claim 5, characterized in that, The fourth switching subunit includes a resistor six and a fourth switching transistor. The first end of the resistor six is ​​connected to the pulse drive signal and the third switching subunit, respectively. The second end of the resistor six is ​​connected to the base of the fourth switching transistor. The collector of the fourth switching transistor is connected to the fifth switching subunit, and the emitter of the fourth switching transistor is grounded.

8. The negative voltage driving circuit according to claim 5, characterized in that, The fifth switch subunit includes a resistor seven and a fifth switch transistor. The first end of the resistor seven is connected to the power supply, and the second end of the resistor seven is connected to the fourth switch subunit, the base of the fifth switch transistor, and the first charging control circuit. The emitter of the fifth switch transistor is connected to the first charging control circuit, and the collector of the fifth switch transistor is grounded.

9. An energy storage system, characterized in that, The energy storage system includes a battery, a negative pressure drive circuit as described in any one of claims 1-8, and a conversion circuit.

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