Display device

Abstract

A display device is provided. The display device includes: a substrate including a display area and a non-display area; an external common voltage line disposed in the non-display area; a common voltage line disposed in the display area and connected to an external common voltage line; a plurality of pixels positioned in the display area, each of the plurality of pixels including a first electrode and an emission layer; and a second electrode positioned on the plurality of pixels. The common voltage line has a multilayer structure including a first layer, a second layer, and a third layer, an undercut structure is defined in the second layer, a width of the second layer is narrower than a width of each of the first layer and the third layer, and a length of the undercut structure is greater than a height of the common voltage line.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to Korean Patent Application No. 10-2023-0018711 filed on February 13, 2023 and all rights derived therefrom, the contents of which are incorporated herein by reference in their entirety. Technical Field

[0003] The present disclosure relates to a display device. Background Art

[0004] A display device is a device that displays an image, and recently an emissive display device has attracted attention as a self-emissive display device.

[0005] Unlike liquid crystal display ("LCD") devices, emissive display devices have self-emissive properties, eliminating the need for a light source and thus can be made thinner and lighter. In addition, emissive display devices have high quality properties such as low power consumption, high brightness, high response speed, etc.

[0006] Generally, an emissive display apparatus includes a substrate, a plurality of thin film transistors positioned on the substrate, a plurality of insulating layers disposed between a plurality of wirings constituting the plurality of thin film transistors, and a plurality of light emitting devices connected to the plurality of thin film transistors.

[0007] The plurality of light emitting devices may each include a first electrode, an emission layer, and a second electrode, and the second electrode may be positioned to have a plate shape in the entire display apparatus. Utility Model Content

[0008] Embodiments are directed to providing a display device capable of improving contact characteristics between electrodes and wirings and preventing voltage drop.

[0009] An embodiment of the present disclosure provides a display device, comprising: a substrate, the substrate comprising a display area and a non-display area; an external common voltage line, the external common voltage line being arranged in the non-display area; a common voltage line, the common voltage line being arranged in the display area and connected to the external common voltage line; a plurality of pixels, the plurality of pixels being positioned in the display area, each of the plurality of pixels comprising a first electrode and an emission layer; and a second electrode, the second electrode being positioned on the plurality of pixels, wherein the common voltage line has a multilayer structure comprising a first layer, a second layer and a third layer, an undercut structure being defined in the second layer, the width of the second layer being narrower than the width of each of the first layer and the third layer, and the length of the undercut structure being greater than the height of the common voltage line.

[0010] The length of the undercut structure may be about 5% to about 90% of the width of the common voltage line.

[0011] The second layer of the common voltage line may include a material different from those of the first layer and the third layer.

[0012] The first layer of the common voltage line may be positioned closer to the substrate than the third layer, and the common voltage line and the second electrode may directly contact each other on an upper surface of the first layer.

[0013] The display device may further include: an organic layer disposed between the common voltage line and the second electrode.

[0014] The organic layer may be disposed between the third layer of the common voltage line and the second electrode.

[0015] An edge region of the second electrode may be disposed directly on an upper surface of the first layer of the common voltage line.

[0016] The display device may further include a source electrode and a drain electrode positioned in the display area, and the common voltage line may be positioned in the same layer as that of the source electrode and the drain electrode.

[0017] The display device may further include: an insulating layer disposed on the common voltage line, and the insulating layer may define an opening overlapping the undercut structure.

[0018] In plan view, the shape of the opening may be a quadrangular shape or a circular shape.

[0019] The third layer of the common voltage line may include one side protruding into the region in which the undercut structure is located in a plan view.

[0020] The third layer of the common voltage line may include a portion protruding on a side opposite to a side in which the undercut structure is located in a plan view.

[0021] The third layer of the common voltage line may include a side protruding to a region in which the undercut structure is located and an opposite side protruding to a region in which the undercut structure is not located in a plan view.

[0022] A width of the common voltage line in a region in which the undercut structure of the second layer is located may be narrower than a width of the common voltage line in a region in which the undercut structure is not located.

[0023] An undercut structure may be defined on one side of the common voltage line.

[0024] Undercut structures may be defined at opposite sides of the common voltage line.

[0025] The undercut structure may be defined in a zigzag pattern at opposite sides of the common voltage line.

[0026] A length of the undercut structure may be longer than half a width of the third layer of the common voltage line.

[0027] The undercut structure positioned on the first side surface of the common voltage line and the undercut structure positioned on the second side surface of the common voltage line may not intersect each other.

[0028] The second electrode may contact the external common voltage line in the non-display area.

[0029] According to the embodiments, it is possible to provide a display device capable of improving contact characteristics between electrodes and wirings and preventing a voltage drop. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] Figure 1 A display device according to an embodiment is schematically illustrated.

[0031] Figure 2 A configuration of a common voltage line positioned within a display area in a display device according to an embodiment is illustrated.

[0032] Figure 3 The diagram shows Figure 2 A cross-sectional view taken along line III-III'.

[0033] Figure 4 A common voltage line having an oxide layer disposed on a side surface is illustrated.

[0034] Figure 5 A configuration is illustrated in which a common voltage line having an oxide layer disposed on a side surface contacts the second electrode.

[0035] Figure 6 A plan view of an upper surface of a common voltage line is shown.

[0036] Figure 7 Pictured from another angle Figure 6 The common voltage line.

[0037] Figure 8 The diagram shows the Figure 7 The contact between the common voltage line and the second electrode in a cross section taken along line VIII-VIII'.

[0038] Fig. 9 A common voltage line according to another embodiment is illustrated.

[0039] Figures 10 to 12 Various shapes of the common voltage line are illustrated.

[0040] Figures 13 to 15 Various shapes of the common voltage line are illustrated.

[0041] Fig.16 A common voltage line according to yet another embodiment is illustrated.

[0042] Fig.17 A common voltage line according to still another embodiment is illustrated.

[0043] Fig.18 The diagram shows Fig.17 The upper surface of the common voltage line of the embodiment.

[0044] Fig.19 A cross section of a pixel of a display device according to an embodiment is schematically illustrated. DETAILED DESCRIPTION

[0045] The present disclosure will be described more fully hereinafter with reference to the accompanying drawings, in which embodiments of the present disclosure are shown. As those skilled in the art will appreciate, the described embodiments may be modified in various different ways, all without departing from the spirit or scope of the present disclosure.

[0046] In order to clearly describe the present disclosure, parts irrelevant to the description are omitted, and like numerals refer to like or similar constituent elements throughout the specification.

[0047] In addition, since the sizes and thicknesses of the constituent members shown in the drawings are arbitrarily given for better understanding and ease of description, the present disclosure is not limited to the sizes and thicknesses shown in the drawings. In the drawings, the thicknesses of layers, films, panels, regions, etc. are exaggerated for clarity. In the drawings, the thicknesses of some layers and regions are exaggerated for better understanding and ease of description.

[0048] It will be understood that when an element such as a layer, film, region, or substrate is referred to as being "on" another element, it can be directly on the other element, or there may be intervening elements. Conversely, when an element is referred to as being "directly on" another element, there are no intervening elements. Furthermore, in the specification, the word "on" or "above" means being positioned above or below an object part, and does not necessarily mean being positioned on the upper side of the object part based on the direction of gravity.

[0049] In addition, unless explicitly described to the contrary, the word “comprise” and variations such as “comprises” or “comprising” will be understood to imply the inclusion of stated elements but not the exclusion of any other elements.

[0050] Furthermore, throughout the specification, the phrase “in a plan view” means when an object portion is viewed from above, and the phrase “in a cross-sectional view” means when a cross section taken by vertically cutting the object portion is viewed from the side.

[0051] Unless the context clearly indicates otherwise, as used herein, "a", "an", "the", and "at least one" do not indicate a limitation of quantity, and are intended to include both the singular and the plural. For example, "element" has the same meaning as "at least one element", unless the context clearly indicates otherwise. "At least one" should not be interpreted as limited to "one" or "one". "Or" means "and / or". As used herein, the term "and / or" includes any and all combinations of one or more of the relevant listed items.

[0052] It will be understood that although the terms "first", "second", "third", etc. may be used herein to describe various elements, components, areas, layers and / or sections, these elements, components, areas, layers and / or sections should not be limited by these terms. These terms are only used to distinguish one element, component, area, layer or section from another element, component, area, layer or section. Therefore, without departing from the teachings herein, the "first element", "first component", "first area", "first layer" or "first section" discussed below may be referred to as a second element, second component, second area, second layer or second section.

[0053] As used herein, "about" or "approximately" is inclusive of the stated value and means within an acceptable range of deviation for the particular value as determined by one of ordinary skill in the art, taking into account the errors associated with the measurements and the measurement of a particular quantity (i.e., the limitations of the measurement system). For example, "about" can mean within one or more standard deviations, or within ±30%, 20%, 10%, or 5% of the stated value.

[0054] Hereinafter, a display device according to an exemplary embodiment of the present disclosure will be described in detail with reference to the accompanying drawings.

[0055] Figure 1 A display device according to an embodiment is schematically illustrated. Figure 1 , the display device according to the embodiment includes a display area DA and a non-display area NDA. A plurality of pixels PX1, PX2, and PX3 are positioned in the display area DA. Figure 1 In the example, for the convenience of description, only some pixels are briefly shown. Each of the plurality of pixels may include a transistor and a light emitting device connected thereto. The light emitting device includes a first electrode, an emission layer, and a second electrode, and for the convenience of description, Figure 1 The second electrode 270 is shown in FIG. Fig.19 The detailed structures of the pixels and the light emitting device of the display area are described separately.

[0056] The external common voltage line 7410 is positioned in the non-display area NDA. The external common voltage line 7410 may surround the display area DA. The external common voltage lines 7410 may be spaced apart from each other at one side of the display area DA. The external common voltage line 7410 may transmit the common voltage ELVSS to the second electrode 270 of the pixel.

[0057] The common voltage line 741 connected to the external common voltage line 7410 is positioned in the display area DA. The common voltage line 741 may be connected to the external common voltage line 7410 while being positioned along the first direction DR1. The common voltage line 741 may be positioned on the same layer as the source and drain electrodes of the display area DA.

[0058] Therefore, when the external common voltage line 7410 is connected to the common voltage line 741, it is possible to solve the problem in which the voltage is reduced during the transmission process of the common voltage ELVSS. That is, when the external common voltage line 7410 is positioned to surround the edge of the display area DA, a voltage reduction may occur when the common voltage ELVSS is transmitted along the external common voltage line 7410. However, when the common voltage line 741 positioned in the display area DA is connected to the external common voltage line 7410, the voltage transmission path may be shortened, thereby preventing the reduction of the common voltage ELVSS. The common voltage ELVSS is transmitted to the second electrode 270.

[0059] Despite Figure 1 The display device DA may further include a driving voltage line for transmitting a driving voltage, but the driving voltage line may be located in the non-display area NDA, and the driving voltage line located in the display area DA may be connected to the external driving voltage line located in the non-display area NDA. The driving voltage may be transmitted to each pixel of the display device through the driving voltage line.

[0060] refer to Figure 1 , the second electrode 270 is positioned. The second electrode 270 may be positioned in both the display area DA and the non-display area NDA. The second electrode 270 may contact the external common voltage line 7410 in the non-display area NDA to receive the common voltage ELVSS. Figure 1 In the embodiment, the external common voltage line 7410 and the second electrode 270 may contact each other in a region where the external common voltage line 7410 and the second electrode 270 overlap, and the common voltage ELVSS may be transmitted to the second electrode 270 .

[0061] In addition, the second electrode 270 may contact the common voltage line 741 in the display area DA to receive the common voltage ELVSS. Therefore, the second electrode 270 may receive the common voltage ELVSS in the display area DA and the non-display area NDA, and thus during the voltage transmission process, the voltage drop may be minimized and the common voltage ELVSS may be well transmitted to the second electrode 270.

[0062] The present disclosure relates to a method for contacting the common voltage line 741 and the second electrode 270 in the display area DA.

[0063] Despite Figure 1 Only a portion of the common voltage lines 741 is illustrated in FIG. 1 , but according to another embodiment, various numbers of common voltage lines 741 may be positioned. Figure 1 , the common voltage line 741 and the second electrode 270 may contact each other only in some pixels, or in each pixel, the common voltage line 741 and the second electrode 270 may contact each other. However, space may be required in the display device to allow the common voltage line 741 and the second electrode 270 to contact each other, and therefore the common voltage line 741 and the second electrode 270 may contact each other only in some pixels. For example, the common voltage line 741 and the second electrode 270 may contact each other every six pixels. However, this is an example, and the present disclosure is not limited thereto.

[0064] Figure 2 FIG. 2 illustrates a configuration of a common voltage line 741 positioned within a display area DA in a display device according to an embodiment. Figure 2 , the common voltage line 741 may have a three-layer structure including a first layer 741A, a second layer 741B, and a third layer 741C. In the multi-layer structure of the display device, an insulating layer is disposed on the common voltage line 741, and an opening OP may be defined in the insulating layer to allow the common voltage line 741 and the second electrode 270 to contact each other. Figure 2 , the portion where the opening OP is formed is indicated by a dotted line. In the process of forming the opening OP, the common voltage line 741 may be etched. Therefore, the common voltage line 741 may not be covered by the insulating layer, and may be exposed in the region where the opening OP is formed, and may contact the second electrode 270.

[0065] The common voltage line 741 may have a multilayer structure. In other words, the common voltage line 741 may include a first layer 741A, a second layer 741B, and a third layer 741C including materials different from each other, and the etching characteristics of each layer may be different. In this case, the second layer 741B may be etched more than the other layers, and the common voltage line 741 and the second electrode 270 may contact each other in the second layer 741B.

[0066] In an embodiment, Figure 3 The diagram shows Figure 2 2 is a cross-sectional view taken along line III-III' of FIG. 1 and shows a configuration in which the common voltage line 741 and the second electrode 270 are in contact with each other. Figure 3 As shown in FIG. 7 , the common voltage line 741 may have an undercut structure in which the second layer 741B is etched more than other layers of the common voltage line 741. The substrate 110 may be disposed under the common voltage line 741.

[0067] In an embodiment, the organic layer 360 may be disposed between the upper surface of the common voltage line 741 and the second electrode 270. The organic layer 360 may be an emission layer. According to the manufacturing process, the organic layer 360 is disposed between the second electrode 270 and the common voltage line 741, and thus the second electrode 270 may have difficulty in directly contacting the upper surface of the common voltage line 741, that is, the upper surface of the third layer 741C. In order to make the second electrode 270 directly contact the upper surface of the common voltage line 741, a process of removing the organic layer 360 using a separate mask is required, which reduces process efficiency.

[0068] Therefore, if Figure 3 As shown in FIG. 1 , the second electrode 270 contacts the common voltage line 741 from the side surface. Figure 3 As shown in the figure, since the side surface of the second electrode 270 and the side surface of the common voltage line 741 contact each other, the contact area between the second electrode 270 and the common voltage line 741 is insufficient.

[0069] In addition, an oxide layer may be disposed on a side surface of the common voltage line 741 having an undercut structure. Figure 4 The common voltage line 741 having an oxide layer 500 disposed on the side surface is illustrated. Figure 4 , when the oxide layer 500 is disposed on the side surface, the resistance may increase when contacting the second electrode 270 .

[0070] Figure 5 A configuration is illustrated in which a common voltage line 741 having an oxide layer 500 disposed on a side surface contacts the second electrode 270. Figure 5 , the common voltage line 741 and the second electrode 270 are not in direct contact with each other, and the oxide layer 500 is positioned between the common voltage line 741 and the second electrode 270. In this case, since the contact area between the common voltage line 741 and the second electrode 270 is narrow and even the oxide layer 500 is disposed between the common voltage line 741 and the second electrode 270, the common voltage may not be well transmitted to the second electrode 270.

[0071] However, in the display device according to the present embodiment, the undercut structure of the common voltage line 741 is deeply formed, so that the common voltage line 741 and the second electrode 270 contact each other not from the side surface but from the upper surface. That is, since the second electrode 270 contacts the upper surface of the first layer 741A of the common voltage line 741 instead of the side surface of the second layer 741B, the contact area becomes wide, and even when the oxide layer 500 is disposed on the side surface of the second layer 741B, the contact characteristics may not be affected.

[0072] Figure 6 to Figure 7 2 and 3 show the shape of the common voltage line 741 according to the embodiment. Figure 7 , the common voltage line 741 may have a three-layer structure including a first layer 741A, a second layer 741B, and a third layer 741C. In this case, the first layer 741A, the second layer 741B, and the third layer 741C may each include one or more of Al, Cu, Ti, and alloys thereof. The second layer 741B may include a material different from that of the first layer 741A and the third layer 741C. The second layer 741B may include a material that is easier to etch than that of the first layer 741A and the third layer 741C.

[0073] Figure 8 The diagram shows the Figure 7 The contact between the common voltage line 741 and the second electrode 270 is shown in the cross section cut along the line VIII-VIII′.

[0074] Figure 6 FIG. 7 is a plan view of the upper surface of the common voltage line 741 (specifically, the third layer 741C). Figure 6 In FIG. 7 , the opening OP of the insulating layer disposed on the common voltage line 741 is indicated by a dotted line. Figure 6 , the shape of the second layer 741B formed in the undercut structure is indicated by a dotted line.

[0075] Figure 7 Pictured from another angle Figure 6 The common voltage line 741. Figure 7 As shown in FIG. 8 , the common voltage line 741 according to the present embodiment has a deep undercut structure.

[0076] Figure 8 The diagram shows Figure 7 The contact between the common voltage line 741 and the second electrode 270 in the cross section cut along the line VIII-VIII'. Figure 8, the second layer 741B has an undercut structure that is etched further by a first distance D than the first layer 741A. In this case, the length D of the undercut structure can be longer than the height H of the common voltage line 741. That is, the relationship D > H of the common voltage line 741 can be satisfied. Since the length D of the undercut structure is greater than the height H of the common voltage line 741, the second electrode 270 can contact the upper surface of the first layer 741A of the common voltage line 741 without contacting the side surface of the second layer 741B.

[0077] Figure 8 The figure shows a configuration in which the common voltage line 741 and the second electrode 270 are in direct contact with each other on the upper surface of the first layer 741A. Compared with the existing Figure 3 , it can be seen that the contact area between the second electrode 270 and the common voltage line 741 is wide. In addition, even when the oxide layer 500 is disposed on the side surface of the second layer 741B, the contact characteristics between the second electrode 270 and the common voltage line 741 can be unaffected. Therefore, the second electrode 270 can stably receive the common voltage ELVSS.

[0078] In this case, referring to Figure 6 , the length D of the undercut structure can be about 5% to about 90% of the width K of the common voltage line 741. That is, when the width of the common voltage line 741 is K, the length D of the undercut structure can be 0.05K < D < 0.9K. When the length D of the undercut structure is less than 0.05K, the second electrode 270 may not contact the upper surface of the first layer 741A of the common voltage line 741, but may contact the side surface of the second layer 741B. In addition, when the length D of the undercut structure is greater than 0.9K, since the width of the second layer 741B equal to the difference between the width K of the common voltage line 741 and the length D of the undercut structure becomes too narrow, the common voltage line 741 may not be stably supported. Here, the length D of the undercut structure is measured in the same direction as the width K of the common voltage line 741.

[0079] Figures 6 to 8 The figure shows a configuration in which the width K of the common voltage line 741 is substantially the same in each region, but according to an embodiment, the width K of the common voltage line 741 can be different for each region.

[0080] Fig. 9 The figure shows the common voltage line 741 according to another embodiment. Referring to Fig. 9, the width K2 of the common voltage line 741 may be increased in the region of the opening OP in contact with the second electrode 270. That is, the width K1 of the common voltage line 741 in the region other than the opening OP of the insulating layer may be smaller than the width K2 of the common voltage line 741 in the region overlapping with the opening OP. Therefore, when the width of the common voltage line 741 is further increased in the contact region with the second electrode 270, the undercut structure of the second layer 741B may be better formed.

[0081] Figures 10 to 12 Various shapes of the common voltage line 741 are illustrated. Figures 10 to 12 A plan view of the shape of the third layer 741C is shown, and the second layer 741B is indicated by a dotted line. An opening OP of the insulating layer is also shown. Fig.10 An embodiment in which the width of the third layer 741C is increased at the opposite side to the side where the undercut structure is formed is illustrated, and Fig.11 An embodiment is illustrated in which the width of the third layer 741C is increased in one side where the undercut structure is formed. Alternatively, Fig.12 An embodiment in which the width of the third layer 741C is increased at both the side where the undercut structure is formed and the opposite side thereof is illustrated.

[0082] In addition, despite Figures 10 to 12 The shape of the central opening OP is a quadrangle, but according to another embodiment, the shape of the opening OP may be circular. Figures 13 to 15 Various shapes of the common voltage line 741 are shown. Specifically, Figures 13 to 15 The diagram shows Figures 10 to 12 An embodiment in which the shape of the opening OP is changed from a quadrangular shape to a circular shape in a plan view. Detailed description of the same constituent elements will be omitted.

[0083] In addition, in the previous embodiment, a configuration has been described in which the width of the common voltage line 741 is increased in the contact area with the second electrode 270 , but according to another embodiment, the width of the common voltage line 741 may be reduced in the contact area with the second electrode 270 . Fig.16 FIG. 2 shows a shape of the common voltage line 741 according to another embodiment. Fig.16 In the present embodiment, the width K2 of the common voltage line 741 in the region in which the opening OP is defined may be narrower than the width K1 in the region in which the opening OP is not defined.

[0084] In addition, in the above-described embodiment, the undercut structure is formed in one direction (eg, one side) of the common voltage line 741 , but this is only an example, and the undercut structure may be positioned in the opposite direction of the common voltage line 741 . Fig.16FIG. 7 shows a common voltage line 741 according to yet another embodiment. Fig.16 , the undercut structure of the common voltage line 741 is formed on the opposite side ( Fig.16 on the left and right sides of the image.

[0085] Fig.17 FIG. 7 shows a common voltage line 741 according to yet another embodiment. Fig.17 , in the common voltage line 741 according to the present embodiment, undercut structures are formed at opposite sides of the common voltage line 741 , and such undercut structures are alternately formed. Fig.18 The diagram shows Fig.17 The upper surface of the common voltage line 741 of the embodiment. Fig.18 The third layer 741C is illustrated, and the shape of the second layer 741B is indicated by a dotted line.

[0086] refer to Fig.18 In this embodiment, the undercut structures of the second layer 741B are formed at opposite sides of the common voltage line 741, and they are formed to cross each other. When the undercut structures defined at opposite sides of the common voltage line 741 do not cross each other, each of the plurality of undercut structures may be no longer than half the width K of the common voltage line 741, but when Fig.18 When the undercut structure is alternately formed as in FIG. 1 , the length D of the undercut structure may be longer than half the width K of the common voltage line 741. Therefore, the contact area between the second electrode 270 and the common voltage line 741 may be widened to achieve stable contact. Therefore, the second electrode 270 may stably supply the common voltage ELVSS.

[0087] Hereinafter, a pixel of a display device according to an embodiment of the present disclosure will be described in detail with reference to the accompanying drawings. The structure described below is only an example, and the present disclosure is not limited thereto. For ease of description, a pixel at which a common voltage line 741 is located has been described.

[0088] Fig.19 The cross section of a pixel of a display device according to an embodiment is schematically illustrated. Fig.19 , the substrate SUB is positioned. The substrate SUB may include at least one of polystyrene, polyvinyl alcohol, polymethyl methacrylate, polyethersulfone, polyacrylate, polyetherimide, polyethylene naphthalate, polyethylene terephthalate, polyphenylene sulfide, polyarylate, polyimide, polycarbonate, cellulose triacetate, and cellulose acetate propionate. The substrate SUB may be a rigid substrate or a flexible substrate capable of bending, folding, rolling, etc. The substrate SUB may be a single layer or multiple layers. In the substrate SUB, at least one base layer and at least one inorganic layer including a polymer resin stacked in sequence may be alternately stacked.

[0089] The light shielding layer BML is positioned on the substrate SUB. The light shielding layer BML may include aluminum (Al), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), chromium (Cr), calcium (Ca), molybdenum (Mo), titanium (Ti), tungsten (W) and / or copper (Cu) and metal oxides, and may have a single layer or multilayer structure including them.

[0090] The buffer layer BUF is positioned on the light shielding layer BML. The buffer layer BUF may include silicon oxide (SiO x ), Silicon Nitride (SiN x ), silicon oxynitride (SiO x N y ) or amorphous silicon (Si).

[0091] The buffer layer BUF may define a first opening OP1 overlapping the light shielding layer BML therein. In the first opening OP1, the source electrode SE may be connected to the light shielding layer BML.

[0092] The semiconductor layer ACT may include a channel region CA overlapping the gate electrode GE, and a source region SA and a drain region DA positioned at opposite sides of the channel region CA.

[0093] The gate insulating layer GI may be disposed on the semiconductor layer ACT. The gate insulating layer GI may include silicon oxide (SiO x ), Silicon Nitride (SiN x ) or silicon oxynitride (SiO x N y ), and may have a single-layer or multi-layer structure including them.

[0094] The gate insulating layer GI may be positioned to overlap the channel region CA of the semiconductor layer ACT. A gate conductive layer including a gate electrode GE may be positioned on the gate insulating layer GI. The gate conductive layer may include molybdenum (Mo), aluminum (Al), copper (Cu), titanium (Ti), and metal oxides, and may have a single layer or multilayer structure including them.

[0095] The gate electrode GE may be formed in the same process as the gate insulating layer GI to have the same planar shape. The gate electrode GE may be positioned to overlap the semiconductor layer ACT in a direction perpendicular to the surface of the substrate SUB.

[0096] The interlayer insulating layer ILD may be disposed on the semiconductor layer ACT and the gate electrode GE. The interlayer insulating layer ILD may include silicon oxide (SiO x ), Silicon Nitride (SiN x ) or silicon oxynitride (SiO x N y), and may have a single layer or multi-layer structure including them. When the interlayer insulating layer ILD has a multi-layer structure including silicon nitride and silicon oxide, the layer including silicon nitride may be arranged closer to the substrate SUB than the layer including silicon oxide.

[0097] The interlayer insulating layer ILD may define a first opening OP1 therein overlapping the light blocking layer BML, a second opening OP2 therein overlapping the source area SA of the semiconductor layer ACT, and a third opening OP3 therein overlapping the drain area DA.

[0098] A data conductive layer including a source electrode SE, a drain electrode DE, and a common voltage line 741 is disposed on the interlayer insulating layer ILD. The data conductive layer may include aluminum (Al), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), chromium (Cr), calcium (Ca), molybdenum (Mo), titanium (Ti), tungsten (W), and / or copper (Cu), and metal oxides thereof, and may have a single-layer or multi-layer structure including them. Fig.19 , the common voltage line 741 has a multilayer structure including a first layer 741A, a second layer 741B, and a third layer 741C. Fig.19 , for ease of description, a portion in which a common voltage line 741 is located is enlarged and illustrated. The description of the common voltage line 741 is the same as described above. That is, the second layer 741B may have an undercut structure that is etched more than the first layer 741A and the third layer 741C. As will be described later, the second electrode 270 may contact the common voltage line 741 through such an undercut structure.

[0099] The source electrode SE may contact the light shielding layer BML in the first opening OP1 and may contact the source area SA of the semiconductor layer ACT in the second opening OP2. The drain electrode DE may contact the drain area DA of the semiconductor layer ACT in the third opening OP3.

[0100] The insulating layer VIA is positioned on the data conductive layer. The insulating layer VIA may include an organic insulating material such as a general polymer (e.g., poly(methyl methacrylate) ("PMMA") or polystyrene ("PS")), a polymer derivative having a phenol group, an acrylic polymer, an imide polymer, a polyimide, a siloxane polymer, etc.

[0101] The insulating layer VIA may define a fourth opening OP4 overlapping the source electrode SE therein and a fifth opening OP5 overlapping the common voltage line 741 therein. The first electrode 191 may be positioned on the insulating layer VIA. The partition wall 350 is positioned on the insulating layer VIA and the first electrode 191. The partition wall 350 may define an opening 355 overlapping the first electrode 191 therein and an opening 356 overlapping the fifth opening OP5 therein. The emission layer 360 may be positioned on the first electrode 191 and the partition wall 350. The second electrode 270 may be positioned on the emission layer 360. The first electrode 191, the emission layer 360, and the second electrode 270 may constitute a light emitting diode LED.

[0102] like Fig.19 , the second electrode 270 and the common voltage line 741 contact each other at the fifth opening OP5 to transmit the common voltage ELVSS to the second electrode 270. As described above, the second electrode 270 may contact the upper surface of the first layer 741A through the undercut structure of the common voltage line 741. The description of the specific contact of the length D of the undercut structure and the shape of the common voltage line 741 is the same as that of the previous embodiment and is therefore omitted.

[0103] While the present disclosure has been described with respect to what are presently considered to be practical embodiments, it should be understood that the disclosure is not limited to the disclosed embodiments, but on the contrary is intended to cover various modifications and equivalent arrangements included within the spirit and scope of the appended claims.

Claims

1. A display device, It is characterized in that include: A substrate, the substrate comprising a display area and a non-display area; an external common voltage line, the external common voltage line being arranged in the non-display area; a common voltage line disposed in the display area and connected to the external common voltage line; a plurality of pixels, the plurality of pixels being positioned in the display area, each of the plurality of pixels comprising a first electrode and an emission layer; as well as a second electrode, the second electrode being positioned on the plurality of pixels, wherein the common voltage line has a multi-layer structure including a first layer, a second layer and a third layer, The second layer defines an undercut structure, The width of the second layer is narrower than the width of each of the first layer and the third layer, and The length of the undercut structure is greater than the height of the common voltage line.

2. The display device according to claim 1, It is characterized in that The length of the undercut structure is 5% to 90% of the width of the common voltage line.

3. The display device according to claim 1, It is characterized in that The undercut structure is defined on one side of the common voltage line.

4. The display device according to claim 1, It is characterized in that The first layer of the common voltage line is positioned closer to the substrate than the third layer, and The common voltage line and the second electrode directly contact each other on an upper surface of the first layer.

5. The display device according to claim 4, It is characterized in that Further including: An organic layer is disposed between the common voltage line and the second electrode.

6. The display device according to claim 5, It is characterized in that The organic layer is disposed between the third layer of the common voltage line and the second electrode.

7. The display device according to claim 5, It is characterized in that An edge region of the second electrode is disposed directly on the upper surface of the first layer of the common voltage line.

8. The display device according to claim 1, It is characterized in that Further including: a source electrode and a drain electrode, the source electrode and the drain electrode being positioned in the display area, Wherein, the common voltage line is positioned in the same layer as that of the source electrode and the drain electrode.

9. The display device according to claim 1, It is characterized in that Further including: an insulating layer, the insulating layer being arranged on the common voltage line, The insulating layer defines an opening overlapping with the undercut structure.

10. The display device according to claim 9, It is characterized in that In a plan view, the shape of the opening is a quadrilateral or a circle.

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