Coating equipment and mask carrier plate thereof

Abstract

The utility model relates to coating equipment and a mask carrier plate thereof, the mask carrier plate comprises a plurality of material carrying frames, each material carrying frame is provided with a rectangular hollow area, a step groove and a vacuum pipeline, the step groove and the vacuum pipeline surround the rectangular hollow area, and the step groove is provided with a bearing surface for bearing a silicon wafer and an adsorption hole penetrating through the bearing surface. And the adsorption hole is communicated with the vacuum pipeline, so that when the vacuum pipeline is connected with a vacuum pump for vacuumizing, the silicon wafer placed in the step groove is adsorbed and attached to the bearing surface by the adsorption hole. According to the film coating equipment and the mask carrier plate thereof, the silicon wafer in the step groove is adsorbed when the vacuum pipeline of the mask carrier plate is used for vacuumizing, so that the silicon wafer is attached to the bearing surface, the phenomenon of electric leakage caused by the fact that TCO conductive molecules enter the attaching position of the silicon wafer and the bearing surface is avoided, and the film coating yield is improved.

Description

Technical Field

[0001] The present application relates to the technical field of solar cell manufacturing equipment, and in particular to a coating device and a mask carrier thereof. Background Art

[0002] HJT cells have attracted extensive attention and research in the field of solar energy. It has high photoelectric conversion efficiency, good temperature stability and low photovoltaic heat loss. HJT cells are expected to continue to grow and develop in the future. Due to its high conversion efficiency and low cost, HJT cells are regarded as a strong competitor for the next generation of solar cell technology. With the increasing demand for renewable energy and the continuous improvement of technology, HJT cells are expected to occupy a certain share in the solar energy market. At the same time, HJT cells also have a certain application flexibility and can be used in fields such as building integration, photovoltaic power stations and charging equipment, providing more options for the promotion and application of clean energy. However, HJT battery technology still faces some challenges in commercial production and market promotion.

[0003] Before the TCO thin film is evaporated on the solar cell, the silicon wafer needs to be carried by a carrier plate into the coating chamber of the coating equipment. Through the physical vapor deposition method, the indium tin oxide molecules are evenly deposited on the silicon wafer to form a TCO transparent conductive film.

[0004] However, in the related art, the silicon wafer is placed on a carrier, and it is impossible to achieve complete bonding between the surface of the silicon wafer and the contact surface of the carrier, that is, there is a gap between the position of the carrier used to receive the silicon wafer and the edge of the silicon wafer. During the magnetron sputtering process in the coating chamber, some TCO molecules inevitably enter the edge of the other surface of the silicon wafer through the gap of the unbonded part. In addition, TCO molecules can easily deposit on the side walls of the silicon wafer, which in turn causes leakage on the front and back of the cell, and reduces the efficiency and yield of the cell. Summary of the invention

[0005] Based on this, a coating device and a mask carrier thereof are provided to solve the technical problem of how to improve the coating yield rate.

[0006] On the one hand, the present application provides a mask carrier, which includes a plurality of loading frames, each of which is provided with a rectangular hollow area and a step groove and a vacuum pipeline surrounding the rectangular hollow area, the step groove having a receiving surface for receiving a silicon wafer and an adsorption hole passing through the receiving surface, the adsorption hole being connected to the vacuum pipeline so that when the vacuum pipeline is connected to a vacuum pump for vacuuming, the adsorption hole will adsorb the silicon wafer placed in the step groove to the receiving surface.

[0007] In one embodiment, the plurality of carrier frames are arranged in an M*N rectangular array in the length direction and the width direction of the mask carrier, wherein M and N are both natural numbers greater than or equal to 2.

[0008] In one embodiment, the adsorption holes are provided on both the long side and the short side of the step groove, the number of the adsorption holes located on the long side of the step groove is a, and the number of the adsorption holes located on the short side of the step groove is b, wherein 2≤a / b≤3.

[0009] In one of the embodiments, the mask carrier is provided with a first connecting branch, the first connecting branch passes through a long side of the carrier frame and is connected to the vacuum pipeline of the adjacent carrier frame.

[0010] In one of the embodiments, an even number of the adsorption holes are provided on the long side of the step groove, and the adsorption holes on the long side of the step groove are symmetrically arranged with respect to the first connecting branch.

[0011] In one embodiment, the mask carrier includes a rectangular frame, and a plurality of the loading frames are arranged in the space enclosed by the rectangular frame. A main line and a plurality of second connecting branches perpendicular to the main line are opened in the rectangular frame. The main line extends along the long side of the rectangular frame. One end of the plurality of second connecting branches is connected to the main line, and the other end is connected to the vacuum line adjacent to the main line.

[0012] In one embodiment, the vacuum pipeline includes a pipe embedded in the loading frame.

[0013] On the other hand, the present application provides a coating device, including the mask carrier as described above.

[0014] In one of the embodiments, the coating equipment further includes a vacuum pump, and the vacuum pump is used to evacuate and break the vacuum in the vacuum pipeline.

[0015] In one of the embodiments, the coating equipment further includes a coating chamber and a conveying rail, wherein the conveying rail is used to move the mask carrier loaded with silicon wafers into and out of the coating chamber, and the vacuum pump is installed in the coating chamber.

[0016] The above-mentioned mask carrier and coating equipment, the mask carrier includes a plurality of loading frames, each loading frame is provided with a rectangular hollow area and a step groove and a vacuum pipeline surrounding the rectangular hollow area, each step groove has a receiving surface for receiving a silicon wafer and an adsorption hole penetrating the receiving surface, the adsorption hole is connected to the vacuum pipeline, so that when the vacuum pipeline is connected to a vacuum pump for vacuuming, the adsorption hole will adsorb the silicon wafer placed in the step groove to the receiving surface, thereby preventing conductive molecules from entering the bonding position between the silicon wafer and the receiving surface and causing leakage, so as to improve the coating yield. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the related technologies, the drawings required for use in the embodiments or the related technical descriptions are briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, drawings of other embodiments can be obtained based on these drawings without paying any creative work.

[0018] Figure 1 Schematic diagram of the structure of a mask carrier according to one embodiment of the present application.

[0019] Figure 2 It is a schematic structural diagram of a material loading frame of a mask carrier according to an embodiment of the present application.

[0020] Figure 3 The figure is a schematic top view of the structure of a carrier frame of a mask carrier according to an embodiment of the present application.

[0021] Figure 4 for Figure 3 The cross-sectional structure schematic diagram of the material carrying frame of the mask carrier along line II is shown.

[0022] Figure 5 FIG. 1 is a schematic diagram of the distribution of a carrier frame of a mask carrier according to another embodiment of the present application.

[0023] Figure 6 for Figure 5 A schematic diagram of the vacuum pipeline distribution in the mask carrier is shown.

[0024] Figure 7 It is a structural schematic diagram of the coating chamber of the coating equipment of the present application when the loading frame is moved into the coating chamber.

[0025] Description of reference numerals:

[0026] 10. Mask carrier; 10a. Silicon wafer; 11. Loading frame; 11a. Hollow area; 11b. Step groove; 11b1. Receiving surface; 11b2. Adsorption hole; 11c. Vacuum pipeline; 11d. First connecting branch; 12. Rectangular frame; 12a. Main pipeline; 12b. Second connecting branch; 20. Vacuum pump; 20a. Valve; 30. Coating chamber; 30a. Target material. DETAILED DESCRIPTION

[0027] In order to make the above-mentioned purposes, features and advantages of the present application more obvious and easy to understand, the specific implementation methods of the present application are described in detail below in conjunction with the accompanying drawings. In the following description, many specific details are set forth to facilitate a full understanding of the present application. However, the present application can be implemented in many other ways different from those described herein, and those skilled in the art can make similar improvements without violating the connotation of the present application, so the present application is not limited by the specific embodiments disclosed below.

[0028] It should be noted that when an element is referred to as being "fixed to" or "disposed on" another element, it may be directly on the other element or there may be an intermediate element. When an element is considered to be "connected to" another element, it may be directly connected to the other element or there may be an intermediate element at the same time.

[0029] The terms "vertical", "horizontal", "upper", "lower", "left", "right" and similar expressions are for illustrative purposes only and do not represent the only implementations.

[0030] It should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", etc., indicating the orientation or position relationship are based on the orientation or position relationship shown in the drawings, and are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the present application.

[0031] In the embodiments of the present application, the terms "first" and "second" are used for descriptive purposes only and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of the features. In the description of the present application, the meaning of "plurality" is at least two, such as two, three, etc., unless otherwise clearly and specifically defined.

[0032] Combination Figures 1 to 4As shown, an embodiment of the present application provides a mask carrier 10, which is suitable for carrying a silicon wafer 10a for coating. The mask carrier 10 includes a plurality of carrier frames 11, each of which is provided with a rectangular hollow area 11a and a step groove 11b and a vacuum pipeline 11c surrounding the rectangular hollow area 11a. The step groove 11b has a receiving surface 11b1 for receiving the silicon wafer 10a and an adsorption hole 11b2 penetrating the receiving surface 11b1. The adsorption hole 11b2 is connected to the vacuum pipeline 11c, so that the vacuum pipeline 11c is connected to a vacuum pump 20 (see Figure 6 When vacuuming is performed, the adsorption holes 11b2 adsorb the silicon wafer 10a placed in the step groove 11b to fit it to the receiving surface 11b1. Thus, the vacuum adsorption of the silicon wafer 10a ensures that the silicon wafer 10a and the receiving surface 11b1 are closely attached, thereby preventing the TCO conductive molecules from entering the attachment position of the silicon wafer 10a and the receiving surface 11b1 and causing leakage, thereby improving the coating yield.

[0033] It should be noted that, when the vacuum pipe 11c of the mask carrier 10 is evacuated, the adsorption hole 11b2 performs vacuum adsorption on the silicon wafer 10a, thereby ensuring the stability of the silicon wafer 10a on the mask carrier 10. In this way, when the silicon wafer 10a moves with the mask carrier 10, even if the carrier shakes, the silicon wafer 10a is not easily offset, broken, or missing due to the shaking of the carrier under the adsorption force of the adsorption hole 11b2. Therefore, the mask carrier 10 of the present application can provide good mechanical protection for the silicon wafer 10a. Moreover, since the silicon wafer 10a can be stably adsorbed on the mask carrier 10, the silicon wafer 10a is not easily displaced on the mask carrier, which increases the stable fixation of the silicon wafer on the mask carrier 10 and reduces the probability of silicon wafer fragmentation. Since the silicon wafer 10a can be stably adsorbed and fixed on the mask carrier 10, the silicon wafer 10a and the receiving surface 11b1 fit tightly together, thereby reducing the requirement on the overlap width provided by the step groove 11b of the mask carrier 10 for the silicon wafer 10a.

[0034] In some embodiments, the plurality of carrier frames 11 are arranged in an M*N rectangular array in the length direction and the width direction of the mask carrier 10, wherein M and N are both natural numbers greater than or equal to 2. Figure 1 As shown, the mask carrier 10 has 25 rectangular hollow areas 11a, which are arranged in a 5*5 rectangular array. Thus, the rectangular hollow areas 11a on the mask carrier 10 are arranged in 5 columns, and each column has 5 rectangular hollow areas 11a. Each rectangular hollow area 11a can hold a silicon wafer 10a, so that the mask carrier 10 can carry 25 silicon wafers 10a at a time, thereby meeting the needs of clustered coating of silicon wafers 10a and improving the coating efficiency of silicon wafers 10a. For another example, combined with Figure 5As shown, the rectangular hollow areas 11a on the mask carrier 10 are arranged in 6 columns, each column having 9 rectangular hollow areas 11a. The mask carrier 10 can also be made into other specifications, and the number of rows and columns of the rectangular hollow areas 11a in the mask carrier 10 is not limited here.

[0035] See again Figure 2 As shown, in some embodiments, both the long side and the short side of the step groove 11b are provided with adsorption holes 11b2. The number of adsorption holes 11b2 located on the long side of the step groove 11b is a, and the number of adsorption holes 11b2 located on the short side of the step groove 11b is b, wherein 2≤a / b≤3. When the silicon wafer 10a is placed in the step groove 11b, the silicon wafer 10a abuts against the receiving surface 11b1 to cover the adsorption holes 11b2 at the receiving surface 11b1. Since the number of adsorption holes 11b2 on the long side of the step groove 11b is 2 to 3 times the number of adsorption holes 11b2 on the short side, the adsorption force of each edge of the silicon wafer 10a can be balanced, so as to improve the stability of the silicon wafer 10a in the step groove 11b and enhance the degree of fit between the silicon wafer 10a and the receiving surface 11b1.

[0036] It should be noted that the layout of the vacuum pipeline 11c of the mask carrier 10 is consistent with that of the rectangular hollow area 11a of the mask carrier 10, so as to facilitate stable adsorption of the silicon wafer 10a placed in the step groove 11b through the adsorption holes 11b2 connected to the vacuum pipeline 11c.

[0037] In some embodiments, in combination Figure 5 and Figure 6 As shown, the mask carrier 10 is provided with a first connecting branch 11d, which runs through the long side of the carrier frame 11 and connects to the vacuum pipeline 11c of the adjacent carrier frame 11. In this embodiment, the first connecting branch 11d connects the vacuum pipelines 11c corresponding to the adjacent step grooves 11b, so that all the vacuum pipelines 11c in the mask carrier 10 can be connected as a whole. In this way, when the mask carrier 10 is evacuated, only one vacuum pump 20 is required to evacuate all the vacuum pipelines 11c, so that the structure is simple and easy to control, and the cost is reduced.

[0038] An even number of adsorption holes 11b2 are provided on the long side of the step groove 11b. The adsorption holes 11b2 on the long side of the step groove 11b are symmetrically arranged with respect to the first connecting branch 11d, so that the adsorption forces of the adsorption holes 11b2 on both sides of the first connecting branch 11d on the silicon wafer 10a are consistent, which is conducive to balancing the adsorption effect at various positions on the edge of the silicon wafer 10a, so that the silicon wafer 10a is evenly stressed, and the probability of uneven local stress is reduced, thereby improving the stability of the fit between the silicon wafer 10a and the receiving surface 11b1.

[0039] Continue to combine Figure 5 and Figure 6 As shown, the mask carrier 10 includes a rectangular frame 12, and a plurality of material loading frames 11 are arranged in the space enclosed by the rectangular frame 12. A main line 12a and a plurality of second connecting branches 12b perpendicular to the main line 12a are provided in the rectangular frame 12. The main line 12a extends along the long side of the rectangular frame 12, and one end of the plurality of second connecting branches 12b is connected to the main line 12a, and the other end is connected to the vacuum line 11c adjacent to the main line 12a. In this embodiment, the plurality of second connecting branches 12b are connected to the main line 12a, so that the vacuum line 11c close to the main line 12a is connected to the main line 12a. Since the vacuum lines 11c of the mask carrier 10 are connected as a whole through the first connecting branch 11d, the vacuum pump 20 only needs to evacuate the main line 12a to generate negative pressure in the vacuum lines 11c, so that the silicon wafer 10a located in the step groove 11b can continue to be adsorbed through the corresponding adsorption holes 11b2. This gas path structure is simple to set up and easy to control. It only needs to control the opening and closing of the connection position between the main line 12a and the vacuum pump 20. For example, in some embodiments, a valve 20a is provided between the vacuum pump 20 and the main line 12a, and the opening and closing between the vacuum pump 20 and the main line 12a is achieved by controlling the valve 20a. When the valve 20a is opened, the vacuum pump 20 is connected to the main line 12a. At this time, the vacuum pump 20 can evacuate the main line 12a when it is working. Correspondingly, when the valve 20a is closed, the vacuum pump 20 is disconnected from the main line 12a. It should be noted that the vacuum pump 20 can not only meet the vacuum line 11c for evacuating the vacuum line 11c, but also make the silicon wafer 10a adsorbed and attached to the receiving surface 11b1. When it is necessary to release the adsorption force on the silicon wafer 10a, the vacuum pump 20 can also be used to break the vacuum of the vacuum pipe 11c, thereby releasing the adsorption of the silicon wafer 10a by the adsorption holes 11b2, so as to facilitate the subsequent removal of the silicon wafer 10a from the step groove 11b.

[0040] It should be noted that the vacuum pipeline 11c can be a pipe buried in the loading frame 11, or it can be a pipeline formed by opening holes or grooves in the mask carrier 10, as long as it can adapt to the flow of gas to achieve vacuum to meet the vacuum adsorption of the silicon wafer 10a by the adsorption holes 11b2.

[0041] Combination Figure 7As shown, another embodiment of the present application provides a coating device, including the mask carrier 10 as described above. Since the mask carrier 10 can use the adsorption holes 11b2 to adsorb and adhere the silicon wafer 10a placed in the step groove 11b to the receiving surface 11b1, the probability of TCO conductive molecules entering the mask area and causing leakage is reduced. Therefore, when the coating device including the mask carrier 10 is used for coating, the efficiency and yield rate of the battery cell can be improved.

[0042] It should be noted that, in order to adapt to the vacuum line 11c in the mask carrier 10, the coating equipment in the embodiment of the present application also includes a vacuum pump 20. The vacuum pump 20 is used to evacuate and break the vacuum of the vacuum line 11c. The timing of evacuating and breaking the vacuum can be configured according to the actual needs of coating the silicon wafer 10a. For ease of understanding, the structure of the coating equipment is further described below.

[0043] In some embodiments, the coating device further includes a coating chamber 30 and a conveying rail (not shown), the conveying rail is used to move the mask carrier 10 loaded with the silicon wafer 10a into and out of the coating chamber 30, and the vacuum pump 20 is installed in the coating chamber 30. In this embodiment, the conveying rail can meet the requirements of moving the mask carrier 10 into and out of the coating chamber 30. In this way, the mask carrier 10 can be used as a carrier to carry the silicon wafer 10a into the coating chamber 30, and the silicon wafer 10a can be moved out of the coating chamber 30 after the silicon wafer 10a is coated.

[0044] Before the mask carrier 10 enters the coating chamber 30 for coating, the mask carrier 10 moves to the conveying rail located at the front end of the coating chamber 30. At this time, the vacuum pump 20 is used to evacuate the mask carrier 10, so that the adsorption hole 11b2 connected to the vacuum pipeline 11c in the mask carrier 10 generates negative pressure and then adsorbs the silicon wafer 10a, so that the silicon wafer 10a is in contact with the receiving surface 11b1. Then, the mask carrier 10 carrying the silicon wafer 10a is moved into the coating chamber 30. In the coating chamber 30, the silicon wafer 10a is coated. After the coating is completed, the mask carrier 10 carrying the silicon wafer 10a moves out of the coating chamber 30. At this time, the vacuum pump 20 is used to blow air into the vacuum pipeline 11c to break the vacuum, thereby releasing the adsorption of the silicon wafer 10a by the adsorption hole 11b2.

[0045] It should be noted that the coating chamber 30 is provided with a device for coating. Figure 7As shown, in some embodiments, a target material 30a is disposed in the coating chamber 30. When the mask carrier 10 moves the silicon wafer 10a into the coating chamber 30 for coating, the target material 30a is located above the mask carrier 10, so as to facilitate coating the silicon wafer 10a carried by the mask carrier 10. In some embodiments, when the mask carrier 10 moves the silicon wafer 10a into the coating chamber 30 for coating, the target material 30a may also be located below the mask carrier 10, so as to coat the lower surface of the silicon wafer 10a.

[0046] The technical features of the above embodiments may be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0047] The above embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the present application. It should be pointed out that, for a person of ordinary skill in the art, several modifications and improvements can be made without departing from the inventive concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the present application shall be subject to the attached claims.

Claims

1. A mask carrier (10), characterized in that: The mask carrier (10) comprises a plurality of loading frames (11), each loading frame (11) being provided with a rectangular hollow area (11a) and a step groove (11b) and a vacuum pipeline (11c) surrounding the rectangular hollow area (11a); the step groove (11b) having a receiving surface (11b1) for receiving a silicon wafer (10a) and an adsorption hole (11b2) penetrating the receiving surface (11b1); the adsorption hole (11b2) being connected to the vacuum pipeline (11c) so that when the vacuum pipeline (11c) is connected to a vacuum pump (20) for vacuuming, the adsorption hole (11b2) adsorbs the silicon wafer (10a) placed in the step groove (11b) to adhere to the receiving surface (11b1).

2. The mask carrier (10) according to claim 1, characterized in that: The plurality of material carrier frames (11) are arranged in an M*N rectangular array in the length direction and the width direction of the mask carrier (10), wherein M and N are both natural numbers greater than or equal to 2.

3. The mask carrier (10) according to claim 1 or 2, characterized in that: The adsorption holes (11b2) are both provided on the long side of the step groove (11b) and the short side of the step groove (11b), the number of the adsorption holes (11b2) located on the long side of the step groove (11b) is a, and the number of the adsorption holes (11b2) located on the short side of the step groove (11b) is b, wherein 2≤a / b≤3.

4. The mask carrier (10) according to claim 3, characterized in that: The mask carrier (10) is provided with a first connecting branch (11d), the first connecting branch (11d) passing through the long side of the carrier frame (11) and being connected to the vacuum pipeline (11c) of the adjacent carrier frame (11).

5. The mask carrier (10) according to claim 4, characterized in that: An even number of adsorption holes (11b2) are provided on the long side of the step groove (11b), and the adsorption holes (11b2) located on the long side of the step groove (11b) are symmetrically arranged with respect to the first connecting branch (11d).

6. The mask carrier (10) according to claim 4, characterized in that: The mask carrier (10) comprises a rectangular frame (12); a plurality of the material loading frames (11) are arranged in a space enclosed by the rectangular frame (12); a main line (12a) and a plurality of second connecting branches (12b) perpendicular to the main line (12a) are provided in the rectangular frame (12); the main line (12a) extends along the long side of the rectangular frame (12); one end of the plurality of second connecting branches (12b) is connected to the main line (12a), and the other end is connected to the vacuum line (11c) adjacent to the main line (12a).

7. The mask carrier (10) according to claim 1, characterized in that: The vacuum pipeline (11c) comprises a pipe part buried in the loading frame (11).

8. A coating device, characterized in that: Comprising the mask carrier (10) as claimed in any one of claims 1 to 7.

9. The coating device according to claim 8, characterized in that: The coating equipment further comprises a vacuum pump (20), wherein the vacuum pump (20) is used to evacuate and break the vacuum of the vacuum pipeline (11c).

10. The coating device according to claim 9, characterized in that: The coating equipment further comprises a coating chamber (30) and a conveying rail, wherein the conveying rail is used to move a mask carrier (10) loaded with a silicon wafer (10a) into and out of the coating chamber (30), and the vacuum pump (20) is installed in the coating chamber (30).

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