SOC-based Mil-1394 data transmission system

Abstract

The utility model discloses an SOC (system on chip)-based Mil-1394B data transmission system, which comprises an upper computer processing unit and a 1394B double-card unit, the upper computer processing unit comprises a processor and a PCIe (peripheral component interface express) interface module, the 1394B double-card unit comprises two 1394B daughter cards, and each 1394B daughter card is connected with the processor through the PCIe interface module. According to the utility model, the two 1394B daughter cards are mounted on the single host, so that the RN function, the CC function and the BM function can be realized by loading firmware through the upper computer processing unit under the condition that hardware is not changed, one card has multiple functions, and the system is small in size and low in cost and power consumption. The airborne data bus can be widely applied to the field of airborne data buses.

Description

Technical Field

[0001] The utility model relates to the field of airborne data bus, in particular to a Mil-1394B data transmission system based on SOC. Background Art

[0002] The Mil-1394B data transmission system is used to build the 1394B network of the aircraft management system bus and is the interface module of the remote node on the aircraft management system bus. The existing Mil-1394B board using FPGA architecture is high in cost, high in power consumption and has complex peripheral circuits. On the other hand, it can only carry RN functions. If expansion is required, peripheral circuits such as link layer chips and physical layer chips need to be added. This method is technically difficult and cannot be miniaturized. Utility Model Content

[0003] In order to solve the above technical problems, the purpose of the utility model is to provide a Mil-1394B data transmission system based on SOC, which can realize one card for multiple uses, has a compact size, and has low cost and power consumption.

[0004] The technical solution adopted by the utility model is:

[0005] A Mil-1394B data transmission system based on SOC comprises a host computer processing unit and a 1394B dual-subcard unit, wherein the host computer processing unit comprises a processor and a PCIe interface module, and the 1394B dual-subcard unit comprises two 1394B subcards, each of which is connected to the processor via the PCIe interface module.

[0006] Furthermore, each of the 1394B subcards includes a SOC minimum system circuit, which includes a main control module, a cache module and a flash memory module. The cache module and the flash memory module are both connected to the main control module, and the main control module is also connected to the processor via the PCIe interface module.

[0007] Furthermore, each of the 1394B subcards further includes a physical layer module and a transformer, wherein the transformer is connected to the physical layer module, and the physical layer module is also connected to the main control module.

[0008] Furthermore, each of the 1394B subcards also includes an interface module, the main control module is connected to the interface module via a PCIe bus, the transformer is connected to the interface module via a 1394B bus, and the interface module is also connected to the processor via the PCIe interface module.

[0009] Furthermore, each of the 1394B subcards further includes a first clock module and a first reset module, wherein the output end of the first clock module is connected to the input end of the physical layer module, and the input end of the first reset module is connected to the output end of the interface module.

[0010] Furthermore, each of the 1394B subcards further includes a power module, and the power module is connected to the interface module.

[0011] Furthermore, the host computer processing unit also includes a NOR Flash memory, a DDR3 memory, a NAND Flash memory, an EEPROM memory and a debugging interface module, and the NOR Flash memory, the DDR3 memory, the NAND Flash memory, the EEPROM memory and the debugging interface module are all connected to the processor.

[0012] Furthermore, the host computer processing unit also includes a second clock module and a second reset module, the output end of the second clock module is connected to the first input end of the processor, and the output end of the second reset module is connected to the second input end of the processor.

[0013] Furthermore, the main control module is a 1394 SOC chip.

[0014] Furthermore, the physical layer module is an SM41BA3 chip.

[0015] The beneficial effects of the utility model are as follows: it comprises a host computer processing unit and a 1394B dual-daughter card unit, the host computer processing unit comprises a processor and a PCIe interface module, the 1394B dual-daughter card unit comprises two 1394B daughter cards, each of the 1394B daughter cards is connected to the processor via the PCIe interface module, two 1394B daughter cards are mounted by a single host, and the RN function, CC function and BM function can be realized by loading firmware on the host computer processing unit without changing the hardware, thereby achieving one card for multiple uses, and the system is compact in size, and has low cost and power consumption. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 This is a structural block diagram of a Mil-1394B data transmission system based on SOC in the utility model;

[0017] Figure 2 This is a schematic diagram of the network topology structure of the 1394B daughter card of the utility model;

[0018] Figure 3 It is a structural block diagram of the 1394B minimum system circuit of the utility model;

[0019] Figure 4It is a structural block diagram of the 1394B daughter card of the utility model;

[0020] Figure 5 This is a schematic diagram of the firmware loading function of the utility model;

[0021] Figure 6 This is a hardware design structure diagram of the upper computer processing unit of the utility model. DETAILED DESCRIPTION

[0022] SOC refers to System on Chip, which is a design that integrates multiple functional modules on a single integrated circuit chip. The application of SOC technology can make electronic equipment more efficient, compact, and energy-efficient, and help improve system performance.

[0023] RN (Remote Node): A remote node is an addressable node connected to a serial bus and has at least a minimum set of control registers. RN nodes are installed in the avionics system as daughter cards.

[0024] CC (Control Computer): It is the root of all node trees with bus manager functions in the network and can initiate network synchronization. CC is a module of the control computer with 3 nodes, each of which manages 1 1394 bus.

[0025] BM (Bus Monitor): Bus monitor, monitors bus behavior and transmission data. As a node of the bus, the bus monitor is mainly used for flight parameter recording black box and ground monitoring.

[0026] The Mil-1394B data transmission system is used to build the 1394B network of the aircraft management system bus. It is an interface module for remote nodes on the aircraft management system bus. It is installed in the line replaceable unit (LRU) of the remote node, providing the ability for the remote node to communicate with the aircraft management system bus, forming a unified 1394B network, and completing the 1394B communication protocol processing. The Mil-1394B bus has a more flexible networking mode, higher data transmission volume, better reliability and real-time transmission. The airborne environment has high requirements for bus reinforcement, anti-electromagnetic interference, transmission distance, temperature adaptability, etc. Considering the technical maturity and cost, combined with the successful application experience of high-speed buses on foreign aircraft, and the customer's recognition of the current high-speed bus, the Mil-1394B bus is a better choice for real-time control systems.

[0027] However, the existing Mil-1394B data transmission system using FPGA architecture has poor scalability and can only carry RN functions, but is not compatible with CC, BM and other functions. If expansion is required, it is necessary to add peripheral circuits such as link layer chips and physical layer chips. On the other hand, domestic FPGAs are costly, power-hungry, have complex peripheral circuits, and a complex program upgrade process. In addition, there is no online upgrade function and poor maintainability. In addition, the current technology can only reach a maximum rate of S400B, and it is impossible to change the rate to S800B.

[0028] To this end, an embodiment of the utility model proposes a Mil-1394B data transmission system based on SOC, wherein the host computer processing unit includes a processor and a PCIe interface module, the processor is connected to the 1394B dual-daughter card unit through the PCIe interface module, the 1394B dual-daughter card unit includes two 1394B daughter cards, and two 1394B daughter cards are mounted by a single host. Without changing the hardware, the RN function, CC function and BM function can be realized by loading firmware on the host computer processing unit, thereby achieving multiple uses of one card, and the system has a small size, low cost and low power consumption.

[0029] Reference Figure 1 A Mil-1394B data transmission system based on SOC includes a host computer processing unit and a 1394B dual-daughter card unit. The host computer processing unit includes a processor and a PCIe interface module. The 1394B dual-daughter card unit includes two 1394B daughter cards. Each 1394B daughter card is connected to the processor through the PCIe interface module.

[0030] Specifically, the processor is used to implement data transmission services based on the 1394B bus;

[0031] There are two PCIe interface modules, which are connected to two 1394B daughter cards respectively and are used to communicate with the 1394B daughter cards;

[0032] Among them, Figure 2 The figure shows the network topology structure diagram of the 1394B daughter card. Each 1394B daughter card can connect multiple sub-nodes to realize a complex 1394B network structure. Each 1394B daughter card has CC and BM functions and can perform data monitoring and data transmission and reception functions on all sub-nodes on the link.

[0033] Reference Figure 3 , Figure 3 This is a structural block diagram of the 1394B minimum system circuit. Further as an optional implementation scheme, each 1394B subcard includes a SOC minimum system circuit, and the SOC minimum system circuit includes a main control module, a cache module and a flash memory module. The cache module and the flash memory module are both connected to the main control module, and the main control module is also connected to the processor through a PCIe interface module.

[0034] Specifically, the main control module is used to communicate with the processor at high speed through the interface module of the 1394B daughter card and the PCIe interface module of the host computer processing unit, and to send, receive and parse data transmitted through the physical layer, meeting the requirements of the AS5643 protocol;

[0035] The cache module SDRAM is used to run the program solidified in the flash memory module FLASH. The model can be SM48LC32M16M produced by SMIC.

[0036] The flash memory module FLASH is used to store the 1394B daughter card program and configuration table information for the main control module to call. The model can be SM29GL512 produced by Guowei.

[0037] As a further optional implementation scheme, the main control module is a 1394 SOC chip.

[0038] Specifically, the 1394SOC chip can implement the 1394B bus protocol processing function specified in IEEE Std 1394-2008, and also integrates the 1394B link layer and physical layer functions, and can implement the 1394B bus data link communication function, which can be applied to aviation, aerospace and other communication network fields that use 1394B network to transmit data. By using the 1394SOC chip that integrates the 1394B link layer and physical layer, there is no need to connect a link layer chip separately, which effectively reduces the system size and simplifies the system structure.

[0039] Reference Figure 4 , Figure 4 1 is a structural block diagram of a 1394B main card. As an optional implementation scheme, each 1394B sub-card further includes a physical layer module and a transformer. The transformer is connected to the physical layer module, and the physical layer module is also connected to the main control module.

[0040] Specifically, the physical layer module is used to implement 1394B data packet transmission and reception, and complete the system initialization work and configuration process.

[0041] As a further optional implementation, the physical layer module is an SM41BA3 chip.

[0042] Specifically, the SM41BA3 chip fully supports the high-performance serial bus standard IEEE1394a-2000 and 1394-1995 protocols, and fully supports the 1394b-2002 protocol. Its signal rate can reach the data transmission rate of S100, S100B, S200, S200B, S400 or S400B. B means that the rate is achieved in the 1394-1995 mode. The 1394-1995 mode is the original standard of the 1394B protocol, which supports a maximum data transmission rate of 50MB / s. SM41BA3 supports a single-node 1394B bus interface and provides a 3-port 1394B link layer chip interface. You can also use the SM81BA3 chip to achieve the S800B rate;

[0043] The transformer is used to isolate the external 1394B link to prevent the bus from damaging the internal chip due to surge signals on the link. Surge signals refer to instantaneous overvoltages that exceed the normal operating voltage. Surges may be caused by heavy equipment, short circuits, power switching or large engines. The transformer can use the XECJ1062BT3DUA chip produced by Sunlord, which can provide 3 ports of 1394B output ports.

[0044] Reference Figure 4 As an optional implementation scheme, each 1394B daughter card also includes an interface module, the main control module is connected to the interface module through a PCIe bus, the transformer is connected to the interface module through a 1394B bus, and the interface module is also connected to the processor through a PCIe interface module.

[0045] Specifically, the interface module is used to connect the host computer processing unit and the external 1394B link. The main control module is connected to the interface module through the PCIe bus and then connected to the host computer processing unit. The host computer processing unit can control the system through the interface module to perform data monitoring and data transmission and reception; the transformer is connected to the interface module through the 1394B bus and then connected to the external 1394B link.

[0046] Reference Figure 4 As an optional implementation scheme, each 1394B daughter card further includes a first clock module and a first reset module, the output end of the first clock module is connected to the input end of the physical layer module, and the input end of the first reset module is connected to the output end of the interface module.

[0047] The first clock module is used to configure the main frequency clock for the SM41BA3 chip to meet the 1394B system with different processing requirements. For the 1394B system requiring low power consumption, the main frequency can be reduced to meet the power consumption requirement.

[0048] The first reset module is used to communicate with other peripherals through the interface module to achieve a reset function.

[0049] Reference Figure 4 As an optional implementation scheme, each 1394B daughter card further includes a power module, and the power module is connected to the interface module.

[0050] Among them, the power module is used to provide a stable power supply for the system, converting the input DC voltage into different output voltages to meet the needs of different modules. The model can be selected from the SM4644 designed by Guowei. This chip can achieve 4 outputs at the same time, each output can reach 4A, and the maximum peak is 5A. The system uses the PGood signal control of the power supply itself, giving priority to the 3.3V power supply of the 1394SOC chip, followed by the 1.2V core power supply, and finally starting the peripheral chip power supply 1.8V and 1.95V.

[0051] In addition, each 1394B daughter card also includes a temperature sensor, a JTAG debugging interface module and other auxiliary circuits. These modules and circuits are designed for PCB layout. The PCB size is 68mm×68mm. The entire board is small in size. By loading different firmwares on the host computer processing unit, the RN, CC and BM functions can be realized, completing one card for multiple uses.

[0052] Firmware loading functions such as Figure 5 As shown, using ground software, different versions of transmission software (RN, CC, BM) are transmitted to the host through the network, and the downloaded transmission software is stored in the form of files on the disk of the host processing unit. When the version needs to be switched, the host processing unit reads the content of the transmission software, and first erases the Nor flash sector through the PCIe interface to clear the previously stored data so that the new transmission software can be written, and then writes the transmission software content to the Nor flash through the PCIe interface. After completion, restart and run the new version of the software to realize the RN, CC and BM functions.

[0053] Reference Figure 6 , Figure 6 This is a block diagram of the hardware design structure of the host computer processing unit. Further as an optional implementation scheme, the host computer processing unit also includes a NOR Flash memory, a DDR3 memory, a NAND Flash memory, an EEPROM memory and a debug interface module, and the NOR Flash memory, the DDR3 memory, the NAND Flash memory, the EEPROM memory and the debug interface module are all connected to the processor.

[0054] Specifically, NOR Flash memory is a non-volatile memory used to store program code, and can store data that does not change frequently, such as firmware and boot programs;

[0055] DDR3 memory is a dynamic random access memory used to store running programs and data. DDR3 memory provides high-speed read and write capabilities, allowing the processor to quickly access and modify the data stored in it;

[0056] NAND Flash memory is used to store large-capacity, non-volatile data, with fast data reading speed and long life;

[0057] EEPROM memory is an erasable programmable read-only memory used to store small amounts of data, such as configuration information, calibration data, etc. It allows erasing and rewriting of data;

[0058] The debug interface module is used for debugging, testing, firmware downloading, and troubleshooting in integrated circuits.

[0059] Reference Figure 6 As an optional implementation scheme, the host computer processing unit also includes a second clock module and a second reset module, the output end of the second clock module is connected to the first input end of the processor, and the output end of the second reset module is connected to the second input end of the processor.

[0060] Specifically, the second clock module is used to provide a clock signal to the processor to ensure the normal operation and coordinated work of the system;

[0061] The second reset module is used to restore the system to an initial state, ensuring that all components are in a controllable state at startup.

[0062] The software design part of the host computer processing unit is divided into a driver software module and an application software module. The data transmission service based on the 1394B bus is realized through the application software module. The application software module connects to the 1394B daughter card through the PCIe interface, interacts with the corresponding sub-node, and completes the data receiving and sending functions. The driver software module provides the upper-level application software module with an API interface for accessing the 1394B module, thereby realizing the initialization, data reception, data transmission and status monitoring of the 1394B daughter card.

[0063] Compared with the traditional Mil-1394B board based on FPGA architecture, the utility model has the following advantages:

[0064] 1. The 1394B daughter card is implemented in SOC mode. There is no need to change the hardware. Just by loading different firmware, the RN, CC and BM functions can be realized, completing one card for multiple uses.

[0065] Second, the implementation method of a single host plus dual sub-cards can not only ensure data reliability, but also ensure the subsequent architecture upgradeability and functional softwareization, that is, to achieve function optimization and function upgrade without changing the hardware platform;

[0066] 3. The system is compact, low in cost and power consumption, and has good portability and high versatility.

[0067] The above is a specific description of the preferred implementation of the utility model, but the utility model is not limited to the embodiments. Technical personnel familiar with the field can also make various equivalent deformations or substitutions without violating the spirit of the utility model. These equivalent deformations or substitutions are all included in the scope defined by the claims of this application.

Claims

1. A Mil-1394B data transmission system based on SOC, characterized in that: It comprises a host computer processing unit and a 1394B dual-subcard unit, wherein the host computer processing unit comprises a processor and a PCIe interface module, and the 1394B dual-subcard unit comprises two 1394B subcards, and each of the 1394B subcards is connected to the processor via the PCIe interface module.

2. A Mil-1394B data transmission system based on SOC according to claim 1, characterized in that: Each of the 1394B subcards includes a SOC minimum system circuit, which includes a main control module, a cache module and a flash memory module. The cache module and the flash memory module are both connected to the main control module, and the main control module is also connected to the processor through the PCIe interface module.

3. A Mil-1394B data transmission system based on SOC according to claim 2, characterized in that: Each of the 1394B subcards further includes a physical layer module and a transformer. The transformer is connected to the physical layer module, and the physical layer module is also connected to the main control module.

4. A Mil-1394B data transmission system based on SOC according to claim 3, characterized in that: Each of the 1394B subcards further comprises an interface module, the main control module is connected to the interface module via a PCIe bus, the transformer is connected to the interface module via a 1394B bus, and the interface module is further connected to the processor via the PCIe interface module.

5. A Mil-1394B data transmission system based on SOC according to claim 4, characterized in that: Each of the 1394B subcards further includes a first clock module and a first reset module. The output end of the first clock module is connected to the input end of the physical layer module, and the input end of the first reset module is connected to the output end of the interface module.

6. The Mil-1394B data transmission system based on SOC according to claim 4, characterized in that: Each of the 1394B daughter cards further comprises a power module, and the power module is connected to the interface module.

7. The Mil-1394B data transmission system based on SOC according to claim 1, characterized in that: The host computer processing unit also includes a NOR Flash memory, a DDR3 memory, a NAND Flash memory, an EEPROM memory and a debugging interface module, and the NOR Flash memory, the DDR3 memory, the NAND Flash memory, the EEPROM memory and the debugging interface module are all connected to the processor.

8. The Mil-1394B data transmission system based on SOC according to claim 1, characterized in that: The host computer processing unit further includes a second clock module and a second reset module, wherein the output end of the second clock module is connected to the first input end of the processor, and the output end of the second reset module is connected to the second input end of the processor.

9. The Mil-1394B data transmission system based on SOC according to claim 2, characterized in that: The main control module is a 1394SOC chip.

10. The Mil-1394B data transmission system based on SOC according to claim 3, characterized in that: The physical layer module is an SM41BA3 chip.

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