Relaxation germanium-based substrate and relaxation germanium-based sensor
The relaxed germanium substrate with homoepitaxial growth and ferroelectric oxide layers addresses lattice mismatch issues, improving crystal quality and responsiveness, enabling high-speed and sensitive germanium sensors for various applications.
Patent Information
- Application Number
- CN202420619271.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-03-27
- Publication Date
- 2024-12-17
- Estimated Expiration
- 2034-03-27
AI Technical Summary
InGaAs short-wave infrared sensors face issues such as small wafer size, incompatibility with CMOS manufacturing processes, low yield, and poor crystal quality due to lattice mismatch, leading to low responsiveness and operating speed, hindering large-scale commercial use.
A relaxed germanium substrate is developed with stacked layers formed by homoepitaxial growth, including a first intrinsic relaxed germanium layer, an intrinsic relaxed germanium/germanium silicon multi-quantum well layer, and a second intrinsic relaxed germanium layer, combined with a ferroelectric oxide layer to improve crystal quality and reduce capacitance, enhancing responsiveness and operating speed.
The solution results in high-quality germanium layers with reduced capacitance and dark current, achieving high responsiveness, high operating speed, and expanded spectral response range, making it suitable for large-scale commercial use.
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Figure CN222190763U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the technical field of semiconductors, in particular to a relaxed germanium substrate and a relaxed germanium sensor. Background Art
[0002] InGaAs short-wave infrared sensors are widely used in machine vision, laser communication, astronomy, life sciences, semiconductor detection, security, medical diagnosis, low-altitude technology and automotive assisted driving, but they have technical bottlenecks such as small wafer size, incompatibility with CMOS manufacturing process, low yield and inability to mass produce. As a result, germanium sensors that are more compatible with CMOS manufacturing process and also have photoelectric response in the short-wave infrared band are attracting more and more attention.
[0003] At present, vertical PIN structured germanium sensors are usually prepared by direct epitaxial germanium on silicon or germanium on insulator (GOI) structure. However, in vertical PIN structured germanium sensors using direct epitaxial germanium on silicon or GOI structure, the crystal quality of the germanium layer at the top of the vertical PIN structure is poor and the defect density is high, resulting in low responsiveness and operating speed of the germanium sensor, which seriously affects the quantum efficiency and sensitivity of the germanium sensor and hinders the large-scale commercial use of the germanium sensor.
[0004] Therefore, how to improve the responsiveness and operating speed of germanium-based sensors has become a problem that needs to be solved. Utility Model Content
[0005] Based on the above problems, the utility model provides a relaxed germanium substrate and a relaxed germanium sensor to improve the responsiveness and working speed of the germanium sensor.
[0006] The utility model embodiment discloses the following technical solution:
[0007] In a first aspect, an embodiment of the utility model provides a relaxed germanium substrate, characterized in that the relaxed germanium substrate is used to form a relaxed germanium sensor, and the relaxed germanium substrate comprises:
[0008] A first germanium substrate, a first intrinsic relaxed germanium layer, an intrinsic relaxed germanium / germanium silicon multi-quantum well layer, a second intrinsic relaxed germanium layer, a second doped relaxed germanium layer, a ferroelectric oxide layer and a dielectric layer are stacked in sequence; the first intrinsic relaxed germanium layer, the intrinsic relaxed germanium / germanium silicon multi-quantum well layer and the second intrinsic relaxed germanium layer are formed by sequentially performing homoepitaxial growth on one side of the first germanium substrate.
[0009] Optionally, the ferroelectric oxide layer is Hf 0.5 Zr 0.5One or more stacks of O2, BaTiO3, PZT, LiNbO3, SrRuO3, SrTiO3, PbTiO3, (Pb, Sr)TiO3 / SrTiO3 (PST / STO) superlattice and (Ba, Sr)TiO3 / LaAlO3 superlattice.
[0010] Optionally, the intrinsic relaxed germanium / germanium silicon multi-quantum well layer includes a relaxed germanium layer and a relaxed germanium silicon layer; the relaxed germanium layer is a barrier layer with a thickness range of 10 to 100 nm; the relaxed germanium silicon layer is a potential well layer with a thickness range of 10 to 100 nm; the silicon content in the relaxed germanium silicon layer is 0 to 30%.
[0011] Optionally, the intrinsic relaxed germanium / germanium silicon multi-quantum well layer includes 2 to 10 quantum wells.
[0012] Optionally, the intrinsic relaxed germanium / germanium silicon multiple quantum well layer has a thickness ranging from 200 to 1000 nm.
[0013] Optionally, the thickness of the second intrinsic relaxed germanium layer is in the range of 100 to 3000 nm.
[0014] Optionally, the second doped relaxed germanium layer has a thickness ranging from 100 to 500 nm.
[0015] In a second aspect, an embodiment of the utility model provides a relaxor germanium sensor, wherein the relaxor germanium sensor is made based on the relaxor germanium substrate described in any embodiment of the first aspect, and the relaxor germanium sensor comprises:
[0016] A first doped relaxed germanium layer, an intrinsic relaxed germanium / germanium silicon multi-quantum well layer, a second intrinsic relaxed germanium layer, a second doped relaxed germanium layer, a ferroelectric oxide layer, a dielectric layer and an oxide layer are stacked in sequence; the first doped relaxed germanium layer is a first intrinsic relaxed germanium layer after ion doping; the first doped relaxed germanium layer, the intrinsic relaxed germanium / germanium silicon multi-quantum well layer, the second intrinsic relaxed germanium layer and the second doped relaxed germanium layer constitute a vertical PIN structure.
[0017] Optionally, it is characterized in that the side of the oxide layer facing away from the dielectric layer also has a second silicon substrate.
[0018] Optionally, the relaxed germanium sensor further includes a readout circuit, and the first metal located in the first doped relaxed germanium layer and the second metal located in the second doped relaxed germanium layer are electrically connected to the readout circuit.
[0019] Compared with the prior art, the utility model has the following beneficial effects:
[0020] The utility model provides a relaxed germanium substrate, which comprises: a first germanium substrate, a first intrinsic relaxed germanium layer, an intrinsic relaxed germanium / germanium silicon multi-quantum well layer, a second intrinsic relaxed germanium layer, a second doped relaxed germanium layer, a ferroelectric oxide layer and a dielectric layer stacked in sequence; the first intrinsic relaxed germanium layer, the intrinsic relaxed germanium / germanium silicon multi-quantum well layer and the second intrinsic relaxed germanium layer are formed by sequentially performing homoepitaxial growth on one side of the first germanium substrate. Therefore, the relaxed germanium sensor made of the relaxed germanium substrate, on the one hand, forms a high-quality first intrinsic relaxed germanium layer, an intrinsic relaxed germanium / germanium silicon multi-quantum well layer and a second intrinsic relaxed germanium layer by homoepitaxial growth on the germanium substrate, which can avoid the problem of lattice mismatch between the first intrinsic relaxed germanium layer, the intrinsic relaxed germanium / germanium silicon multi-quantum well layer and the second intrinsic relaxed germanium layer and the substrate, significantly improves the crystal quality of the top germanium layer of the vertical PIN structure in the germanium sensor, and improves the responsiveness and working speed of the germanium sensor; on the other hand, due to the negative capacitance effect of the ferroelectric oxide, its capacitance During the operation of the germanium sensor, it is negative, which can effectively compensate for the larger positive capacitance in the thick germanium vertical PIN structure, thereby reducing the capacitance of the entire germanium sensor, while achieving high responsiveness and high operating speed of the germanium sensor, and obtaining a germanium sensor with high quantum efficiency and high sensitivity; on the other hand, there are two photoelectric sensing layers, the second intrinsic germanium layer and the intrinsic germanium / germanium silicon multi-quantum well layer, wherein the second intrinsic germanium layer is a visible light and short-wave infrared sensing layer, and the intrinsic germanium / germanium silicon multi-quantum well layer is an infrared band sensing layer, and the combined structure of the two can significantly expand the spectral response range of the germanium sensor. In addition, ferroelectric oxide is also an effective insulating layer, which can effectively improve the defect state caused by the existence of dangling bonds or water molecules at the interface between germanium and the oxide layer, thereby reducing the dark current of the germanium sensor. BRIEF DESCRIPTION OF THE DRAWINGS
[0021] In order to more clearly illustrate the embodiments of the utility model or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the utility model. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.
[0022] Figure 1 A structural diagram of a relaxed germanium-based substrate provided in an embodiment of the utility model;
[0023] Figure 2 A structural diagram of an acceptor substrate provided in an embodiment of the utility model;
[0024] Figure 3 A structural diagram of a relaxor germanium sensor provided in an embodiment of the utility model. DETAILED DESCRIPTION
[0025] As described above, the vertical PIN structured germanium sensors are usually prepared by direct epitaxial germanium on silicon or germanium on insulator (GOI) structure. However, due to the lattice mismatch between silicon and germanium, the dislocation density of germanium materials grown on silicon is relatively high, which is not conducive to the improvement of the performance indicators of germanium sensors. In the germanium sensors with GOI structure, the germanium layer at the top of the vertical PIN structure also has problems such as lattice mismatch, poor crystal quality, and high defect density, which leads to low responsiveness and working speed of the germanium sensors with GOI structure, which seriously affects the quantum efficiency and sensitivity of the germanium sensors, making it difficult for germanium sensors to be commercialized on a large scale.
[0026] In addition, in conventional vertical PIN structure GOI wafers, due to the poor crystal quality and high defect density of the top germanium layer, the dangling bonds or water molecules at the interface between the germanium and the buried oxide layer have a certain influence on the defect state; at the same time, a thicker germanium layer is usually used in the vertical PIN structure GOI wafer to improve the responsiveness, but the thicker germanium layer will introduce a larger capacitance to the germanium sensor, affecting the operating speed of the germanium sensor, that is, it is necessary to compromise between the responsiveness and operating speed of the germanium sensor.
[0027] To solve the above problems, the utility model provides a relaxed germanium substrate for forming a relaxed germanium sensor, the relaxed germanium substrate comprising: a first germanium substrate, a first intrinsic relaxed germanium layer, an intrinsic relaxed germanium / germanium silicon multi-quantum well layer, a second intrinsic relaxed germanium layer, a second doped relaxed germanium layer, a ferroelectric oxide layer and a dielectric layer stacked in sequence; the first intrinsic relaxed germanium layer, the intrinsic relaxed germanium / germanium silicon multi-quantum well layer and the second intrinsic relaxed germanium layer are formed by homoepitaxially performing in sequence on one side of the first germanium substrate.
[0028] Therefore, the relaxed germanium sensor made based on the relaxed germanium substrate has a high-quality first intrinsic relaxed germanium layer and other film layers formed by homoepitaxial growth on the germanium substrate, and the crystal quality of the top germanium layer of the vertical PIN structure in the germanium sensor is significantly improved, thereby improving the responsiveness and operating speed of the germanium sensor.
[0029] In order to enable those skilled in the art to better understand the solution of the utility model, the technical solution in the embodiment of the utility model will be clearly and completely described below in conjunction with the drawings in the embodiment of the utility model. Obviously, the described embodiment is only a part of the embodiment of the utility model, not all of the embodiments. Based on the embodiment of the utility model, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the utility model.
[0030] See also Figure 1, which is a structural diagram of a relaxed germanium-based substrate provided by an embodiment of the utility model, and the relaxed germanium-based substrate comprises:
[0031] A first germanium substrate 101, a first intrinsic relaxed germanium layer 102, an intrinsic relaxed germanium / germanium silicon multi-quantum well layer 103, a second intrinsic relaxed germanium layer 104, a second doped relaxed germanium layer 105, a ferroelectric oxide layer 106 and a dielectric layer 107 are stacked in sequence; wherein the first intrinsic relaxed germanium layer 102, the intrinsic relaxed germanium / germanium silicon multi-quantum well layer 103 and the second intrinsic relaxed germanium layer 104 are formed by sequentially performing homoepitaxial growth on one side of the first germanium substrate 101.
[0032] Therefore, the relaxed germanium sensor made based on the relaxed germanium substrate, on the one hand, forms a high-quality first intrinsic relaxed germanium layer, an intrinsic relaxed germanium / germanium silicon multi-quantum well layer and a second intrinsic relaxed germanium layer by homoepitaxial growth on the relaxed germanium substrate, which can avoid the problem of lattice mismatch between the first intrinsic relaxed germanium layer, the intrinsic relaxed germanium / germanium silicon multi-quantum well layer and the second intrinsic relaxed germanium layer and the substrate, significantly improves the crystal quality of the top germanium layer of the vertical PIN structure in the relaxed germanium sensor, and improves the responsiveness and operating speed of the relaxed germanium sensor.
[0033] As an example, the thickness of the ferroelectric oxide layer 106 may be selected from a range of 10 to 1000 nm. 0.5 Zr 0.5 O2, BaTiO3, PZT, LiNbO3, SrRuO3, SrTiO3, PbTiO3, (Pb, Sr)TiO3 / SrTiO3 (PST / STO) superlattice and (Ba, Sr)TiO3 / LaAlO3 superlattice. For example, the ferroelectric oxide layer 106 can be a PZT layer, or a stack of PZT and SrTiO3. The ferroelectric oxide layer 106 is preferably a stack formed by stacking multiple materials, thereby generating a resonant cavity effect, so that light is reflected multiple times in the resonant cavity, the intensity of light is enhanced, and it is beneficial to improve the responsiveness of the germanium sensor.
[0034] The relaxed germanium substrate provided by the embodiment of the utility model has a ferroelectric oxide layer 106. Since the ferroelectric oxide has a negative capacitance effect, its capacitance is negative during the operation of the germanium sensor, which can effectively compensate for the larger positive capacitance in the thick germanium vertical PIN structure, thereby reducing the capacitance of the entire relaxed germanium sensor, while achieving high responsiveness and high operating speed of the relaxed germanium sensor; on the other hand, the ferroelectric oxide is also an effective insulating layer, which can effectively improve the defect state generated at the interface between germanium and the oxide layer due to the existence of dangling bonds or water molecules, thereby reducing the dark current of the relaxed germanium sensor. In summary, the ferroelectric oxide layer 106 has the functions of both electrical insulation and capacitance compensation, and can effectively improve the performance of the relaxed germanium sensor.
[0035] Optionally, the dielectric layer 107 is an Al 2 O 3 layer, so that the relaxed germanium-based substrate and the acceptor substrate can be more easily directly wafer-bonded.
[0036] Optionally, the thickness of the first intrinsic relaxed germanium layer 102 is in the range of 100-500 nm.
[0037] Optionally, the intrinsic relaxed germanium / germanium silicon multi-quantum well layer 103 includes a relaxed germanium layer and a relaxed germanium silicon layer, wherein the relaxed germanium layer is a barrier layer with a thickness range of 10 to 100 nm; the relaxed germanium silicon layer is a potential well layer with a thickness range of 10 to 100 nm, the silicon content in the relaxed germanium silicon layer is 0 to 30%, and the germanium content is not less than 70%; the total thickness range of the intrinsic relaxed germanium / germanium silicon multi-quantum well layer 102 is 200 to 1000 nm, and can contain 2 to 10 quantum wells.
[0038] Optionally, the thickness of the second intrinsic relaxed germanium layer 104 is in the range of 100 to 3000 nm; the thickness of the second doped relaxed germanium layer 105 is in the range of 100 to 500 nm. As an example, a relaxed germanium layer may be first formed by homoepitaxial growth, and then part of the relaxed germanium layer may be N-type or P-type doped by, for example, ion implantation or diffusion, so that the relaxed germanium layer is divided into a second intrinsic relaxed germanium layer 104 without ion doping and a second doped relaxed germanium layer 105 with ion doping.
[0039] See also Figure 2 , this figure is a structural diagram of an acceptor substrate provided by an embodiment of the utility model, and the acceptor substrate includes: a second silicon substrate 201 and an oxide layer 202 stacked in sequence.
[0040] Specifically, the second silicon substrate 201 can be a silicon substrate, a sapphire substrate or a glass substrate; the oxide layer 202 can be a layer of SiO2 or a stack of multiple layers of SiO2 formed on a silicon substrate using, for example, a thermal oxidation process or a chemical vapor deposition process, and the thickness of the oxide layer 202 can range from 100 to 1000 nm.
[0041] See also Figure 3 , which is a structural diagram of a relaxor germanium sensor provided in an embodiment of the utility model. The relaxor germanium sensor is made based on the relaxor germanium substrate provided in any of the above embodiments. The relaxor germanium sensor includes:
[0042] The first doped relaxed germanium layer 102', the intrinsic relaxed germanium / germanium silicon multi-quantum well layer 103, the second intrinsic relaxed germanium layer 104, the second doped relaxed germanium layer 105, the ferroelectric oxide layer 106, the dielectric layer 107 and the oxide layer 202 are stacked in sequence. The first doped relaxed germanium layer 102' is the first intrinsic relaxed germanium layer 102 after ion doping; the first doped relaxed germanium layer 102', the intrinsic relaxed germanium / germanium silicon multi-quantum well layer 103, the second intrinsic relaxed germanium layer 104 and the second doped relaxed germanium layer 105 form a vertical PIN structure.
[0043] Specifically, the relaxed germanium substrate and the acceptor substrate can be directly wafer bonded to form a first germanium substrate 101, a first intrinsic relaxed germanium layer 102, an intrinsic relaxed germanium / germanium silicon multi-quantum well layer 103, a second intrinsic relaxed germanium layer 104, a second doped relaxed germanium layer 105, a ferroelectric oxide layer 106, a dielectric layer 107 and an oxide layer 202 which are stacked in sequence; and then the first germanium substrate 101 is removed by thinning the side of the relaxed germanium substrate away from the dielectric layer 107 to expose the first intrinsic germanium substrate 101. Finally, the exposed first intrinsic relaxed germanium layer 102 is N-type or P-type doped by ion implantation or diffusion to form a first doped relaxed germanium layer 102', and the first doped relaxed germanium layer 102' and the second doped relaxed germanium layer 105 have different ion doping types, so that the first doped relaxed germanium layer 102', the intrinsic relaxed germanium / germanium silicon multi-quantum well layer 103, the second intrinsic relaxed germanium layer 104 and the second doped relaxed germanium layer 105 form a vertical PIN structure.
[0044] In addition, in an embodiment of the utility model, the intrinsic relaxed germanium / germanium silicon multi-quantum well layer 103 includes a relaxed germanium layer and a relaxed germanium silicon layer, wherein the relaxed germanium layer is a barrier layer with a thickness range of 10 to 100 nm; the relaxed germanium silicon layer is a potential well layer with a thickness range of 10 to 100 nm, the silicon content in the relaxed germanium silicon layer is 0 to 30%, and the germanium content is not less than 70%; the total thickness range of the intrinsic relaxed germanium / germanium silicon multi-quantum well layer 103 is 200 to 1000 nm, and can contain 2 to 10 quantum wells.
[0045] Optionally, the thickness of the second intrinsic relaxed germanium layer 104 is in the range of 100-3000 nm, including a reserved electrode layer of 100-500 nm, and the rest is a photoelectric sensing layer. The thickness of the second doped relaxed germanium layer 105 is in the range of 100-500 nm.
[0046] In the embodiment of the utility model, the external light signal will enter the relaxed germanium sensor from the side of the oxide layer 202 close to the second silicon substrate 201. When the external light signal enters the photoelectric sensing layer of the relaxed germanium sensor, it will not only cause the transition of the inter-band carriers in the second intrinsic relaxed germanium layer 104, but also cause the transition of the inter-band carriers in the intrinsic relaxed germanium / germanium silicon multi-quantum well layer 103, that is, there are two photoelectric sensing layers, namely, the second intrinsic relaxed germanium layer 104 and the intrinsic relaxed germanium / germanium silicon multi-quantum well layer 103, wherein the second intrinsic relaxed germanium layer 104 is a visible light and short-wave infrared sensing layer, and the intrinsic relaxed germanium / germanium silicon multi-quantum well layer 103 is an infrared band sensing layer. Therefore, the combined structure of the second intrinsic relaxed germanium layer 104 and the intrinsic relaxed germanium / germanium silicon multi-quantum well layer 103 as the sensing layer can significantly expand the spectral response range of the relaxed germanium sensor.
[0047] In the embodiment of the present invention, the thickness of the ferroelectric oxide layer 106 can be selected from the range of 10 to 1000 nm. 0.5 Zr 0.5 O2, BaTiO3, PZT, LiNbO3, SrRuO3, SrTiO3, PbTiO3, (Pb, Sr)TiO3 / SrTiO3 (PST / STO) superlattice and (Ba, Sr)TiO3 / LaAlO3 superlattice. For example, the ferroelectric oxide layer 106 can be a PZT layer, or a stack of PZT and SrTiO3. The ferroelectric oxide layer 106 is preferably a stack formed by stacking multiple materials, thereby generating a resonant cavity effect (Resonant Cavity Effect), so that the light is reflected multiple times in the resonant cavity, the intensity of the light is enhanced, and it is beneficial to improve the responsiveness of the germanium sensor. In addition, the stacking of the ferroelectric oxide layer 106, the dielectric layer 107 and the oxide layer 202 can also form a resonant cavity effect, enhance the interaction between the optical signal and the two photoelectric sensing layers of the second intrinsic relaxed germanium layer and the intrinsic relaxed germanium / germanium silicon multi-quantum well layer, and improve the performance of the relaxed germanium sensor.
[0048] Optionally, the relaxed germanium sensor further includes a readout circuit ROIC, and the first metal 501 located in the first doped relaxed germanium layer 102 ′ and the second metal 502 located in the second doped relaxed germanium layer 105 can be electrically connected by bump bonding with the readout circuit.
[0049] Optionally, the side of the oxide layer 202 facing away from the dielectric layer 107 may also have a portion of the second silicon substrate 201. Specifically, after the first metal 501 located in the first doped relaxed germanium layer 102' and the second metal 502 located in the second doped relaxed germanium layer 105 are electrically connected to the readout circuit, a portion of the second silicon substrate 201 may be removed, or the second silicon substrate 201 may be completely removed to expose the oxide layer 202.
[0050] The various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referenced to each other.
[0051] The above description of the disclosed embodiments enables those skilled in the art to implement or use the present invention. Various modifications to these embodiments will be apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention will not be limited to the embodiments shown herein, but will conform to the widest scope consistent with the principles and novel features disclosed herein.
Claims
1. A relaxed germanium substrate, characterized in that: The relaxed germanium substrate is used to form a relaxed germanium sensor, and the relaxed germanium substrate includes: A first germanium substrate, a first intrinsic relaxed germanium layer, an intrinsic relaxed germanium / germanium silicon multi-quantum well layer, a second intrinsic relaxed germanium layer, a second doped relaxed germanium layer, a ferroelectric oxide layer and a dielectric layer are stacked in sequence; the first intrinsic relaxed germanium layer, the intrinsic relaxed germanium / germanium silicon multi-quantum well layer and the second intrinsic relaxed germanium layer are formed by sequentially performing homoepitaxial growth on one side of the first germanium substrate.
2. The relaxed germanium substrate according to claim 1, characterized in that: The ferroelectric oxide layer is Hf 0.5 Zr 0.5 One or more stacks of O2, BaTiO3, PZT, LiNbO3, SrRuO3, SrTiO3, PbTiO3, (Pb, Sr)TiO3 / SrTiO3 (PST / STO) superlattice and (Ba, Sr)TiO3 / LaAlO3 superlattice.
3. The relaxed germanium substrate according to claim 1, characterized in that: The intrinsic relaxed germanium / germanium silicon multi-quantum well layer includes a relaxed germanium layer and a relaxed germanium silicon layer; the relaxed germanium layer is a barrier layer with a thickness ranging from 10 to 100 nm; the relaxed germanium silicon layer is a potential well layer with a thickness ranging from 10 to 100 nm.
4. The relaxed germanium substrate according to claim 1, characterized in that: The intrinsic relaxed germanium / germanium silicon multi-quantum well layer includes 2 to 10 quantum wells.
5. The relaxed germanium substrate according to claim 1, characterized in that: The thickness of the intrinsic relaxed germanium / germanium silicon multi-quantum well layer is in the range of 200 to 1000 nm.
6. The relaxed germanium substrate according to claim 1, characterized in that: The thickness of the second intrinsic relaxed germanium layer is in the range of 100 to 3000 nm.
7. The relaxed germanium substrate according to claim 1, characterized in that: The thickness of the second doped relaxed germanium layer is in the range of 100 to 500 nm.
8. A relaxor germanium sensor, characterized in that: The relaxor germanium sensor is made based on the relaxor germanium substrate according to any one of claims 1 to 7, and the relaxor germanium sensor comprises: A first doped relaxed germanium layer, an intrinsic relaxed germanium / germanium silicon multi-quantum well layer, a second intrinsic relaxed germanium layer, a second doped relaxed germanium layer, a ferroelectric oxide layer, a dielectric layer and an oxide layer are stacked in sequence; the first doped relaxed germanium layer is a first intrinsic relaxed germanium layer after ion doping; the first doped relaxed germanium layer, the intrinsic relaxed germanium / germanium silicon multi-quantum well layer, the second intrinsic relaxed germanium layer and the second doped relaxed germanium layer constitute a vertical PIN structure.
9. The relaxor germanium sensor according to claim 8, characterized in that: The side of the oxide layer facing away from the dielectric layer also has a second silicon substrate.
10. The relaxor germanium sensor according to claim 8, characterized in that: The relaxed germanium sensor further includes a readout circuit, and the first metal located in the first doped relaxed germanium layer and the second metal located in the second doped relaxed germanium layer are electrically connected to the readout circuit.