Circuit board and circuit board assembly structure
By setting a hollow part and a second hollow part on the circuit board, the roughness and conductive adhesive force of the chip bonding area are improved, and the problem of poor chip bonding is solved, ensuring the quality of high-speed signal transmission.
Patent Information
- Application Number
- CN202420273987.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-02-04
- Publication Date
- 2024-12-20
- Estimated Expiration
- 2034-02-04
AI Technical Summary
In the prior art, the bonding of circuit board packaging chips is poor, especially in surface mounting technology, the bonding force between the conductive adhesive and the copper surface is insufficient, resulting in the push-pull force test after the chip is bonded, affecting high-speed signal transmission.
A circuit board structure is designed, including a chip mounting area and a plurality of ground holes on the substrate, the ground hole part is located in the hollow part or on the covered metal layer, and a second hollow part is provided for storage of overflowing glue, and the addition of The roughness and conductive adhesive force of the chip bonding area are obtained.
By increasing the adhesion of the conductive adhesive, the chip's bonding firmness and push-pull force testing performance are improved, ensuring the quality of high-speed signal transmission.
Smart Images

Figure CN222216030U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the technical field of circuit board components, in particular to a circuit board and a circuit board component structure. Background Art
[0002] COB (Chips on Board) packaging refers to directly adhering the chip to the interconnected PCB substrate with conductive or non-conductive glue, and then performing wire bonding to achieve its electrical connection. Figure 1 As shown, in the conventional COB board design method, a ground hole 11' is drilled on the PCB (Printed Circuit Board) substrate 1' below the chip 3' and a whole piece of ground copper 2' is laid. A grounding electrode 31' for grounding and a signal electrode 32' for signal transmission are provided on the chip 3'. A bonding position 23' connected to the grounding electrode is provided at the edge of the ground copper 2', and a signal pad 12' connected to the signal electrode is provided on the substrate 1' outside the ground copper 2'. For the optical module, the bonding wires need to be as short and dense as possible to ensure high-speed signal transmission. Generally, multiple bonding positions 23' and multiple signal pads 12' are concentrated on one side of the chip 3'.
[0003] However, the whole piece of copper 2' below the chip 3' is very easy to be contaminated during the PCB board making and SMT (Surface Mounted Technology) patch process. After the contaminated PCBA (Printed Circuit Board Assembly) undergoes the DB (Die Bonding) process, a push-pull force test is performed. After pushing away, there is less conductive glue residue on the copper surface, and the bonding force between the contaminated copper surface and the conductive glue is poor. In addition, during the DB process, in order to make the device bonded firmly, the conductive glue needs to overflow from two to three edges of the chip 3' to ensure its bonding effect. For optical module devices, the multiple wire bonding positions 23' and multiple signal pads 12' that are concentrated on one side of the chip high-speed signal are arranged more densely, and in order to ensure high-speed transmission of signals, the bonding wires 4' connecting the chip 3' and the wire bonding positions 23' and the signal pads 12' cannot be too long. If the conductive glue overflows from the edge of the high-speed signal transmission side of the chip 3', it will easily flow onto the wire bonding position 23' and the signal pad 12', which will not only affect the selection of the corresponding bonding wire in the subsequent WB (Wire Bonding) process, but also directly affect the transmission quality of the high-speed signal of the optical module. Utility Model Content
[0004] The embodiments of the utility model provide a circuit board and a circuit board assembly structure to solve the problem of poor bonding firmness of circuit board package chips in the prior art.
[0005] In order to solve the above technical problems, the embodiments of the present utility model disclose the following technical solutions:
[0006] According to a first aspect of the utility model, a circuit board is provided, comprising a substrate, a first surface of the substrate being provided with a chip mounting area for mounting a chip; the chip mounting area being provided with a plurality of ground holes, the ground holes being electrically connected to a reference ground layer of the substrate; a first metal layer being provided on the chip mounting area, the first metal layer comprising a first hollow portion, a portion of the plurality of ground holes being located in the first hollow portion, and another portion of the ground holes being covered by the first metal layer and electrically connected to the first metal layer; a projection of the chip mounting area in the thickness direction of the circuit board covering the first hollow portion and a portion of the first metal layer.
[0007] Furthermore, the first metal layer is also provided with a wire bonding position, which is located outside the chip mounting area and adjacent to the chip mounting area; the first metal layer is provided with a second hollow portion between the wire bonding position and the chip mounting area, and the second hollow portion is used to accommodate glue overflowed when mounting the chip.
[0008] Furthermore, a plurality of the second hollow portions are arranged along an edge of the chip mounting area, a portion of each of the second hollow portions is located in the chip mounting area, and another portion is adjacent to the wire bonding position.
[0009] Furthermore, the surface of the ground hole is covered with a second metal layer that is no smaller than the area of the ground hole.
[0010] Furthermore, the second hollow portion is a rectangle, and the length and width of the rectangle are both greater than 0.1 mm.
[0011] According to a second aspect of the utility model, a circuit board component structure is provided, comprising a chip, a circuit board as described in the first aspect above, and a conductive adhesive, wherein the chip is mounted on the first metal layer of the circuit board at a position corresponding to the chip mounting area through the conductive adhesive; the projection of the chip in the thickness direction of the circuit board is located within the chip mounting area, and partially overlaps with the first hollow portion and partially overlaps with the first metal layer, and the conductive adhesive is distributed on the first hollow portion and the portion where the first metal layer overlaps with the chip mounting area.
[0012] Furthermore, the first metal layer is also provided with a plurality of second hollow portions for accommodating glue overflowing when mounting the chip; the plurality of second hollow portions are arranged along the edge of the chip mounting area, and a portion of each second hollow portion is covered by the chip.
[0013] Furthermore, a ground electrode is provided on the chip, a wire bonding position is provided on the first metal layer, and the wire bonding position is located on a side of the second hollow portion away from the chip; the ground electrode and the wire bonding position are electrically connected via a bonding wire crossing the second hollow portion.
[0014] Furthermore, the chip is provided with a signal electrode, the substrate is provided with a signal pad located outside the first metal layer and insulated from the first metal layer, and the signal electrode and the signal pad are electrically connected to each other through the bonding wire.
[0015] Furthermore, the second hollow portion is a rectangle, and the length and width of the rectangle are both greater than 0.1 mm.
[0016] One of the above technical solutions has the following advantages or beneficial effects:
[0017] By providing a first hollow portion on the first metal layer to expose the ground hole of the PCB substrate below, the roughness of the chip bonding area is effectively increased, the adhesion rate of the conductive glue during dispensing is improved, and the firmness of the chip after bonding is enhanced. BRIEF DESCRIPTION OF THE DRAWINGS
[0018] The technical solutions and other beneficial effects of the present invention will be made apparent by describing in detail the specific embodiments of the present invention in conjunction with the accompanying drawings.
[0019] Figure 1 It is a schematic diagram of a COB packaging structure on a circuit board in the prior art;
[0020] Figure 2 is a schematic diagram of a circuit board provided according to an embodiment of the utility model;
[0021] Figure 3 is a schematic diagram of a circuit board assembly structure provided according to an embodiment of the utility model;
[0022] Figure 4 is a schematic diagram of another circuit board assembly structure provided according to an embodiment of the utility model;
[0023] The meanings of the reference numerals are as follows: 1-substrate; 10-chip mounting area; 11-ground hole; 12-signal pad; 2-first metal layer; 21-first hollow portion; 22-second hollow portion; 23-wire bonding position; 3-chip; 31-ground electrode; 32-signal electrode; 4-bonding wire. DETAILED DESCRIPTION
[0024] In order to make the purpose, technical solution and beneficial effects of the utility model clearer, the utility model is further described in detail below in conjunction with the accompanying drawings and specific implementation methods. It should be understood that the specific implementation methods described in this specification are only for explaining the utility model, and are not intended to limit the utility model.
[0025] In the description of the present utility model, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise" and the like indicate positions or positional relationships based on the positions or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present utility model and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present utility model. In addition, the terms "first" and "second" are only used for descriptive purposes, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the said features. In the description of the present utility model, the meaning of "multiple" refers to two or more, unless otherwise clearly and specifically defined.
[0026] In the description of the present utility model, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection, a direct connection, or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements. For ordinary technicians in this field, the specific meanings of the above terms in the present utility model can be understood according to specific circumstances.
[0027] In the present utility model, unless otherwise clearly stipulated and limited, a first feature being "above" or "below" a second feature may include that the first and second features are in direct contact, or may include that the first and second features are not in direct contact but are in contact through another feature between them. Moreover, a first feature being "above", "above" and "above" a second feature includes that the first feature is directly above and obliquely above the second feature, or simply indicates that the first feature is higher in level than the second feature. A first feature being "below", "below" and "below" a second feature includes that the first feature is directly above and obliquely above the second feature, or simply indicates that the first feature is lower in level than the second feature.
[0028] Aiming at the problem of poor chip bonding firmness in the chip mounting process in the prior art, the utility model provides a circuit board. Figure 2 A schematic structural diagram of the circuit board is shown.
[0029] like Figure 2 As shown, the circuit board includes a substrate 1, and a chip mounting area 10 is provided on the first surface of the substrate 1 for mounting a chip. A plurality of ground holes 11 are provided in the chip mounting area 10, and the ground holes 11 are electrically connected to the reference ground layer of the substrate 1. A first metal layer 2 is provided on the chip mounting area 10, and the first metal layer 2 includes a first hollow portion 21. A portion of the plurality of ground holes 11 is located in the first hollow portion 21, and another portion of the ground holes 11 is covered by the first metal layer 2 and electrically connected to the first metal layer 2. The projection of the chip mounting area 10 in the thickness direction of the circuit board covers the first hollow portion 21 and a portion of the first metal layer 2.
[0030] In some embodiments, the chip mounting area 10 is disposed within the outer frame of the first metal layer 2 , and has an area smaller than that of the first metal layer 2 .
[0031] In some embodiments, the ground hole 11 may be a through hole, and a conductive medium is filled in the through hole to make the ground hole a conductive via. The surface of the ground hole 11 may also be covered with a second metal layer not less than the cross-sectional area of the ground hole 11 to serve as a pad for the ground hole 11. Both the first metal layer and the second metal layer may be copper metal layers, for example, both may be formed by etching the copper layer of a printed circuit board. For the ground hole 11 disposed in the first hollow portion 21, the second metal layer thereon can increase the roughness of the surface of the first hollow portion 21, improve the adhesion of the conductive adhesive in contact therewith, and thereby enhance the bonding strength between the chip and the circuit board.
[0032] In some embodiments, the first hollow portion 21 can be rectangular, and the size and shape of the first hollow portion 21 can be designed according to the size and shape of the chip to be mounted. The first hollow portion 21 can be configured as a complete area, or configured as multiple discrete areas that are not connected to each other.
[0033] In some embodiments, Figure 2 As shown, the first metal layer 2 is also provided with a bonding position 23, which is located outside the chip mounting area 10 and adjacent to the chip mounting area 10. The bonding position 23 is used to indicate the position on the first metal layer 2 that is connected to the ground electrode of the chip through a bonding wire when the chip is mounted, so as to perform ground bonding and realize ground return of the chip.
[0034] The first metal layer 2 is provided with a second hollow portion 22 between the wire bonding position 23 and the chip mounting area 10. The second hollow portion 22 is used to receive the glue overflowing when mounting the chip. When mounting the chip, the glue squeezed by the chip overflows from the edge of the chip, which is easy to contaminate the wire bonding position 23 located outside the chip mounting area 10 and adjacent to the chip mounting area 10. The second hollow portion 22 is provided to receive the glue overflowing when mounting the chip, so as to prevent the wire bonding position 23 from being contaminated and affecting the chip signal return.
[0035] In some embodiments, Figure 2 As shown, a plurality of second hollow portions 22 are arranged along the edge of the chip mounting area 10, a portion of each second hollow portion 22 is located in the chip mounting area 10, and another portion is adjacent to the wire bonding position 23. The plurality of second hollow portions are arranged close to the edge of the chip mounting area 10, so that the length of the bonding wire between the wire bonding position 23 and the ground pad connected thereto on the chip can be as short as possible. Shortening the length of the bonding wire can improve the high-frequency performance of the chip and ensure the transmission quality of high-speed signals.
[0036] In the prior art, only a whole piece of ground copper covering all the ground holes is provided, and the chip is also directly bonded to the whole piece of ground copper through conductive glue. Since the copper surface is smooth and has low roughness, the adhesion of the conductive glue is also low, and the residual amount is small, so that the chip has low firmness after bonding, and the push-pull force test does not meet the standard. The circuit board provided in the utility model, by providing a first hollow portion 21 on the first metal layer 2 to expose multiple ground holes 11 and the base material surface of the substrate 1, effectively increases the roughness of the surface area where the first hollow portion 21 is located, so that the conductive glue is easier to adhere when the chip 3 is subsequently bonded, thereby improving the push-pull firmness of the chip after die bonding (DB).
[0037] The utility model also provides a circuit board assembly structure, such as Figure 3 As shown, it includes a chip 3 and the above-mentioned circuit board, and the chip 3 is mounted on the first metal layer 2 of the circuit board at a position corresponding to the chip mounting area 10 through conductive adhesive.
[0038] The projection of the chip 3 in the thickness direction of the circuit board is located in the chip mounting area 10 (not shown in the figure), and partially overlaps with the first hollow portion 21 and partially overlaps with the first metal layer 2. The conductive glue is distributed on the first hollow portion 21 and the portion where the first metal layer 2 overlaps with the chip mounting area 10. The first hollow portion 21 is provided on the first metal layer 2 to expose the plurality of ground holes 11 and the substrate surface of the substrate 1, which effectively increases the roughness of the chip mounting area, improves the adhesive force of the glue, and further enhances the bonding strength between the chip and the circuit board.
[0039] Figure 3The embodiment shown is that the number of chips 3 is two, and they are mounted side by side in the chip mounting area. The first metal layer 2 provides the chip mounting area 10 for the two chips, and the first hollow parts 21 in the chip mounting area 10 corresponding to the two chips are connected to form a large hollow part to simplify the manufacturing process. In some embodiments, the number of chips 3 can be set as needed without limitation.
[0040] like Figure 3 to Figure 4 As shown, the first metal layer 2 is further provided with a plurality of second hollow portions 22 for receiving glue overflowing when mounting the chip 3. The plurality of second hollow portions 22 are arranged along the edge of the chip mounting area 10, and a portion of each second hollow portion 22 is covered by the chip 3. It should be noted that, except for the edges where the two chips 3 are close to each other, the second hollow portions 22 can be respectively arranged near all other edges of the chip 3. Figure 4 2 shows a schematic diagram in which the second hollow portion 22 is arranged near three edges of one of the chips 3 , and the bonding wires, the second hollow portion and the wire bonding position corresponding to the other chip are not shown in the figure.
[0041] According to the embodiment, a ground electrode 31 is provided on the chip 3, and a wire bonding position 23 is provided on the first metal layer 2, and the wire bonding position 23 is located on the side of the second hollow portion 22 away from the chip 3. The ground electrode 31 and the wire bonding position 23 are electrically connected through a bonding wire 4 that crosses the second hollow portion 22. It should be noted that the wire bonding position 23 on the first metal layer 2 in the figure is only a schematic diagram of the position during bonding. In fact, the wire bonding position 23 and the first metal layer 2 are integrated and do not exist separately. When the wire bonding process is performed, the bonding wire 4 automatically forms the wire bonding position 23 at the position shown in the figure.
[0042] According to the embodiment, a signal electrode 32 is provided on the chip 3, and a signal pad 12 is provided on the substrate 1 and is located outside the first metal layer 2 and is insulated and isolated from the first metal layer 2. The signal electrode 32 and the signal pad 12 are electrically connected to each other through a bonding wire 4 for high-speed signal transmission of the chip 3.
[0043] The bonding wire 4 is usually made of gold wire. In some embodiments, other conductive wires are also used.
[0044] When the chip 3 is bonded to the substrate 1 and the first metal layer 2, the conductive adhesive may overflow from the mounting area of the chip 3 due to extrusion and deformation, and the conductive adhesive may overflow from the four edges of the chip 3. Therefore, a second hollow portion 22 can be set near the four edges of the chip 3, especially where the wire bonding lines are located between the chip mounting areas, a second hollow portion can be set. Figure 3 FIG. 4 shows a case where the second hollow portion 22 is disposed at the lower edge of the chip 3. Figure 42 shows a case where the second hollow portion is arranged near the four edges of the chip 3. For example, when the conductive glue overflows from the edge to the mounting area of the chip 3, the second hollow portion 22 can receive the overflowed conductive glue to prevent the conductive glue from contaminating the wire bonding position. The shape and size of the second hollow portion 22 are set according to design requirements. For example, the second hollow portion 22 can be a rectangle, and the length and width of the rectangle are both greater than 0.1 mm.
[0045] In the embodiment of the utility model, multiple second hollow portions 22 are provided on the first metal layer 2, so that the multiple second hollow portions 22 can collect overflowed conductive glue on the path where the conductive glue flows to the bonding position, thereby protecting the bonding position close to the chip from being contaminated by the conductive glue.
[0046] The introduction provided in the above steps is only used to help understand the method, structure and core idea of the utility model. For ordinary technicians in this technical field, the utility model can also be improved and modified without departing from the principle of the utility model, and these improvements and modifications also fall within the scope of protection of the claims of the utility model.
Claims
1. A circuit board, characterized in that: It comprises a substrate, wherein a chip mounting area is provided on a first surface of the substrate for mounting a chip; A plurality of ground holes are provided in the chip mounting area, and the ground holes are electrically connected to the reference ground layer of the substrate; A first metal layer is provided on the chip mounting area, the first metal layer includes a first hollow portion, a portion of the plurality of ground holes is located in the first hollow portion, and another portion of the ground holes is covered by the first metal layer and electrically connected to the first metal layer; The projection of the chip mounting area in the thickness direction of the circuit board covers the first hollow portion and a portion of the first metal layer.
2. The circuit board according to claim 1, characterized in that The first metal layer is also provided with a wire bonding position, and the wire bonding position is located outside the chip mounting area and adjacent to the chip mounting area; The first metal layer is provided with a second hollow portion between the wire bonding position and the chip mounting area, and the second hollow portion is used for accommodating glue overflowed when mounting the chip.
3. The circuit board according to claim 2, characterized in that: A plurality of the second hollow portions are arranged along the edge of the chip mounting area, a portion of each of the second hollow portions is located in the chip mounting area, and another portion is adjacent to the wire bonding position.
4. The circuit board according to any one of claims 1 to 3, characterized in that: The surface of the ground hole is covered with a second metal layer that is no smaller than the cross-sectional area of the ground hole.
5. The circuit board according to claim 2, characterized in that: The second hollow portion is a rectangle, and the length and width of the rectangle are both greater than 0.1 mm.
6. A circuit board assembly structure, comprising a chip, a circuit board as claimed in claim 1 and a conductive adhesive, characterized in that: The chip is mounted on the first metal layer of the circuit board at a position corresponding to the chip mounting area by means of the conductive adhesive; The projection of the chip in the thickness direction of the circuit board is located in the chip mounting area, and partially overlaps with the first hollow portion and partially overlaps with the first metal layer. The conductive adhesive is distributed on the first hollow portion and the portion where the first metal layer overlaps with the chip mounting area.
7. The circuit board assembly structure according to claim 6, characterized in that: The first metal layer is also provided with a plurality of second hollow portions for receiving glue overflowed when mounting the chip; A plurality of the second hollow portions are arranged along an edge of the chip mounting area, and a portion of each of the second hollow portions is covered by the chip.
8. The circuit board assembly structure according to claim 7, characterized in that: A ground electrode is provided on the chip, a wire bonding position is provided on the first metal layer, and the wire bonding position is located on a side of the second hollow portion away from the chip; The ground electrode and the wire bonding position are electrically connected via a bonding wire crossing the second hollow portion.
9. The circuit board assembly structure according to claim 6, characterized in that: The chip is provided with a signal electrode, the substrate is provided with a signal pad located outside the first metal layer and insulated from the first metal layer, and the signal electrode and the signal pad are electrically connected to each other through a bonding wire.
10. The circuit board assembly structure according to claim 7, characterized in that: The second hollow portion is a rectangle, and the length and width of the rectangle are both greater than 0.1 mm.
