MEMS chip and electronic equipment
By setting an insulating layer and variable diameter hole section in the back plate of the MEMS chip, combined with the anti-adhesive structure, the chip failure problem caused by the exposed conductive layer is solved, and the reliability and production efficiency of the chip are improved.
Patent Information
- Application Number
- CN202421065471.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-05-16
- Publication Date
- 2025-01-03
- Estimated Expiration
- 2034-05-16
AI Technical Summary
The existing MEMS capacitor pressure chips are susceptible to corrosion, electromagnetic interference and mechanical stress due to the exposed conductive layer, which causes the chip to not work normally, especially in application scenarios such as electronic cigarettes, circuit short circuit, leakage or electrical performance degradation.
By providing a second insulating layer in the back electrode plate to cover the side walls of the conductive layer and the through holes, air holes are formed, and a variable diameter hole section is provided in the air holes to reduce the accumulation of e-liquid and dust, while at the same time, on the back electrode plate and the diaphragm Set up an anti-adhesive structure between them to reduce adsorption and stress concentration.
It effectively reduces the risk of MEMS chip failure caused by naked conductive layer, reduces the impact of e-liquid and dust, improves the strength of the back plate and the pass rate of the MEMS chip, and reduces production costs.
Smart Images
Figure CN222293613U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the technical field of micro-electromechanical sensors, in particular to a MEMS chip and electronic equipment. Background Art
[0002] MEMS chip is a semiconductor chip that integrates micromechanical devices and electronic components. It uses micro-nano processing technology to manufacture micron-level mechanical structures, giving the chip the ability to sense, manipulate and control tiny objects.
[0003] Existing MEMS capacitor pressure chips are usually composed of a substrate, a diaphragm and a back plate. The back plate is provided with a conductive layer, which is usually exposed inside the MEMS capacitor pressure chip. The exposed part of the conductive layer is easily affected by corrosion, electromagnetic interference or mechanical stress, etc., which may cause the chip to fail to work properly. For example: a pressure relief structure is usually provided inside the MEMS chip to maintain the air pressure balance inside the MEMS chip. In actual applications, some impurities in the application scenario may enter the MEMS chip through the pressure relief structure. These impurities may be deposited on the conductive layer. When the chip is in working state, unpredictable current paths may appear, resulting in leakage or circuit phenomena, which damage the normal operation of the chip. And the impurities deposited on the conductive layer may also corrode the conductive layer, resulting in a decrease in the electrical performance of the chip, affecting the normal operation or service life of the chip. Specifically, when the MEMS chip is used in an electronic cigarette, it is often used to detect the user's smoking action and trigger the atomizer of the electronic cigarette. The leaked e-cigarette oil can easily enter the interior of the MEMS chip through the pressure relief structure on the diaphragm and adhere to the conductive layer, causing the MEMS chip to short-circuit, leak, or degraded electrical performance. Utility Model Content
[0004] The embodiments of the utility model provide a MEMS chip and an electronic device, which are used to improve the problem of MEMS chip failure caused by the exposure of the conductive layer.
[0005] In order to solve the above technical problems, the embodiments of the present utility model disclose the following technical solutions:
[0006] In a first aspect, a MEMS chip is provided, comprising:
[0007] A substrate, a diaphragm and a back plate arranged in layers;
[0008] The back plate comprises a first insulating layer and a conductive layer fixedly connected to the first insulating layer, the first insulating layer comprises a plurality of first through holes penetrating in the thickness direction thereof, the conductive layer comprises a plurality of second through holes penetrating in the thickness direction thereof, in the region where the conductive layer is located, the plurality of first through holes (5012) and the plurality of second through holes (5021) correspond to each other one by one and are connected, and the aperture of the first through hole (5012) is smaller than the aperture of the second through hole (5021);
[0009] The back plate further includes a second insulating layer, which covers the surface of the conductive layer and the side walls of the plurality of second through holes, so as to form air holes of the back plate together with the first through holes and the second through holes.
[0010] In addition to or as an alternative to one or more features disclosed above, in a thickness direction of the substrate, a projected area of the conductive layer is smaller than a projected area of the first insulating layer.
[0011] In addition to or as an alternative to one or more features disclosed above, the second insulating layer covers sidewalls of the plurality of first through holes.
[0012] In addition to or as an alternative to one or more features disclosed above, in the thickness direction of the substrate, a side of the second insulating layer close to the diaphragm is flush with a side of the first insulating layer close to the diaphragm.
[0013] In addition to or as an alternative to one or more of the features disclosed above, the back plate further comprises a first anti-adhesion structure, and in the thickness direction of the substrate, the first anti-adhesion structure is convexly disposed on a side surface of the first insulating layer facing the diaphragm;
[0014] Wherein, the first anti-sticking structure and the second insulating layer are integrally formed.
[0015] In addition to or as an alternative to one or more features disclosed above, edges of the second insulating layer terminate at sidewalls of the plurality of first through holes.
[0016] In addition to or as an alternative to one or more of the features disclosed above, the pores include a diameter-varying hole segment, and a hole diameter of the diameter-varying hole segment decreases in a direction from the conductive layer to the first insulating layer.
[0017] In addition to or as an alternative to one or more of the features disclosed above, the back plate further comprises a second anti-adhesion structure, and in the thickness direction of the substrate, the second anti-adhesion structure is convexly arranged on a side of the first insulating layer facing the diaphragm;
[0018] Wherein, the second anti-sticking structure and the first insulating layer are integrally formed.
[0019] In addition to or as an alternative to one or more features disclosed above, a boundary line of the conductive layer is arranged along edges of the plurality of first through holes.
[0020] In addition to or as an alternative to one or more of the features disclosed above, a first sacrificial layer is disposed between the diaphragm and the substrate, the first sacrificial layer includes a first cavity extending through the thickness thereof, and a second sacrificial layer is disposed between the diaphragm and the back plate, the second sacrificial layer includes a second cavity extending through the thickness thereof;
[0021] In the thickness direction of the substrate, the projection of the second cavity covers the projection of the first cavity.
[0022] In addition to or as an alternative to one or more of the features disclosed above, an inner diameter of the second cavity gradually widens in a direction from the back plate to the diaphragm.
[0023] In a second aspect, the present application further provides a MEMS chip, comprising:
[0024] A substrate, a diaphragm and a back plate arranged in layers;
[0025] The back plate includes a first insulating layer and a conductive layer fixedly connected to the first insulating layer, the first insulating layer includes a plurality of first through holes penetrating in the thickness direction thereof, the conductive layer includes a plurality of second through holes penetrating in the thickness direction thereof, and in the region where the conductive layer is located, the plurality of first through holes and the plurality of second through holes correspond to each other one by one and are connected to each other;
[0026] The back plate further includes a second insulating layer and a first anti-sticking structure, wherein the second insulating layer covers the surface of the conductive layer, the side walls of the plurality of first through holes, and the side walls of the plurality of second through holes, so as to be configured together with the first through holes and the second through holes as pores of the back plate, and in the thickness direction of the substrate, the first anti-sticking structure is convexly disposed on a side of the first insulating layer facing the diaphragm;
[0027] Wherein, the first anti-sticking structure and the second insulating layer are integrally formed.
[0028] In addition to or as an alternative to one or more of the features disclosed above, the back plate further comprises a second anti-adhesion structure, and in the thickness direction of the substrate, the second anti-adhesion structure is convexly arranged on a side of the first insulating layer facing the diaphragm;
[0029] Wherein, the second anti-sticking structure and the first insulating layer are integrally formed.
[0030] In addition to or as an alternative to one or more of the features disclosed above, in the thickness direction of the substrate, a projected area of the conductive layer is smaller than a projected area of the first insulating layer (501).
[0031] In addition to or as an alternative to one or more features disclosed above, a boundary line of the conductive layer is arranged along edges of the plurality of first through holes.
[0032] In addition to or as an alternative to one or more of the features disclosed above, a first sacrificial layer is disposed between the diaphragm and the substrate, the first sacrificial layer includes a first cavity extending through the thickness thereof, and a second sacrificial layer is disposed between the diaphragm and the back plate, the second sacrificial layer includes a second cavity extending through the thickness thereof;
[0033] In the thickness direction of the substrate, the projection of the second cavity covers the projection of the first cavity.
[0034] In addition to or as an alternative to one or more of the features disclosed above, an inner diameter of the second cavity gradually widens in a direction from the back plate to the diaphragm.
[0035] In a third aspect, an electronic device is provided, comprising:
[0036] Any MEMS chip disclosed above.
[0037] One of the above technical solutions has the following advantages or beneficial effects: the MEMS chip of the present application effectively reduces the risk of MEMS chip failure caused by the exposure of the conductive layer by covering the surface of the conductive layer and the side walls of the multiple second through holes with the second insulating layer. At the same time, the present application also arranges a variable diameter hole section in the pore. Specifically, in the direction from the conductive layer to the first insulating layer, the aperture of the variable diameter hole section becomes smaller, which can reduce the accumulation of smoke oil and dust in the pore, and reduce the influence of smoke oil, dust, etc. on the MEMS chip. In addition, the first anti-sticking structure is formed by the second insulating layer, which can not only improve the attraction phenomenon of the back plate and the diaphragm of the MEMS chip, but also reduce the production cost of MEMS. And, arranging the boundary line of the conductive layer along the edge of the multiple first through holes can reduce the stress concentration phenomenon of the back plate, improve the strength of the back plate, and improve the qualified rate of the MEMS chip. BRIEF DESCRIPTION OF THE DRAWINGS
[0038] The technical solutions and other beneficial effects of the present invention will be made apparent by describing in detail the specific embodiments of the present invention in conjunction with the accompanying drawings.
[0039] Figure 1 This is a schematic diagram of the structure of a MEMS chip provided according to an embodiment of the present application. Figure 1 ;
[0040] Figure 2 is a schematic diagram of the distribution of first through holes and second through holes provided according to an embodiment of the present application;
[0041] Figure 3 This is a schematic diagram of the structure of a MEMS chip provided according to an embodiment of the present application. Figure 2 ;
[0042] Figure 4 This is a schematic diagram of the structure of a MEMS chip provided according to an embodiment of the present application. Figure 3 ;
[0043] Figure 5 This is a schematic diagram of the structure of a MEMS chip provided according to an embodiment of the present application. Figure 4 ;
[0044] Figure 6a This is a schematic diagram of a pore structure provided in an embodiment of the present application. Figure 1 ;
[0045] Figure 6b This is a schematic diagram of a pore structure provided in an embodiment of the present application. Figure 2 ;
[0046] Figure 7 It is a top view of a stacked conductive layer and a first insulating layer (excluding the second insulating layer) provided according to an embodiment of the present application.
[0047] Description of reference numerals:
[0048] 100, substrate; 200, diaphragm; 300, first sacrificial layer; 301, first cavity; 400, second sacrificial layer; 401, second cavity;
[0049] 500, back plate; 501, first insulating layer; 5011, second anti-sticking structure; 5012, first through hole; 502, conductive layer; 5021, second through hole; 503, second insulating layer; 5031, first anti-sticking structure; 504, pores. DETAILED DESCRIPTION
[0050] In order to make the purpose, technical solution and beneficial effects of the utility model clearer, the utility model is further described in detail below in conjunction with the accompanying drawings and specific implementation methods. It should be understood that the specific implementation methods described in this specification are only for explaining the utility model, and are not intended to limit the utility model.
[0051] In the description of the present utility model, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise" and the like indicate positions or positional relationships based on the positions or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present utility model and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present utility model. In addition, the terms "first" and "second" are only used for descriptive purposes, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the said features. In the description of the present utility model, the meaning of "multiple" refers to two or more, unless otherwise clearly and specifically defined.
[0052] In the description of the present utility model, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection, a direct connection, or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements. For ordinary technicians in this field, the specific meanings of the above terms in the present utility model can be understood according to specific circumstances.
[0053] In the present utility model, unless otherwise clearly stipulated and limited, a first feature being "above" or "below" a second feature may include that the first and second features are in direct contact, or may include that the first and second features are not in direct contact but are in contact through another feature between them. Moreover, a first feature being "above", "above" and "above" a second feature includes that the first feature is directly above and obliquely above the second feature, or simply indicates that the first feature is higher in level than the second feature. A first feature being "below", "below" and "below" a second feature includes that the first feature is directly above and obliquely above the second feature, or simply indicates that the first feature is lower in level than the second feature.
[0054] The embodiment of the utility model discloses a MEMS chip, which comprises: a substrate 100, a diaphragm 200 and a back plate 500 which are stacked.
[0055] The substrate 100 is used to support the diaphragm 200 and the back plate 500. The substrate 100 may be made of at least one of the following materials: silicon, germanium, silicon germanium, silicon carbide, silicon on insulator, silicon germanium on insulator, etc. The diaphragm 200 may be made of polycrystalline silicon.
[0056] Specifically, refer to Figure 1 and Figure 2 The back plate 500 includes a conductive layer 502 and a first insulating layer 501 stacked together, and the conductive layer 502 is fixedly connected to the first insulating layer 501. The first insulating layer 501 has a plurality of first through holes 5012 extending through it in the thickness direction, and the conductive layer 502 has a plurality of second through holes 5021 extending through it in the thickness direction. Moreover, in the region where the conductive layer 502 is located, the first through holes 5012 and the second through holes 5021 are interconnected. Further, referring to Figure 1 The back plate 500 also includes a second insulating layer 503, which covers the surface of the conductive layer 502 and the side walls of the plurality of second through holes 5021, and the second insulating layer 503, the first through holes 5012 and the second through holes 5021 together form the pores 504 of the back plate 500. The conductive layer 502 may be made of polysilicon, and the first insulating layer 501 and the second insulating layer 503 may be made of silicon nitride. In this way, the first insulating layer 501 and the second insulating layer 503 may improve the strength of the back plate 500, and during operation, the first insulating layer 501 may prevent the conductive layer 502 and the diaphragm 200 from short-circuiting, effectively reducing the risk of MEMS chip failure caused by the exposed conductive layer.
[0057] In different embodiments, in the area where the conductive layer 502 is located, the quantity relationship between the first through holes 5012 and the second through holes 5021 is different, as long as the first through holes 5012 and the second through holes 5021 are connected to each other, as an example, refer to Figure 2 In the area where the conductive layer 502 is located, the first through holes 5012 and the second through holes 5021 correspond one to one, and the number of the first through holes 5012 is equal to the number of the second through holes 5021. It should be noted that the cross-sectional shape of the first through holes 5012 can be circular or polygonal, and the cross-sectional shape of the second through holes 5021 can be circular or polygonal.
[0058] In different embodiments, the aperture of the first through hole 5012 may be equal to or different from the aperture of the second through hole 5021. Figure 3 , the aperture of the first through hole 5012 is equal to the aperture of the second through hole 5021. In the thickness direction of the substrate 100, the projection of the conductive layer 502 after the second through hole 5021 is formed is located within the projection range of the first insulating layer 501 after the first through hole 5012 is formed; Figure 4 The aperture of the first through hole 5012 is smaller than the aperture of the second through hole 5021 , and in the thickness direction of the substrate 100 , the projection of the conductive layer 502 after the second through hole 5021 is formed is located within the projection range of the first insulating layer 501 after the first through hole 5012 is formed.
[0059] Furthermore, in different embodiments, the edge structure of the second insulating layer 503 is different, as long as it can cover the surface of the conductive layer 502 and the sidewall of the second through hole 5021. As an example, refer to Figure 3 , Figure 4 and Figure 6a , the edge of the second insulating layer 503 covers the side walls of the plurality of first through holes 5012; refer to 5 and Figure 6b , the edge of the second insulating layer 503 ends at the side walls of the plurality of first through holes 5012 .
[0060] Furthermore, in different embodiments, the second insulating layer 503 and the first through hole 5012 and the second through hole 5021 together form different hole sections of the pores 504 of the back plate 500. For example, Figure 1 and Figure 3 , the pore 504 is a hole segment of equal diameter; refer to Figure 4 , Figure 5 , Figure 6a as well as Figure 6b The air hole 504 includes a variable diameter hole segment. Specifically, the diameter of the variable diameter hole segment decreases in the direction from the conductive layer 502 to the first insulating layer 501. This arrangement can reduce the accumulation of smoke oil and dust in the air hole 504, and reduce the impact of smoke oil, dust, etc. on the MEMS chip.
[0061] Furthermore, in different embodiments, the shapes of the variable diameter hole segments are different, as long as the diameter of the variable diameter hole segments decreases in the direction from the conductive layer 502 to the first insulating layer 501. For example, referring to Figure 4 and Figure 5 , the variable diameter hole section is a stepped hole, and the aperture of the hole section close to the diaphragm 200 is smaller than the aperture of the hole section away from the diaphragm 200; Figure 6a and Figure 6b The diameter-changing hole section is a tapered hole, and the diameter of the diameter-changing hole section gradually decreases in the direction from the conductive layer 502 to the first insulating layer 501 .
[0062] In order to further avoid direct contact between the conductive layer 502 and the diaphragm 200, the present application further provides an anti-adhesion structure on the side of the back plate 500 facing the diaphragm 200. Specifically, in the thickness direction of the substrate 100, the anti-adhesion structure is convexly provided on the side of the back plate 500 facing the diaphragm 200. As an example, the anti-adhesion structure includes any one or a combination of the first anti-adhesion structure 5031 and the second anti-adhesion structure 5011. Figure 4, the side where the first insulating layer 501 is located is the side of the back plate 500 facing the diaphragm 200, the first anti-adhesion structure 5031 is convexly arranged on the surface of the first insulating layer 501 facing the diaphragm 200, and is integrally formed with the second insulating layer 503, and the second anti-adhesion structure 5011 is convexly arranged on the surface of the first insulating layer 501 facing the diaphragm 200, and is integrally formed with the first insulating layer 501. In different embodiments, the second anti-adhesion structure 5011 can be provided separately, referring to Figure 1 In the thickness direction of the substrate 100, the side of the second insulating layer 503 close to the diaphragm 200 is flush with the side of the first insulating layer 501 close to the diaphragm 200, and the first insulating layer 501 is convexly provided to form a second anti-adhesion structure 5011; Figure 3 , a first anti-adhesion structure 5031 is separately provided; Figure 4 , and a first anti-adhesion structure 5031 and a second anti-adhesion structure 5011 are provided at the same time. It should be noted that the first anti-adhesion structure 5031 can be a cylindrical convex block or a polygonal prism convex block; the second anti-adhesion structure 5011 can be a cylindrical convex block or a polygonal prism convex block.
[0063] Furthermore, in order to reduce the stress concentration phenomenon of the back plate 500, improve the strength of the back plate 500, and improve the qualified rate of the MEMS chip. Figure 7 In the embodiment disclosed in the present application, in the thickness direction of the substrate 100 , the projected area of the conductive layer 502 is smaller than the projected area of the first insulating layer 501 , and the boundary line of the conductive layer 502 is arranged along the edge of the plurality of first through holes 5012 .
[0064] It is worth mentioning that in the embodiment disclosed in the present application, a first sacrificial layer 300 is further provided between the diaphragm 200 and the substrate 100, and the first sacrificial layer 300 is used to support the diaphragm 200 and the back plate 500. A second sacrificial layer 400 is provided between the diaphragm 200 and the back plate 500, and the second sacrificial layer 400 is used to support the back plate 500. In order to maintain the air pressure balance inside the MEMS chip, the first sacrificial layer 300 has a first cavity 301 extending through its thickness, and the second sacrificial layer 400 has a second cavity 401 extending through its thickness. When preparing the MEMS chip, the second sacrificial layer 400 can be corroded through the pores 504 to form the second cavity 401. Figure 5 In the embodiment of the present application, in the thickness direction of the substrate 100, the projection of the second cavity 401 covers the projection of the first cavity 301, and in the direction from the back plate 500 to the diaphragm 200, the inner diameter of the second cavity 401 gradually widens. The material of the first sacrificial layer 300 can be silicon oxide or silicon nitride, and the material of the second sacrificial layer 400 can be silicon oxide or silicon nitride.
[0065] At least one embodiment of the present application further provides an electronic device, which includes the MEMS chip of any embodiment of the present application. For example, the electronic device can be an electronic cigarette, an air conditioner, a microphone, a ventilator, and the like.
[0066] The technical features of the above embodiments may be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.
[0067] The above embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the patent application. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent application shall be subject to the attached claims.
Claims
1. A MEMS chip, characterized in that: include: A substrate (100), a diaphragm (200) and a back plate (500) are stacked; The back plate (500) comprises a first insulating layer (501) and a conductive layer (502) fixedly connected to the first insulating layer (501), the first insulating layer (501) comprises a plurality of first through holes (5012) penetrating in the thickness direction thereof, the conductive layer (502) comprises a plurality of second through holes (5021) penetrating in the thickness direction thereof, in the region where the conductive layer (502) is located, the plurality of first through holes (5012) and the plurality of second through holes (5021) correspond to each other one by one and are connected to each other, and the aperture of the first through hole (5012) is smaller than the aperture of the second through hole (5021); The back plate (500) further includes a second insulating layer (503), wherein the second insulating layer (503) covers the surface of the conductive layer (502) and the side walls of the plurality of second through holes (5021), so as to be constructed together with the first through holes (5012) and the second through holes (5021) to form the pores (504) of the back plate (500).
2. The MEMS chip according to claim 1, characterized in that: In the thickness direction of the substrate (100), the projected area of the conductive layer (502) is smaller than the projected area of the first insulating layer (501).
3. The MEMS chip according to claim 2, characterized in that: The second insulating layer (503) covers the side walls of the plurality of first through holes (5012).
4. The MEMS chip according to claim 3, characterized in that: In the thickness direction of the substrate (100), a side of the second insulating layer (503) close to the diaphragm (200) is flush with a side of the first insulating layer (501) close to the diaphragm (200).
5. The MEMS chip according to claim 3, characterized in that: The back plate (500) further comprises a first anti-adhesion structure (5031), and in the thickness direction of the substrate (100), the first anti-adhesion structure (5031) is protrudingly arranged on a surface of the first insulating layer (501) facing the diaphragm (200); Wherein, the first anti-sticking structure (5031) and the second insulating layer (503) are integrally formed.
6. The MEMS chip according to claim 4, characterized in that: The pores (504) include a variable diameter hole section, and the diameter of the variable diameter hole section decreases in a direction from the conductive layer (502) to the first insulating layer (501).
7. The MEMS chip according to claim 2, characterized in that: The edge of the second insulating layer (503) terminates at the side walls of the plurality of first through holes (5012).
8. The MEMS chip according to claim 7, characterized in that: The pores (504) include a variable diameter hole section, and the diameter of the variable diameter hole section decreases in a direction from the conductive layer (502) to the first insulating layer (501).
9. The MEMS chip according to any one of claims 1 to 8, characterized in that: The back plate (500) further comprises a second anti-adhesion structure (5011), and in the thickness direction of the substrate (100), the second anti-adhesion structure (5011) is convexly arranged on a side of the first insulating layer (501) facing the diaphragm (200); Wherein, the second anti-sticking structure (5011) and the first insulating layer (501) are integrally formed.
10. The MEMS chip according to any one of claims 1 to 8, characterized in that: The boundary line of the conductive layer (502) is arranged along the edges of the plurality of first through holes (5012).
11. The MEMS chip according to any one of claims 1 to 8, characterized in that: A first sacrificial layer (300) is arranged between the diaphragm (200) and the substrate (100), the first sacrificial layer (300) comprising a first cavity (301) penetrating through the thickness thereof; a second sacrificial layer (400) is arranged between the diaphragm (200) and the back plate (500), the second sacrificial layer (400) comprising a second cavity (401) penetrating through the thickness thereof; In the thickness direction of the substrate (100), the projection of the second cavity (401) covers the projection of the first cavity (301).
12. The MEMS chip according to claim 11, characterized in that: In the direction from the back plate (500) to the diaphragm (200), the inner diameter of the second cavity (401) gradually widens.
13. A MEMS chip, characterized in that: include: A substrate (100), a diaphragm (200) and a back plate (500) are stacked; The back plate (500) comprises a first insulating layer (501) and a conductive layer (502) fixedly connected to the first insulating layer (501), the first insulating layer (501) comprises a plurality of first through holes (5012) penetrating in the thickness direction thereof, the conductive layer (502) comprises a plurality of second through holes (5021) penetrating in the thickness direction thereof, in the region where the conductive layer (502) is located, the plurality of first through holes (5012) and the plurality of second through holes (5021) correspond to each other one by one and are connected to each other, and the apertures of the first through holes (5012) and the second through holes (5021) are equal; The back plate (500) further comprises a second insulating layer (503) and a first anti-adhesion structure (5031); the second insulating layer (503) covers the surface of the conductive layer (502), the side walls of the plurality of first through holes (5012), and the side walls of the plurality of second through holes (5021), so as to be configured together with the first through holes (5012) and the second through holes (5021) to form the pores (504) of the back plate (500); in the thickness direction of the substrate (100), the first anti-adhesion structure (5031) is convexly arranged on a side of the first insulating layer (501) facing the diaphragm (200); Wherein, the first anti-sticking structure (5031) and the second insulating layer (503) are integrally formed.
14. The MEMS chip according to claim 13, characterized in that: The back plate (500) further comprises a second anti-adhesion structure (5011), and in the thickness direction of the substrate (100), the second anti-adhesion structure (5011) is convexly arranged on a side of the first insulating layer (501) facing the diaphragm (200); Wherein, the second anti-sticking structure (5011) and the first insulating layer (501) are integrally formed.
15. The MEMS chip according to claim 13, characterized in that: In the thickness direction of the substrate (100), the projected area of the conductive layer (502) is smaller than the projected area of the first insulating layer (501).
16. The MEMS chip according to claim 15, characterized in that: The boundary line of the conductive layer (502) is arranged along the edges of the plurality of first through holes (5012).
17. The MEMS chip according to claim 13, characterized in that: A first sacrificial layer (300) is arranged between the diaphragm (200) and the substrate (100), the first sacrificial layer (300) comprising a first cavity (301) penetrating through the thickness thereof; a second sacrificial layer (400) is arranged between the diaphragm (200) and the back plate (500), the second sacrificial layer (400) comprising a second cavity (401) penetrating through the thickness thereof; In the thickness direction of the substrate (100), the projection of the second cavity (401) covers the projection of the first cavity (301).
18. The MEMS chip according to claim 17, characterized in that: In the direction from the back plate (500) to the diaphragm (200), the inner diameter of the second cavity (401) gradually widens.
19. An electronic device, characterized in that: Comprising a MEMS chip as described in any one of claims 1-18.