Circuit for identifying master and slave machines by double-power system and double batteries

Abstract

The utility model provides a master-slave machine identification circuit of a double-power system and double batteries, the circuit comprises two identification circuits, each identification circuit comprises a control unit, an input circuit and an output circuit, the input circuit comprises a first resistor, a fourth resistor and a first triode, and the output circuit comprises a second resistor, a fifth resistor, a sixth resistor and a second triode. The circuit can determine one of the two batteries as a host and the other battery as a slave through the level states of the receiving end of the control unit and the signal sending end of the control unit, and when the control unit sends a high level signal and the control unit recognizes a high level from the output circuit, the single battery is determined as the host, and the single battery is determined as the slave. When the control unit sends a low level signal or a suspension signal, the control unit recognizes a high level from the output circuit and confirms that a single battery is a slave, and the current battery connection pin is controlled by the other battery, so that mutual judgment of double batteries can be realized, and the circuit structure and the circuit implementation mode are simple.

Description

Technical Field

[0001] The present disclosure relates to the field of battery technology, and in particular to a dual-battery system identifying master-slave circuit and a dual battery. Background Art

[0002] As life increasingly moves towards green energy, electric vehicles are becoming more and more popular in daily travel due to their convenience, environmental protection and energy saving. As the power source of electric vehicles, the stability, reliability and endurance of batteries are particularly important. At present, most electric vehicles use a single battery design. If there is a problem with the battery, the entire vehicle system will not work, or the capacity of a single battery is too low and the endurance cannot meet the user's needs. Slowly, dual-battery technology began to appear on the market, which greatly improved the reliability of the system and the endurance of the battery.

[0003] At present, there are many dual-battery technical solutions. Some solutions can be controlled by the controller. The judgment of the master and slave and the on and off of the power supply are all judged and controlled by the controller; or the batteries themselves can judge each other and distinguish between the master and slave. Due to the high cost of the controller control solution and the complex wiring problem, it is not so popular; the battery itself is a dual-battery system, and the master and slave are judged by each other. It is necessary to reserve multiple judgment PIN ports at the interface of the battery. Such operation makes the solution more complicated and difficult to implement. Utility Model Content

[0004] The purpose of the present invention is to overcome the deficiencies in the prior art and provide a dual-battery system identification master-slave circuit and battery that can realize mutual judgment between dual batteries and has a relatively simple circuit structure.

[0005] The purpose of this disclosure is achieved through the following technical solutions:

[0006] A dual-electric system identification circuit for a master and a slave includes two identification circuits, each of which includes:

[0007] Control unit;

[0008] An input circuit comprises a first resistor, a fourth resistor and a first triode, wherein a first end of the first triode is connected to a reference power supply, a control end of the first triode is connected to a first end of the first resistor, a second end of the first resistor is connected to the reference power supply, a second end of the first triode is respectively connected to a receiving end of the control unit and a first end of the fourth resistor, and a second end of the fourth resistor is grounded;

[0009] The output circuit includes a second resistor, a fifth resistor, a sixth resistor and a second triode, wherein the signal sending end of the control unit is connected to the first end of the fifth resistor, the second end of the fifth resistor is connected to the control end of the second triode, the second end of the fifth resistor is also connected to the first end of the sixth resistor, the second end of the sixth resistor is grounded, the second end of the second triode is grounded, the first end of the second triode is connected to the first end of the second resistor, and the second end of the second resistor is respectively connected to the control end of the first triode and the second end of the second resistor of another identification circuit.

[0010] In one embodiment, the input circuit further includes a first diode, an anode of the first diode is connected to a first end of the first resistor, and a cathode of the first diode is connected to a second end of the second resistor.

[0011] In one embodiment, the input circuit further includes a third resistor, and the first end of the fourth resistor is connected to the receiving end of the control unit through the third resistor.

[0012] In one embodiment, the input circuit further includes a second diode, an anode of the second diode is connected to the second end of the first transistor, and a cathode of the second diode is connected to the first end of the fourth resistor.

[0013] In one embodiment, at least one of the third resistor and the fourth resistor is a variable resistor.

[0014] In one embodiment, the output circuit further includes a third diode, an anode of the third diode is connected to the second end of the fifth resistor, and a cathode of the third diode is connected to the first end of the sixth resistor.

[0015] In one embodiment, the first resistor is a variable resistor.

[0016] In one embodiment, at least one of the fifth resistor and the sixth resistor is a variable resistor.

[0017] In one embodiment, the second resistor is a variable resistor.

[0018] A dual battery comprises two battery cells and the dual battery system identification circuit for identifying a master and a slave as described in any one of the above embodiments, wherein each identification circuit of the dual battery system identification circuit for identifying a master and a slave is respectively arranged in one of the battery cells.

[0019] Compared with the prior art, the present invention has at least the following advantages:

[0020] The above-mentioned dual-battery system master-slave identification circuit is applied to dual batteries, and one of the two batteries can be determined as the master and the other as the slave through the level status of the receiving end of the control unit and the signal sending end of the control unit. When the control unit of one battery sends a high-level signal, and the control unit recognizes a high level from the output circuit, it is confirmed that the current battery is the master and the other battery is the slave. When the control unit sends a low-level signal or a floating signal, since the control unit of the other battery sends a high-level signal, the control unit of the current battery recognizes a high level from the output circuit, then it is confirmed that the single battery is the slave, and the signal received by the control unit is controlled by the signal sent by the other battery, thereby realizing mutual judgment between the dual batteries, and the circuit structure and circuit implementation method are simple. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] In order to more clearly illustrate the technical solutions of the embodiments of the present disclosure, the drawings required for use in the embodiments will be briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present disclosure and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without paying creative work.

[0022] Figure 1 A circuit diagram of a dual power system identifying a master and slave circuit in one embodiment.

[0023] Attached figures: 10, identification circuit; 100, input circuit; 200, output circuit; UA1, control unit; R1, first resistor; R2, second resistor; R3, third resistor; R4, fourth resistor; R5, fifth resistor; R6, sixth resistor; D1, first diode; D2, second diode; D3, third diode; Q1, first transistor; Q2, second transistor. DETAILED DESCRIPTION

[0024] In order to facilitate the understanding of the present disclosure, the present disclosure will be described more fully below with reference to the relevant drawings. The preferred embodiments of the present disclosure are given in the drawings. However, the present disclosure can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present disclosure more thoroughly and comprehensively understood.

[0025] It should be noted that when an element is referred to as being "fixed to" another element, it may be directly on the other element or there may be a central element. When an element is considered to be "connected to" another element, it may be directly connected to the other element or there may be a central element at the same time. The terms "vertical", "horizontal", "left", "right" and similar expressions used herein are for illustrative purposes only and do not represent the only implementation method.

[0026] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art of the present disclosure. The terms used herein in the specification of the present disclosure are only for the purpose of describing specific embodiments and are not intended to limit the present disclosure. The term "and / or" used herein includes any and all combinations of one or more related listed items.

[0027] In order to better understand the technical solutions and beneficial effects of the present invention, the present invention is further described in detail below in conjunction with specific embodiments:

[0028] See also Figure 1 , which is a dual-power system master-slave identification circuit according to an embodiment of the present invention, and includes two identification circuits 10 , each of which includes a control unit UA1 , an input circuit 100 and an output circuit 200 .

[0029] The input circuit 100 includes a first resistor R1, a fourth resistor R4 and a first transistor Q1, a first terminal of the first transistor Q1 is connected to a reference power supply, a control terminal of the first transistor Q1 is connected to a first terminal of the first resistor R1, a second terminal of the first resistor R1 is connected to the reference power supply, a second terminal of the first transistor Q1 is respectively connected to a receiving terminal 2 of a control unit UA1 and a first terminal of a fourth resistor R4, and a second terminal of the fourth resistor R4 is grounded;

[0030] The output circuit 200 includes a second resistor R2, a fifth resistor R5, a sixth resistor R6 and a second transistor Q2. The signal sending end 1 of the control unit UA1 is connected to the first end of the fifth resistor R5, the second end of the fifth resistor R5 is connected to the control end of the second transistor Q2, the second end of the fifth resistor R5 is also connected to the first end of the sixth resistor R6, the second end of the sixth resistor R6 is grounded, the second end of the second transistor Q2 is grounded, the first end of the second transistor Q2 is connected to the first end of the second resistor R2, and the second end of the second resistor R2 is respectively connected to the control end of the first transistor Q1 and the second end of the second resistor R2 of another identification circuit 10.

[0031] In this embodiment, the identification circuit 10 for identifying the master and slave circuits of the dual-battery system is applied to two batteries (the two batteries are divided into battery A and battery B), and the battery connection pins ID of the two circuits are connected together to confirm that one of the two batteries is the master and the other is the slave.

[0032] Specifically, when the signal ID_CTL sent by the control unit UA1 of battery A is at a high level, the current passes through the fifth resistor R5 and the sixth resistor R6 to the ground in sequence. At this time, the sixth resistor R6 generates a voltage drop to turn on the second transistor Q2. At the same time, the current of the reference power supply of battery A is divided by the first resistor R1 and the second resistor R2, and the voltage reaches the condition for the first transistor Q1 to be turned on, thereby turning on the first transistor Q1. The control unit UA1 recognizes from the output circuit 200 that ID_DETECT is at a high level, that is, the ID_CTL signal and the ID_DETECT signal of battery A are both at a high level, then it is confirmed that battery A is the host. At this time, the signal ID_CTL sent by the control unit of battery B is a low level signal or the interface is suspended, the second transistor Q2 of battery B is turned off, and the second end of the second resistor R2 of battery A provides a voltage to the second end of the second resistor R2 of battery B, so that current flows through the first resistor R1 of battery B, thereby turning on the first transistor Q1 of battery B, and then making the ID_DETECT signal of battery B a high level, then Confirm that battery B is a slave; when the signal ID_CTL sent by the control unit UA1 of battery A is a low-level signal or the interface is suspended, the voltage drop generated by the sixth resistor R6 cannot reach the conduction condition of the second transistor Q2, and then the second transistor Q2 is turned off. At this time, the control unit UA1 of battery B sends a high-level signal ID_CTL. After turning on the second transistor Q2 of battery B, the current of the reference power supply is connected from the battery connection pin ID of battery B to the battery connection pin ID of battery A, and then the first transistor Q1 of battery A is turned on. Subsequently, the control unit UA1 of battery A recognizes that ID_DETECT is high from its output circuit 200, that is, the ID_CTL signal of battery A is low and the ID_DETECT signal is high, then confirm that battery A is a slave. At this time, the control unit UA1 of battery B sends a high-level signal ID_CTL, and recognizes that ID_DETECT is high from its output circuit 200, that is, the ID_CTL signal and ID_DETECT signal of battery B are both high, and battery B is the host. Therefore, the circuit structure and circuit implementation are relatively simple.

[0033] Furthermore, the second end of the fourth resistor R4 is grounded, so that the receiving end 2 of the control unit UA1 can normally receive the signal state of ID_DETECT, thereby preventing misjudgment from occurring when the MCU_IO port is suspended.

[0034] In this embodiment, the first transistor Q1 is a PNP transistor, whose first end is an emitter, whose second end is a collector, and whose control end is a base; the second transistor Q2 is an NPN transistor, whose first end is a collector, whose second end is an emitter, and whose control end is a base. The following embodiments can be used for illustration.

[0035] In one embodiment, the input circuit 100 further includes a first diode D1, an anode of the first diode D1 is connected to a first end of the first resistor R1, and a cathode of the first diode D1 is connected to a second end of the second resistor R2. It can be understood that the first diode D1 is arranged between the control end of the first transistor Q1 and the first end of the second resistor R2, and the cathode of the first diode D1 is also connected to the second end of the second resistor R2 of another identification circuit 10, so as to prevent the power sources of the two batteries from interacting with each other to damage the circuit components.

[0036] In one embodiment, the input circuit 100 further includes a third resistor R3, and a first end of the fourth resistor R4 is connected to the receiving end 2 of the control unit UA1 through the third resistor R3 to further ensure the stability of voltage and current and reduce the situation where components are damaged due to excessive current.

[0037] In one embodiment, the input circuit 100 further includes a second diode D2, the anode of the second diode D2 is connected to the second end of the first transistor Q1, and the cathode of the second diode D2 is connected to the first end of the fourth resistor R4. It can be understood that the second diode D2 is provided to ensure that the current passes through the first transistor Q1 and then passes through the second diode D2 and the third resistor R3 in sequence to reach the receiving end 2 of the control unit UA1, thereby avoiding the situation where the circuit components are damaged due to the backflow of the current.

[0038] In one embodiment, at least one of the third resistor R3 and the fourth resistor R4 is a variable resistor. It can be understood that by adjusting the resistance value of one or both of the third resistor R3 and the fourth resistor R4, the resistance ratio of the third resistor R3 to the fourth resistor R4 is changed, and then the current in the circuit and the voltage of each component are adjusted, so as to ensure the stability of the circuit.

[0039] In one embodiment, the output circuit 200 further includes a third diode D3, the anode of the third diode D3 is connected to the second end of the fifth resistor R5, and the cathode of the third diode D3 is connected to the first end of the sixth resistor R6. It can be understood that the third diode D3 is provided to ensure that the current is connected to the ground after passing through the fifth resistor R5, the third diode D3 and the sixth resistor R6 from the signal sending end 1 of the control unit UA1 in sequence, thereby avoiding the situation where the circuit components are damaged due to the backflow of the current.

[0040] In one embodiment, the first resistor R1 is a variable resistor. It can be understood that by adjusting the resistance value of the first resistor R1, the conduction condition of the first transistor Q1 is adjusted to adapt to more types of first transistors Q1, that is, PNP transistors.

[0041] In one embodiment, at least one of the fifth resistor R5 and the sixth resistor R6 is a variable resistor. It can be understood that by adjusting the resistance value of one or both of the fifth resistor R5 and the sixth resistor R6, the resistance ratio of the fifth resistor R5 to the sixth resistor R6 is changed, and then the conduction condition of the second transistor Q2 is adjusted to adapt to more models of the second transistor Q2, that is, NPN transistors.

[0042] In one embodiment, the second resistor R2 is a variable resistor. It is understood that the second resistor R2 is connected in series to the first end of the second triode Q2 to further protect the second triode Q2, and the resistance value of the second resistor R2 is adjusted so that the voltage of the first end of the second triode Q2 is within the withstand voltage range.

[0043] The present disclosure also provides a dual battery, comprising two battery cells and a dual-electric system identification master-slave circuit of any of the above embodiments, wherein each identification circuit 10 of the dual-electric system identification master-slave circuit is respectively arranged in one battery cell. In the dual battery, when both battery cells use the same identification circuit 10 of the dual-electric system identification master-slave circuit, the level states of the ID_CTL signal and the ID_DETECT signal of each control unit UA1 can be used to confirm that one of the two battery cells is the master and the other is the slave.

[0044] Compared with the prior art, the present invention has at least the following advantages:

[0045] The above-mentioned dual-battery system master-slave identification circuit is applied to dual batteries, and one of the two batteries can be determined as the host and the other as the slave through the level status of the receiving end 2 of the control unit UA1 and the signal sending end 1 of the control unit UA1. When the control unit UA1 of one battery sends a high-level signal, and the control unit UA1 recognizes a high level from the output circuit 200, it is confirmed that the current battery is the host and the other battery is the slave. When the control unit UA1 sends a low-level signal or a floating signal, since the control unit UA1 of the other battery sends a high-level signal, the control unit UA1 of the current battery recognizes a high level from the output circuit 200, then it is confirmed that the single battery is the slave, and the signal ID_DETECT received by the control unit UA1 is controlled by the signal ID_CTL sent by the other battery, thereby realizing mutual judgment between the dual batteries, and the circuit structure and circuit implementation method are simple.

[0046] The above-mentioned embodiments only express several implementation methods of the present disclosure, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the disclosed patent. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present disclosure, and these all belong to the protection scope of the present disclosure. Therefore, the protection scope of the disclosed patent shall be subject to the attached claims.

Claims

1. A dual-electric system identifying master and slave circuit, characterized in that: The invention comprises two identification circuits, each of which comprises: Control unit; An input circuit comprises a first resistor, a fourth resistor and a first triode, wherein a first end of the first triode is connected to a reference power supply, a control end of the first triode is connected to a first end of the first resistor, a second end of the first resistor is connected to the reference power supply, a second end of the first triode is respectively connected to a receiving end of the control unit and a first end of the fourth resistor, and a second end of the fourth resistor is grounded; The output circuit includes a second resistor, a fifth resistor, a sixth resistor and a second triode, wherein the signal sending end of the control unit is connected to the first end of the fifth resistor, the second end of the fifth resistor is connected to the control end of the second triode, the second end of the fifth resistor is also connected to the first end of the sixth resistor, the second end of the sixth resistor is grounded, the second end of the second triode is grounded, the first end of the second triode is connected to the first end of the second resistor, and the second end of the second resistor is respectively connected to the control end of the first triode and the second end of the second resistor of another identification circuit.

2. The dual-electric system identification master-slave circuit according to claim 1, characterized in that: The input circuit further includes a first diode, an anode of the first diode is connected to a first end of the first resistor, and a cathode of the first diode is connected to a second end of the second resistor.

3. The dual-electric system identification master-slave circuit according to claim 1, characterized in that: The input circuit further includes a third resistor, and the first end of the fourth resistor is connected to the receiving end of the control unit through the third resistor.

4. The dual-electric system identification master-slave circuit according to claim 3, characterized in that: The input circuit further includes a second diode, an anode of the second diode is connected to the second end of the first transistor, and a cathode of the second diode is connected to the first end of the fourth resistor.

5. The dual-electric system identification master-slave circuit according to claim 3, characterized in that: At least one of the third resistor and the fourth resistor is a variable resistor.

6. The dual-electric system identification master-slave circuit according to claim 1, characterized in that: The output circuit further includes a third diode, an anode of the third diode is connected to the second end of the fifth resistor, and a cathode of the third diode is connected to the first end of the sixth resistor.

7. The dual-electric system identification master-slave circuit according to claim 1, characterized in that: The first resistor is a variable resistor.

8. The dual-electric system identification master-slave circuit according to claim 1, characterized in that: At least one of the fifth resistor and the sixth resistor is a variable resistor.

9. The dual-electric system identification master-slave circuit according to claim 1, characterized in that: The second resistor is a variable resistor.

10. A dual battery, characterized in that: It comprises two battery cells and the dual-electric system identification master-slave circuit as claimed in any one of claims 1 to 9, wherein each identification circuit of the dual-electric system identification master-slave circuit is respectively arranged in one of the battery cells.

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