Chip test circuit

Abstract

The utility model relates to a chip test circuit, comprising a chip to be tested and a PCB used for the chip to be tested, the PCB is connected with a power supply test module, a DAC test module, a clock signal test module, a control test module, a high frequency signal test module and an SPI test module, the input end of the power supply test module is connected with the power supply output end of a chip to be tested, the input end of the DAC test module is connected with the DAC output end of the chip to be tested, the input end of the clock signal test module is connected with the clock output end of the chip to be tested, the input end of the control test module is connected with the control output end of the chip to be tested, and the input end of the control test module is connected with the power supply output end of the chip to be tested. The output ends of the power supply test module, the DAC test module, the clock signal test module and the control test module are connected with the tester, the input end of the high-frequency signal test module is connected with the RF output end of a chip to be tested, and the chip to be tested is interactively connected with the tester through the SPI test module. According to the utility model, the working efficiency can be improved.

Description

Technical Field

[0001] The utility model relates to the technical field of chips, in particular to a chip testing circuit. Background Art

[0002] Integrated Circuit (IC) is small in size and powerful in function. It is one of the indispensable electronic components of information equipment. In order to ensure the normal function of the chip, the chip must undergo rigorous testing before leaving the factory. The general testing method is to input a known test signal into the circuit in the chip, and then obtain the feedback signal of the chip circuit to determine whether the chip function is normal.

[0003] After searching, the patent: Chip test circuit (CN201010267091.7) is a chip test circuit that uses a judgment circuit to switch the interface circuit between the input and output units of different compression groups, so that a single interface circuit can be used to obtain multiple sets of compressed test data, effectively improving the test output speed. The above test function is not enough and cannot meet the test requirements of this application.

[0004] In view of the above-mentioned defects, the designers have actively carried out research and innovation in order to create a new type of chip test circuit to make it more valuable for industrial use. Utility Model Content

[0005] In order to solve the above technical problems, the purpose of the utility model is to provide a chip testing circuit.

[0006] In order to achieve the above purpose, the utility model adopts the following technical solutions:

[0007] A chip testing circuit comprises a chip to be tested and also comprises a PCB board used for the chip to be tested, wherein a power supply test module, a DAC test module, a clock signal test module, a control test module, a high-frequency signal test module and an SPI test module are connected to the PCB board, an input end of the power supply test module is connected to a power supply output end of the chip to be tested, an input end of the DAC test module is connected to a DAC output end of the chip to be tested, an input end of the clock signal test module is connected to a clock output end of the chip to be tested, an input end of the control test module is connected to a control output end of the chip to be tested, output ends of the power supply test module, the DAC test module, the clock signal test module and the control test module are connected to a tester, an input end of the high-frequency signal test module is connected to an RF output end of the chip to be tested, and the chip to be tested is interactively connected to the tester via the SPI test module.

[0008] Preferably, in the chip testing circuit, the DAC testing module uses a chip of model ABGA451.

[0009] Preferably, in the chip testing circuit, the DAC testing module is connected to the tester via an external SMA connector.

[0010] Preferably, in the chip testing circuit, the SPI testing module is externally connected to a USB interface.

[0011] By means of the above solution, the utility model has at least the following advantages:

[0012] The utility model can realize multifunctional testing and effectively improve work efficiency.

[0013] The above description is only an overview of the technical solution of the utility model. In order to more clearly understand the technical means of the utility model and implement it according to the contents of the specification, the following is a detailed description of the preferred embodiments of the utility model in conjunction with the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] In order to more clearly illustrate the technical solutions of the embodiments of the utility model, the drawings required for use in the embodiments will be briefly introduced below. It should be understood that the following drawings only show certain embodiments of the utility model and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other relevant drawings can be obtained based on these drawings without paying creative work.

[0015] Figure 1 It is a principle block diagram of the utility model;

[0016] Figure 2 It is a circuit diagram of the power supply test module of the utility model;

[0017] Figure 3 It is a circuit diagram of the DAC test module of the utility model;

[0018] Figure 4 It is a circuit diagram of the SMA head of the utility model matched with the DAC test module;

[0019] Figure 5 It is a circuit diagram of a clock signal test module of the utility model;

[0020] Figure 6 It is a circuit diagram of the control test module of the utility model;

[0021] Figure 7a It is a circuit diagram of the connector of the high-frequency signal test module of the utility model;

[0022] Figure 7b It is a circuit diagram of the high-frequency signal test module of the utility model;

[0023] Figure 8It is a circuit diagram of the SPI test module of the utility model;

[0024] Fig. 9 It is a circuit diagram of the USB interface of the utility model. DETAILED DESCRIPTION

[0025] In order to make the purpose, technical solution and advantages of the embodiments of the present application clearer, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, rather than all the embodiments. The components of the embodiments of the present application described and shown in the drawings here can be arranged and designed in various different configurations.

[0026] Therefore, the following detailed description of the embodiments of the present application provided in the accompanying drawings is not intended to limit the scope of the present application for which protection is sought, but merely represents selected embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in the field without creative work are within the scope of protection of the present application.

[0027] Example

[0028] like Figure 1 As shown, a chip testing circuit includes a chip to be tested 1, and also includes a PCB board 2 for the chip to be tested 1, the PCB board 2 is connected with a power supply test module 3, a DAC test module 4, a clock signal test module 5, a control test module 6, a high-frequency signal test module 7 and an SPI test module 8, the input end of the power supply test module 3 is connected to the power supply output end of the chip to be tested 1, the input end of the DAC test module 4 is connected to the DAC output end of the chip to be tested 1, the input end of the clock signal test module 5 is connected to the clock output end of the chip to be tested 1, the input end of the control test module 6 is connected to the control output end of the chip to be tested 1, the output ends of the power supply test module 3, the DAC test module 4, the clock signal test module 5 and the control test module 6 are connected to a tester, the input end of the high-frequency signal test module 7 is connected to the RF output end of the chip to be tested 1, and the chip to be tested 1 is interactively connected with the tester through the SPI test module 8.

[0029] in,

[0030] like Figure 2 As shown, the power supply test module, through which the power supply can be directly tested;

[0031] like Figure 3 and Figure 4 As shown, the DAC test module uses the chip model ABGA451 and is connected to the tester (V93000) through an external SMA connector;

[0032] like Figure 5 As shown, the clock signal test module provides a clock signal source for testing;

[0033] like Figure 6 As shown, the control test module is directly connected to the chip to reach the digital module of the tester;

[0034] like Figure 7a As shown in Figure 2, the high-frequency signal test module is connected to the balun device to convert the differential signal into a single-ended signal, and then the selection is performed to finally realize the loopback of TX and RX.

[0035] like Figure 8 As shown, the SPI test module interacts with an external tester through a connector to implement SPId testing.

[0036] like Fig. 9 As shown, the SPI test module 8 in the present invention is externally connected to a USB interface 9.

[0037] The working principle of the utility model is as follows:

[0038] During specific operation, the chip is tested through modules with different functions, and the tester displays the corresponding test results to determine whether the corresponding chip meets the set indicators (set by technicians in this field).

[0039] The above test operations are existing operations known to those skilled in the art and will not be described in detail.

[0040] It should be noted that similar reference numerals and letters denote similar items in the following drawings, and therefore, once an item is defined in one drawing, further definition and explanation thereof is not required in subsequent drawings.

[0041] In the description of this application, it should be noted that the terms "vertical", "horizontal", "inside", "outside", etc. indicate positions or positional relationships based on the positions or positional relationships shown in the accompanying drawings, or the positions or positional relationships in which the product of the application is usually placed when in use. They are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on this application. In addition, the terms "first", "second", etc. are only used to distinguish the description, and cannot be understood as indicating or implying relative importance.

[0042] In addition, the terms "horizontal", "vertical" and the like do not mean that the components are required to be absolutely horizontal or vertical, but can be slightly tilted. For example, "horizontal" only means that its direction is more horizontal than "vertical", and does not mean that the structure must be completely horizontal, but can be slightly tilted.

[0043] In the description of this application, it should also be noted that, unless otherwise clearly specified and limited, the terms "set", "install", "connect", and "connect" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, or it can be the internal communication of two elements. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to specific circumstances.

[0044] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. It should be pointed out that a person skilled in the art can make several improvements and modifications without departing from the technical principle of the present invention, and these improvements and modifications should also be regarded as within the protection scope of the present invention.

Claims

1. A chip testing circuit, comprising a chip to be tested (1), characterized in that: The invention also comprises a PCB board (2) for the chip to be tested (1), the PCB board (2) being connected with a power supply test module (3), a DAC test module (4), a clock signal test module (5), a control test module (6), a high-frequency signal test module (7) and an SPI test module (8), the input end of the power supply test module (3) being connected with the power supply output end of the chip to be tested (1), the input end of the DAC test module (4) being connected with the DAC output end of the chip to be tested (1), the input end of the clock signal test module (5) being connected with the clock output end of the chip to be tested (1), the input end of the control test module (6) being connected with the control output end of the chip to be tested (1), the output ends of the power supply test module (3), the DAC test module (4), the clock signal test module (5) and the control test module (6) being connected with a tester, the input end of the high-frequency signal test module (7) being connected with the RF output end of the chip to be tested (1), and the chip to be tested (1) being interconnected with the tester via the SPI test module (8).

2. A chip testing circuit according to claim 1, characterized in that: The DAC test module (4) uses a chip of model ABGA451.

3. A chip testing circuit according to claim 1 or 2, characterized in that: The DAC test module (4) is connected to the tester via an external SMA connector.

4. A chip testing circuit according to claim 1, characterized in that: The SPI test module (8) is externally connected to a USB interface (9).

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