MBUS communication main module system based on discrete device

Abstract

The utility model provides an MBUS communication main module system based on a discrete device, and the EMC interference suppression circuit of the system is used for absorbing transient overvoltage and overcurrent, and protecting the circuit from being affected by the transient overvoltage and overcurrent; the adjustable voltage stabilizing circuit is used for ensuring the working stability and reliability of the system circuit; the isolation circuit is used for providing electrical isolation, reducing interference and improving the stability of the system circuit; the MBUS host transmitting circuit is used for transmitting data to the slave computer by the host computer, so that the host computer controls the slave computer; the MBUS host receiving circuit is used for the host to obtain and process data sent by the slave; the current-limiting protection circuit is used for protecting the slave and preventing the slave from being damaged by overlarge current; the anti-damage circuit is used for improving the reliability of the circuit of the system, all the circuits are composed of discrete devices, the accuracy and reliability of data transmission in the whole system are effectively ensured, the anti-interference capability is higher, the cost is lower, and meanwhile, the layout space of a PCB is better saved.

Description

Technical Field

[0001] The present application relates to the technical field of communication circuits, and in particular to a MBUS communication main module system based on discrete devices. Background Art

[0002] MBUS is a low-speed, low-cost, two-wire fieldbus protocol based on European standard interfaces, designed for remote data reading, such as: electricity meters, water meters, gas meters and other metering equipment. The purpose of MBUS technology is to achieve networking communication of smart meters, facilitate terminal data collection and storage, and support prepayment, remote meter reading, fault detection, remote closing and opening of switches and other functions.

[0003] Traditional MBUS communication refers to the circuit that uses an integrated MBUS transceiver chip to implement the MBUS communication function. The integrated device integrates all or most of the functions of MBUS communication, such as signal modulation and demodulation, signal detection and correction, integrated 3.3V regulated power supply, and the receiver has dynamic level recognition function, etc. However, traditional MBUS communication has the problems of high cost and poor stability of integrated devices. Utility Model Content

[0004] In order to solve the above technical problems, the present application provides an MBUS communication main module system based on discrete devices, wherein the system circuit includes an EMC interference suppression circuit, an adjustable voltage stabilization circuit, an isolation circuit, an MBUS host transmitting circuit, an MBUS host receiving circuit, a current limiting protection circuit, and an anti-destruction circuit;

[0005] The EMC interference suppression circuit is used to absorb instantaneous overvoltage and overcurrent, and protect the circuit from the influence of transient overvoltage and overcurrent; the adjustable voltage stabilization circuit is used to ensure the stability and reliability of the system circuit; the isolation circuit is used to provide electrical isolation, reduce interference, and improve the stability of the system circuit; the MBUS host transmission circuit is used for the host to send data to the slave, so that the host controls the slave; the MBUS host receiving circuit is used for the host to obtain and process the data sent by the slave; the current limiting protection circuit is used to protect the slave to prevent the slave from being damaged by excessive current; the anti-destruction circuit is used to improve the reliability of the system circuit;

[0006] The input end of the EMC interference suppression circuit is electrically connected to the power input end, and the output end is electrically connected to the input end of the adjustable voltage stabilizing circuit; the output end of the adjustable voltage stabilizing circuit is electrically connected to the input end of the current limiting protection circuit; the output end of the current limiting protection circuit is electrically connected to the input end of the anti-destruction circuit; the output end of the anti-destruction circuit is electrically connected to the slave; the output end of the anti-destruction circuit is electrically connected to the MBUS host receiving circuit; the output end of the MBUS host receiving circuit is electrically connected to the host through the isolation circuit; one end of the MBUS host transmitting circuit is electrically connected to the host through the isolation circuit, and the other end is electrically connected to the adjustable voltage stabilizing circuit.

[0007] In some embodiments of the present application, the EMC interference suppression circuit includes a resistor R15, a capacitor C5, a capacitor C6, a capacitor C7 and a diode D3, one end of the resistor R15 is electrically connected to the system input power supply SPNO and the positive pole of the diode D3, and the other end is electrically connected to one end of the capacitor C5; the other end of the capacitor C5 is electrically connected to the negative pole of the diode D3; one end of the capacitor C6 and the capacitor C7 is electrically connected to the negative pole of the diode D3, and the other end is grounded.

[0008] In some embodiments of the present application, the adjustable voltage stabilizing circuit includes a capacitor C1, a capacitor C2, a capacitor C3, a resistor R1, a resistor R2, a resistor R3, and a voltage regulator U1; one end of the capacitor C1 is electrically connected to the VIN pin of the voltage regulator U1, and the other end is grounded; the ADJ pin of the voltage regulator U1 is electrically connected to one end of the resistor R1 and the resistor R2; the other end of the resistor R1 is electrically connected to the VOUT pin of the voltage regulator U1; the other end of the resistor R2 is electrically connected to one end of the resistor R3 and the isolation circuit; the other end of the resistor R3 is grounded.

[0009] In some embodiments of the present application, the isolation circuit includes an optocoupler U2, an optocoupler U3, a resistor R4, a resistor R5, and a resistor R6; one end of the resistor R4 is electrically connected to the negative electrode of the emitter of the optocoupler U2, and the other end is electrically connected to the host transmission signal MBUS_TXD; the positive electrode of the emitter of the optocoupler U2 is electrically connected to the power supply DVDD, the receiving end C of the optocoupler U2 is electrically connected to the adjustable voltage stabilization circuit, and the receiving end E of the optocoupler U2 is grounded; the negative electrode of the emitter of the optocoupler U3 is electrically connected to one end of the resistor R7, the positive electrode of the emitter of the optocoupler U3 is electrically connected to the VOUT pin of the voltage regulator U1 in the adjustable voltage stabilization circuit, the receiving end C of the optocoupler U3 is electrically connected to one end of the resistor R6 and one end of the resistor R5, and the receiving end E of the optocoupler U3 is grounded; the other end of the resistor R6 transmits the data to the host through the signal MBUS_RXD; the other end of the resistor R5 is electrically connected to the power supply DVDD.

[0010] In some embodiments of the present application, the MBUS host transmitting circuit includes a resistor R4 and an optical coupler U2; and the transmitting signal MBUS_TXD is electrically connected to one end of the resistor R4.

[0011] In some embodiments of the present application, the MBUS host receiving circuit includes a resistor R5, a resistor R6, a resistor R7, a resistor R8, a resistor R9, a resistor R10, a resistor R11, an optical coupler U3, a transistor Q1, a transistor Q2, a diode D2, and a capacitor C4; one end of the resistor R11 is electrically connected to the positive electrode of the diode D2, and the other end is electrically connected to the base of the transistor Q2; the cathode of the diode D2 is electrically connected to the emitter of the transistor Q2 and the positive electrode of the capacitor C4; the The negative electrode of capacitor C4 is grounded; one end of the resistor R10 is electrically connected to the emitter of the transistor Q2, and the other end is grounded; the collector of the transistor Q2 is electrically connected to one end of the resistor R9; the other end of the resistor R9 is electrically connected to one end of the resistor R8 and the base of the transistor Q1; the other end of the resistor R8 is electrically connected to the emitter of the transistor Q1; one end of the resistor R7 is electrically connected to the collector of the transistor Q1, and the other end is electrically connected to the negative electrode of the emitter of the optocoupler U3.

[0012] In some embodiments of the present application, the current limiting protection circuit includes a resistor R12 and a resistor R13; one end of the resistor R13 is electrically connected to the adjustable voltage stabilization circuit; the other end of the resistor R13 is electrically connected to one end of the resistor R12; the other end of the resistor R12 is electrically connected to the anti-destruction circuit.

[0013] In some embodiments of the present application, the anti-destruction circuit includes a diode D1, a transient voltage suppressor TVS1, and a thermistor R14; the cathode of the diode D1 is electrically connected to one end of the transient voltage suppressor TVS1 and one end of the resistor R14; the other end of the transient voltage suppressor TVS1 is grounded; the other end of the resistor R14 is electrically connected to the slave through an interface JH1.

[0014] Compared with the prior art, the utility model has the following advantages and beneficial effects: the MBUS communication main module system based on discrete devices of the present application, the system circuit includes an EMC interference suppression circuit, an adjustable voltage stabilization circuit, an isolation circuit, an MBUS host transmitting circuit, an MBUS host receiving circuit, a current limiting protection circuit, and an anti-destruction circuit, the EMC interference suppression circuit is used to absorb instantaneous overvoltage and overcurrent, and protect the circuit from the influence of transient overvoltage and overcurrent; the adjustable voltage stabilization circuit is used to ensure the stability and reliability of the operation of the system circuit; the isolation circuit is used to provide electrical isolation, reduce interference, and improve the stability of the system circuit; the MBUS host transmitting circuit is used for the host to send data to the slave, so as to achieve the function of the host controlling the slave; the MBUS host receiving circuit is used for the host to obtain and process the data sent by the slave; the current limiting protection circuit is used to protect the slave to prevent the slave from being damaged by excessive current; the anti-destruction circuit is used to improve the reliability of the system circuit, all circuits are composed of discrete devices, effectively ensuring the accuracy and reliability of data transmission in the entire system, with stronger anti-interference ability and lower cost, and at the same time saving more layout space of the PCB board.

[0015] It is to be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] The accompanying drawings constituting a part of this document are used to provide a further understanding of this document. The exemplary embodiments and descriptions of this document are used to explain this document and do not constitute an improper limitation on this document. In the accompanying drawings:

[0017] Figure 1 is a circuit schematic diagram provided by an exemplary embodiment of the present application;

[0018] Figure 2 It is a circuit structure diagram of an MBUS communication main module system based on discrete devices provided by an exemplary embodiment of the present application. DETAILED DESCRIPTION

[0019] In order to make the purpose, technical scheme and advantages of the embodiments of the present application clearer, the technical scheme in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, rather than all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in the field without making creative work are within the scope of protection of the present application. It should be noted that, in the absence of conflict, the embodiments in the present application and the features in the embodiments can be combined with each other arbitrarily.

[0020] Traditional MBUS communication refers to the circuit that uses an integrated MBUS transceiver chip to implement the MBUS communication function. The integrated device integrates all or most of the functions of MBUS communication, such as signal modulation and demodulation, signal detection and correction, integrated 3.3V regulated power supply, and the receiver has dynamic level recognition function, etc. However, traditional MBUS communication has the problems of high cost and poor stability of integrated devices.

[0021] Based on this, an exemplary embodiment of the present application provides an MBUS communication main module system based on discrete devices. The system circuit includes an EMC interference suppression circuit, an adjustable voltage stabilization circuit, an isolation circuit, an MBUS host transmitting circuit, an MBUS host receiving circuit, a current limiting protection circuit, and an anti-destruction circuit. All circuits are composed of discrete devices, which effectively ensures the accuracy and reliability of data transmission in the entire system, has stronger anti-interference ability, and lower cost, while saving more layout space of the PCB board.

[0022] An exemplary embodiment of the present application provides a MBUS communication main module system based on discrete devices, and the system circuit includes an EMC interference suppression circuit, an adjustable voltage stabilization circuit, an isolation circuit, an MBUS host transmission circuit, an MBUS host receiving circuit, a current limiting protection circuit, and an anti-destruction circuit. The EMC interference suppression circuit is used to absorb instantaneous overvoltage and overcurrent, and protect the circuit from the influence of transient overvoltage and overcurrent; the adjustable voltage stabilization circuit is used to ensure the stability and reliability of the operation of the system circuit; the isolation circuit is used to provide electrical isolation, reduce interference, and improve the stability of the system circuit; the MBUS host transmission circuit is used for the host to send data to the slave, so as to achieve the function of the host controlling the slave; the MBUS host receiving circuit is used for the host to obtain and process the data sent by the slave; the current limiting protection circuit is used to protect the slave to prevent the excessive current from damaging the slave; the anti-destruction circuit is used to improve the reliability of the system circuit.

[0023] The input end of the EMC interference suppression circuit is electrically connected to the power input end, and the output end is electrically connected to the input end of the adjustable voltage stabilization circuit; the output end of the adjustable voltage stabilization circuit is electrically connected to the input end of the current limiting protection circuit; the output end of the current limiting protection circuit is electrically connected to the input end of the anti-destruction circuit; the output end of the anti-destruction circuit is electrically connected to the slave; the output end of the anti-destruction circuit is electrically connected to the MBUS host receiving circuit; the output end of the MBUS host receiving circuit is electrically connected to the host through an isolation circuit; one end of the MBUS host transmitting circuit is electrically connected to the host through an isolation circuit, and the other end is electrically connected to the adjustable voltage stabilization circuit. All circuits in the system are composed of discrete devices, which effectively ensures the accuracy and reliability of data transmission in the entire system, has stronger anti-interference ability, and lower cost, while saving more layout space on the PCB board.

[0024] The EMC interference suppression circuit includes a resistor R15, a capacitor C5, a capacitor C6, a capacitor C7 and a diode D3. One end of the resistor R15 is electrically connected to the system input power supply SPNO and the positive electrode of the diode D3, and the other end is electrically connected to one end of the capacitor C5; the other end of the capacitor C5 is electrically connected to the negative electrode of the diode D3; one end of the capacitor C6 and the capacitor C7 is electrically connected to the negative electrode of the diode D3, and the other end is grounded. The circuit can effectively absorb instantaneous overvoltage and overcurrent, and protect the circuit from the influence of transient overvoltage and overcurrent.

[0025] The adjustable voltage stabilizing circuit includes capacitor C1, capacitor C2, capacitor C3, resistor R1, resistor R2, resistor R3, and voltage regulator U1; one end of capacitor C1 is electrically connected to the VIN pin of voltage regulator U1, and the other end is grounded; the ADJ pin of voltage regulator U1 is electrically connected to one end of resistor R1 and resistor R2; the other end of resistor R1 is electrically connected to the VOUT pin of voltage regulator U1; the other end of resistor R2 is electrically connected to one end of resistor R3 and the isolation circuit; the other end of resistor R3 is grounded. The circuit adopts a high-precision adjustable three-terminal voltage regulator U1, which ensures the stability and reliability of the circuit operation, and has the advantages of fast response speed, wide voltage adjustable range, low power consumption, etc., ensuring the stability of the entire communication circuit.

[0026] The isolation circuit includes an optocoupler U2, an optocoupler U3, a resistor R4, a resistor R5, and a resistor R6; one end of the resistor R4 is electrically connected to the negative electrode of the emitter of the optocoupler U2, and the other end is electrically connected to the host transmission signal MBUS_TXD; the positive electrode of the emitter of the optocoupler U2 is electrically connected to the power supply DVDD, the receiving end C of the optocoupler U2 is electrically connected to the adjustable voltage stabilization circuit, and the receiving end E of the optocoupler U2 is grounded; the negative electrode of the emitter of the optocoupler U3 is electrically connected to one end of the resistor R7, the positive electrode of the emitter of the optocoupler U3 is electrically connected to the VOUT pin of the voltage regulator U1 in the adjustable voltage stabilization circuit, the receiving end C of the optocoupler U3 is electrically connected to one end of the resistor R6 and one end of the resistor R5, and the receiving end E of the optocoupler U3 is grounded; the other end of the resistor R6 transmits data to the host through the signal MBUS_RXD; the other end of the resistor R5 is electrically connected to the power supply DVDD. This circuit provides electrical isolation for the entire system, effectively solving safety hazards such as leakage, reduces interference, and improves the stability of the entire system.

[0027] The MBUS host transmitting circuit includes a resistor R4 and an optical coupler U2; the transmitting signal MBUS_TXD is electrically connected to one end of the resistor R4; the other end of the resistor R4 is electrically connected to the negative electrode of the emitter of the optical coupler U2; the positive electrode of the emitter of the optical coupler U2 is electrically connected to the power supply DVDD; the receiving end C of the optical coupler U2 is electrically connected to the adjustable voltage stabilization circuit. The MBUS host transmitting circuit is used for the host to send data to the slave, so that the host can control the slave.

[0028] The MBUS host receiving circuit includes a resistor R5, a resistor R6, a resistor R7, a resistor R8, a resistor R9, a resistor R10, a resistor R11, an optical coupler U3, a transistor Q1, a transistor Q2, a diode D2, and a capacitor C4; one end of the resistor R11 is electrically connected to the positive electrode of the diode D2, and the other end is electrically connected to the base of the transistor Q2; the negative electrode of the diode D2 is electrically connected to the emitter of the transistor Q2 and the positive electrode of the capacitor C4; the negative electrode of the capacitor C4 is grounded; one end of the resistor R10 is electrically connected to the emitter of the transistor Q2, and the other end is grounded; the collector of the transistor Q2 is electrically connected to one end of the resistor R9; the other end of the resistor R9 is electrically connected to one end of the resistor R8 and the base of the transistor Q1; the other end of the resistor R8 is electrically connected to the emitter of the transistor Q1; one end of the resistor R7 is electrically connected to the collector of the transistor Q1, and the other end is electrically connected to the negative electrode of the emitter of the optical coupler U3. The MBUS host receiving circuit enables the host to obtain and process the data sent by the slave.

[0029] The current limiting protection circuit includes resistors R12 and R13 connected in series; one end of the resistor R13 is electrically connected to the adjustable voltage stabilizing circuit; the other end of the resistor R13 is electrically connected to one end of R12; the other end of the resistor R12 is electrically connected to the anti-destruction circuit. The current limiting protection circuit is used to protect the slave device to prevent the slave device from being damaged by excessive current.

[0030] The anti-destruction circuit includes a diode D1, a transient voltage suppressor TVS1, and a thermistor R14; the cathode of the diode D1 is electrically connected to one end of the transient voltage suppressor TVS1 and one end of the resistor R14; the other end of the transient voltage suppressor TVS1 is grounded; the other end of the resistor R14 is electrically connected to the slave through the interface JH1. The anti-destruction circuit not only improves the ability of the meter to prevent external high voltage attacks of tens of kilovolts, but also improves the anti-static ability, thereby improving the reliability of the entire system.

[0031] For example, capacitor C1 is a decoupling capacitor with a withstand voltage of 50V and a capacity of 0.1uF; capacitor C2 is a filter capacitor with a withstand voltage of 50V and a capacity of 0.1uF; capacitor C3 is a filter capacitor with a withstand voltage of 50V and a capacity of 1uF; capacitor C4 is an electrolytic capacitor with a withstand voltage of 50V and a capacity of 470uF; capacitor C5 is a filter capacitor with a withstand voltage of 50V and a capacity of 200nF; capacitor C6 is a filter capacitor with a withstand voltage of 50V and a capacity of 0.1uF; capacitor C7 is an electrolytic capacitor with a withstand voltage of 50V and a capacity of 100uF; voltage regulator U1 is a high-precision adjustable three-terminal voltage regulator with a withstand voltage of 40V and an output voltage of 24V; optocoupler U2 is CTR=300~450% IF=5mA; Optocoupler U3 is CTR=300~450%IF=5mA; Resistor R1 has a withstand voltage of 75V and a resistance of 300 ohms; Resistor R2 has a withstand voltage of 75V and a resistance of 2.5K ohms; Resistor R3 has a withstand voltage of 75V and a resistance of 4.7K ohms; Resistor R4 has a withstand voltage of 50V and a resistance of 1K ohms; Resistor R5 has a withstand voltage of 50V and a resistance of 1K ohms; Resistor R6 has a withstand voltage of 50V and a resistance of 1K ohms; Resistor R7 has a withstand voltage of 50V and a resistance of 1K ohms; Resistor R8 has a withstand voltage of 50V and a resistance of 300K ohms; Resistor R9 has a withstand voltage of 50V and a resistance of 200K ohms; Resistor R10 has a withstand voltage of 50V and a resistance of 300 K ohm; the resistance R11 has a withstand voltage of 50V and a resistance of 1K ohm; R12 is a thick film resistor with a withstand voltage of 200V and a resistance of 100 ohm; R13 is a thick film resistor with a withstand voltage of 200V and a resistance of 50 ohm; R14 is a thermistor with a resistance of 40-60Ω±2% and a maximum working voltage of 450V; the resistance R15 has a withstand voltage of 200V and a resistance of 100 ohm; the transistor Q1 is an NPN type; the transistor Q2 is a PNP type; the diode D1 is 1N4148; the diode D2 is a dual diode BAT54C; the diode D3 is a high-efficiency diode with a withstand voltage of 1KV; the transient voltage suppressor TVS1 is VRWM=6V, PPPM=600W.

[0032] The working principle of the MBUS communication master module system based on discrete devices of the present application is as follows: the host MCU sends data through the MBUS_TXD signal, the optical coupler U2 is turned on, and the output voltage of the adjustable voltage regulator changes from 24V to 8V. The high level range of the MBUS master module system is 18-30V. At this time, the signal changes from high level to low level and is transmitted to the slave through resistors R12 and R13. When the slave has no data to send, the base of the transistor Q2 is at a high level, and the base voltage of the transistor Q2 is greater than the emitter voltage, and Q2 is in a cut-off state; at this time, the output end of the adjustable voltage regulator passes through resistors R12 and R13, and passes through the bidirectional common anode Schottky diode D2 to store electrical energy for the electrolytic capacitor C4; the MGND signal enters the base of the transistor Q1 through the resistor R8; at this time, the base of the transistor Q1 is at a low level, and the base voltage is approximately equal to the emitter voltage, and the transistor Q1 is in a cut-off state; at this time, the optical coupler U3 is not turned on, and due to the action of the pull-up resistor R5, the receiving signal MBUS_RXD is always at a high level. When the slave sends a signal through the JH1 interface, the base of transistor Q2 changes from high level to low level. At this time, the base voltage of transistor Q2 is less than the emitter voltage, and transistor Q2 is in the on state; the base of transistor Q1 is at a high level, the base voltage of transistor Q1 is greater than the emitter voltage, and transistor Q1 is in the on state; the MGND signal passes through transistor Q1 and resistor R7 into the optocoupler U3, and the optocoupler U3 is turned on; the MBUS_RXD signal changes from a high level to a low level to realize data transmission.

[0033] In this application, the terms "comprises", "comprising" or any other variations thereof are intended to cover non-exclusive inclusion, so that an article or device comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or elements inherent to such article or device. In the absence of more restrictions, the elements defined by the sentence "comprising..." do not exclude the presence of other identical elements in the article or device comprising the elements.

[0034] Although the preferred embodiments of the present application have been described, those skilled in the art may make other changes and modifications to these embodiments once they have learned the basic creative concept. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications falling within the scope of the present application.

[0035] Obviously, those skilled in the art can make various changes and modifications to the present application without departing from the spirit and scope of the present application. Thus, if these modifications and variations of the present application fall within the scope of the claims of the present application and their equivalents, the intention of the present application also includes these modifications and variations.

Claims

1. A MBUS communication main module system based on discrete devices, characterized in that: The system circuit includes an EMC interference suppression circuit, an adjustable voltage stabilization circuit, an isolation circuit, an MBUS host transmitting circuit, an MBUS host receiving circuit, a current limiting protection circuit, and an anti-destruction circuit; The EMC interference suppression circuit is used to absorb instantaneous overvoltage and overcurrent, and protect the circuit from the influence of transient overvoltage and overcurrent; the adjustable voltage stabilization circuit is used to ensure the stability and reliability of the system circuit; the isolation circuit is used to provide electrical isolation, reduce interference, and improve the stability of the system circuit; the MBUS host transmission circuit is used for the host to send data to the slave, so that the host controls the slave; the MBUS host receiving circuit is used for the host to obtain and process the data sent by the slave; the current limiting protection circuit is used to protect the slave to prevent the slave from being damaged by excessive current; the anti-destruction circuit is used to improve the reliability of the system circuit; The input end of the EMC interference suppression circuit is electrically connected to the power input end, and the output end is electrically connected to the input end of the adjustable voltage stabilizing circuit; the output end of the adjustable voltage stabilizing circuit is electrically connected to the input end of the current limiting protection circuit; the output end of the current limiting protection circuit is electrically connected to the input end of the anti-destruction circuit; the output end of the anti-destruction circuit is electrically connected to the slave; the output end of the anti-destruction circuit is electrically connected to the MBUS host receiving circuit; the output end of the MBUS host receiving circuit is electrically connected to the host through the isolation circuit; one end of the MBUS host transmitting circuit is electrically connected to the host through the isolation circuit, and the other end is electrically connected to the adjustable voltage stabilizing circuit.

2. The MBUS communication main module system based on discrete devices according to claim 1 is characterized in that: The EMC interference suppression circuit includes a resistor R15, a capacitor C5, a capacitor C6, a capacitor C7 and a diode D3, one end of the resistor R15 is electrically connected to the system input power supply SPNO and the positive electrode of the diode D3, and the other end is electrically connected to one end of the capacitor C5; the other end of the capacitor C5 is electrically connected to the negative electrode of the diode D3; one end of the capacitor C6 and the capacitor C7 is electrically connected to the negative electrode of the diode D3, and the other end is grounded.

3. The MBUS communication main module system based on discrete devices according to claim 1 is characterized in that: The adjustable voltage-stabilizing circuit includes a capacitor C1, a capacitor C2, a capacitor C3, a resistor R1, a resistor R2, a resistor R3, and a voltage-stabilizing tube U1; one end of the capacitor C1 is electrically connected to the VIN pin of the voltage-stabilizing tube U1, and the other end is grounded; the ADJ pin of the voltage-stabilizing tube U1 is electrically connected to one end of the resistor R1 and the resistor R2; the other end of the resistor R1 is electrically connected to the VOUT pin of the voltage-stabilizing tube U1; the other end of the resistor R2 is electrically connected to one end of the resistor R3 and the isolation circuit; the other end of the resistor R3 is grounded.

4. The MBUS communication main module system based on discrete devices according to claim 1 is characterized in that: The isolation circuit includes an optocoupler U2, an optocoupler U3, a resistor R4, a resistor R5, and a resistor R6; one end of the resistor R4 is electrically connected to the negative electrode of the emitter of the optocoupler U2, and the other end is electrically connected to the host transmission signal MBUS_TXD; the positive electrode of the emitter of the optocoupler U2 is electrically connected to the power supply DVDD, the receiving end C of the optocoupler U2 is electrically connected to the adjustable voltage stabilization circuit, and the receiving end E of the optocoupler U2 is grounded; the negative electrode of the emitter of the optocoupler U3 is electrically connected to one end of the resistor R7, the positive electrode of the emitter of the optocoupler U3 is electrically connected to the VOUT pin of the voltage regulator U1 in the adjustable voltage stabilization circuit, the receiving end C of the optocoupler U3 is electrically connected to one end of the resistor R6 and one end of the resistor R5, and the receiving end E of the optocoupler U3 is grounded; the other end of the resistor R6 transmits data to the host through the signal MBUS_RXD; the other end of the resistor R5 is electrically connected to the power supply DVDD.

5. The MBUS communication main module system based on discrete devices according to claim 4 is characterized in that: The MBUS host transmitting circuit includes a resistor R4 and an optical coupler U2; the transmitting signal MBUS_TXD is electrically connected to one end of the resistor R4.

6. The MBUS communication main module system based on discrete devices according to claim 4 is characterized in that: The MBUS host receiving circuit includes a resistor R5, a resistor R6, a resistor R7, a resistor R8, a resistor R9, a resistor R10, a resistor R11, an optical coupler U3, a transistor Q1, a transistor Q2, a diode D2, and a capacitor C4; one end of the resistor R11 is electrically connected to the positive electrode of the diode D2, and the other end is electrically connected to the base of the transistor Q2; the cathode of the diode D2 is electrically connected to the emitter of the transistor Q2 and the positive electrode of the capacitor C4; the cathode of the capacitor C4 is electrically connected to the emitter of the transistor Q2 and the positive electrode of the capacitor C4; the cathode of the capacitor C4 is electrically connected to the emitter of the transistor Q2 and the positive electrode of the capacitor C4; the cathode of the capacitor C4 is electrically connected to the emitter of the transistor Q2 and the positive electrode of the capacitor C4; the cathode of the capacitor C4 is electrically connected to the emitter of the transistor Q2 and the positive electrode of the capacitor C4; the cathode of the capacitor C4 is electrically connected to the emitter of the transistor Q2 and the positive electrode of the capacitor C4; the cathode of the capacitor C4 is electrically connected to the emitter of the transistor Q2 and the base of the transistor Q2 ... The base of the transistor Q1 is grounded; one end of the resistor R10 is electrically connected to the emitter of the transistor Q2, and the other end is grounded; the collector of the transistor Q2 is electrically connected to one end of the resistor R9; the other end of the resistor R9 is electrically connected to one end of the resistor R8 and the base of the transistor Q1; the other end of the resistor R8 is electrically connected to the emitter of the transistor Q1; one end of the resistor R7 is electrically connected to the collector of the transistor Q1, and the other end is electrically connected to the emitter negative electrode of the optocoupler U3.

7. The MBUS communication main module system based on discrete devices according to claim 1 is characterized in that: The current limiting protection circuit includes a resistor R12 and a resistor R13; one end of the resistor R13 is electrically connected to the adjustable voltage stabilization circuit; the other end of the resistor R13 is electrically connected to one end of the resistor R12; and the other end of the resistor R12 is electrically connected to the anti-destruction circuit.

8. The MBUS communication main module system based on discrete devices according to claim 1, characterized in that: The anti-destruction circuit includes a diode D1, a transient voltage suppressor TVS1, and a thermistor R14; the cathode of the diode D1 is electrically connected to one end of the transient voltage suppressor TVS1 and one end of the resistor R14; the other end of the transient voltage suppressor TVS1 is grounded; the other end of the resistor R14 is electrically connected to the slave through an interface JH1.

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