Testing device for serial port interface chip

Abstract

The utility model provides a testing device of a serial port interface chip, comprising a chip positioning module, the chip positioning module comprises an IC conversion seat and an IC adapter plate, the input end of the IC adapter plate is electrically connected with the output end of the IC conversion seat; the panel module comprises a panel, a power switch, a power indicating lamp and a current plate, the input end of the panel is electrically connected to the output end of the IC adapter plate, and the output end of the power switch is electrically connected to the input end of the IC adapter plate. According to the testing device of the serial port interface chip, limit power consumption of the testing chip in an actual application circuit can be visually observed, the chips with power consumption not meeting application requirements are removed in advance, the chips with power consumption meeting the application requirements are screened out, and the testing device is used for testing the serial port interface chip. The problem of random burn-in caused by the fact that the power consumption does not meet the requirement during batch production is avoided, the production efficiency is greatly improved, and the maintenance cost is reduced.

Description

Technical Field

[0001] The utility model relates to the field of interface chip testing, in particular to a testing device for a serial port interface chip. Background Art

[0002] As electronic integration capabilities become stronger and stronger, and integrated circuit chips become lighter, thinner and smaller, the complexity of integrated circuit chips is relatively higher, and the requirements for the functional stability and reliability of integrated circuit chip modules are also getting higher and higher.

[0003] Different application products in different application scenarios have different requirements for chip power consumption. In order to avoid the power consumption of the chip being unable to meet the normal use of the equipment, the chip needs to be tested before installation. Especially for some products with high power consumption, if the chip is directly installed on the device for use, when the power consumption of the chip cannot meet the normal use of the equipment, it is very easy to burn out. In this way, the equipment circuit board needs to be replaced or repaired, which increases the maintenance cost and reduces production efficiency.

[0004] Therefore, it is necessary to provide a test device for a serial port interface chip to solve the above technical problems. Utility Model Content

[0005] The utility model provides a testing device for a serial port interface chip, which solves the problem that the chip is easily burned out when it is directly installed in the device for use, which increases the maintenance cost and reduces the production efficiency.

[0006] In order to solve the above technical problems, the utility model provides a test device for a serial port interface chip, comprising:

[0007] A chip positioning module, the chip positioning module comprising an IC conversion seat and an IC adapter board, the input end of the IC adapter board being electrically connected to the output end of the IC conversion seat;

[0008] A panel module, the panel module comprising a panel, a power switch, a power indicator light and a current board, the input end of the panel is electrically connected to the output end of the IC adapter board, and the output end of the power switch is electrically connected to the input end of the IC adapter board;

[0009] A shell module, the shell module includes a chip performance test unit, a shell, a shock-absorbing pad, a power supply socket, a power protection circuit and a power module, the chip performance test unit and the IC adapter board are electrically connected to each other, the input end of the power protection circuit is electrically connected to the input end of the power protection circuit, the input end of the power module is electrically connected to the output end of the power protection circuit, and the output end of the power module is electrically connected to the input end of the chip performance test unit and the input end of the power switch, respectively.

[0010] Preferably, the power protection circuit, the power module, the chip performance test unit and the shock-absorbing pad are all arranged on the inner side of the shell.

[0011] Preferably, the output end of the power switch is also electrically connected to the power indicator light, the ammeter and the input end of the panel respectively.

[0012] Compared with the related art, the test device for a serial port interface chip provided by the utility model has the following beneficial effects:

[0013] The utility model provides a testing device for a serial port interface chip, which can visually observe the limit power consumption required by the test chip in an actual application circuit, eliminate chips whose power consumption does not meet the application requirements in advance, and screen out chips whose power consumption meets the application requirements, thereby avoiding the problem of random burning caused by power consumption not meeting the requirements during mass production, greatly improving production efficiency and reducing maintenance costs. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Figure 1 A structural block diagram of a first embodiment of a test device for a serial port interface chip provided by the utility model;

[0015] Figure 2 for Figure 1 The schematic diagram of the serial port interface chip SP3485 of the chip performance test unit shown;

[0016] Figure 3 for Figure 1 The digital part of the chip performance test unit is shown in the figure. Figure 1 ;

[0017] Figure 4 for Figure 1 The digital part of the chip performance test unit is shown in the figure. Figure 2 ;

[0018] Figure 5 for Figure 1 The power supply principle diagram of the digital part of the chip performance test unit shown;

[0019] Figure 6 for Figure 1 The schematic diagram of the simulation part of the chip performance test unit shown;

[0020] Figure 7 for Figure 1 The schematic diagram of the mixing and amplification circuit module XAFH-HF1 of the chip performance test unit shown;

[0021] Numbers in the figure: 2. Chip positioning module, 3. Panel module, 4. Shell module, 5. IC adapter board, 6. Power switch, 7. Power indicator light, 8. Chip performance test unit, 9. Shell, 10. Shock-absorbing pad, 11. Power socket, 12. Power protection circuit, 13. Power module, 14. IC conversion socket, 15. Panel, 16. Ammeter. DETAILED DESCRIPTION

[0022] The utility model is further described below in conjunction with the accompanying drawings and implementation modes.

[0023] First embodiment

[0024] Please refer to Figure 1 , Figure 2 , Figure 3 , Figure 4 , Figure 5 , Figure 6 and Figure 7 ,in, Figure 1 A structural block diagram of a first embodiment of a test device for a serial port interface chip provided by the utility model; Figure 2 for Figure 1 The schematic diagram of the serial port interface chip SP3485 of the chip performance test unit shown; Figure 3 for Figure 1 The digital part of the chip performance test unit is shown in the figure. Figure 1 ; Figure 4 for Figure 1 The digital part of the chip performance test unit is shown in the figure. Figure 2 ; Figure 5 for Figure 1 The power supply principle diagram of the digital part of the chip performance test unit shown; Figure 6 for Figure 1 The schematic diagram of the simulation part of the chip performance test unit shown; Figure 7 for Figure 1 The schematic diagram of the mixing and amplification circuit module XAFH-HF1 of the chip performance test unit shown. A test device for a serial port interface chip comprises: a chip positioning module 2, the chip positioning module 2 comprises an IC conversion seat 15 and an IC adapter board, the input end of the IC adapter board 5 is electrically connected to the output end of the IC conversion seat 15;

[0025] A panel module 3, wherein the panel module 3 comprises a panel 15, a power switch 6, a power indicator light 7 and a current board 7, wherein the input end of the panel 15 is electrically connected to the output end of the IC adapter board 5, and the output end of the power switch 6 is electrically connected to the input end of the IC adapter board 5;

[0026] The shell module 4 includes a chip performance test unit 8, a shell 9, a shock-absorbing pad 10, a power supply socket 11, a power protection circuit 12 and a power module. The chip performance test unit 8 and the IC adapter board 5 are electrically connected to each other, the input end of the power protection circuit 12 is electrically connected to the input end of the power protection circuit 12, the input end of the power module 13 is electrically connected to the output end of the power protection circuit 12, and the output end of the power module 13 is electrically connected to the input end of the chip performance test unit 8 and the input end of the power switch 6 respectively.

[0027] The power protection circuit 12 , the power module 13 , the chip performance test unit 8 and the shock-absorbing pad 10 are all arranged on the inner side of the housing 9 .

[0028] The output end of the power switch 6 is also electrically connected to the power indicator light 7 , the ammeter 16 and the input end of the panel 15 .

[0029] The chip performance test unit 8 is used to test the specific use circuit of the RS-485 interface circuit. The RS-485 standard is a communication platform with relatively high noise suppression, relatively high transmission rate, long transmission distance, and wide common mode range. It also has the advantages of convenient control and low cost. The digital in-car intercom adopts the industry-standard communication interface device SP3485. This chip is a high-performance RS-485 serial communication interface transceiver designed and produced by SIPEX. It is a +3.3V low-power half-duplex transceiver that fully meets the requirements of the RS-485 serial protocol. It uses an independent +3.3V working power supply, and the data transmission rate can be as high as 10Mbps. Each pin provides ESD (Electro-static discharge) protection, which can be used in multi-interference applications and environments sensitive to electrostatic discharge and transient changes. The input and output pins can withstand at least 15kV electrostatic discharge without being damaged. The main working principle of the RS-485 interface circuit is based on differential signal transmission: the data to be transmitted is converted into differential signals at the transmitting end, and transmitted to the receiving end through twisted pair cables. The receiving end converts the received differential signals into data signals to complete data reception. In the actual use circuit of this chip, when the interface chip of a node in the RS-485 communication system is damaged, the node will be unable to communicate with the system, and may also cause several neighboring nodes to be unable to communicate, and even cause partial or complete paralysis of the system. Corresponding to the digital in-car intercom, it may be that the communication between one or several passenger boxes fails, causing the car communication system to fail to work properly and lose the function of the in-car intercom.

[0030] In order to improve the pass rate of the car communication passenger box during mass production, early detection of the early failure of the serial port interface chip SP3485 and elimination of the chips whose power consumption does not meet the requirements of the whole machine, a test device 1 for the serial port interface chip is designed and manufactured to detect the performance indicators of the chip SP3485 purchased into the factory, and screen out the chips whose power consumption meets the requirements of the whole machine, so as to solve the problem of random burning in the production of digital car intercoms. The production principle of the test device 1 for the serial port interface chip is: to simulate the actual working state of the digital car intercom to the greatest extent, to detect the power consumption of the tested chip SP3485, to ensure that the test data is accurate and reliable, and the operation is simple. Therefore, the digital boards of the digital car intercom box No. 1 and No. 2 are used to construct the chip performance test unit 8, which can not only simulate the actual use state of the digital car intercom system to the greatest extent, but also shorten the design and test cycle. Inside the test device 1 for the serial port interface chip, the connection is made according to the maximum power consumption configuration state of a single digital board of the digital car intercom, and the full-load communication status of the SP3485 chip can be intuitively observed. The SP3485 in the original position of the digital unit board of the digital in-car intercom is connected to the corresponding position of the IC adapter board 5 of the chip positioning module 2 through a high-speed line. The IC conversion seat 14 on it can easily replace the chip to be tested to complete the test. The IC conversion seat 14 has the characteristics of accurate positioning of the pins to be tested and long service life, which can fully meet the test requirements. An ammeter 16 is also installed on the panel module 3 of the test device 1 of the serial interface chip, which is used to monitor the full-load working current of the SP3485 chip, so as to facilitate the elimination of SP3485 chips with unqualified power consumption.

[0031] like Figure 2 The figure shows the principle diagram of the serial port interface chip SP3485 of the chip performance test unit. SP3485 is a low-power half-duplex RS-485 transceiver that can fully meet the requirements of RS-485 and RS-422 serial protocols. It is compatible with Sipex's SP3485 in terms of pins and is compatible with industrial standard specifications. Pin 8 of SP3485 is a 3.3V power supply port, pin 5 is grounded, pin 1 is the RX port (i.e., receiver output), pin 4 is the TX port (i.e., driver input), pin 6 is the driver output receiver input (in phase), and pin 7 is the driver output receiver input (inverted). SP3485 has an enable control line. If pin 3 of the chip is at a logic high level, its internal driver is enabled, and the driver's differential output (i.e., the high level can be controlled to be valid); the data transmission rate of the SP3485 receiver is 10Mbps. If pin 2 of the chip is at a logic low level, its internal receiver is enabled. The 74HC1G14 is a high speed CMOS inverter with Schmitt trigger inputs and internal circuitry consisting of multiple stages including buffered outputs, providing high noise immunity and stable output.

[0032] like Figure 3The figure shows the principle diagram of the digital part of the chip performance test unit. Figure 1 , showing the external connection principle of the core control part C8051F023 chip. C8051F023 is the control core of the chip performance test unit, a fully integrated mixed signal system-level MCU chip with 64 digital I / O pins. The main features are: high-speed, pipelined 8051-compatible CIP-51 core (up to 25MIPS); full-speed, non-intrusive online system debugging interface (on-chip); 10-bit, 100ksps 8-channel ADC with PGA and 8-channel analog multiplexer; two 12-bit DACs with programmable data update mode; 64K bytes of FLASH memory that can be programmed in the system; 4352 (4096+256) bytes of on-chip RAM; external data memory interface that can address 6K bytes of address space; hardware-implemented SPI, SMBus / 12C and two UART serial interfaces; 5 general-purpose 16-bit timers; programmable counter / timer array with 5 capture / compare modules; on-chip watchdog timer, clock oscillator, VDD monitor and temperature sensor. All analog and digital peripherals of the C8051F023 microcontroller can be enabled / disabled and configured by user firmware; the FLASH memory also has the ability to be reprogrammed in the system, which can be used for non-volatile data storage and allows the 8051 firmware to be updated on site. It can execute pre-cured software in the test system to complete the following eight functions: system serial communication synchronization control; system serial communication flow control; system bus terminal status detection; voice data bus insertion; PTT control; panel switch detection and indicator light display function; A / D, D / A interface; voice superposition processing.

[0033] Figure 4 Schematic diagram of the digital part of the chip performance test unit Figure 2 , showing the logic control process of digital signal encoding and decoding. The control process is completed by software in the C8051F023 chip, and the digital processing of analog signals is carried out in MC145481. MC145481 is a universal multi-channel PCM encoding and decoding filter produced by Motorola, USA, with a standard power supply voltage of 3V and a resolution (bit) of 6b. The chip has two applications, synchronous and asynchronous, and contains an on-chip reference voltage. Figure 5 As shown in the figure, the anti-noise voice signal is output to the A / D input port 18 pin of the chip MC145481. The voice signal is inside the voice PCM encoding and decoding chip MC145481, which mainly completes the digital-to-analog conversion and reconstruction of the voice, as well as the A-law encoding and decoding of PCM. The processed required voice signal is output from the D / A voice output port 2 pin of the chip MC145481. This analog audio signal is amplified by F1558 and sent to the bus.

[0034] like Figure 5 The figure shows the power supply principle diagram of the digital part of the chip performance test unit, which shows the power supply principle of the digital part. The DC-DC power supply module converts the external 28V DC power supply into an 8V DC power supply, and then passes through the two low-voltage difference and low quiescent current linear regulators of MAX604 to generate two 3.3V DC power supplies for the microprocessor circuit, transceiver conversion circuit, bus interface circuit and voice digitization circuit. The MAX604 low quiescent current linear regulator adopts a 1.8W SO package and can provide more than 5V and 3.3V output for currents up to 500mA. After the 3.3V is filtered by current limiting, it is sent to the digital part of the chip performance test unit where 3.3V is required.

[0035] Figure 6 This is a schematic diagram of the analog part of the chip performance test unit, showing that the analog signal completes the transmission process of the analog signal through the input of the noise reduction and the output of the mixing and amplification module. The voice analog signal is first sent to the 4th pin of the active anti-noise controller DNR-3A for anti-noise processing and amplification. The DNR-3A anti-noise controller is a DNR circuit, that is, a dynamic noise reduction circuit, developed by China Agricultural University. The mixing circuit module XAFH-HF1 is a device that completes the audio power amplification function and is an analog circuit. The analog signal output by the D / A circuit of the bus is sent to the 4th pin of the mixing circuit module XAFH-HF1. After power amplification, it is output through the 8th pin of the mixing circuit module XAFH-HF1 to the external interface to provide a port for driving headphones and car mobile phones. The mixing circuit module XAFH-HF1 can generate a DC 8V power supply for other circuits.

[0036] Figure 7 This is the principle diagram of the mixing and amplifier circuit module XAFH-HF1 of the chip performance test unit, showing the principle of the internal audio amplifier circuit of the mixing and amplifier circuit module XAFH-HF1. The 12V and 15V DC power supplies output by the mixing and amplifier circuit module are directly used by the analog operational amplifier.

[0037] The working principle of a test device for a serial port interface chip provided by the utility model is as follows:

[0038] The IC conversion seat 14 is a fixing device for the chip under test, which is convenient to take and put and has a long service life. The chip under test can be connected to the circuit loop used without being welded to realize the transmission and exchange of data or signals. The IC adapter board 5 is a unit board for welding the IC conversion seat 14. The power switch 6 adopts a double-pole double-position button switch, which is the main path for controlling the power supply of the test device of the serial interface chip. The power indicator light 7 is used to indicate the on and off of the power supply of the test device of the serial interface chip. The ammeter 16 is used to monitor the working current of the SP3485 chip. The power switch 6 , the power indicator light 7, the ammeter 16 and the chip positioning module 2 are fastened to the panel module 3 by screwing, the shock absorbing pad 10 is composed of four rubber pads with gaskets, the power supply socket 11 is a three-core connector, the power protection circuit 12 adopts a fast fuse with a seat, the chip performance test unit 8 is a self-made circuit unit with a test function, the power module 13 is a switching power supply that converts DC 28V to DC 12V, DC 5V, and DC 3.3V, and the chip performance test unit 8, the shock absorbing pad 10, the power supply socket 11, the power protection circuit 12, and the power module 13 are all screwed on the shell 9.

[0039] Compared with the related art, the test device for a serial port interface chip provided by the utility model has the following beneficial effects:

[0040] The maximum power consumption of the test chip in the actual application circuit can be intuitively observed, and the chips whose power consumption does not meet the application requirements can be eliminated in advance, and the chips whose power consumption meets the application requirements can be screened out, thus avoiding the random burning problem caused by power consumption not meeting the requirements during mass production, greatly improving production efficiency and reducing maintenance costs.

[0041] The above description is only an embodiment of the present invention, and does not limit the patent scope of the present invention. Any equivalent structure or equivalent process transformation made by using the contents of the specification and drawings of the present invention, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the present invention.

Claims

1. A test device for a serial port interface chip, characterized in that: include: A chip positioning module, the chip positioning module comprising an IC conversion seat and an IC adapter board, the input end of the IC adapter board being electrically connected to the output end of the IC conversion seat; A panel module, the panel module comprising a panel, a power switch, a power indicator light and a current board, the input end of the panel is electrically connected to the output end of the IC adapter board, and the output end of the power switch is electrically connected to the input end of the IC adapter board; A shell module, the shell module includes a chip performance test unit, a shell, a shock-absorbing pad, a power supply socket, a power protection circuit and a power module, the chip performance test unit and the IC adapter board are electrically connected to each other, the input end of the power protection circuit is electrically connected to the input end of the power protection circuit, the input end of the power module is electrically connected to the output end of the power protection circuit, and the output end of the power module is electrically connected to the input end of the chip performance test unit and the input end of the power switch, respectively.

2. A test device for a serial port interface chip according to claim 1, characterized in that: The power protection circuit, the power module, the chip performance test unit and the shock-absorbing pad are all arranged on the inner side of the shell.

3. The test device for a serial port interface chip according to claim 1, characterized in that: The output end of the power switch is also electrically connected to the power indicator light, the ammeter and the input end of the panel respectively.

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