Photovoltaic optimizer adopting synchronous rectification bypass circuit
By adopting a synchronous rectified bypass circuit in the photovoltaic optimizer, the trigger module and the conduction module are used to achieve rapid conduction between the photovoltaic panels, solving the problem of excessive loss of bypass circuits in the prior art and achieving a lower Loss and higher safety.
Patent Information
- Application Number
- CN202421182805.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-05-28
- Publication Date
- 2025-02-18
- Estimated Expiration
- 2034-05-28
AI Technical Summary
The bypass circuit of existing photovoltaic optimizers consumes too much during high current, which can easily cause the optimizer to burn or damage the photovoltaic panel.
The synchronous rectifier bypass circuit is adopted to achieve rapid conduction between the photovoltaic panels through the trigger module and the conduction module, reduce losses, and overvoltage protection is carried out through transient voltage suppression diodes and resistors.
It effectively reduces the loss and temperature rise when the bypass circuit is turned on, avoids damage to the photovoltaic optimizer and photovoltaic panel, and ensures the normal operation of the photovoltaic string network.
Smart Images
Figure CN222508804U_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of photovoltaic power generation, and in particular to a photovoltaic optimizer using a synchronous rectification bypass circuit. Background Art
[0002] With the rise of the photovoltaic new energy industry, how to improve the efficiency of photovoltaic power generation has become one of the key factors in reducing the cost of use and increasing the coverage rate. At present, the inverters used with photovoltaic panels are divided into the following types: centralized inverters, string inverters, and micro inverters. Micro inverters have high power generation efficiency, but the cost is high, which will make the cost unbearable when used in large-scale power generation areas; while centralized inverters and string inverters are lower in cost than micro inverters, but have low power generation efficiency. The MPPT (maximum power point tracking) they have is aimed at two or more strings of photovoltaic panels. If one or more photovoltaic panels have insufficient power generation capacity due to external factors such as dust, tree shading, and self-quality problems, it will affect the power generation efficiency of the entire string of photovoltaic panels. At this time, a photovoltaic optimizer is needed. The photovoltaic optimizer is connected under each photovoltaic panel to control the voltage and current of each photovoltaic panel so that it works at the maximum power point. After being connected in series, it is connected to the inverter to maximize the final total output power.
[0003] When designing a photovoltaic optimizer, a bypass circuit is often required so that when a failure occurs in the main circuit of the photovoltaic optimizer, the current of the DC main circuit can pass through the bypass, so that when a photovoltaic optimizer fails, the remaining photovoltaic panels can work normally. Conventional bypass circuits usually use diodes, taking advantage of the forward conduction and reverse non-conduction characteristics of the diode. Since the VF drop value of Schottky diodes is lower than that of other diodes, Schottky diodes are generally used. The forward conduction voltage drop VF of Schottky diodes is roughly 0.8-1V. When working at a large current (20A), its own loss will reach 30-40W, and in severe cases, the optimizer will burn out. Utility Model Content
[0004] In order to improve the problem of excessive loss of the bypass circuit when operating at a high current, the present application provides a photovoltaic optimizer using a synchronous rectification bypass circuit.
[0005] The present application provides a photovoltaic optimizer using a synchronous rectification bypass circuit, which adopts the following technical solution:
[0006] A photovoltaic optimizer using a synchronous rectification bypass circuit comprises a photovoltaic optimizer and a bypass circuit, wherein the photovoltaic optimizer is connected in series to a photovoltaic panel to perform MPPT tracking on the photovoltaic panel, and the bypass circuit is connected in series to the photovoltaic panel and is used to conduct the series connection of adjacent photovoltaic panels when the photovoltaic optimizer fails;
[0007] The bypass circuit comprises:
[0008] A trigger module, the trigger module is used to detect the on / off of the photovoltaic optimizer and output a corresponding control signal;
[0009] The conduction module receives the control signal and is controlled by the on / off of the trigger module. When conducting, it is used to connect adjacent photovoltaic panels in series.
[0010] By adopting the above technical solution, when the trigger module acts as a switch, the conduction module with smaller resistance and lower loss is turned on, so that the previous photovoltaic panel and the next photovoltaic panel are directly turned on when the photovoltaic optimizer of the current photovoltaic panel fails, thereby reducing the output power of other photovoltaic panels affected by the current photovoltaic panel being directly connected to the photovoltaic string network when the photovoltaic optimizer fails. The trigger module acts as a switch, which greatly reduces the loss caused by the conduction of the conduction module, reduces the probability of excessive loss and excessive temperature rise, thereby causing the photovoltaic optimizer to burn out, and even damaging the photovoltaic panel.
[0011] Optionally, the trigger module includes a MOS tube Q2, the photovoltaic optimizer outputs a VGS voltage to the gate of the MOS tube Q2, the drain of the MOS tube Q2 is electrically connected to the positive electrode of the photovoltaic panel, and the source of the MOS tube Q2 is electrically connected to the negative electrode of an adjacent photovoltaic panel.
[0012] By adopting the above technical solution, the MOS tube Q2 acts as a switch, so that when a problem occurs in the photovoltaic optimizer, the photovoltaic panel can be quickly disconnected from the photovoltaic string network, thereby ensuring the normal operation of the photovoltaic string network.
[0013] Optionally, the trigger module includes a diode D1, the anode of the diode D1 is electrically connected to the cathode of the current photovoltaic panel, the cathode of the current photovoltaic panel is electrically connected to the anode of an adjacent photovoltaic panel, and the cathode of the diode D1 is electrically connected to the source of the MOS tube Q2.
[0014] By adopting the above technical solution, the previous photovoltaic panel and the next photovoltaic panel are directly connected in series through the diode D1, bypassing the current photovoltaic panel, so that after the current photovoltaic panel is disconnected from the photovoltaic string network, the remaining photovoltaic panels can work normally and react quickly, thereby achieving the purpose of temporary conduction, reducing the time required to replace the line when disconnecting the current photovoltaic panel from the photovoltaic string network and causing the circuit breaker, and reducing the impact on the normal operation of other photovoltaic panels.
[0015] Optionally, the trigger module includes a chip U1, a sixth pin VD of the chip U1 is electrically connected to the cathode of the diode D1, and detects whether the diode D1 is turned on. The chip U1 controls the high and low levels of the fifth pin GATE according to the high and low levels of the sixth pin VD, thereby outputting a corresponding control signal.
[0016] By adopting the above technical solution, the conduction voltage of the diode D1 is detected through the sixth pin VD of the chip U1. If the conduction voltage is detected, it means that the photovoltaic optimizer of the current photovoltaic panel fails and the diode D1 is temporarily turned on, thereby controlling the conduction module to be turned on through the fifth pin GATE.
[0017] Optionally, the conduction module includes a MOS tube Q1, the source of the MOS tube Q1 is electrically connected to the anode of the diode D1, the drain of the MOS tube Q1 is electrically connected to the cathode of the diode D1, and the gate of the MOS tube Q1 receives the control signal to control the on-off between the source and the drain of the MOS tube Q1.
[0018] By adopting the above technical solution, the gate of the MOS tube Q1 is controlled to conduct from the source to the drain of the MOS tube Q1, and the current flows from the source to the drain of the MOS tube Q1. This conduction direction makes the loss of the MOS tube Q1 much lower than that of the diode D1. At this time, most of the current of the previous photovoltaic panel and the next photovoltaic panel will flow through the MOS tube Q1, which greatly reduces the loss during conduction, achieves the purpose of long-term bypass circuit conduction, and does not generate excessive temperature rise, thereby playing a protective role.
[0019] Optionally, the bypass circuit also includes a transient voltage suppression diode TVS1, which is used to protect the diode D1 and the MOS tube Q1 from overvoltage, and the anode of the transient voltage suppression diode TVS1 is connected in parallel to the anode of the diode D1, and the cathode of the transient voltage suppression diode TVS1 is connected in parallel to the cathode of the diode D1.
[0020] By adopting the above technical solution, the diode D1 and the MOS tube Q1 are protected from overvoltage by the transient voltage suppression diode TVS1, that is, when the voltage is too large, the transient voltage suppression diode TVS1 is turned on to reduce the voltage on the diode D1 and the MOS tube Q1, thereby playing a protective role.
[0021] Optionally, the bypass circuit further includes a resistor R2, which is connected in parallel to the positive electrode and the negative electrode of the diode D1, and is used to release the residual voltage.
[0022] By adopting the above technical solution, when the photovoltaic panel circuit stops working, the residual voltage in the circuit is released through the resistor R2, thereby playing a protective role.
[0023] Optionally, the bypass circuit further includes a resistor R1, and the resistor R1 is electrically connected between the fifth pin of the chip U1 and the negative electrode of the photovoltaic panel.
[0024] By adopting the above technical solution, the resistor R1 plays a protective role.
[0025] In summary, the present application includes at least one of the following beneficial technical effects:
[0026] 1. The trigger module acts as a switch, which greatly reduces the loss caused by the conduction of the conduction module, and reduces the probability of excessive loss and temperature rise, which may cause the photovoltaic optimizer to burn out or even damage the photovoltaic panel.
[0027] 2. The current flows from the source to the drain of the MOS tube Q1. This conduction direction greatly reduces the loss during conduction, achieves the purpose of long-term bypass circuit conduction, and does not produce excessive temperature rise, thus playing a protective role. BRIEF DESCRIPTION OF THE DRAWINGS
[0028] Figure 1 It is a schematic diagram of an overall module of a photovoltaic optimizer using a synchronous rectification bypass circuit in an embodiment of the present application.
[0029] Figure 2 is a circuit schematic highlighting the bypass circuit.
[0030] Explanation of the accompanying drawings: 1. Photovoltaic optimizer; 2. Bypass circuit; 3. Trigger module; 4. Conducting module. DETAILED DESCRIPTION
[0031] The following is combined with Figure 1-2 This application is described in further detail.
[0032] The embodiment of the present application discloses a photovoltaic optimizer using a synchronous rectification bypass circuit. Figure 1 The photovoltaic optimizer using the synchronous rectification bypass circuit includes a photovoltaic optimizer 1 and a bypass circuit 2. The negative pole of the photovoltaic panel is connected in series with the positive pole of the previous photovoltaic panel, and the positive pole of the photovoltaic panel is connected in series with the negative pole of the next photovoltaic panel. The photovoltaic optimizer 1 is connected in series with the photovoltaic panel to perform MPPT tracking on the photovoltaic panel. The bypass circuit 2 is connected in series between the positive and negative poles of the photovoltaic panel output, and is used to be turned on when the photovoltaic optimizer 1 fails, so that the two adjacent photovoltaic panels of the current photovoltaic panel are connected in series.
[0033] Reference Figure 1 and Figure 2The bypass circuit 2 includes a trigger module 3, a conduction module 4, a transient voltage suppression diode TVS1, and a resistor R2. The trigger module 3 includes a MOS tube Q1, a MOS tube Q2, a diode D1, a resistor R3, a resistor R1, a capacitor C1, and a chip U1. The photovoltaic optimizer 1 outputs a VGS voltage to the gate of the MOS tube Q2. The drain of the MOS tube Q2 is electrically connected to the positive electrode of the photovoltaic panel, and the source of the MOS tube Q2 is electrically connected to the negative electrode of the next photovoltaic panel; the positive electrode of the diode D1 is connected in parallel between the negative electrode of the photovoltaic panel and the positive electrode of the previous photovoltaic panel, and the negative electrode of the diode D1 is connected in parallel between the source of the MOS tube Q2 and the negative electrode of the next photovoltaic panel; the source of the MOS tube Q1 is electrically connected to the negative electrode of the photovoltaic panel, and the drain of the MOS tube Q1 is connected in parallel to the source of the MOS tube Q2. The sixth pin VD of the chip U1 is electrically connected between the negative electrode of the diode D1 and the drain of the MOS tube Q1. The sixth pin VD of the chip U1 is used to detect whether the diode D1 is turned on. The chip U1 controls the fifth pin GATE to output the corresponding high and low levels as the control signal according to the high and low levels of the sixth pin VD. The fifth pin GATE of the chip U1 is electrically connected to the gate of the MOS tube Q1 to control the on and off between the source and drain of the MOS tube Q1; one end of the resistor R1 is electrically connected between the gate of the MOS tube Q1 and the fifth pin GATE of the chip U1, and the other end of the resistor R1 is connected in parallel between the negative electrode of the photovoltaic panel and the second pin GND of the chip U1; one end of the capacitor C1 is electrically connected to the fourth pin VCC of the chip U1, and the other end of the capacitor C1 is connected in parallel between the resistor R1 and the second pin GND of the chip U1; one end of the resistor R3 is connected in parallel between the drain of the MOS tube Q1 and the negative electrode of the diode D1, and the other end of the resistor R3 is electrically connected between the sixth pin VD of the chip U1. In this embodiment, the MOS tube Q1 and the MOS tube Q1 can adopt the CRSS043 model, and the chip U1 can adopt the RM3450TH model.
[0034] Reference Figure 2 The positive electrode of the transient voltage suppression diode TVS1 is connected in parallel to the negative electrode of the photovoltaic panel, and the negative electrode of the transient voltage suppression diode TVS1 is connected in parallel to the source electrode of the MOS tube Q2. In this embodiment, the transient voltage suppression diode TVS1 can adopt the SMBJ120CA model to provide overvoltage protection for the diode D1 and the MOS tube Q1.
[0035] Reference Figure 2 One end of the resistor R2 is connected in parallel to the negative electrode of the photovoltaic panel, and the other end of the resistor R2 is connected in parallel to the source of the MOS tube Q2. The resistor R2 is used to release the residual voltage in the circuit when the photovoltaic panel is cut off and stops working.
[0036] The implementation principle of a photovoltaic optimizer using a synchronous rectification bypass circuit in an embodiment of the present application is as follows: when the photovoltaic optimizer 1 is working normally, the positive current of the previous photovoltaic panel flows into the negative electrode of the photovoltaic panel, and the positive current of the photovoltaic panel flows into the drain of the MOS tube Q2. At this time, the photovoltaic optimizer 1 is working normally to provide a VGS voltage to the gate of the MOS tube Q2, and the drain and source of the MOS tube Q2 are connected, and the current flows into the negative electrode of the next photovoltaic panel; if the photovoltaic optimizer 1 is disconnected after a fault, at this time, the gate of the MOS tube Q2 loses the VGS voltage, the source and drain of the MOS tube Q2 are disconnected, the photovoltaic panel is disconnected, and the positive electrode of the previous photovoltaic panel is connected to the photovoltaic The negative electrodes of the panels are not conducting, the positive current of the previous photovoltaic panel will be forward-conducted through the diode D1 and directly flow to the negative electrode of the next photovoltaic panel. The sixth pin VD of the chip U1 collects the conduction voltage of the diode D1 from the negative electrode through the resistor R3, and the fifth pin GATE of the chip U1 outputs the corresponding level to the gate of the MOS tube Q1, so that the source to the drain of the MOS tube Q1 is conducting. At this time, since the conduction voltage drop from the source to the drain of the MOS tube Q1 is less than the conduction voltage drop of the diode D1, most of the current of the positive electrode of the previous photovoltaic panel will flow from the source to the drain of the MOS tube Q1 to the negative electrode of the next photovoltaic panel.
[0037] The above are all preferred embodiments of the present application, and the protection scope of the present application is not limited thereto. Therefore, any equivalent changes made according to the structure, shape, and principle of the present application should be included in the protection scope of the present application.
Claims
1. A photovoltaic optimizer using a synchronous rectification bypass circuit, characterized in that: It comprises a photovoltaic optimizer (1) and a bypass circuit (2), wherein the photovoltaic optimizer (1) is connected in series to a photovoltaic panel to perform MPPT tracking on the photovoltaic panel, and the bypass circuit (2) is connected in series to the photovoltaic panel and is used to conduct the series connection of adjacent photovoltaic panels when the photovoltaic optimizer (1) fails; The bypass circuit (2) comprises: A trigger module (3), the trigger module (3) being used to detect whether the photovoltaic optimizer (1) is on or off and output a corresponding control signal; The conduction module (4) receives the control signal and is controlled by the on / off of the trigger module (3), and is used to connect adjacent photovoltaic panels in series when conducting.
2. A photovoltaic optimizer using a synchronous rectification bypass circuit according to claim 1, characterized in that: The trigger module (3) comprises a MOS tube Q2, the photovoltaic optimizer (1) outputs a VGS voltage to the gate of the MOS tube Q2, the drain of the MOS tube Q2 is electrically connected to the positive electrode of the photovoltaic panel, and the source of the MOS tube Q2 is electrically connected to the negative electrode of an adjacent photovoltaic panel.
3. A photovoltaic optimizer using a synchronous rectification bypass circuit according to claim 2, characterized in that: The trigger module (3) comprises a diode D1, the positive electrode of the diode D1 is electrically connected to the negative electrode of the current photovoltaic panel, the negative electrode of the current photovoltaic panel is electrically connected to the positive electrode of the adjacent photovoltaic panel, and the negative electrode of the diode D1 is electrically connected to the source electrode of the MOS tube Q2.
4. A photovoltaic optimizer using a synchronous rectification bypass circuit according to claim 3, characterized in that: The trigger module (3) comprises a chip U1, a sixth pin VD of the chip U1 being electrically connected to the cathode of the diode D1 to detect whether the diode D1 is turned on. The chip U1 controls the high and low levels of the fifth pin GATE according to the high and low levels of the sixth pin VD, thereby outputting a corresponding control signal.
5. The photovoltaic optimizer using a synchronous rectification bypass circuit according to claim 3, characterized in that: The conduction module (4) comprises a MOS tube Q1, the source of the MOS tube Q1 is electrically connected to the positive electrode of the diode D1, the drain of the MOS tube Q1 is electrically connected to the negative electrode of the diode D1, and the gate of the MOS tube Q1 receives the control signal to control the on-off between the source and the drain of the MOS tube Q1.
6. A photovoltaic optimizer using a synchronous rectification bypass circuit according to claim 5, characterized in that: The bypass circuit (2) further comprises a transient voltage suppression diode TVS1, wherein the transient voltage suppression diode TVS1 is used to provide overvoltage protection for the diode D1 and the MOS tube Q1, wherein the anode of the transient voltage suppression diode TVS1 is connected in parallel to the anode of the diode D1, and the cathode of the transient voltage suppression diode TVS1 is connected in parallel to the cathode of the diode D1.
7. A photovoltaic optimizer using a synchronous rectification bypass circuit according to claim 3, characterized in that: The bypass circuit (2) further comprises a resistor R2, wherein the resistor R2 is connected in parallel to the positive electrode and the negative electrode of the diode D1, and the resistor R2 is used to release the residual voltage.
8. A photovoltaic optimizer using a synchronous rectification bypass circuit according to claim 4, characterized in that: The bypass circuit (2) further comprises a resistor R1, wherein the resistor R1 is electrically connected between the fifth pin of the chip U1 and the negative electrode of the photovoltaic panel.