Chip control circuit and power supply circuit

Abstract

The utility model discloses a chip control circuit and a power supply circuit. The chip control circuit comprises a first switch module and a second switch module, the control end of the first switch module is switched on in response to first voltage output by the bus capacitor bank, and voltage output by a power supply pin of the control chip is discharged through the first switch module; the control end of the second switch module is switched on in response to second voltage output by the bus capacitor bank, the voltage of the control end of the first switch module is pulled down to a reference voltage value, the first switch module is switched off, and the voltage output by the power supply pin of the control chip charges the power supply capacitor; wherein the first voltage is the voltage of the first voltage interval, the second voltage is the voltage of the second voltage interval, and the minimum value of the second voltage interval is larger than the maximum value of the first voltage interval. According to the embodiment of the invention, the monotonicity of the output voltage of the control chip can be improved.

Description

Technical Field

[0001] The present application belongs to the technical field of electronic circuits, and in particular, relates to a chip control circuit and a power supply circuit. Background Art

[0002] In the power supply circuit, the control chip is often required to start first, and the power supply circuit connected to it starts working based on the control chip control. When the control chip is not started, the HV pin inside the control chip will charge the power capacitor connected to the power pin (VCC). After the control chip is started, the voltage value of the power pin (VCC) may be pulled down due to excessive power load, causing the control chip to need to be restarted, making the voltage output by the control chip power pin (VCC) non-monotonic. Utility Model Content

[0003] The embodiments of the present application provide a chip control circuit and a power supply circuit, which can keep the power supply pin of the control chip at a low level when the control chip is not started.

[0004] In a first aspect, an embodiment of the present application provides a chip control circuit, including:

[0005] A first switch module, wherein a control end of the first switch module is electrically connected to the bus capacitor group, a first end of the first switch module is electrically connected to a power pin of the control chip, and a second end of the first switch module is electrically connected to a reference voltage end;

[0006] A second switch module, wherein a control end of the second switch module is electrically connected to the bus capacitor group, a first end of the second switch module is electrically connected to the control end of the first switch module, and a second end of the second switch module is electrically connected to the reference voltage end;

[0007] The control end of the first switch module is turned on in response to the first voltage output by the bus capacitor group, and the voltage output by the power pin of the control chip is discharged through the first switch module;

[0008] The control end of the second switch module is turned on in response to the second voltage output by the bus capacitor group, the voltage of the control end of the first switch module is pulled down to the reference voltage value, the first switch module is turned off, and the voltage output by the power pin of the control chip charges the power capacitor;

[0009] The first voltage is a voltage in a first voltage interval, the second voltage is a voltage in a second voltage interval, and a minimum value of the second voltage interval is greater than a maximum value of the first voltage interval.

[0010] In a second aspect, an embodiment of the present application provides a power supply circuit, including:

[0011] A control chip, wherein a control pin of the control chip is electrically connected to the bus capacitor group;

[0012] A power supply capacitor, wherein a first end of the power supply capacitor is electrically connected to a power supply pin of the control chip, and a second end of the power supply capacitor is electrically connected to a reference power supply terminal;

[0013] As shown in the chip control circuit of the first aspect, the chip control circuit is electrically connected to the power pin of the control chip.

[0014] The chip control circuit and power supply circuit provided in the embodiment of the present application, the chip control circuit includes a chip control circuit of a first switch module and a second switch module, by which when the voltage of the bus capacitor group is in the first voltage interval, the control end of the first switch module is turned on in response to the voltage output by the bus capacitor group, and the voltage at the power pin of the control chip is discharged through the first switch module, so that the power output by the power pin of the control chip cannot charge the power capacitor, and the chip is prohibited from starting, thereby avoiding the situation in the prior art that the control chip is started when the voltage of the bus capacitor group is low, resulting in a non-monotonic output voltage of the control chip; at the same time, when the voltage of the bus capacitor group is in the second voltage interval, the control end of the second switch module is turned on in response to the voltage of the bus capacitor group, and the voltage of the control end of the first switch module is pulled down to the reference voltage value, the first switch module is turned off, and the voltage output by the power pin of the control chip charges the power capacitor, so that when the control chip starts, the voltage output by the power pin of the control chip charges the power capacitor, thereby realizing normal use of the control chip. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] In order to more clearly illustrate the technical solution of the embodiments of the present application, the following is a brief introduction to the drawings required for use in the embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0016] Figure 1 A schematic diagram of a power supply circuit provided for some embodiments of the present application.

[0017] Figure 2 Another power supply circuit schematic diagram provided for some embodiments of the present application.

[0018] Figure 3 A schematic diagram of a chip control circuit provided for some embodiments of the present application.

[0019] Figure 4 Another chip control circuit schematic diagram provided for some embodiments of the present application.

[0020] Figure 5 A further chip control circuit schematic diagram is provided for some embodiments of the present application. DETAILED DESCRIPTION

[0021] The features and exemplary embodiments of various aspects of the present application will be described in detail below. In order to make the purpose, technical solutions and advantages of the present application clearer, the present application will be further described in detail below in conjunction with the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are only intended to explain the present application, rather than to limit the present application. For those skilled in the art, the present application can be implemented without the need for some of these specific details. The following description of the embodiments is only to provide a better understanding of the present application by illustrating the examples of the present application.

[0022] It should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the statement "include..." do not exclude the existence of other identical elements in the process, method, article or device including the elements.

[0023] At present, in the power supply system, the monotonicity of the output voltage is an indicator to measure the stability of the power supply. If the output voltage is not monotonic, it may cause the subsequent circuit to start repeatedly, which may cause timing confusion and damage the subsequent circuit.

[0024] like Figure 1 As shown, in the current power supply circuit, a control chip 101 and a power supply capacitor 102 are often included, wherein the control chip 101 is electrically connected to the bus capacitor group 100, the bus capacitor group includes at least one bus capacitor, the first end of the power supply capacitor 102 is electrically connected to the power pin of the control chip, and the second end of the power supply capacitor is electrically connected to the reference power supply terminal GND.

[0025] In such Figure 1 In the power supply circuit shown, when the control chip is not started, the voltage output by the HV pin inside the control chip will charge the power capacitor to increase the voltage of the chip power pin (VCC). After the voltage of the HV pin and the voltage of the VCC pin increase to a preset threshold, the control chip will start. After the control chip is started, when the bus voltage does not reach a predetermined voltage, the voltage of the chip power pin (VCC) may be pulled down due to a high-power load, resulting in a problem of non-monotonic output voltage. Based on this, the embodiment of the present application provides a chip control circuit and a power supply circuit that can solve the above problems. Below, the chip control circuit and the power supply circuit provided in the embodiment of the present application are described in detail.

[0026] In some embodiments, Figure 2 As shown, an embodiment of the present application provides a power supply circuit, including:

[0027] A control chip 201, wherein a control pin HV of the control chip 201 is electrically connected to the bus capacitor group 200;

[0028] A power supply capacitor C, wherein a first end of the power supply capacitor C is electrically connected to a power supply pin VCC of the control chip 201, and a second end of the power supply capacitor C is electrically connected to a reference power supply terminal GND;

[0029] The chip control circuit 202 is electrically connected to the power pin VCC of the control chip 201 .

[0030] Based on the chip control circuit, when the bus voltage reaches the preset voltage, the level of the power pin VCC of the control chip is kept at a low level, and the control chip is prohibited from starting, so as to avoid the situation where the output voltage is not monotonic due to the control chip starting at a low bus voltage when a high-power load is connected.

[0031] In some embodiments, Figure 3 As shown, the embodiment of the present application provides a chip control circuit 202, including:

[0032] A first switch module Q1, wherein a control end of the first switch module Q1 is electrically connected to a bus capacitor group,

[0033] A first end of the first switch module Q1 is electrically connected to a power pin VCC of the control chip, and a second end of the first switch module Q1 is electrically connected to a reference voltage terminal GND;

[0034] A second switch module Q2, wherein a control end of the second switch module Q2 is electrically connected to the bus capacitor group, a first end of the second switch module Q2 is electrically connected to the control end of the first switch module Q1, and a second end of the second switch module Q2 is electrically connected to the reference voltage end GND;

[0035] The control end of the first switch module Q1 is turned on in response to the first voltage output by the bus capacitor group, and the voltage output by the power pin of the control chip is discharged through the first switch module;

[0036] The control end of the second switch module Q2 is turned on in response to the second voltage output by the bus capacitor group.

[0037] The voltage at the control end of the first switch module Q1 is pulled down to the reference voltage value, the first switch module Q1 is turned off, and the voltage output by the power pin VCC of the control chip charges the power capacitor;

[0038] The first voltage is a voltage in a first voltage interval, the second voltage is a voltage in a second voltage interval, and a minimum value of the second voltage interval is greater than a maximum value of the first voltage interval.

[0039] Here, when the control chip is not started, the voltage of the bus capacitor group is in a continuously rising state. When the bus voltage is in the first voltage interval, the control end of the first switch module Q1 responds to receiving the first voltage in the first voltage interval, controls the first switch module Q1 to be turned on, and the voltage output by the VCC pin of the control chip is discharged through the first end, the second end and the reference voltage end of the first switch module Q1. The VCC pin of the control chip will maintain a low level, and the voltage output by the VCC pin of the control chip cannot charge the power capacitor C.

[0040] In response to receiving the second voltage in the second voltage interval, the control end of the second switch module Q2 controls the second switch module Q2 to be turned on, the voltage at the control end of the first switch module Q1 is pulled down to the reference voltage value, the first switch module Q1 is turned off, and the voltage output by the power pin VCC of the control chip charges the power capacitor. Here, when the voltage received by the red paper pin HV of the control chip is greater than the first threshold value and the voltage value stored in the power capacitor C is greater than the second threshold value, the control chip will start and control the power supply circuit connected to it to work.

[0041] In some examples, the control chip may be a NCP1342 chip.

[0042] When the voltage of the bus capacitor group in the embodiment of the present application is in the first voltage interval, the power output from the power pin VCC of the control chip cannot charge the power capacitor C based on the first switch module, so as to avoid the situation that the voltage of the chip power pin VCC is pulled down and the output is not monotonic due to excessive load power after the control chip is started when the voltage of the bus capacitor group is relatively low; at the same time, when the voltage of the bus capacitor group is in the second voltage interval, the first switch module is controlled to be turned off based on the second switch module, so that the voltage output from the power pin of the control chip charges the power capacitor, so that when the control chip is started, the voltage output from the power pin of the control chip charges the power capacitor, so as to realize the normal use of the control chip. It can be imagined that after the control chip is started, the voltage output from the power pin VCC of the control chip will remain monotonic, and the voltage output by the power supply circuit connected to the VCC pin of the control chip will also remain monotonic.

[0043] In some embodiments, Figure 4As shown, the first switch module may include a first MOS tube, the control end of the first switch module is the gate of the first MOS tube, the first end of the first switch module is the drain of the first MOS tube, and the second end of the first switch module is the source of the first MOS tube; the second switch module may include a second MOS tube, the control end of the second switch module is the gate of the second MOS tube, the first end of the second switch module is the drain of the second MOS tube, and the second end of the second switch module is the source of the second MOS tube.

[0044] Here, setting the first switch module and the second switch module as MOS tubes can reduce the cost of the chip control circuit, so that the chip control circuit can flexibly control the charging of the power supply capacitor from the power pin VCC of the control chip at a low cost.

[0045] In some embodiments, Figure 4 As shown, the chip control circuit also includes a first resistor R1;

[0046] A first end of the first resistor R1 is electrically connected to a power pin VCC of the control chip, and a second end of the first resistor R1 is electrically connected to a first end of the first switch module Q1.

[0047] Here, when the current passing through the first switch module Q1 is too large, the first switch module Q1 may be burned out. A first resistor R1 may be set between the control chip power pin VCC and the first end of the first switch module Q1 to protect the first switch module Q1.

[0048] In some embodiments, Figure 4 As shown, the chip control circuit further includes a first voltage dividing branch 401, the first voltage dividing branch 401 is electrically connected to the bus capacitor group, and the control end of the first switch module is electrically connected to the first voltage dividing node in the first voltage dividing branch.

[0049] Here, a first voltage dividing branch may be provided, and a first voltage dividing node may be provided in the first voltage dividing branch, and the voltage output by the bus capacitor group is divided based on the first voltage dividing branch, so as to protect the first switch module Q1.

[0050] In some embodiments, Figure 4 As shown, the chip control circuit also includes a second voltage-dividing branch 402, the second voltage-dividing branch 402 is electrically connected to the bus capacitor group, and the control end of the second switch module Q2 is electrically connected to the second voltage-dividing node in the second voltage-dividing branch; the voltage of the second voltage-dividing node is less than the voltage of the first voltage-dividing node. The voltage output by the bus capacitor group can be divided based on the second voltage-dividing branch 401 to protect the second switch module Q2. At the same time, the voltage of the second voltage-dividing node can be set to be less than the voltage of the first voltage-dividing node, so that when the control chip is not started, the first switch module is turned on first and the second switch module is turned on later.

[0051] In some embodiments, Figure 4 As shown, the busbar capacitor group 200 includes a first busbar 403 and a second busbar 404, the voltage of the first busbar 403 is greater than the voltage of the second busbar 404, the second busbar 404 is electrically connected to the reference voltage terminal, and the first voltage dividing branch 401 includes a second resistor R2 and a third resistor R3;

[0052] The first end of the second resistor R2 is electrically connected to the first bus 403, the second end of the second resistor R2 is electrically connected to the first end of the third resistor R3, and the second end of the third resistor R3 is electrically connected to the second bus 404, wherein the first voltage dividing node is set between the second end of the second resistor and the first end of the third resistor.

[0053] By setting a second resistor and a third resistor in the first voltage-dividing branch and setting the first voltage-dividing node between the second resistor and the third resistor, it is possible to control the voltage received by the control end of the first switch module Q1 based on the resistance values ​​of the second resistor and the third resistor, so that the first switch module Q1 is turned on first when the control chip is not started.

[0054] In some embodiments, Figure 4 As shown, the second voltage dividing branch includes a fourth resistor R4 and a fifth resistor R5;

[0055] The first end of the fourth resistor R4 is electrically connected to the first bus, the second end of the fourth resistor R4 is electrically connected to the first end of the fifth resistor R5, and the second end of the fifth resistor R5 is electrically connected to the second bus, wherein the second voltage dividing node is set between the second end of the fourth resistor R4 and the first end of the fifth resistor R5.

[0056] By setting a fourth resistor and a fifth resistor in the second voltage-dividing branch and setting the second voltage-dividing node between the fourth resistor and the fifth resistor, it is possible to control the voltage received by the control end of the second switch module Q2 based on the resistance values ​​of the fourth resistor and the fifth resistor, and to control the first switch module Q1 to be turned off based on the second switch module Q2, so that the control chip can start normally.

[0057] In some embodiments, the resistance values ​​of the second resistor R2, the third resistor R3, the fourth resistor R4 and the fifth resistor R5 satisfy the following expression:

[0058]

[0059] Among them, R2 is the second resistor, R3 is the third resistor, R4 is the fourth resistor, and R5 is the fifth resistor.

[0060] By setting the resistance values ​​of the second resistor R2, the third resistor R3, the fourth resistor R4 and the fifth resistor R5 based on the above expression, it is possible to control the first switch module to be turned on first based on the first voltage-dividing node between the second resistor R2 and the third resistor R3 in a low-cost chip control circuit, so that the power output from the power pin of the control chip cannot charge the power capacitor, and at the same time control the second switch module to be turned on based on the second voltage-dividing node between the fourth resistor R4 and the fifth resistor R5, so as to control the first switch module to be turned off based on the conduction of the second switch module, so that the voltage output from the power pin of the control chip charges the power capacitor, thereby realizing normal use of the control chip.

[0061] In some embodiments, the bus capacitor bank further includes a third bus 405, the voltage of the third bus 405 being greater than the voltage of the first bus 403 and less than the voltage of the second bus 404, for example Figure 4 As shown, the voltage of the third bus is half of the voltage of the first bus, and the HV pin of the control chip can be electrically connected to the third bus 405. Here, when the voltage of the first bus is greater than the withstand voltage value of the HV pin of the control chip, the third bus 405 can be set, and the HV pin of the control chip is set to be electrically connected to the third bus, and the above setting method can protect the first control chip.

[0062] In some embodiments, Figure 4 As shown, the chip control circuit also includes a third switch module Q3, a first voltage stabilizing module Z1, a sixth resistor R6 and a second voltage stabilizing module Z2;

[0063] The control end and the first end of the third switch module Q3 are both electrically connected to the third bus 405, and the second end of the third switch Q3 is electrically connected to the control pin of the control chip;

[0064] A first end of the first voltage stabilizing module Z1 is electrically connected to a control end of the third switch module Q3, and a second end of the first voltage stabilizing module Z1 is electrically connected to a control pin of the control chip;

[0065] A first end of the sixth resistor R6 is electrically connected to the third bus, and a second end of the sixth resistor R6 is electrically connected to the control end of the third switch module Q3;

[0066] The first end of the second voltage stabilizing module Z2 is electrically connected to the second end of the sixth resistor R6 , and the second end of the second voltage stabilizing module Z2 is electrically connected to the second bus 404 .

[0067] Here, a third switch module Q3 may be provided to control the voltage output by the bus capacitor group to be input to the control pin HV of the control chip, and the first voltage stabilizing module Z1 is used to maintain the voltage at the control end of the third switch module.

[0068] In some examples, such as Figure 4 As shown, the chip control circuit also includes a first diode D1; the first end of the first diode is electrically connected to the second end of the third switch module Q3, and the second end of the first diode D1 is electrically connected to the control pin HV of the control chip. One-way conduction based on the diode can be achieved to provide a high voltage for the HV pin of the control chip.

[0069] In some examples, such as Figure 5 As shown, the first end of the sixth resistor can be electrically connected to the first bus, the second end of the sixth resistor can be electrically connected to the control end of the third switch module Q3, and at the same time, the first end of the third switch module can be electrically connected to the first bus. It can be imagined that the first end of the sixth resistor can be selected to be electrically connected to the first bus or the second bus based on the voltage output by the bus capacitor group. Here, the third switch module includes a third MOS tube, the control end of the third switch module is the gate of the third MOS tube, the third end of the second switch module is the drain of the third MOS tube, and the second end of the third switch module is the source of the third MOS tube.

[0070] In some examples, such as Figure 5 As shown, after the chip is started, the chip control circuit also includes a fourth switch module Q4 and a third voltage stabilizing module Z3, the control end of the fourth switch module Q4 is electrically connected to the first end of the third voltage stabilizing module Z3, the first end of the fourth switch module Q4 is electrically connected to the power pin VCC of the control chip, the second end of the fourth switch module Q4 is electrically connected to the power supply circuit 501, and the second end of the third voltage stabilizing module Z3 is electrically connected to the reference voltage end. After the control chip is started, the power pin VCC of the control chip can supply power to the power supply circuit connected thereto. In some examples, the third voltage stabilizing module includes a third voltage stabilizing tube, the fourth switch module includes a transistor, the control end of the fourth switch module is the base of the transistor, the first end of the fourth switch module is the collector of the transistor, and the second end of the fourth switch module is the emitter of the transistor.

[0071] Those skilled in the art should understand that the discussion of any of the above embodiments is merely illustrative and is not intended to imply that the scope of the present application (including the claims) is limited to these examples. In line with the concept of the present application, the technical features in the above embodiments or different embodiments may be combined, the steps may be implemented in any order, and there are many other variations of the different aspects of the embodiments of the present application as described above, which are not provided in detail for the sake of simplicity.

[0072] The functional blocks shown in the above-described block diagram can be implemented as hardware, software, firmware or a combination thereof. When implemented in hardware, it can be, for example, an electronic circuit, an application specific integrated circuit (ASIC), appropriate firmware, a plug-in, a function card, etc. When implemented in software, the elements of the present application are programs or code segments that are used to perform the required tasks. The program or code segment can be stored in a machine-readable medium, or transmitted on a transmission medium or a communication link by a data signal carried in a carrier wave. "Machine-readable medium" can include any medium capable of storing or transmitting information. Examples of machine-readable media include electronic circuits, semiconductor memory devices, ROM, flash memory, erasable ROM (EROM), floppy disks, CD-ROMs, optical disks, hard disks, optical fiber media, radio frequency (RF) links, etc. The code segment can be downloaded via a computer network such as the Internet, an intranet, etc.

[0073] It should also be noted that the exemplary embodiments mentioned in this application describe some methods or devices based on a series of steps or devices. However, this application is not limited to the order of the above steps, that is, the steps can be performed in the order mentioned in the embodiment, or in a different order from the embodiment, or several steps can be performed simultaneously.

[0074] The above reference is according to the method of the embodiment of the present application, the flow chart of the device (device) and the computer program product and / or the block diagram described various aspects of the present application.It should be understood that each square box in the flow chart and / or the block diagram and the combination of each square box in the flow chart and / or the block diagram can be realized by computer program instructions.These computer program instructions can be provided to the processor of a general-purpose computer, a special-purpose computer or other programmable data processing device to produce a machine so that these instructions executed by the processor of the computer or other programmable data processing device enable the realization of the function / action specified in one or more square boxes of the flow chart and / or the block diagram.Such a processor can be but is not limited to a general-purpose processor, a special-purpose processor, a special application processor or a field programmable logic circuit.It can also be understood that each square box in the block diagram and / or the flow chart and the combination of the square boxes in the block diagram and / or the flow chart can also be realized by the dedicated hardware that performs the specified function or action, or can be realized by the combination of dedicated hardware and computer instructions.

[0075] The above is only a specific implementation of the present application. Those skilled in the art can clearly understand that for the convenience and simplicity of description, the specific working processes of the above-described devices, modules and units can refer to the corresponding processes in the aforementioned method embodiments, and will not be repeated here. It should be understood that the protection scope of the present application is not limited to this. Any technician familiar with the technical field can easily think of various equivalent modifications or replacements within the technical scope disclosed in the present application, and these modifications or replacements should be included in the protection scope of the present application.

Claims

1. A chip control circuit, characterized in that: include: A first switch module, wherein a control end of the first switch module is electrically connected to the bus capacitor group, a first end of the first switch module is electrically connected to a power pin of a control chip, and a second end of the first switch module is electrically connected to a reference voltage end; a second switch module, wherein a control end of the second switch module is electrically connected to the bus capacitor group, a first end of the second switch module is electrically connected to the control end of the first switch module, and a second end of the second switch module is electrically connected to the reference voltage end; The control end of the first switch module is turned on in response to the first voltage output by the bus capacitor group, and the voltage output by the power pin of the control chip is discharged through the first switch module; The control end of the second switch module is turned on in response to the second voltage output by the bus capacitor group, the voltage of the control end of the first switch module is pulled down to the reference voltage value, the first switch module is turned off, and the voltage output by the power pin of the control chip charges the power capacitor; The first voltage is a voltage in a first voltage interval, the second voltage is a voltage in a second voltage interval, and a minimum value of the second voltage interval is greater than a maximum value of the first voltage interval.

2. The chip control circuit according to claim 1, characterized in that: Also comprising a first resistor; A first end of the first resistor is electrically connected to a power pin of the control chip, and a second end of the first resistor is electrically connected to a first end of the first switch module.

3. The chip control circuit according to claim 1, characterized in that: It also includes a first voltage-dividing branch, which is electrically connected to the bus capacitor group, and the control end of the first switch module is electrically connected to a first voltage-dividing node in the first voltage-dividing branch.

4. The chip control circuit according to claim 3, characterized in that: It also includes a second voltage-dividing branch, the second voltage-dividing branch is electrically connected to the bus capacitor group, and the control end of the second switch module is electrically connected to a second voltage-dividing node in the second voltage-dividing branch; The voltage of the second voltage division node is lower than the voltage of the first voltage division node.

5. The chip control circuit according to claim 4, characterized in that: The busbar capacitor group includes a first busbar and a second busbar, the voltage of the first busbar is greater than the voltage of the second busbar, the second busbar is electrically connected to the reference voltage terminal, and the first voltage dividing branch includes a second resistor and a third resistor; The first end of the second resistor is electrically connected to the first bus, the second end of the second resistor is electrically connected to the first end of the third resistor, and the second end of the third resistor is electrically connected to the second bus, wherein the first voltage dividing node is set between the second end of the second resistor and the first end of the third resistor.

6. The chip control circuit according to claim 5, characterized in that: The second voltage dividing branch includes a fourth resistor and a fifth resistor; The first end of the fourth resistor is electrically connected to the first bus, the second end of the fourth resistor is electrically connected to the first end of the fifth resistor, and the second end of the fifth resistor is electrically connected to the second bus, wherein the second voltage dividing node is arranged between the second end of the fourth resistor and the first end of the fifth resistor.

7. The chip control circuit according to claim 6, characterized in that: The resistance values ​​of the second resistor, the third resistor, the fourth resistor and the fifth resistor satisfy the following expression: Among them, R2 is the second resistor, R3 is the third resistor, R4 is the fourth resistor, and R5 is the fifth resistor.

8. The chip control circuit according to claim 1, characterized in that: The first switch module includes a first MOS tube, the control end of the first switch module is the gate of the first MOS tube, the first end of the first switch module is the drain of the first MOS tube, and the second end of the first switch module is the source of the first MOS tube; The second switch module includes a second MOS tube, the control end of the second switch module is the gate of the second MOS tube, the first end of the second switch module is the drain of the second MOS tube, and the second end of the second switch module is the source of the second MOS tube.

9. The chip control circuit according to claim 5, characterized in that: The bus capacitor group further includes a third bus, the voltage of the third bus is greater than the voltage of the first bus and less than the voltage of the second bus, and the chip control circuit further includes a third switch module, a first voltage stabilizing module, a sixth resistor and a second voltage stabilizing module; The control end and the first end of the third switch module are both electrically connected to the third bus, and the second end of the third switch is electrically connected to the control pin of the control chip; The first end of the first voltage stabilizing module is electrically connected to the control end of the third switch module, and the second end of the first voltage stabilizing module is electrically connected to the control pin of the control chip; A first end of the sixth resistor is electrically connected to the third bus bar, and a second end of the sixth resistor is electrically connected to a control end of the third switch module; The first end of the second voltage stabilizing module is electrically connected to the second end of the sixth resistor, and the second end of the second voltage stabilizing module is electrically connected to the second bus.

10. A power supply circuit, characterized in that: include: A control chip, wherein a control pin of the control chip is electrically connected to the bus capacitor group; A power supply capacitor, wherein a first end of the power supply capacitor is electrically connected to a power supply pin of the control chip, and a second end of the power supply capacitor is electrically connected to a reference power supply terminal; The chip control circuit according to any one of claims 1 to 9, wherein the chip control circuit is electrically connected to a power pin of the control chip.

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