Financial peripheral redundant power supply circuit based on terminal
By designing a terminal-based financial peripheral redundant power supply circuit, using undervoltage protection module and multiple MOS tubes, the problem of financial peripheral equipment being powered off when the adapter is abnormal is solved, power redundancy and undervoltage protection are realized, and working efficiency is improved and costs are reduced.
Patent Information
- Application Number
- CN202323571596.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2023-12-26
- Publication Date
- 2025-03-21
- Estimated Expiration
- 2033-12-26
AI Technical Summary
Existing financial peripheral devices are prone to power outage when the adapter is abnormal or the input power is abnormal, resulting in data processing and storage being unable to be carried out in time. The traditional redundant IC solution is costly and the diode solution is inefficient.
A terminal-based financial peripheral redundant power supply circuit is designed, including undervoltage protection module, DCDC conversion module and multiple MOS tubes. Power redundancy and undervoltage protection are achieved by preferentially fetching power from the adapter and seamlessly switching to USB device for power when the adapter is abnormal.
It improves the working efficiency of financial peripheral equipment, ensures timely data processing and storage, and reduces costs, and realizes power redundancy and undervoltage protection.
Smart Images

Figure CN222654867U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the technical field of financial peripherals, in particular to a terminal-based financial peripheral redundant power supply circuit. Background Art
[0002] At present, financial peripherals are generally powered by an adapter alone or by an adapter and a USB device. When powered by an adapter alone, if the peripheral adapter is abnormal or the adapter input power is abnormal, the financial peripheral will lose power and data may not be processed and saved in a timely manner. Traditionally, a diode solution or a redundant IC solution is generally used to design the adapter and USB device to power the device together. However, the diode power supply solution will result in low working efficiency of the financial peripherals, while the redundant IC power supply solution is costly. Utility Model Content
[0003] The technical problem to be solved by the utility model is to provide a terminal-based financial peripheral redundant power supply circuit, which can improve the working efficiency of the financial peripheral equipment and has low cost.
[0004] In order to solve the above technical problems, the technical solution adopted by the utility model is:
[0005] A terminal-based financial peripheral redundant power supply circuit comprises an undervoltage protection module, a DCDC conversion module, a MOS tube Q1, a MOS tube Q2, a MOS tube Q4, a MOS tube Q5 and a MOS tube Q6, wherein the input end of the undervoltage protection module is electrically connected to the power end of an external USB device, the DCDC conversion module is electrically connected to the power end of an external adapter and the drain of the MOS tube Q1 respectively, the source of the MOS tube Q1 is electrically connected to the source of the MOS tube Q4 and the external financial peripheral device respectively, the gate of the MOS tube Q1 is electrically connected to the drain of the MOS tube Q2, the gate of the MOS tube Q2 is electrically connected to the gate of the MOS tube Q5, and the gates of the MOS tube Q2 and the gates of the MOS tube Q5 are both electrically connected to the power end of the external adapter, the drain of the MOS tube Q4 is electrically connected to the output end of the undervoltage protection module, the gate of the MOS tube Q4 is electrically connected to the drain of the MOS tube Q6, and the gate of the MOS tube Q6 is electrically connected to the drain of the MOS tube Q5.
[0006] Further, the undervoltage protection module includes a resistor R4, a resistor R5, a resistor R6, a voltage regulator U2 and a MOS tube Q3, the source of the MOS tube Q3 is electrically connected to one end of the resistor R5 and one end of the resistor R4 respectively, and the source of the MOS tube Q3, one end of the resistor R5 and one end of the resistor R4 are all electrically connected to the power supply end of the external USB device, the gate of the MOS tube Q3 is electrically connected to the other end of the resistor R5 and the first end of the voltage regulator U2 respectively, the second end of the voltage regulator U2 is electrically connected to the other end of the resistor R4 and one end of the resistor R6 respectively, the other end of the resistor R6 and the third end of the voltage regulator U2 are both grounded, and the drain of the MOS tube Q3 is electrically connected to the drain of the MOS tube Q4.
[0007] Furthermore, a resistor R1 is included, one end of which is electrically connected to the source of the MOS transistor Q1 and the source of the MOS transistor Q4, and the other end of which is electrically connected to the gate of the MOS transistor Q1 and the drain of the MOS transistor Q2.
[0008] Furthermore, it also includes a resistor R2 and a resistor R3, one end of the resistor R2 is electrically connected to the DCDC conversion module and one end of the resistor R2 is electrically connected to the power supply end of the external adapter, the other end of the resistor R2 is electrically connected to one end of the resistor R3, the gate of the MOS tube Q2 and the gate of the MOS tube Q5, respectively, and the other end of the resistor R3 is grounded.
[0009] Furthermore, a resistor R7 is included, one end of which is electrically connected to the source of the MOS tube Q4 and the undervoltage protection module respectively, and the other end of which is electrically connected to the drain of the MOS tube Q5 and the gate of the MOS tube Q6 respectively.
[0010] Furthermore, a resistor R8 is included, one end of which is electrically connected to the source of the MOS transistor Q4, one end of the load RL and the source of the MOS transistor Q1, and the other end of which is electrically connected to the gate of the MOS transistor Q4 and the drain of the MOS transistor Q6.
[0011] Furthermore, the MOS transistor Q1 , the MOS transistor Q3 , and the MOS transistor Q4 are P-type MOS transistors, and the MOS transistor Q2 , the MOS transistor Q5 , and the MOS transistor Q6 are N-type MOS transistors.
[0012] The beneficial effects of the utility model are:
[0013] The redundant power supply circuit provided in this solution includes an undervoltage protection module, a DCDC conversion module, a MOS tube Q1, a MOS tube Q2, a MOS tube Q4, a MOS tube Q5 and a MOS tube Q6. The DCDC conversion module is electrically connected to the power supply end of the peripheral adapter and the drain of the MOS tube Q1 respectively. The source of the MOS tube Q1 is electrically connected to the source of the MOS tube Q4 and the peripheral financial peripheral device respectively. The gate of the MOS tube Q1 is electrically connected to the drain of the MOS tube Q2. The gate of the MOS tube Q2 is electrically connected to the gate of the MOS tube Q5. The gates of the MOS tube Q2 and the gates of the MOS tube Q5 are both electrically connected to the power supply end of the peripheral adapter. The drain of the MOS tube Q4 is electrically connected to the output end of the undervoltage protection module, the gate of the MOS tube Q4 is electrically connected to the drain of the MOS tube Q6, and the gate of the MOS tube Q6 is electrically connected to the drain of the MOS tube Q5, so that when the adapter and the USB device are powered at the same time, power can be taken from the adapter first; when the adapter is abnormal, power is seamlessly switched to the USB device, and the input end of the undervoltage protection module is electrically connected to the power end of the peripheral USB device, so that the USB device is undervoltage protected and can protect the USB device from abnormal situations. The redundant power supply circuit designed in this scheme can not only improve the working efficiency of financial peripheral equipment, but also has low cost. BRIEF DESCRIPTION OF THE DRAWINGS
[0014] Figure 1 It is a circuit schematic diagram of a terminal-based financial peripheral redundant power supply circuit according to the utility model;
[0015] Description of labels:
[0016] 1. Undervoltage protection module; 2. DCDC conversion module; 3. Financial peripheral equipment. DETAILED DESCRIPTION
[0017] In order to explain the technical content, achieved objectives and effects of the present invention in detail, the following is an explanation in conjunction with the implementation modes and the accompanying drawings.
[0018] Please refer to Figure 1 , the technical solution adopted by the utility model is:
[0019] A terminal-based financial peripheral redundant power supply circuit comprises an undervoltage protection module, a DCDC conversion module, a MOS tube Q1, a MOS tube Q2, a MOS tube Q4, a MOS tube Q5 and a MOS tube Q6, wherein the input end of the undervoltage protection module is electrically connected to the power end of an external USB device, the DCDC conversion module is electrically connected to the power end of an external adapter and the drain of the MOS tube Q1 respectively, the source of the MOS tube Q1 is electrically connected to the source of the MOS tube Q4 and the external financial peripheral device respectively, the gate of the MOS tube Q1 is electrically connected to the drain of the MOS tube Q2, the gate of the MOS tube Q2 is electrically connected to the gate of the MOS tube Q5, and the gates of the MOS tube Q2 and the gates of the MOS tube Q5 are both electrically connected to the power end of the external adapter, the drain of the MOS tube Q4 is electrically connected to the output end of the undervoltage protection module, the gate of the MOS tube Q4 is electrically connected to the drain of the MOS tube Q6, and the gate of the MOS tube Q6 is electrically connected to the drain of the MOS tube Q5.
[0020] From the above description, it can be seen that the beneficial effects of the utility model are:
[0021] The redundant power supply circuit provided in this solution includes an undervoltage protection module, a DCDC conversion module, a MOS tube Q1, a MOS tube Q2, a MOS tube Q4, a MOS tube Q5 and a MOS tube Q6. The DCDC conversion module is electrically connected to the power supply end of the peripheral adapter and the drain of the MOS tube Q1 respectively. The source of the MOS tube Q1 is electrically connected to the source of the MOS tube Q4 and the peripheral financial peripheral device respectively. The gate of the MOS tube Q1 is electrically connected to the drain of the MOS tube Q2. The gate of the MOS tube Q2 is electrically connected to the gate of the MOS tube Q5. The gates of the MOS tube Q2 and the gates of the MOS tube Q5 are both electrically connected to the power supply end of the peripheral adapter. The drain of the MOS tube Q4 is electrically connected to the output end of the undervoltage protection module, the gate of the MOS tube Q4 is electrically connected to the drain of the MOS tube Q6, and the gate of the MOS tube Q6 is electrically connected to the drain of the MOS tube Q5, so that when the adapter and the USB device are powered at the same time, power can be taken from the adapter first; when the adapter is abnormal, power is seamlessly switched to the USB device, and the input end of the undervoltage protection module is electrically connected to the power end of the peripheral USB device, so that the USB device is undervoltage protected and can protect the USB device from abnormal situations. The redundant power supply circuit designed in this scheme can not only improve the working efficiency of financial peripheral equipment, but also has low cost.
[0022] Further, the undervoltage protection module includes a resistor R4, a resistor R5, a resistor R6, a voltage regulator U2 and a MOS tube Q3, the source of the MOS tube Q3 is electrically connected to one end of the resistor R5 and one end of the resistor R4 respectively, and the source of the MOS tube Q3, one end of the resistor R5 and one end of the resistor R4 are all electrically connected to the power supply end of the external USB device, the gate of the MOS tube Q3 is electrically connected to the other end of the resistor R5 and the first end of the voltage regulator U2 respectively, the second end of the voltage regulator U2 is electrically connected to the other end of the resistor R4 and one end of the resistor R6 respectively, the other end of the resistor R6 and the third end of the voltage regulator U2 are both grounded, and the drain of the MOS tube Q3 is electrically connected to the drain of the MOS tube Q4.
[0023] From the above description, it can be seen that the resistor R4, the resistor R5, the resistor R6, the MOS tube Q3 and the voltage regulator U2 realize the under-voltage protection of the USB device; the USB interfaces of different USB devices (such as computers) have different load capacities. When the power output of the USB interface exceeds its load capacity, the output voltage VBUS of the USB device will drop, and it will cause the computer motherboard to work abnormally or even damage the USB interface of the USB device.
[0024] Furthermore, a resistor R1 is included, one end of which is electrically connected to the source of the MOS transistor Q1 and the source of the MOS transistor Q4, and the other end of which is electrically connected to the gate of the MOS transistor Q1 and the drain of the MOS transistor Q2.
[0025] From the above description, it can be seen that when the power supply of the adapter is not connected, the output voltage of the USB device inputs a high level to the gate of the MOS tube Q1 through the MOS tube Q3, the MOS tube Q4, and the resistor R1, so that the MOS tube Q1 is cut off to prevent backflow to the DCDC conversion module.
[0026] Furthermore, it also includes a resistor R2 and a resistor R3, one end of the resistor R2 is electrically connected to the DCDC conversion module and one end of the resistor R2 is electrically connected to the power supply end of the external adapter, the other end of the resistor R2 is electrically connected to one end of the resistor R3, the gate of the MOS tube Q2 and the gate of the MOS tube Q5, respectively, and the other end of the resistor R3 is grounded.
[0027] It can be seen from the above description that the resistors R2 and R3 play a voltage dividing role so that the gate voltage loaded on the MOS transistors Q2 and Q3 does not exceed the maximum value of the VGS of the MOS transistors.
[0028] Furthermore, a resistor R7 is included, one end of which is electrically connected to the source of the MOS tube Q4 and the undervoltage protection module respectively, and the other end of which is electrically connected to the drain of the MOS tube Q5 and the gate of the MOS tube Q6 respectively.
[0029] From the above description, it can be known that by setting the resistor R7, when the adapter is not inserted and the MOS tube Q5 is turned off, the output voltage of the USB device inputs a high level to the gate of the MOS tube Q6 through the resistor R7, so that the MOS tube Q6 is turned on.
[0030] Furthermore, a resistor R8 is included, one end of which is electrically connected to the source of the MOS transistor Q4, one end of the load RL and the source of the MOS transistor Q1, and the other end of which is electrically connected to the gate of the MOS transistor Q4 and the drain of the MOS transistor Q6.
[0031] It can be seen from the above description that when the MOS tube Q6 is turned off, a high level is input to the gate of the MOS tube Q4 through the resistor R8, so that the MOS tube Q4 is turned off, thereby preventing the 5V generated by the DCDC conversion module from being fed back to the USB device.
[0032] Furthermore, the MOS transistor Q1 , the MOS transistor Q3 , and the MOS transistor Q4 are P-type MOS transistors, and the MOS transistor Q2 , the MOS transistor Q5 , and the MOS transistor Q6 are N-type MOS transistors.
[0033] Please refer to Figure 1 , Embodiment 1 of the present utility model is:
[0034] A terminal-based financial peripheral redundant power supply circuit comprises an undervoltage protection module 1, a DCDC conversion module 2, a MOS tube Q1, a MOS tube Q2, a MOS tube Q4, a MOS tube Q5 and a MOS tube Q6, wherein the input end of the undervoltage protection module 1 is electrically connected to the power end of an external USB device, the DCDC conversion module 2 is electrically connected to the power end of an external adapter and the drain of the MOS tube Q1, respectively, the source of the MOS tube Q1 is electrically connected to the source of the MOS tube Q4 and the external financial peripheral device 3, respectively, the gate of the MOS tube Q1 is electrically connected to the drain of the MOS tube Q2, the gate of the MOS tube Q2 is electrically connected to the gate of the MOS tube Q5, and the gates of the MOS tube Q2 and the gates of the MOS tube Q5 are both electrically connected to the power end of the external adapter, the drain of the MOS tube Q4 is electrically connected to the output end of the undervoltage protection module 1, the gate of the MOS tube Q4 is electrically connected to the drain of the MOS tube Q6, and the gate of the MOS tube Q6 is electrically connected to the drain of the MOS tube Q5.
[0035] The undervoltage protection module 1 includes a resistor R4 (with a resistance value of 10 kΩ), a resistor R5 (with a resistance value of 100 kΩ), a resistor R6 (with a resistance value of 11.1 kΩ, which is not a commonly used value and can be obtained by connecting two resistors in series during implementation), a voltage regulator U2 (model TL431) and a MOS tube Q3, wherein the source of the MOS tube Q3 is electrically connected to one end of the resistor R5 and one end of the resistor R4 respectively, and the source of the MOS tube Q3, one end of the resistor R5 and one end of the resistor R4 are all electrically connected to the power supply end of the external USB device, the gate of the MOS tube Q3 is electrically connected to the other end of the resistor R5 and the first end of the voltage regulator U2 respectively, the second end of the voltage regulator U2 is electrically connected to the other end of the resistor R4 and one end of the resistor R6 respectively, the other end of the resistor R6 and the third end of the voltage regulator U2 are both grounded, and the drain of the MOS tube Q3 is electrically connected to the drain of the MOS tube Q4.
[0036] It also includes a resistor R1 (with a resistance value of 100 kΩ), one end of which is electrically connected to the source of the MOS transistor Q1 and the source of the MOS transistor Q4, and the other end of which is electrically connected to the gate of the MOS transistor Q1 and the drain of the MOS transistor Q2.
[0037] It also includes a resistor R2 (resistance value is 200kΩ) and a resistor R3 (resistance value is 100kΩ), one end of the resistor R2 is electrically connected to the DCDC conversion module 2 and one end of the resistor R2 is electrically connected to the power supply end of the external adapter, the other end of the resistor R2 is electrically connected to one end of the resistor R3, the gate of the MOS tube Q2 and the gate of the MOS tube Q5, respectively, and the other end of the resistor R3 is grounded.
[0038] It also includes a resistor R7 (resistance value is 100 kΩ), one end of which is electrically connected to the source of the MOS tube Q4 and the undervoltage protection module 1 respectively, and the other end of which is electrically connected to the drain of the MOS tube Q5 and the gate of the MOS tube Q6 respectively.
[0039] It also includes a resistor R8 (with a resistance value of 100 kΩ), one end of which is electrically connected to the source of the MOS tube Q4, one end of the load RL and the source of the MOS tube Q1, and the other end of which is electrically connected to the gate of the MOS tube Q4 and the drain of the MOS tube Q6.
[0040] The MOS tube Q1, MOS tube Q3 and MOS tube Q4 are P-type MOS tubes, and in this embodiment, they all use MOS tubes with model number IRLML6401. The MOS tube Q2, MOS tube Q5 and MOS tube Q6 are N-type MOS tubes, and in this embodiment, they all use MOS tubes with model number 2N7002.
[0041] The DCDC conversion module 2 is a universal DCDC conversion module, and any DCDC conversion module can be implemented. In this embodiment, the DCDC conversion module 2 includes a resistor R11, a resistor R15, a chip U1, a capacitor C1, an inductor L1, a resistor R12, a resistor R13, a capacitor C2 and a resistor R16. For the specific connection relationship between the components, please refer to Figure 1 .
[0042] The working principle of the terminal-based financial peripheral redundant power supply circuit is as follows:
[0043] Resistors R4, R5, R6, MOS tube Q3 and voltage regulator U2 realize undervoltage protection of USB devices; the USB interfaces of different USB devices (such as computers) have different load capacities. When the power output of the USB interface exceeds its load capacity, the output voltage VBUS of the USB device will drop, which will cause abnormal operation of the computer motherboard and even damage the USB interface of the USB device;
[0044] In this embodiment, the undervoltage threshold of the USB device configured by the circuit is 4.75V, so as to detect whether the power supply of the USB device exceeds its load capacity.
[0045] When the adapter and the USB device are connected to the power supply at the same time, the 12V output by the adapter is converted into 5V through the DCDC conversion module 2. At the same time, the 12V turns on the MOS tube Q2, and the drain of the MOS tube Q2 is at a low level, which turns on the MOS tube Q1. The 5V is directly loaded on the load RL through the MOS tube Q1.
[0046] 12V also turns on MOS tube Q5, and the drain of MOS tube Q5 is at a low level, so that MOS tube Q6 is turned off, and the gate of MOS tube Q4 is at a high level, and MOS tube Q4 is turned off, so the power supply circuit of the USB device is blocked, so that when the adapter and the USB device are connected to the power supply at the same time, the adapter has priority in power supply.
[0047] When the adapter is not connected or the adapter power supply is abnormal, when the output voltage VBUS of the USB device exceeds 4.75V, the reference voltage loaded on the voltage regulator U2 exceeds 2.5V through the voltage division of resistors R4 and R6, the voltage regulator U2 is turned on, the gate of MOS tube Q3 is low level, and MOS tube Q3 is turned on.
[0048] Because there is no output at the power end of the adapter, the gate of MOS tube Q5 is at a low level, MOS tube Q5 is cut off, the gate of MOS tube Q6 is at a high level, MOS tube Q6 is turned on, the drain of MOS tube Q6 is at a low level, MOS tube Q4 is turned on, and the output voltage VBUS of the USB device is directly loaded on the load RL through MOS tubes Q3 and Q4.
[0049] When the adapter is not connected or the adapter power supply is abnormal, when the power supply of the USB interface of the USB device exceeds its load capacity, the output voltage VBUS of the USB device drops. When it drops below 4.75V, the reference voltage loaded on the voltage regulator U2 is lower than 2.5V through the voltage divider of resistors R4 and R6. The voltage regulator U2 is cut off, the gate of MOS tube Q3 is high level, MOS tube Q3 is cut off, the USB interface of the USB device implements undervoltage protection, and stops supplying power to the financial peripherals.
[0050] In summary, the utility model provides a terminal-based financial peripheral redundant power supply circuit, and the redundant power supply circuit includes an undervoltage protection module, a DCDC conversion module, a MOS tube Q1, a MOS tube Q2, a MOS tube Q4, a MOS tube Q5 and a MOS tube Q6. The DCDC conversion module is electrically connected to the power supply end of the peripheral adapter and the drain of the MOS tube Q1 respectively, the source of the MOS tube Q1 is electrically connected to the source of the MOS tube Q4 and the financial peripheral device of the peripheral respectively, the gate of the MOS tube Q1 is electrically connected to the drain of the MOS tube Q2, the gate of the MOS tube Q2 is electrically connected to the gate of the MOS tube Q5, and the gate of the MOS tube Q2 and the gate of the MOS tube Q5 are both electrically connected to the The power supply end of the peripheral adapter is electrically connected, the drain of the MOS tube Q4 is electrically connected to the output end of the undervoltage protection module, the gate of the MOS tube Q4 is electrically connected to the drain of the MOS tube Q6, and the gate of the MOS tube Q6 is electrically connected to the drain of the MOS tube Q5. In this way, when the adapter and the USB device are powered at the same time, power can be taken from the adapter first; when the adapter is abnormal, it is seamlessly switched to the USB device for power supply, and the input end of the undervoltage protection module is electrically connected to the power supply end of the peripheral USB device, the USB device is undervoltage protected, and the USB device can be protected from abnormal situations. The redundant power supply circuit designed in this scheme can not only improve the working efficiency of financial peripheral equipment, but also has low cost.
[0051] The above description is only an embodiment of the present invention, and does not limit the patent scope of the present invention. Any equivalent transformations made using the contents of the specification and drawings of the present invention, or directly or indirectly applied in the relevant technical field, are also included in the patent protection scope of the present invention.
Claims
1. A terminal-based financial peripheral redundant power supply circuit, characterized in that: The invention comprises an undervoltage protection module, a DCDC conversion module, a MOS tube Q1, a MOS tube Q2, a MOS tube Q4, a MOS tube Q5 and a MOS tube Q6. The input end of the undervoltage protection module is electrically connected to the power end of an external USB device. The DCDC conversion module is electrically connected to the power end of an external adapter and the drain of the MOS tube Q1 respectively. The source of the MOS tube Q1 is electrically connected to the source of the MOS tube Q4 and the external financial peripheral device respectively. The gate of the MOS tube Q1 is electrically connected to the drain of the MOS tube Q2. The gate of the MOS tube Q2 is electrically connected to the gate of the MOS tube Q5, and the gates of the MOS tube Q2 and the gates of the MOS tube Q5 are both electrically connected to the power end of the external adapter. The drain of the MOS tube Q4 is electrically connected to the output end of the undervoltage protection module. The gate of the MOS tube Q4 is electrically connected to the drain of the MOS tube Q6. The gate of the MOS tube Q6 is electrically connected to the drain of the MOS tube Q5.
2. The terminal-based financial peripheral redundant power supply circuit according to claim 1, characterized in that: The undervoltage protection module includes a resistor R4, a resistor R5, a resistor R6, a voltage regulator U2 and a MOS tube Q3, the source of the MOS tube Q3 is electrically connected to one end of the resistor R5 and one end of the resistor R4 respectively, and the source of the MOS tube Q3, one end of the resistor R5 and one end of the resistor R4 are all electrically connected to the power supply end of the external USB device, the gate of the MOS tube Q3 is electrically connected to the other end of the resistor R5 and the first end of the voltage regulator U2 respectively, the second end of the voltage regulator U2 is electrically connected to the other end of the resistor R4 and one end of the resistor R6 respectively, the other end of the resistor R6 and the third end of the voltage regulator U2 are both grounded, and the drain of the MOS tube Q3 is electrically connected to the drain of the MOS tube Q4.
3. The terminal-based financial peripheral redundant power supply circuit according to claim 1, characterized in that: It also includes a resistor R1, one end of which is electrically connected to the source of the MOS transistor Q1 and the source of the MOS transistor Q4, and the other end of which is electrically connected to the gate of the MOS transistor Q1 and the drain of the MOS transistor Q2.
4. The terminal-based financial peripheral redundant power supply circuit according to claim 1, characterized in that: It also includes a resistor R2 and a resistor R3, one end of the resistor R2 is electrically connected to the DCDC conversion module and one end of the resistor R2 is electrically connected to the power supply end of the external adapter, the other end of the resistor R2 is electrically connected to one end of the resistor R3, the gate of the MOS tube Q2 and the gate of the MOS tube Q5, respectively, and the other end of the resistor R3 is grounded.
5. The terminal-based financial peripheral redundant power supply circuit according to claim 1, characterized in that: A resistor R7 is also included, one end of which is electrically connected to the source of the MOS tube Q4 and the undervoltage protection module respectively, and the other end of which is electrically connected to the drain of the MOS tube Q5 and the gate of the MOS tube Q6 respectively.
6. The terminal-based financial peripheral redundant power supply circuit according to claim 1, characterized in that: A resistor R8 is also included, one end of which is electrically connected to the source of the MOS transistor Q4, one end of the load RL and the source of the MOS transistor Q1, and the other end of which is electrically connected to the gate of the MOS transistor Q4 and the drain of the MOS transistor Q6.
7. The terminal-based financial peripheral redundant power supply circuit according to claim 1, characterized in that: The MOS transistor Q1 , the MOS transistor Q3 and the MOS transistor Q4 are P-type MOS transistors, and the MOS transistor Q2 , the MOS transistor Q5 and the MOS transistor Q6 are N-type MOS transistors.