Fault detection circuit and motor driving device

Abstract

The utility model relates to the technical field of circuit detection, and discloses a fault detection circuit and a motor driving device.The circuit comprises at least two driving chips, a control module and a switching circuit; a control end of the switching circuit is connected with a state feedback end of the driving chip, and the driving chip outputs a state feedback signal to control on and off of each switching tube in the switching circuit; the output end of the switching circuit is connected with the control module, and the switching circuit outputs a level signal of a corresponding resistance value. The problem that an existing driving chip detection circuit scheme can only detect whether a fault exists or not and cannot position the fault corresponding to a specific driving chip is solved.

Description

Technical Field

[0001] The present application relates to the field of circuit detection technology, and in particular to a fault detection circuit and a motor drive device. Background Art

[0002] In the drive control of the motor, the commonly used drive control method is to use power tubes to build a bridge circuit, such as insulated gate bipolar transistors (IGBT), MOS tubes, triodes, etc., and the on and off of the bridge circuit is controlled by the driver chip.

[0003] In order to detect whether the working state of the driver chip is normal, it is necessary to detect whether the driver chip is faulty in real time, but the current detection method cannot locate the faulty driver chip. Utility Model Content

[0004] In view of this, the present application proposes a fault detection circuit and a motor drive device to solve the problem that the existing driver chip detection circuit cannot locate the fault corresponding to the specific driver chip.

[0005] The first aspect of the present application provides a fault detection circuit, comprising: at least two driver chips, a control module and a switching circuit; the control end of the switching circuit is connected to the state feedback end of the driver chip, and the driver chip outputs a state feedback signal to control the conduction and shutdown of each switch tube in the switching circuit; the output end of the switching circuit is connected to the control module, and the switching circuit outputs a level signal corresponding to the resistance value.

[0006] In a feasible embodiment, if the number of control terminals of the switching circuit is one, the fault detection circuit further includes: a delay control circuit connected to the state feedback terminals of at least two of the driving chips; the delay control circuit outputs a clock signal to control each of the state feedback terminals to output a state feedback signal at different times.

[0007] In a feasible implementation manner, if the number of the control terminals of the switch circuit is at least two, each of the control terminals is connected to a state feedback terminal of the driver chip.

[0008] In a feasible implementation manner, the switch circuit includes: at least two first voltage-dividing circuits, each of the first voltage-dividing circuits corresponds to one of the control terminals, and impedance values of the first voltage-dividing circuits are unequal.

[0009] In a feasible implementation, the first voltage-dividing circuits are connected in parallel. When a low-level signal exists in the state feedback signal input from each control end, one of at least two first voltage-dividing circuits inputting the low-level signal is disconnected.

[0010] In a feasible embodiment, the first voltage divider circuit includes a first switching device and at least one first voltage divider device; the first switching device is connected in series with the at least one first voltage divider device, and the base of the first switching device is connected to the state feedback terminal of the driving chip.

[0011] In a feasible implementation, the first voltage divider circuits are connected in series. When a low-level signal exists in the state feedback signal input to each control end, one of at least two first voltage divider circuits inputting the low-level signal is short-circuited.

[0012] In a feasible embodiment, the first voltage divider circuit includes a second switching device and at least one second voltage divider device; the second switching device is connected in parallel with the at least one second voltage divider device, and the base of the second switching device is connected to the state feedback terminal of the driving chip.

[0013] In a feasible implementation manner, the switch circuit further includes a second voltage divider circuit, which is provided between the fault detection terminal and the power supply terminal of the control module.

[0014] In a feasible implementation manner, the fault detection circuit further includes a setting circuit provided between the power supply terminal and each of the status feedback terminals.

[0015] The second aspect of the present application provides a motor drive device, comprising: a bridge circuit and the fault detection circuit described in any one of the first aspects above; the driving chip in the fault detection circuit is connected to the bridge circuit, and controls the on and off of the bridge circuit by outputting a switching signal.

[0016] In a feasible implementation, the bridge circuit includes at least two bridge arms, each of which includes at least one power device; one power device corresponds to one driver chip, and the output end of the driver chip is connected to the control end of the power device.

[0017] The technical solution provided in this application comprises a circuit comprising at least two driver chips, a control module, and a switching circuit; the control terminal of the switching circuit is connected to the state feedback terminal of the driver chip, and the driver chip outputs a state feedback signal to control the conduction and shutdown of each switch tube in the switching circuit; the output terminal of the switching circuit is connected to the control module, and the switching circuit outputs a level signal corresponding to the resistance value. This application adds a switching circuit between the driver chip and the control module, with the control terminal of the circuit connected to each driver chip. The circuit adjusts its own impedance value based on the state feedback signal fed back by the driver chip received by the control terminal, outputting different level signals, thereby locating the faulty driver chip. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 A first schematic diagram of a fault detection circuit provided in an embodiment of the present application;

[0019] Figure 2 A second schematic diagram of a fault detection circuit provided in an embodiment of the present application;

[0020] Figure 3 A third schematic diagram of a fault detection circuit provided in an embodiment of the present application;

[0021] Figure 4 A fourth schematic diagram of a fault detection circuit provided in an embodiment of the present application;

[0022] Figure 5 A fifth schematic diagram of a fault detection circuit provided in an embodiment of the present application;

[0023] Figure 6 A sixth schematic diagram of a fault detection circuit provided in an embodiment of the present application;

[0024] Figure 7 A seventh schematic diagram of a fault detection circuit provided in an embodiment of the present application;

[0025] Figure 8 A schematic diagram of a motor drive device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0026] The present application provides a fault detection circuit and a motor drive device, which mainly realizes the positioning of different level signals to the fault chip by adding a switching circuit for voltage division without occupying too many motor drive main controller port resources, thereby facilitating subsequent fault diagnosis and analysis.

[0027] The terms "first," "second," "third," "fourth," etc. (if any) in the specification and claims of the present application and in the above-mentioned drawings are used to distinguish similar objects and are not necessarily used to describe a specific order or sequential sequence. It should be understood that the numbers used in this way are interchangeable where appropriate, so that the embodiments of the present application described herein can, for example, be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having," and any variations thereof, are intended to cover non-exclusive inclusions, for example, a process, method, system, product, or apparatus comprising a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products, or apparatus.

[0028] Current motor control primarily relies on a driver chip to control the switching of the six-arm power devices in the three-phase bridge. If the driver chip or power device operates abnormally, the output signal of the corresponding driver chip's FLT pin flips. During operation, the main MCU uses the level signal fed back from the driver chip's FLT pin to determine if there is a fault.

[0029] like Figure 1 As shown, an embodiment of the present application provides a fault detection circuit, which includes at least two driver chips 110, a control module 120 and a switching circuit 130, wherein the driver chip 110 is arranged on the bridge arm power device side of the motor, and is specifically connected to the control end of the power device in the bridge arm power device. For example, when the power device is an IGBT, MOS tube, triode, etc., the driver chip 100 is connected to the base of the power device.

[0030] The control end 131 of the switching circuit 130 is connected to the state feedback end of the driver chip 110, and the driver chip 110 outputs a state feedback signal to control the conduction and shutdown of each switch tube in the switching circuit 130; the output end 132 of the switching circuit 130 is connected to the control module 120, and the switching circuit 130 outputs a level signal corresponding to the resistance value.

[0031] After receiving the state feedback signal output by the driver chip 110 through the state feedback terminal, the switch circuit 130 controls its own impedance value to change and outputs a level signal based on the changed impedance value to the control module 120, thereby determining the location of the faulty driver chip 110. Here, after the switch circuit 130 outputs the corresponding level signal, the location of the faulty driver chip 110 can be determined.

[0032] In this embodiment, the switching circuit 130 is provided with at least two control terminals 131 and one output terminal 132. Each control terminal 131 in the switching circuit 130 is connected to a state feedback terminal of the driver chip 110, and the output terminal 132 of the switching circuit 130 is connected to the fault detection terminal of the control module 120. The switching circuit 130 obtains different impedance values under the joint action of the state feedback signals input by each of the control terminals 131, and outputs a level signal matching the impedance value to the fault detection terminal of the control module 120 to realize the detection of the faulty driver chip 110.

[0033] It should be noted that the switch circuit 130 is actually a voltage divider circuit, and each control terminal 131 is connected to a different potential position in the voltage divider circuit. When there is a fault in at least two driver chips 110, the output signal (i.e., the level) of the status feedback terminal of the corresponding driver chip 110 will be reversed.

[0034] In actual applications, the state feedback end of the driver chip 110 will set the default output level of the driver chip 110 under normal working conditions by setting a signal inside the chip or setting an external circuit. The output level can be a high level or a low level. When the driver chip 110 itself fails (that is, the working state is a faulty state), the default output level of the state feedback end will be reversed. For example, the default level is a high level, and it will be a low level after being reversed. At this time, under the action of the low level output by the faulty driver chip 110, the impedance value of the switch circuit 130 changes, thereby changing the level signal output to the control module 120. The level signal here is a signal with different voltage values, that is, different level signals with different voltage values will be output according to different driver chips 110.

[0035] In summary, by adding a switching circuit with multiple control terminals between the control module and the driver chip, each control terminal corresponds to a driver chip, and the status feedback signal output by the status feedback terminal of the driver chip controls the level signal output by the switching circuit, such a circuit structure can not only detect the driver chip fault, but also detect the position of the faulty driver chip; and the switching circuit is provided with multiple control terminals to realize unified detection and management of multiple driver chips, without the need to increase the resources of the control interface and at the same time can realize the location of the faulty driver chip.

[0036] like Figure 2 and 3 As shown, this is a second embodiment of the fault detection circuit provided in the present application. The switching circuit 130 includes multiple control terminals 131, an output terminal 132 and at least two first voltage divider circuits 133. Each of the first voltage divider circuits 133 corresponds to one of the control terminals 131 and the impedance values of the first voltage divider circuits 133 are not equal.

[0037] It should be noted that the number of first voltage divider circuits 133 included in the switch circuit 130 is equal to the number of control terminals 131, that is, each control terminal 131 is set at one end of a first voltage divider circuit 133, and each control terminal 131 is correspondingly connected to the state feedback terminal of a driver chip 110.

[0038] When the driver chip 110 is in normal working condition, it outputs a default level. When all the driver chips 110 are in normal working condition, the switch circuit 130 will output a level signal at its output end under the action of the combined impedance value of all the first voltage divider circuits 133. When one of the driver chips 110 fails, it will output a fault signal (specifically, the default level is flipped). The fault signal will cause the corresponding first voltage divider circuit 133 in the switch circuit 130 to short-circuit or disconnect, thereby causing the overall impedance value of the switch circuit 130 to change, especially the potential at the output end of the switch circuit 130 also changes. Finally, the level signal output to the control module 120 also changes. The control module 120 determines which driver chip 110 is faulty based on the specific voltage value of the level signal.

[0039] In this embodiment, the impedance value of the switch circuit 130 is preferably adjusted by disconnecting the switch circuit 130, thereby achieving the positioning of the driver chip 110. Figure 3 As shown, the switch circuit 130 includes three control terminals (131a, 131b and 131c), an output terminal 132 and three first voltage divider circuits (133a, 133b and 133c), and each of the first voltage divider circuits 133 is connected in parallel. When a low-level signal exists in the state feedback signal input by each of the control terminals 131, at least one of the low-level signals input to at least two of the first voltage divider circuits 133 is disconnected.

[0040] It should be noted that each first voltage divider circuit 133 includes a first switching device and at least one first voltage divider device; the first switching device is connected in series with the at least one first voltage divider device, and the base of the first switching device is connected to the state feedback terminal of the driver chip 110. It is understandable that the first voltage divider device can be a resistor and a diode, and the at least one first voltage divider device here can be connected in series and / or in parallel, such as all being set as resistors or setting a resistor and at least one diode, and then connected in series with the first switching device. In addition, the first switching device can also be implemented using a switch combination circuit, that is, selecting multiple first switching devices to be connected in series and / or in parallel.

[0041] like Figure 3As shown, each first voltage divider circuit (133a, 133b, and 133c) consists of a first resistor R and a first switching device Q. Specifically, a series circuit of Q1 and R1 forms the first first voltage divider circuit, a series circuit of Q2 and R2 forms the second first voltage divider circuit, and a series circuit of Q3 and R3 forms the third first voltage divider circuit. Q1, Q2, and Q3 are connected to the first driver chip 110a, the second driver chip 110b, and the third driver chip 110c, respectively. Q1, Q2, and Q3 in the figure are PNP-type switching devices, such as transistors or MOS transistors. One end of each of the three resistors R1, R2, and R3 in the three first voltage divider circuits is connected together and then connected to the control module 120. Their output ends are connected to the positive electrode of a power supply, such as the MCU in the figure, through a second voltage divider circuit. The emitters of Q1, Q2, and Q3 are connected together and then grounded. The resistance values of the three resistors R1, R2, and R3 in the figure are all different. Of course, Q1, Q2, and Q3 use NPN-type switching devices. When each driver chip is in normal operation, the default output of the state feedback terminal is high. When the driver chip fails, its output changes from high to low, and the corresponding first group circuit is disconnected. For example, when Q1 is disconnected, the impedance value of the switching circuit becomes the parallel resistance of the second and third first voltage divider circuits, and the potential at the output terminal changes. Based on the changed potential, the control module determines that the driver chip 110a has failed.

[0042] In another embodiment, a short circuit is used to adjust the impedance value of the switch circuit 130, thereby achieving the positioning of the driver chip 110. Figure 4 As shown, the first voltage divider circuits 133 are connected in series. When a low-level signal exists in the state feedback signal inputted by each control terminal 131 , one of the low-level signals inputted by at least two first voltage divider circuits 133 is short-circuited.

[0043] It should be noted that the first voltage divider circuit 133 includes a second switching device and at least one second voltage divider device; the second switching device is connected in parallel with the at least one second voltage divider device, and the base of the second switching device is connected to the state feedback terminal of the driver chip 110. It is understood that the second voltage divider device is the same as the first voltage divider device, and at least one second voltage divider device can be connected in series and / or in parallel, and then connected in parallel with the second switching device. In addition, the second switching device can also be implemented using a switch combination circuit, that is, multiple second switching devices are selected and connected in series and / or in parallel.

[0044] like Figure 5As shown, each first voltage divider circuit (133a, 133b, and 133c) is composed of a second resistor and a second switching device. That is, the parallel circuit of Q11 and R11 in the figure constitutes the first first voltage divider circuit, the parallel circuit of Q21 and R21 constitutes the second first voltage divider circuit, and the parallel circuit of Q31 and R31 constitutes the third first voltage divider circuit. Then Q11, Q21, and Q31 are respectively connected to the first driver chip 110a, the second driver chip 110b, and the third driver chip 110c. Q11, Q21, and Q31 in the figure are PNP-type switching devices, such as transistors, MOS transistors, etc. At this time, the three resistors R11, R21, and R31 in the three first voltage divider circuits are connected in series in sequence. Then, the resistor R11 is connected to the control module 120 and is also connected to the positive electrode of the power supply through a second voltage divider circuit R4. The resistor R31 is grounded. The resistance values of the three resistors R11, R21, and R31 in the figure are different.

[0045] In this regard, when all driver chips are in normal working state, Q11, Q21 and Q31 are cut off when the state feedback terminal output is high. When the state feedback terminal output becomes low, Q11, Q21 or Q31 will be turned on. For example, when the driver chip 110a fails, Q11 will be turned on, and the resistor R11 will be short-circuited by Q11, the total impedance value of its switching circuit will decrease, and the potential at the output terminal will change. Based on this change, the control module can determine that the driver chip 110a is faulty.

[0046] In a feasible embodiment, the switching circuit 130 also includes a second voltage divider circuit 134 and a setting circuit 135; wherein, the second voltage divider circuit 134 is arranged between the fault detection end and the power supply end of the control module 120; the first connection end of the setting circuit 135 is connected to the power supply end, and the second connection end is connected to the state feedback end of the driving chip 110, that is, it is arranged between the power supply end and each of the state feedback ends.

[0047] It should be noted that the second voltage divider circuit 134 can be a circuit composed of at least one resistor connected in series and / or in parallel, one end of which is connected to the control module 120, and the other end can be grounded or connected to the positive pole of the power supply (such as 5V). Figure 6 shown.

[0048] The setting circuit 135 can be a pull-up circuit or a pull-down circuit. Whether to use a pull-up circuit or a pull-down circuit is selected according to the type of switching device in the switching circuit 130. When a PNP type power tube is selected, the pull-up circuit is selected to set the driver chip 110 to a high level when it is in normal working state. When the driver chip 110 fails, the output signal of one of the driver chips 110 is used as the reference, that is, the low level, thereby controlling the conduction of the switching device to adjust the impedance value of the switching circuit 130 itself, so that the control module 120 can determine which driver chip 110 is faulty.

[0049] In another embodiment, the switch circuit 130 can also be configured to have a structure with a control terminal 131 and an output terminal 132. If it is configured to have one, the fault detection circuit further includes: a delay control circuit 136 connected to the state feedback terminals of at least two of the driver chips 110; the delay control circuit 136 outputs a clock signal to control each of the state feedback terminals to output a state feedback signal at different times; Figure 7 shown.

[0050] In the figure, the state feedback terminals of at least two driver chips 110 are connected together and connected to the control terminal 131 in the switch circuit 130, and the delay control circuit 136 has the same number of output terminals as the driver chips 110, each of which is connected to a state feedback terminal. By controlling the clock signal of each output terminal of the delay control circuit 136 to be asynchronous, the state feedback signals output by each driver chip 110 are formed into a signal sequence. Based on the time sequence of the signal sequence, the state feedback signals are controlled to be sequentially input into the control terminal 131, and the control module 120 performs fault analysis and fault location based on this time sequence.

[0051] By configuring a switching circuit in this embodiment, fault detection and location of different driver chips can be achieved. This requires only configuring a circuit with multiple interfaces and adjustable output impedances on an existing fault detection receiver for fault analysis and location. This solves the problem that existing technologies can only detect driver chip faults but cannot locate the faulty driver chip.

[0052] The present application also provides a motor drive device, such as Figure 8 As shown, the device includes: a bridge circuit 810 and a fault detection circuit 820 provided in the above embodiment;

[0053] The driver chip 110 in the fault detection circuit 820 is connected to the bridge circuit 810 and controls the on / off of the bridge circuit 810 by outputting a switch signal.

[0054] The bridge circuit 810 includes at least two bridge arms, each of which includes at least one power device. One power device corresponds to one driver chip 110 , and the output terminal of the driver chip 110 is connected to the control terminal of the power device.

[0055] It should be noted that the bridge circuit 810 is a three-phase bridge circuit, which has three bridge arms. For example, each bridge arm has two power devices, and the two power devices correspond to the upper bridge and the lower bridge respectively. The driver chip corresponding to the power device of the upper bridge in the three bridge arms is connected to a switch circuit, and similarly, the lower bridge is connected to another switch circuit. Figure 5 For example, the switching circuit in the figure includes a resistor divider circuit composed of R11, R21, R31, and R4 and three transistors (Q11, Q21, and Q31).

[0056] When the driver chip is in normal working state, the FLT pins of the U11, U21, and U31 driver chips output a high level. At this time, the FAULT1, FAULT2, and FAULT3 signals are all high, Q11, Q21, and Q31 are all in the off state, and the MCU_FAULT voltage is V1.

[0057] When the U11 driver chip is working abnormally, the FLT pin of the U11 driver chip outputs a low level. At this time, FAULT1 is low, Q11 is in the open state, Q11 is on R2, and the R21 resistor is short-circuited. At this time, the MCU_FAULT voltage is V2. According to the working status of the driver chip, the status of Q11, Q21, and Q31 are combined. The MCU_FAULT voltage has 8 states. The faulty driver chip can be located according to the level signal.

[0058] Finally, it should be noted that the above embodiments are only specific implementation methods of the present application, which are used to illustrate the technical solutions of the present application, rather than to limit them. The scope of protection of the present application is not limited thereto. Although the present application has been described in detail with reference to the above embodiments, those skilled in the art should understand that any person skilled in the art who is familiar with the technical field can still modify the technical solutions described in the above embodiments within the technical scope disclosed in the present application, or make equivalent replacements for some of the technical features therein; and these modifications, changes or replacements do not deviate from the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present application, and should all be included in the scope of protection of the present application. Therefore, the scope of protection of the present application should be based on the scope of protection of the claims.

Claims

1. A fault detection circuit, characterized in that: include: At least two driver chips, a control module and a switching circuit; The control terminal of the switch circuit is connected to the state feedback terminal of the driver chip, and the driver chip outputs a state feedback signal to control the conduction and shutdown of each switch tube in the switch circuit; The output end of the switch circuit is connected to the control module, and the switch circuit outputs a level signal corresponding to the resistance value.

2. The fault detection circuit according to claim 1, characterized in that: If the number of the control terminal of the switch circuit is one, the fault detection circuit further comprises: a delay control circuit connected to the state feedback terminals of at least two of the driver chips; The delay control circuit outputs a clock signal to control each of the state feedback terminals to output a state feedback signal at different times.

3. The fault detection circuit according to claim 1, characterized in that: If the number of the control terminals of the switch circuit is at least two, each of the control terminals is connected to a state feedback terminal of the driver chip.

4. The fault detection circuit according to claim 3, characterized in that: The switch circuit includes: at least two first voltage-dividing circuits, each of the first voltage-dividing circuits corresponds to one of the control terminals, and impedance values of the first voltage-dividing circuits are unequal.

5. The fault detection circuit according to claim 4, characterized in that: The first voltage-dividing circuits are connected in parallel. When a low-level signal exists in the state feedback signal input from each control terminal, one of at least two first voltage-dividing circuits inputting the low-level signal is disconnected.

6. The fault detection circuit according to claim 5, characterized in that: The first voltage dividing circuit includes a first switching device and at least one first voltage dividing device; The first switching device is connected in series with the at least one first voltage divider device, and a base of the first switching device is connected to a state feedback terminal of the driving chip.

7. The fault detection circuit according to claim 4, characterized in that: The first voltage-dividing circuits are connected in series. When a low-level signal exists in the state feedback signal inputted by each of the control terminals, one of at least two first voltage-dividing circuits inputting the low-level signal is short-circuited.

8. The fault detection circuit according to claim 7, characterized in that: The first voltage dividing circuit includes a second switching device and at least one second voltage dividing device; The second switching device is connected in parallel with the at least one second voltage divider device, and a base of the second switching device is connected to a state feedback terminal of the driving chip.

9. The fault detection circuit according to any one of claims 2 to 8, characterized in that: The switch circuit further includes a second voltage divider circuit, which is provided between the fault detection terminal and the power supply terminal of the control module.

10. The fault detection circuit according to any one of claims 1 to 8, characterized in that: The fault detection circuit further includes a setting circuit arranged between the power supply terminal and each of the state feedback terminals.

11. A motor drive device, characterized in that: include: A bridge circuit and a fault detection circuit according to any one of claims 1 to 10; The driver chip in the fault detection circuit is connected to the bridge circuit and controls the on and off of the bridge circuit by outputting a switch signal.

12. The motor drive device according to claim 11, wherein: The bridge circuit comprises at least two bridge arms, each of which comprises at least one power device; One of the power devices corresponds to one driver chip, and the output end of the driver chip is connected to the control end of the power device.

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