Current acquisition circuit based on non-intrusive power load monitoring
Through the high-end and low-end current acquisition circuit combined with the step-down circuit, the dynamic response and anti-interference problems of the current acquisition circuit are solved, and the rapid and low-power current change capture is achieved. It is suitable for long-term stable operation and has the advantages of small size and low cost.
Patent Information
- Application Number
- CN202422386056.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-29
- Publication Date
- 2025-08-12
- Estimated Expiration
- 2034-09-29
AI Technical Summary
There are problems with the layout design and selection of external filter capacitors in the existing current acquisition circuit, which affects the dynamic response and anti-interference ability of the system, and has high power consumption, making it difficult to operate stably for a long time.
The high-end and low-end current acquisition circuit design is adopted, combined with a step-down circuit, an amplifier and a field effect tube, and the output voltage is reduced to a sampleable range through a differential circuit, and combined with a low-power design, it achieves fast response and high-precision current acquisition.
It achieves fast response and high-precision current change capture, reduces power consumption, is suitable for long-term stable operation, with the advantages of small size, low cost and easy integration.
Smart Images

Figure CN223217577U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to a current acquisition circuit, in particular to a current acquisition circuit based on non-invasive power load monitoring, and belongs to the technical field of current acquisition circuits. Background Art
[0002] A current acquisition circuit based on non-intrusive power load monitoring is a circuit used to detect the current in a circuit. It usually consists of a current sensor, a signal conditioning circuit, and an analog-to-digital converter (ADC).
[0003] When designing a current acquisition circuit, the following points should be noted:
[0004] Confirm the application environment: Ensure that the operating environment meets the requirements of the chip specification, such as temperature range, power supply voltage, input signal range, etc.
[0005] Layout design: To ensure the performance and reliability of the current acquisition circuit, layout design is crucial. Avoid crossing analog and digital signals, minimize analog signal and power lines, and separate analog and digital signal ground lines.
[0006] External filter capacitor selection: Input pins require external filter capacitors to reduce high-frequency noise in the input signal. Choosing the right filter capacitor can improve the system's anti-interference ability, but excessively large capacitance can increase chip response time and affect the system's dynamic response.
[0007] Therefore, there is an urgent need to improve the current acquisition circuit to solve the above problems. Utility Model Content
[0008] The purpose of the present utility model is to provide a current acquisition circuit based on non-invasive power load monitoring. The current acquisition circuit usually has the characteristics of fast response, can capture the information of current changes in a timely manner, adopts a low-power design, so as to facilitate long-term stable operation. The current acquisition circuit usually adopts an integrated circuit design, which has the advantages of small size, low cost, and easy integration.
[0009] In order to achieve the above-mentioned purpose, the main technical solutions adopted by this utility model include:
[0010] A current acquisition circuit based on non-invasive power load monitoring includes a high-end current acquisition circuit and a low-end current acquisition circuit connected via a step-down circuit. The high-end current acquisition circuit includes an amplifier U1 and resistors R1, R2, R4, and R7 electrically connected to the amplifier U1. The resistor R1 is electrically connected to pins 4 and 3 of the amplifier U1. The resistors R2 and R4 are connected in parallel to a field-effect transistor Q2.
[0011] The low-end current acquisition circuit includes an amplifier U2 and resistors R3, R6 and R8 electrically connected to the amplifier U2. The resistor R3 is electrically connected to pins 4 and 3 of the amplifier U2. A field effect transistor Q2 is connected in series with the resistor R8.
[0012] Preferably, the resistor R2 is electrically connected to the pin 3 of the amplifier U1, and a first load is electrically connected between the resistor R2 and the field effect transistor Q2 via a first single-phase power PH2;
[0013] The field effect transistor Q2 is electrically connected to a control circuit CTRL1 .
[0014] Preferably, a resistor R5 connected in parallel with the resistor R7 is provided on the pin 1 of the effect tube Q2, and the resistor R5 and the resistor R4 are connected in parallel to a first power supply VCC.
[0015] Preferably, pin 3 of the amplifier U2 is electrically connected to the resistor R6, the resistor R8 is electrically connected to pin 1 of the amplifier U2, the resistor R8 is electrically connected to the field effect transistor Q1 in series, and is electrically connected to a second single-phase power PH2, and the second single-phase power PH2 is electrically connected to a second load.
[0016] Preferably, the field effect transistor Q1 is connected in series with the second single-phase power PH2 and then electrically connected to a second power supply VCC.
[0017] Preferably, the step-down circuit is provided with a transistor U4, a resistor R9 is electrically connected to pin 1 of the transistor U4, and resistors R11 and R12 are provided in parallel on pin 2 of the transistor U4;
[0018] Pins 1 and 3 of the transistor U4 are electrically connected to a resistor R10 .
[0019] Preferably, the high-end current acquisition formula of the high-end current acquisition circuit is:
[0020] I 高 =Vout*R2 / (R1*R4).
[0021] Preferably, the low-end current acquisition formula of the low-end current acquisition circuit is:
[0022] I 低 =Vout*R6 / (R3+R6) / R8.
[0023] The utility model has at least the following beneficial effects:
[0024] Current acquisition circuits usually have the characteristics of fast response, can capture information about current changes in a timely manner, and adopt low-power design to facilitate long-term stable operation. Current acquisition circuits usually adopt integrated circuit design, which has the advantages of small size, low cost, and easy integration. BRIEF DESCRIPTION OF THE DRAWINGS
[0025] The drawings described herein are used to provide a further understanding of the present application and constitute a part of the present application. The illustrative embodiments of the present application and their descriptions are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings:
[0026] Figure 1 This is a schematic diagram of the utility model;
[0027] Figure 2 This is the high-end current acquisition circuit diagram of the utility model;
[0028] Figure 3 This is the low-end current acquisition circuit diagram of the utility model;
[0029] Figure 4 This is a step-down circuit diagram of the utility model.
[0030] In the figure, 1. High-end current collection circuit; 2. Buck circuit; 3. Low-end current collection circuit. DETAILED DESCRIPTION
[0031] The following will describe the implementation methods of the present application in detail with reference to the accompanying drawings and examples, so that the implementation process of how the present application applies technical means to solve technical problems and achieve technical effects can be fully understood and implemented accordingly.
[0032] like Figures 1-4As shown, the current acquisition circuit based on non-invasive power load monitoring provided by this embodiment includes a high-end current acquisition circuit 1 and a low-end current acquisition circuit 3 connected through a step-down circuit 2. The high-end current acquisition circuit 1 includes an amplifier U1 and resistors R1, R2, R4 and R7 electrically connected to the amplifier U1. The resistor R1 is electrically connected to pins 4 and 3 of the amplifier U1. The resistors R2 and R4 are connected in parallel with a field effect transistor Q2. The input and output voltages are proportionally reduced to a range that can be sampled by the ADC using a differential circuit through the operational amplifier LMC6482, and then the ADC is used to sample the output voltage. Sampling, the software calculates the output voltage, the input voltage is sampled by the MCU internal op amp and then sent to the ADC for sampling. The accuracy of the current acquisition circuit is usually high, reaching the order of a few milliamperes, which meets the requirements of most applications. The current acquisition circuit usually has the characteristics of fast response and can capture the information of current changes in a timely manner. The current acquisition circuit usually adopts a low-power design to facilitate long-term stable operation. The current acquisition circuit usually uses high-reliability components and materials to ensure its long-term stable operation. The current acquisition circuit usually adopts an integrated circuit design with the advantages of small size, low cost, and easy integration.
[0033] The resistor R2 is electrically connected to the pin 3 of the amplifier U1. A first load is electrically connected between the resistor R2 and the field effect transistor Q2 via the first single-phase power PH2. The field effect transistor Q2 is electrically connected to the control circuit CTRL1. The high-end current collection formula of the high-end current collection circuit 1 is:
[0034] I 高 =Vout*R2 / (R1*R4);
[0035] The virtual disconnection of the input terminal shows:
[0036] V+ / R7=(V2-V+) / R5;
[0037] Shorten to get:
[0038] V+=V-;
[0039] The current of one path to the negative input is equal:
[0040] (V–V OUT ) / R1=(V1-V-) / R2;
[0041] Usually when using this circuit, R1=R7, R2=R5;
[0042] The above formula is:
[0043] V OUT =(V2-V1)*R1 / R2;
[0044] V2-V1=I*R4;
[0045] so,
[0046] I 高 =Vout*R2 / (R1*R4);
[0047] The low-end current acquisition circuit 3 includes an amplifier U2 and resistors R3, R6, and R8 electrically connected to the amplifier U2. The resistor R3 is electrically connected to pins 4 and 3 of the amplifier U2. A field-effect transistor Q2 is provided in series with the resistor R8. A resistor R5 connected in parallel with the resistor R7 is provided on pin 1 of the field-effect transistor Q2. The resistors R5 and R4 are connected in parallel to a first power supply VCC. Pin 3 of the amplifier U2 is electrically connected to the resistor R6. The resistor R8 is electrically connected to pin 1 of the amplifier U2. The resistor R8 is electrically connected in series with the field-effect transistor Q1 to a second single-phase power supply PH2. The second single-phase power supply PH2 is electrically connected to a second load. The field-effect transistor Q1 is electrically connected in series with the second single-phase power supply PH2 to a second power supply VCC. The low-end current acquisition formula of the low-end current acquisition circuit 3 is:
[0048] I 低 =Vout*R6 / (R3+R6) / R8;
[0049] Analyze the principle:
[0050] Using the virtual short characteristics of the op amp, we can get:
[0051] V+=V-;
[0052] By using the virtual-off characteristic of the op amp, there is no current flowing through the input and output ends, so the current flowing through R3 and R6 is equal.
[0053] (V OUT -V-) / R3=V- / R6;
[0054] From the above two formulas, we can get
[0055] V OUT =V+*(R3+R6) / R6;
[0056] And there are:
[0057] V+=I*R8;
[0058] So we have:
[0059] I=V+ / R8
[0060] I 低 =Vout*R6 / (R3+R6) / R8;
[0061] Adjust the resistance values of several resistors and sample Vout using the ADC of the microcontroller.
[0062] In this embodiment, if Figure 4 As shown, the step-down circuit 2 is provided with a transistor U4, and a resistor R9 is electrically connected to pin 1 of the transistor U4. Resistors R11 and R12 are provided in parallel on pin 2 of the transistor U4. Resistors R10 are electrically connected to pins 1 and 3 of the transistor U4. The input and output voltages are proportionally reduced to a range that can be sampled by the ADC using a differential circuit through the operational amplifier LMC6482. The ADC is then used for sampling, and the output voltage is calculated by software.
[0063] For example, certain words are used in the specification and claims to refer to specific components. Those skilled in the art should understand that hardware manufacturers may use different terms to refer to the same component. This specification and claims do not use differences in names as a way to distinguish components, but use differences in the functions of the components as the criteria for distinction. For example, "including" mentioned throughout the specification and claims is an open term, so it should be interpreted as "including but not limited to". "Approximately" means that within an acceptable error range, those skilled in the art can solve technical problems within a certain error range and basically achieve technical effects.
[0064] It should be noted that the terms "include," "comprises," or any other variations thereof are intended to encompass non-exclusive inclusion, such that a product or system comprising a series of elements includes not only those elements but also other elements not explicitly listed, or elements inherent to such product or system. In the absence of further limitations, an element defined by the phrase "comprising a..." does not exclude the presence of other identical elements in the product or system comprising the element.
[0065] The above description shows and describes several preferred embodiments of the present invention. However, as previously mentioned, it should be understood that the present invention is not limited to the form disclosed herein and should not be construed as excluding other embodiments. Instead, the present invention can be used in various other combinations, modifications, and environments and can be modified within the scope of the present invention as taught herein or through the techniques or knowledge in the relevant field. Modifications and variations made by those skilled in the art that do not depart from the spirit and scope of the present invention are intended to be protected by the claims appended hereto.
Claims
1. A current acquisition circuit based on non-invasive power load monitoring, comprising a high-end current acquisition circuit (1) and a low-end current acquisition circuit (3) connected via a step-down circuit (2), characterized in that: The high-end current acquisition circuit (1) comprises an amplifier U1 and a resistor R1, a resistor R2, a resistor R4 and a resistor R7 electrically connected to the amplifier U1, the resistor R1 being electrically connected to pins 4 and 3 of the amplifier U1, the resistor R2 and the resistor R4 being connected in parallel and connected to a field effect transistor Q2; The low-end current acquisition circuit (3) comprises an amplifier U2 and a resistor R3, a resistor R6 and a resistor R8 electrically connected to the amplifier U2, the resistor R3 being electrically connected to pins 4 and 3 of the amplifier U2, and a field effect transistor Q2 being arranged in series with the resistor R8.
2. The current acquisition circuit based on non-invasive power load monitoring according to claim 1, characterized in that: The resistor R2 is electrically connected to the pin 3 of the amplifier U1, and a first load is electrically connected between the resistor R2 and the field effect transistor Q2 via a first single-phase power PH2; The field effect transistor Q2 is electrically connected to a control circuit CTRL1 .
3. The current acquisition circuit based on non-invasive power load monitoring according to claim 1, characterized in that: A resistor R5 connected in parallel with the resistor R7 is provided on the pin 1 of the effect tube Q2 . The resistor R5 and the resistor R4 are connected in parallel to a first power supply VCC.
4. The current acquisition circuit based on non-invasive power load monitoring according to claim 1, characterized in that: Pin 3 of the amplifier U2 is electrically connected to the resistor R6, the resistor R8 is electrically connected to pin 1 of the amplifier U2, the resistor R8 and the field effect transistor Q1 are connected in series and then electrically connected to a second single-phase power PH2, and the second single-phase power PH2 is electrically connected to a second load.
5. The current acquisition circuit based on non-invasive power load monitoring according to claim 4, characterized in that: The field effect transistor Q1 and the second single-phase power PH2 are connected in series and are electrically connected to a second power supply VCC.
6. The current acquisition circuit based on non-invasive power load monitoring according to claim 1, characterized in that: The step-down circuit (2) is provided with a transistor U4, and a resistor R9 is electrically connected to pin 1 of the transistor U4. Resistors R11 and R12 are provided in parallel on pin 2 of the transistor U4. Resistors R10 are electrically connected to pins 1 and 3 of the transistor U4.