Dynamic voltage restorer in high-frequency isolation mode

Abstract

The utility model discloses a dynamic voltage restorer in a high-frequency isolation mode. The dynamic voltage restorer is connected in series between a power grid US and a sensitive load UL. The dynamic voltage restorer comprises a direct current source Udc, a high-frequency isolation DC / DC circuit, an H-bridge inverter circuit and a thyristor bypass system. The direct current source Udc provides a direct current power supply for the high-frequency isolation DC / DC circuit, and the output of the high-frequency isolation DC / DC circuit is connected with the H-bridge inverter circuit to provide stable direct current voltage for the H-bridge inverter circuit; the output of the H-bridge inverter circuit is connected with the control end of the thyristor bypass system, the input end of the thyristor bypass system is connected with a power grid US, and the output end of the thyristor bypass system is connected with a sensitive load UL. The beneficial effects of the utility model are that the system response speed is fast, the power density is high, the reliability is good, the isolation degree is high, the continuous compensation is supported, and the negative influence of the secondary pulsation on the cascade system is eliminated at the same time.

Description

Technical Field

[0001] This utility model belongs to the field of power electronics technology, specifically, it relates to a dynamic voltage restorer with high-frequency isolation. Background Technology

[0002] Currently, with economic and social development and the increasing complexity of power grid structures, a large number of distributed power sources, power electronic devices, and impulsive loads are connected to the power grid, leading to increasingly prominent power quality problems, among which voltage dips and voltage surges are particularly serious. Voltage dips not only reduce the reliability and stability of electrical equipment operation, but may even cause equipment damage or production interruptions. According to statistics, voltage dips account for as much as 80% of all power quality problems, and more than 90% of equipment failures originate from voltage dips.

[0003] A Dynamic Voltage Restorer (DVR), as an effective power quality management device, is connected in series between the power grid and the load to compensate for instantaneous voltage fluctuations in the grid in real time, ensuring the stability of the load-side voltage. However, traditional DVR technology has many limitations, such as:

[0004] (1) Traditional DVRs have a slow dynamic response speed, making it difficult to achieve fast voltage compensation;

[0005] (2) The compensation effect is affected by the power frequency isolation transformer, which has problems such as large harmonic loss, large size and high cost;

[0006] (3) When using energy storage units or grid-connected rectifiers for power supply, there is a problem of insufficient continuous compensation capability, making it difficult to effectively cope with both voltage drop and voltage surge at the same time.

[0007] (4) The DC side voltage has a second harmonic fluctuation problem, which further limits the compensation effect and stability.

[0008] In existing technologies, power frequency transformers are typically used for isolation. However, power frequency transformers have limited bandwidth, high harmonic losses, prominent instantaneous inrush current problems, and the compensation voltage is prone to phase shift and amplitude attenuation, thus affecting the actual compensation performance of the DVR.

[0009] In view of the problems existing in the current technology, the urgent issues that need to be addressed are:

[0010] (1) Dynamic response and efficiency issues caused by traditional power frequency isolation:

[0011] Traditional DVRs achieve grid isolation through power frequency transformers, which has problems such as slow dynamic response, compensation voltage phase shift, large transformer size, and high losses.

[0012] (2) Problems with insufficient continuity and stability of power supply:

[0013] Existing DVRs rely on energy storage units or grid-connected rectifiers for power supply, which has problems such as limited compensation energy and DC side voltage fluctuations.

[0014] (3) Interference problem of double-frequency power in single-phase system on DC side:

[0015] The second harmonic component (2f) of the instantaneous power output of a single-phase DVR causes second harmonic fluctuations in the DC-side voltage and inductor current, affecting system stability.

[0016] (4) The contradiction between the complexity of protection logic and response speed:

[0017] Traditional DVR switching relies on multi-level hardware protection (relays, thyristors, etc.), which has a long operating time and can easily cause compensation delays or equipment damage. Utility Model Content

[0018] This utility model is a dynamic voltage restorer with high-frequency isolation designed to solve the above-mentioned technical problems. It is used to improve the voltage quality of the distribution network and is suitable for rapid response and effective compensation for power quality problems such as voltage dips and surges in the power grid.

[0019] The technical solution adopted by this utility model to solve its technical problem is:

[0020] A dynamic voltage restorer with high-frequency isolation, wherein the dynamic voltage restorer is connected in series with the power grid U S With sensitive load U L Between; the dynamic voltage restorer includes: a DC source U dc High-frequency isolated DC / DC circuit, H-bridge inverter circuit and thyristor bypass system; the DC source U dc A DC power supply is provided for a high-frequency isolated DC / DC circuit. The output of the high-frequency isolated DC / DC circuit is connected to an H-bridge inverter circuit to provide it with a stable DC voltage. The output of the H-bridge inverter circuit is connected to the control terminal of the thyristor bypass system, and the input terminal of the thyristor bypass system is connected to the power grid U. S The output terminal is connected to the sensitive load U. L .

[0021] The high-frequency isolation dynamic voltage restorer uses a bidirectional DC / DC topology in its high-frequency isolated DC / DC circuit, and the transformer is a high-frequency transformer.

[0022] The high-frequency isolation dynamic voltage restorer's H-bridge inverter circuit consists of four fully controlled MOSFETs S1, S2, S3, and S4, filter inductors L1 and L2, and filter capacitor C. fIt consists of choke inductors L3 and L4; the H-bridge circuit is formed by the four fully controlled MOSFETs S1, S2, S3 and S4, and the DC output of the high-frequency isolated DC / DC circuit is U. out Connected to the input of the H-bridge, the output of the H-bridge is connected to the choke inductors L3 and L4 respectively through filter inductors L1 and L2, and the filter capacitor C f The two filter inductors L1 and L2 are connected in parallel to the two choke inductors L3 and L4. The other ends of the two choke inductors L3 and L4 are respectively connected to the relays RE3 and RE2 in the thyristor bypass system.

[0023] The high-frequency isolation dynamic voltage restorer, the thyristor bypass system includes a thyristor SCR and relays RE1, RE2 and RE3 controlled by the thyristor SCR, with relay RE1 connected to the power grid U. S and sensitive load U L The power grid U is connected by relay RE2. S And inductor L4, connected to sensitive load U by relay RE3 L And inductor L3.

[0024] The high-frequency isolation dynamic voltage restorer is controlled by the thyristor SCR. The dynamic voltage restorer can be in operating mode 1, that is, relay RE1 is off, relays RE2 and RE3 are on, and fully controlled MOSFETs S1 and S3 are on.

[0025] The high-frequency isolation dynamic voltage restorer is controlled by the thyristor SCR. The dynamic voltage restorer can be in operating mode 2, that is, relays RE1 and RE2 are off, relay RE3 is on, and fully controlled MOSFETs S1 and S3 are on.

[0026] The high-frequency isolation dynamic voltage restorer is controlled by the thyristor SCR. The dynamic voltage restorer can be in working mode 3, that is, relays RE1 and RE2 are disconnected, relay RE3 is turned on, and the fully controlled MOSFETs S1 and S3 are in sinusoidal pulse width modulation (SPWM) state.

[0027] The high-frequency isolation dynamic voltage restorer is controlled by the thyristor SCR. The dynamic voltage restorer can be in operating mode 4, that is, relay RE1 is off, relays RE2 and RE3 are on, and fully controlled MOSFETs S2 and S4 are on.

[0028] Key innovation points

[0029] 1. High-frequency isolated DC / DC circuit: High-frequency transformers are used to replace power frequency transformers. Combined with bidirectional DC / DC topology, power density is improved and DC-side second harmonic fluctuations are suppressed.

[0030] 2. H-bridge inverter circuit: Through a quasi-PR controller and load current feedforward strategy, it achieves fast dynamic response and high-precision compensation voltage generation.

[0031] 3. Thyristor bypass system: Multi-level protection logic (relay → thyristor → switch) shortens fault clearing time and ensures system reliability and response speed.

[0032] (1) To address the dynamic response and efficiency issues caused by traditional power frequency isolation, a high-frequency isolation scheme is designed to eliminate the negative impact of power frequency transformers and improve system response speed and power density.

[0033] (2) To address the lack of continuity and stability of the power supply, a power supply structure based on high-frequency isolated bidirectional DC / DC is provided. The DC side of the grid-connected inverter stabilizes the power supply, enabling bidirectional energy flow and supporting continuous compensation.

[0034] (3) To address the interference of double frequency power on the DC side of a single-phase system, a control strategy to suppress double frequency power interference is proposed to eliminate the negative impact of secondary pulsation on the cascaded system.

[0035] (4) To address the contradiction between the complexity of the protection logic and the response speed, the protection logic is optimized, and the fault clearing time is shortened through software and hardware collaborative control, thereby improving the system reliability.

[0036] The advantages of this invention are: fast system response speed, high power density, good reliability, high isolation and support for continuous compensation, while eliminating the negative impact of secondary pulsation on the cascaded system. Attached Figure Description

[0037] Figure 1 This is a DVR topology diagram for a single-phase DC / DC converter with high-frequency isolation.

[0038] Figure 2 This is a schematic diagram of the switching unit;

[0039] Figure 3(a) is a schematic diagram of the working mode 1 of the voltage compensator of this utility model;

[0040] Figure 3(b) is a schematic diagram of the working mode 2 of the voltage compensator of this utility model;

[0041] Figure 3(c) is a schematic diagram of the working mode 3 of the voltage compensator of this utility model;

[0042] Figure 3(d) is a schematic diagram of the working mode 4 of the voltage compensator of this utility model;

[0043] Figure 4 This is a schematic diagram of the voltage compensator of this utility model.

[0044] Figure 5This is an equivalent structural diagram of the DVR of this utility model;

[0045] Figure 6 This is the DVR compensation control diagram of this utility model;

[0046] Figure 7 This is a flowchart illustrating the startup logic of this utility model;

[0047] Figure 8 This is a flowchart of the shutdown logic of this utility model;

[0048] Figure 9 This is a block diagram of the system working logic of this utility model;

[0049] Figure 10 This is the fault protection logic diagram for the DVR of this utility model. Detailed Implementation

[0050] The present invention will be further described below with reference to the accompanying drawings and embodiments.

[0051] like Figure 1 As shown, this utility model discloses a dynamic voltage restorer with high-frequency isolation, wherein the dynamic voltage restorer is connected in series with the power grid U. S With sensitive load U L Between; the dynamic voltage restorer includes: a DC source U dc High-frequency isolated DC / DC circuit, H-bridge inverter circuit and thyristor bypass system; the DC source U dc A DC power supply is provided for a high-frequency isolated DC / DC circuit. The output of the high-frequency isolated DC / DC circuit is connected to an H-bridge inverter circuit to provide it with a stable DC voltage. The output of the H-bridge inverter circuit is connected to the control terminal of the thyristor bypass system, and the input terminal of the thyristor bypass system is connected to the power grid U. S The output terminal is connected to the sensitive load U. L .

[0052] The high-frequency isolated dynamic voltage restorer employs a bidirectional DC / DC topology in its high-frequency isolated DC / DC circuit, using a high-frequency transformer. This high-frequency isolated DC / DC circuit provides a stable DC voltage to the H-bridge inverter circuit. When large voltage fluctuations cause active power to flow back, it effectively suppresses the rise in low-voltage DC bus voltage. Furthermore, the isolated structure achieves electrical isolation between the series and parallel sides, improving system safety and achieving the goal of increasing power density while suppressing DC-side second-harmonic fluctuations. The high-frequency isolated DC / DC circuit includes a high-frequency transformer and a fully controlled switching transistor (S...). i1 S i2 S i3 S i4 S i6 S i7 S i8 and Si9 It consists of rectifier diodes, filter capacitors, and filter inductors.

[0053] The high-frequency isolation dynamic voltage restorer, the H-bridge inverter circuit consists of four fully controlled MOSFETs S1, S2, S3 and S4, filter inductors L1 and L2, and filter capacitor C. f It consists of choke inductors L3 and L4; an H-bridge circuit is formed by four fully controlled MOSFETs S1, S2, S3 and S4, and the DC output U of the high-frequency isolated DC / DC circuit is... out Connected to the input of the H-bridge, the output of the H-bridge is connected to the choke inductors L3 and L4 respectively through filter inductors L1 and L2, and the filter capacitor C f The two filter inductors L1 and L2 are connected in parallel to the connection points of the two choke inductors L3 and L4. The other ends of the two choke inductors L3 and L4 are respectively connected to the relays RE3 and RE2 in the thyristor bypass system.

[0054] The H-bridge inverter circuit generates the required AC voltage by switching on and off the fully controlled MOSFET power transistors, thereby compensating for the mains voltage. The H-bridge inverter circuit output includes an LC filter stage, which filters out high-order harmonics in the compensation voltage output, enhancing the compensation effect. To suppress common-mode signals, two inductors are added to the bridge arm output lines, and two symmetrical small inductor modules are added above and below the output bus of the LC filter stage to prevent oscillation between the output capacitor and the load.

[0055] The high-frequency isolation dynamic voltage restorer, the thyristor bypass system includes a thyristor SCR and relays RE1, RE2 and RE3 controlled by the thyristor SCR, with relay RE1 connected to the power grid U. S and sensitive load U L The power grid U is connected by relay RE2. S And inductor L4, connected to sensitive load U by relay RE3 L And inductor L3.

[0056] The thyristor bypass system is designed to complete the DVR switching task more quickly. When the DVR is in normal operation, relay RE1 is normally closed and relay RE2 is normally open. When a voltage quality problem occurs, RE2 closes and RE1 opens, and the series side starts working. When a short circuit occurs in the load, it causes a sudden increase in current in the entire series-side inverter circuit, requiring rapid disconnection of the series-side device to protect the power switching transistors from damage. Since the bypass relay RE1 closes slowly, a thyristor is added to quickly complete the switching task.

[0057] The DVR is connected in series between the power grid and the sensitive load. When the power grid voltage is normal, the voltage compensator is in bypass mode. When the power grid voltage changes abruptly, the DVR can be put into use within a few milliseconds to effectively compensate for the voltage.

[0058] DVR network connection methods such as Figure 2 As shown in the dashed box, the DVR output is directly connected to the power grid using a switching switch. The states of the switching switch will have different combinations in different DVR modes. The DVR must ensure normal power supply to the load in bypass mode and be able to quickly connect to the power grid and output power in compensation mode.

[0059] Based on the above considerations, the system's operating modes are divided into: hot standby mode, rapid switch-in mode, compensation mode, and flexible exit mode, and analyzed as shown in Figure 3.

[0060] The high-frequency isolation dynamic voltage restorer is controlled by the thyristor SCR. The dynamic voltage restorer can be in operating mode 1, that is, relay RE1 is off, relays RE2 and RE3 are on, and fully controlled MOSFETs S1 and S3 are on; as shown in Figure 3(a), this mode first determines DC U out Whether the voltage is established, when DC U out After the voltage is established, switching transistors S1 and S3 are turned on, relays RE2 and RE3 are closed, the thyristor SCR is turned on, and then the bypass relay RE1 is turned off, completing the voltage compensator startup. This mode must ensure that the load receives normal power supply, and also ensure that compensation can be quickly activated when grid voltage distortion occurs.

[0061] The high-frequency isolation dynamic voltage restorer is controlled by the thyristor SCR. The dynamic voltage restorer can be in working mode 2, that is, relays RE1 and RE2 are off, relay RE3 is on, and fully controlled MOSFETs S1 and S3 are on. As shown in Figure 3(b), this mode is the switching mode before compensation is activated when the system detects a sudden change in grid voltage. This mode needs to determine whether the load current is greater than the rated value. If it is greater than the rated value, the compensator still executes the bypass mode command. If it is less than or equal to the rated value, the bypass mode of the compensator is switched off. The shorter the switching time, the smaller the impact on the grid. Therefore, it is necessary to control the thyristor to achieve fast turn-off.

[0062] The high-frequency isolation dynamic voltage restorer is controlled by the thyristor SCR. The dynamic voltage restorer can be in working mode 3, that is, relays RE1 and RE2 are off, relay RE3 is on, and the fully controlled MOSFETs S1 and S3 are in modulation state. Working mode 3: As shown in Figure 3(c), this mode is the compensation mode after the switching mode ends. At this time, the switching transistor enters the modulation mode according to the calculated duty cycle, and the AC side outputs the compensation voltage after being inverted by the H-bridge.

[0063] The high-frequency isolation dynamic voltage restorer is controlled by the thyristor SCR. The dynamic voltage restorer can be in operating mode 4, that is, relay RE1 is off, relays RE2 and RE3 are on, and fully controlled MOSFETs S2 and S4 are on. As shown in Figure 3(d), in this mode, when the system detects that the grid voltage has returned to normal, the device switches from compensation mode to flexible exit mode. First, the switching transistors S1 and S3 (or S2 and S4) are turned on, and the AC side no longer outputs compensation voltage, while ensuring normal power supply to the load side. Then, the thyristor is turned on, waiting for the next compensation.

[0064] (1) Analysis of voltage compensation principle

[0065] The compensation principle of a voltage compensator can be summarized as follows: A compensation command signal is generated by detecting the grid voltage. After modulation, this signal controls the inverter to produce the required compensation voltage. This compensation voltage is then filtered and superimposed on the grid voltage to ensure the load voltage remains normal, thus achieving the compensation purpose. Its schematic diagram is shown below. Figure 4 As shown.

[0066] This application's technical solution employs an in-phase voltage compensation strategy to improve the voltage compensation range of the device. A quasi-PR regulator is most suitable for controlling AC quantities. Based on this, a controller design for DVR voltage compensation is presented. First, the principle of its voltage compensation is analyzed, such as... Figure 5 The diagram shown is the equivalent structure of the DVR in the compensated state:

[0067] In the diagram, Us represents the voltage at the grid connection point to the equipment, uL represents the load voltage, iL represents the load current, uc represents the output voltage of the inverter after LC filtering, ic represents the output current of the inverter, and Uout represents the DC-side voltage of the inverter. The voltage relationships of the DVR device can be seen from the diagram:

[0068]

[0069] Based on this voltage relationship, the command value of the inverter output voltage can be calculated. The technical solution of this application adopts composite control, which combines the fast dynamic response of feedforward control with the high control accuracy of feedback control, thus achieving better voltage compensation. This application designs a controller that uses the inverter output voltage and output current as dual closed loops while incorporating load current feedforward. Figure 6 The diagram shown is a control block diagram of a DVR inverter.

[0070] The command value of the compensation voltage is obtained by subtracting the actual grid voltage from the ideal load voltage. The phase of the actual grid voltage is obtained through a software phase-locked loop (PLL) to construct the ideal load voltage. After the error value is corrected by a quasi-PR regulator, the command value of the output current is obtained. Ignoring the current in the output filter capacitor, the load current iL and the inverter output current ic satisfy the following relationship:

[0071]

[0072] Therefore, the inverter's output current includes a portion of the load current. When controlling the inner current loop, the load current is introduced as a feedforward, ensuring that the output current command includes the load current component. This improves the response speed of the inner current loop. The difference between the current command and the actual output current is then passed through a proportional regulator to obtain the SPWM modulation wave, which is used to output a pulse signal.

[0073] (2) System working logic

[0074] Normal startup and shutdown are the most basic functions of the system, and the process of entering hot standby is the startup process. For the shutdown process, refer to the system topology diagram for analysis. When the system needs to shut down, a shutdown command is issued via the touchscreen to initiate the shutdown process. For the inverter unit, the voltage command is set to 0. After the output voltage is reduced to a level that allows shutdown through closed-loop regulation, the inverter output is set to 0 level, i.e., S9 and S11 (or S10 and S12) are turned on. To prevent a short circuit in the inverter output voltage during shutdown due to AC voltage sampling at the zero-crossing point, a 1-second delay is added before the thyristor SCR is triggered to turn on, and relays RE1, RE2, and RE3 close. After determining that the inverter bridge arm current is 0, normally open relays RE2 and RE3 open. For the DC / DC unit, after entering shutdown mode, the duty cycle is set to 0. The system shutdown process ends when the low-voltage side voltage drops to 0. The system automatically enters reset mode after exiting shutdown mode, restoring the system state to its state before startup, awaiting the next startup. Figure 7 and 8 The diagram shown is a flowchart of the system startup and shutdown process.

[0075] The key to the proper functioning of a two-stage system is ensuring that its components can respond to each other and adjust their respective operating modes. In practice, this requires not only improvements to the controller but also careful consideration of the operating logic of the cascaded system. For example... Figure 9 The diagram shown is a block diagram of the system's working logic.

[0076] (3) System protection logic

[0077] Regarding system faults, if the fault occurs in the device itself, the fault protection needs to ensure power supply to the load. However, if the fault occurs on the grid side or the load side, the fault protection needs to protect the device itself. Taking all faults into account, a three-level protection logic was designed. The final result of the protection is that the device bypass switch closes, and the device is disconnected from the power grid.

[0078] In the switching unit, the switches are triggered simultaneously, but their operating times differ, exhibiting the following order: relay > thyristor > switching transistor. Therefore, the protection logic is as follows: Figure 10 As shown: The first level of protection involves the switching transistors S1 and S3 (or S2 and S4) conducting to form a circuit, preventing a large voltage from being applied to the voltage compensator. At this time, the current flowing through the compensator rises rapidly and reaches the hardware protection value set in advance for the transistors, blocking the transistor pulse. Then, the thyristor of the second level of protection conducts, bypassing the device from the power grid. Finally, the normally closed relay RE1 of the third level of protection conducts, and the grid-connected relays RE2 and RE3 are disconnected, cutting the device off from the power grid.

[0079] This utility model is not limited to the above-described preferred embodiments. Any other products that are the same as or similar to this utility model and derived by anyone under the guidance of this utility model shall fall within the protection scope of this utility model.

Claims

1. A dynamic voltage restorer with high-frequency isolation, the dynamic voltage restorer being connected in series with the power grid U S With sensitive load U L Between; characterized in that: The dynamic voltage restorer includes: a DC source U dc High-frequency isolated DC / DC circuit, H-bridge inverter circuit and thyristor bypass system; the DC source U dc A DC power supply is provided for a high-frequency isolated DC / DC circuit. The output of the high-frequency isolated DC / DC circuit is connected to an H-bridge inverter circuit to provide it with a stable DC voltage. The output of the H-bridge inverter circuit is connected to the control terminal of the thyristor bypass system, and the input terminal of the thyristor bypass system is connected to the power grid U. S The output terminal is connected to the sensitive load U. L .

2. The dynamic voltage restorer with high-frequency isolation according to claim 1, characterized in that: The high-frequency isolated DC / DC circuit adopts a bidirectional DC / DC topology, and the transformer is a high-frequency transformer.

3. The dynamic voltage restorer with high-frequency isolation according to claim 1, characterized in that: The H-bridge inverter circuit consists of four fully controlled MOSFETs S1, S2, S3, and S4, filter inductors L1 and L2, and filter capacitor C. f It consists of choke inductors L3 and L4; the H-bridge circuit is formed by the four fully controlled MOSFETs S1, S2, S3 and S4, and the DC output of the high-frequency isolated DC / DC circuit is U. out Connected to the input of the H-bridge, the output of the H-bridge is connected to the choke inductors L3 and L4 respectively through filter inductors L1 and L2, and the filter capacitor C f The two filter inductors L1 and L2 are connected in parallel to the two choke inductors L3 and L4. The other ends of the two choke inductors L3 and L4 are respectively connected to the relays RE3 and RE2 in the thyristor bypass system.

4. The dynamic voltage restorer with high-frequency isolation according to claim 1, characterized in that: The thyristor bypass system includes a thyristor SCR and relays RE1, RE2, and RE3 controlled by the thyristor SCR. Relay RE1 is connected to the power grid U. S and sensitive load U L The power grid U is connected by relay RE2. S And inductor L4, connected to sensitive load U by relay RE3 L And inductor L3.

5. The dynamic voltage restorer with high-frequency isolation according to claim 4, characterized in that: Controlled by the SCR thyristor, the dynamic voltage restorer can be in operating mode 1, i.e., relay RE1 is off, relays RE2 and RE3 are on, and fully controlled MOSFETs S1 and S3 are on.

6. The dynamic voltage restorer with high-frequency isolation according to claim 4, characterized in that: Controlled by the SCR thyristor, the dynamic voltage restorer can be in operating mode 2, i.e., relays RE1 and RE2 are off, relay RE3 is on, and fully controlled MOSFETs S1 and S3 are on.

7. The dynamic voltage restorer with high-frequency isolation according to claim 4, characterized in that: Controlled by the SCR thyristor, the dynamic voltage restorer can be in operating mode 3, i.e., relays RE1 and RE2 are off, relay RE3 is on, and the fully controlled MOSFETs S1 and S3 operate in sinusoidal pulse width modulation (SPWM) mode.

8. The dynamic voltage restorer with high-frequency isolation according to claim 4, characterized in that: Controlled by the SCR thyristor, the dynamic voltage restorer can be in operating mode 4, i.e., relay RE1 is off, relays RE2 and RE3 are on, and fully controlled MOSFETs S2 and S4 are on.

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