Display substrate and manufacturing method therefor, and display apparatus

Abstract

Provided in the present application are a display substrate and a manufacturing method therefor, and a display apparatus. The display substrate comprises: a base substrate; a planarization layer, which is located on the side of a display region in the base substrate in a first direction and which extends to one side of an isolation region; and an isolation wall, which is located on the side of the isolation region in the first direction, wherein the thickness of the planarization layer located on one side of the display region is greater than the thickness of the planarization layer located on one side of the isolation region; and there is a first preset distance between the planarization layer and the isolation wall. The embodiments of the present application use a step difference at an edge of a planarization layer and a gap between the planarization layer and an isolation wall to reduce or prevent the contact between organic adhesive residue and the isolation wall that causes the failure of the isolation wall, thereby helping to narrow a frame of a display screen or reduce an under-display sensor punch hole, improving the visual effect of the display screen and ensuring the display function of the display screen.

Description

Display substrate, manufacturing method thereof, and display device

[0001] This disclosure claims priority to Chinese patent application No. 202311634845.1 filed on November 30, 2023, entitled “A display substrate, a method for manufacturing the same, and a display device,” the entire contents of which are incorporated herein by reference. Technical Field

[0002] The present application relates to the field of display technology, and in particular to a display substrate and a manufacturing method thereof, and a display device. Background Art

[0003] The technological development direction of display devices depends largely on changes in market demand. At present, for display devices in the consumer market, users tend to pursue the overall visual impact and portability of the display screen. For example, when the display size is the same, mobile terminal users tend to pursue narrower bezels of the display screen. For another example, for the under-screen sensor hole screen currently widely used in terminal devices such as mobile phones and tablets, users hope that the hole can be as small as possible to reduce the visual impact of the hole on the overall display content and enhance the overall visual effect of the display screen.

[0004] It should be noted that the information distinguishing the invention in the above background technology is only used to enhance the understanding of the background of the invention, and therefore may include information that does not constitute prior art known to ordinary technicians in the field.

[0005] Summary of the Invention

[0006] The present invention provides a display substrate and a method for manufacturing the same, and a display device. The solution includes:

[0007] In one aspect, a display substrate is provided, comprising: a base substrate, a planar layer, and isolation walls;

[0008] The base substrate comprises: a display area, a non-display area, and an isolation area located between the display area and the non-display area;

[0009] The flat layer is located on one side of the display area along a first direction and extends to one side of the isolation area, wherein the first direction is a direction from the surface of the base substrate toward a surface away from the base substrate;

[0010] The isolation wall is located on one side of the isolation area along the first direction;

[0011] The thickness of the flat layer located on the display area side is greater than the thickness of the flat layer located on the isolation area side, and a first preset distance exists between the flat layer and the isolation wall.

[0012] Optionally, a first curved surface facing away from the base substrate and facing the isolation wall is provided on the flat layer on one side of the isolation region;

[0013] The orthographic projection of one end of the first curved surface away from the isolation wall on the base substrate overlaps with the boundary between the isolation area and the display area.

[0014] Optionally, the planar layer includes: a first sub-planar layer, a second sub-planar layer and a third sub-planar layer stacked in sequence along the first direction;

[0015] The second sub-planarizing layer covers a surface of the first sub-planarizing layer facing the isolation wall, and the third sub-planarizing layer covers a surface of the second sub-planarizing layer facing the isolation wall.

[0016] Optionally, the third sub-flat layer is provided with a first curved surface facing away from the base substrate and facing the isolation wall, and the second sub-flat layer is provided with a second curved surface facing away from the base substrate and facing the first curved surface;

[0017] The distance between one end of the first curved surface close to the isolation wall and the second sub-flat layer, and the distance between one end of the second curved surface close to the isolation wall and the first sub-flat layer are not less than a second preset distance.

[0018] Optionally, the planar layer further comprises: a fourth sub-planar layer located on a side of the third sub-planar layer away from the second sub-planar layer, the fourth sub-planar layer covering a surface of the third sub-planar layer facing the isolation wall;

[0019] The fourth sub-flat layer is provided with a first curved surface facing away from the base substrate and facing the isolation wall, the third sub-flat layer is provided with a second curved surface facing away from the base substrate and facing the first curved surface, and the second sub-flat layer is provided with a third curved surface facing away from the base substrate and facing the second curved surface;

[0020] The distance between one end of the first curved surface close to the isolation wall and the third sub-flat layer, the distance between one end of the second curved surface close to the isolation wall and the second sub-flat layer, and the distance between one end of the third curved surface close to the isolation wall and the first sub-flat layer are not less than a second preset distance.

[0021] Optionally, the planar layer includes: a first sub-planar layer, a second sub-planar layer, a third sub-planar layer and a fourth sub-planar layer stacked in sequence along the first direction;

[0022] The second sub-planar layer covers the surface of the first sub-planar layer facing the isolation wall, and the fourth sub-planar layer covers the surface of the third sub-planar layer facing the isolation wall;

[0023] There is a third preset distance between the first sub-flat layer and the isolation wall, and there is a third preset distance between the third sub-flat layer and the isolation wall, and there is the first preset distance between the second sub-flat layer and the isolation wall;

[0024] Wherein, the third preset distance is greater than the first preset distance.

[0025] Optionally, there is a fourth preset distance between the second sub-planar layer and the isolation wall;

[0026] The fourth preset distance is smaller than the third preset distance and larger than the first preset distance.

[0027] Optionally, a first groove is provided on the surface of the base substrate facing the first direction;

[0028] The first groove overlaps with the boundary between the display area and the isolation area, and the first groove has the first preset distance from the isolation wall;

[0029] Part of the flat layer is embedded in the first groove.

[0030] Optionally, the substrate includes: a gate insulating layer and a base layer located on a side of the gate insulating layer away from the planar layer; the isolation wall includes: a first metal layer and a second metal layer;

[0031] The gate insulating layer comprises: a first sub-insulating layer, a second sub-insulating layer and a third sub-insulating layer stacked in sequence along the first direction;

[0032] The gate insulating layer is provided with a second groove in the isolation region, the second groove has a surface of the first sub-insulating layer facing the first direction as a bottom, and the isolation wall is partially embedded in the second groove;

[0033] The isolation region further includes: a first padding layer located between the gate insulating layer and the base layer;

[0034] Wherein, the distance between the orthographic projection of the flat layer on the base substrate and the first elevated layer is greater than or equal to 0.

[0035] Optionally, the substrate includes: a gate insulating layer and a base layer located on a side of the gate insulating layer away from the planar layer; the isolation wall includes: a second metal layer;

[0036] The gate insulating layer comprises: a first sub-insulating layer, a second sub-insulating layer and a third sub-insulating layer stacked in sequence along the first direction;

[0037] The gate insulating layer is provided with a third groove in the isolation region, the third groove has a surface of the second sub-insulating layer facing the first direction as a bottom, and the isolation wall is partially embedded in the third groove;

[0038] The isolation region further includes: a second spacer layer located between the first sub-gate insulating layer and the second sub-insulating layer;

[0039] Wherein, the distance between the orthographic projection of the flat layer on the base substrate and the second elevated layer is greater than or equal to 0.

[0040] Optionally, the substrate includes: a gate insulating layer and a base layer located on a side of the gate insulating layer away from the planar layer;

[0041] The gate insulating layer comprises: a first sub-insulating layer, a second sub-insulating layer and a third sub-insulating layer stacked in sequence along the first direction;

[0042] The isolation wall is located on a side of the gate insulation layer facing the first direction;

[0043] The isolation region further includes: a second spacer layer located between the first sub-gate insulating layer and the second sub-insulating layer, and a third spacer layer located between the second sub-gate insulating layer and the third sub-insulating layer;

[0044] Wherein, the distance between the orthographic projection of the flat layer on the base substrate and the second elevated layer and the third elevated layer is greater than or equal to 0.

[0045] In another aspect, an embodiment of the present application further provides a method for manufacturing a display substrate, comprising:

[0046] Providing a base substrate, the base substrate comprising: a display area, a non-display area, and an isolation area located between the display area and the non-display area;

[0047] forming a flat layer on one side of the display area along a first direction, wherein the flat layer extends to one side of the isolation area, and the first direction is a direction from the surface of the base substrate toward a surface away from the base substrate;

[0048] Producing an isolation wall on a side of the isolation area facing the first direction;

[0049] The thickness of the flat layer located on the display area side is greater than the thickness of the flat layer located on the isolation area side, and a first preset distance exists between the flat layer and the isolation wall.

[0050] On the other hand, an embodiment of the present application further provides a display device, comprising the display substrate described in any one of the above embodiments or a display substrate prepared using the method of any one of the above embodiments.

[0051] On the other hand, an embodiment of the present application further provides an electronic device, comprising: a display device; the display device comprises the display substrate described in any one of the above embodiments or a display substrate prepared using the method of any one of the above embodiments. BRIEF DESCRIPTION OF THE DRAWINGS

[0052] The accompanying drawings are for reference and illustration purposes only and are not intended to limit the scope of protection of this application. The technical solutions in the embodiments of this application will be clearly and completely described below in conjunction with the drawings in the embodiments of this application. Obviously, the described embodiments are only part of the embodiments of this application, not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of this application.

[0053] FIG1 is a schematic diagram showing a malfunction of a display panel in the related art;

[0054] FIG2 is a schematic diagram showing a partial planar structure of a display substrate in an embodiment provided by the present application;

[0055] FIG3 shows a schematic diagram of a partial cross-sectional structure of a display substrate in an embodiment provided by the present application;

[0056] FIG4 shows a schematic diagram of a partial cross-sectional structure of another display substrate in an embodiment provided by the present application;

[0057] FIG5 shows a schematic diagram of a partial cross-sectional structure of another display substrate in an embodiment provided by the present application;

[0058] FIG6 shows a schematic diagram of a partial cross-sectional structure of another display substrate in an embodiment provided by the present application;

[0059] FIG7 shows a schematic diagram of a partial cross-sectional structure of another display substrate in an embodiment provided by the present application;

[0060] FIG8 shows a schematic diagram of a partial cross-sectional structure of another display substrate in an embodiment provided by the present application;

[0061] FIG9 shows a schematic diagram of a partial cross-sectional structure of another display substrate in an embodiment provided by the present application;

[0062] FIG10 shows a schematic diagram of a partial cross-sectional structure of another display substrate in an embodiment provided by the present application;

[0063] FIG11 shows a schematic diagram of a partial cross-sectional structure of another display substrate in an embodiment provided by the present application;

[0064] FIG12 shows a schematic diagram of a partial cross-sectional structure of another display substrate in an embodiment provided by the present application;

[0065] FIG13 is a flowchart showing a method for manufacturing a display substrate according to an embodiment of the present application;

[0066] FIG14 shows a schematic diagram of a process structure of a display substrate in an embodiment provided in the present application. DETAILED DESCRIPTION

[0067] In order to make the purpose, technical solutions and advantages of this application more clearly understood, the present application is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain this application and are not intended to limit this application.

[0068] In order to narrow the border of the display screen or reduce the size of the under-screen sensor hole, related technologies have proposed various means to improve the structure of the boundary of the display area. Taking the display screen with an under-screen sensor hole as an example, the traditional hole-punch screen needs to reserve a large space at the boundary of the display area to prevent the structure of the non-display area from adversely affecting the normal function of the display area. Related technologies propose to set one or more isolation walls at the boundary between the display area and the hole area to isolate the water vapor path and electrical path between the display area and the non-display area, thereby achieving regional structural blocking, thereby narrowing the space reserved at the boundary of the display area and visually reducing the hole.

[0069] However, for double-layer device structures located at the edge of the display area, organic adhesive residue often appears during the display panel manufacturing process. The isolation wall uses an undercut structure to separate the water vapor path and the electrical path. The diffusion of organic adhesive residue will seriously weaken the blocking ability of the isolation wall. Ultimately, the display screen may exhibit display anomalies at the edge of the display area due to blocking failure.

[0070] Figure 1 shows a schematic diagram of a display panel malfunction in the related art. As shown in Figure 1, the problem with display panel 500 includes the appearance of reliable black spots in the area surrounding the under-screen sensor hole. Specifically, the under-screen sensor hole design of display panel 500 appears as a "gourd-shaped black hole" when the screen is in the bright state, causing display defects such as poor display.

[0071] In view of the discovery and analysis of the above-mentioned problems, the embodiments of the present application provide a display substrate, a method for manufacturing the same, and a display device, which aim to narrow the border of the display screen or reduce the sensor hole under the screen, thereby improving the visual effect of the display screen and ensuring that the display function of the display screen can be normally realized.

[0072] Referring to Figure 2, FIG2 shows a schematic diagram of a partial planar structure of a display substrate according to an embodiment of the present application. Referring to Figure 3, FIG3 shows a schematic diagram of a partial cross-sectional structure of a display substrate according to an embodiment of the present application. As shown in FIG2 and FIG3, the present embodiment provides a display substrate, including: a base substrate 100, a planar layer 200, and an isolation wall 300.

[0073] In the embodiment of the present application, the display substrate may be an array circuit substrate of a display panel.

[0074] In some optional embodiments, the display substrate may serve as an array circuit substrate of an OLED display panel or an LCD display panel.

[0075] The base substrate 100 includes a display area 101 , a non-display area 102 , and an isolation area 103 located between the display area 101 and the non-display area 102 .

[0076] In an optional example, the base substrate 100 may at least include: a gate insulating layer 110 (gate insulator, GI) and a base layer 120 .

[0077] In some optional embodiments, the gate insulating layer 110 may include a plurality of stacked sub-insulating layers. In an optional example, the gate insulating layer 110 may include an inorganic oxide having insulating properties.

[0078] Exemplarily, the gate insulating layer 110 may include at least one of the following materials: SiO 2 (silicon oxide) and Si 3 N 4 (silicon nitride).

[0079] In some optional embodiments, the base layer 120 may be made of a flexible insulating layer material. For example, the base layer 120 may include PI (polyimide) material.

[0080] In an embodiment of the present application, the display area 101 can be an area in the display substrate corresponding to the luminous display screen, the non-display area 102 can be an area in the display substrate corresponding to the non-luminous display, and the isolation area 103 can be a structural protective area between the display area 101 and the non-display area 102.

[0081] In the embodiment of the present application, the non-display area 102 may correspond to the border area of ​​the display substrate or the under-screen sensor hole area.

[0082] The under-screen sensor hole area can be used to place a sensor embedded in the middle of the display area 101 of the display screen. For example, an image sensor, a structured light sensor, a 3D face sensor, etc. can be placed.

[0083] In an optional example, when the non-display area 102 is a frame area of ​​the display substrate, the non-display area 102 surrounds the display area 101 .

[0084] In another optional example, when the non-display area 102 is an under-screen sensing hole area of ​​the display substrate, the display area 101 surrounds the non-display area 102 .

[0085] The planar layer 200 is located on one side of the display region 101 along a first direction and extends to one side of the isolation region 103. The first direction is a direction from the surface of the base substrate 100 toward a direction away from the surface of the base substrate 100.

[0086] In some optional embodiments, the material of the planar layer 200 may include at least one of an organic polymer and a small molecule organic compound.

[0087] For example, the material of the planar layer 200 may include a mixture of cross-linked polystyrene and epoxy resin obtained by curing with styrene as a main monomer component via initiator.

[0088] In some optional embodiments, the planar layer 200 may include a plurality of stacked sub-planar layers 200 .

[0089] The isolation wall 300 is located on one side of the isolation region 103 along the first direction.

[0090] Among them, the isolation wall 300 can be used to perform regional structural blocking of the display area 101 and the non-display area 102, which helps to narrow the border width of the display area 101, realize a narrow bezel design or reduce the under-screen sensor hole, and enhance the visual effect of the display panel.

[0091] In some optional embodiments, the isolation area 103 may include a plurality of isolation walls 300 arranged in parallel to enhance the structural blocking effect between the display area 101 and the non-display area 102, further narrow the border width of the display area 101, enhance the narrow bezel design or further reduce the under-screen sensor hole, thereby improving the visual effect of the display panel.

[0092] The thickness of the planar layer 200 on the display area 101 side is greater than the thickness of the planar layer 200 on the isolation area 103 side, and a first preset distance exists between the planar layer 200 and the isolation wall 300 .

[0093] To maintain the step difference, in some optional embodiments, the average thickness of the planar layer 200 on the display area 101 side may be greater than or equal to twice the average thickness of the planar layer 200 on the isolation area 103 side.

[0094] To ensure a sufficient distance between the organic adhesive residue and the isolation wall 300 , in some optional embodiments, the first preset distance may be greater than or equal to twice the thickness of the planar layer 200 on one side of the display area 101 .

[0095] Furthermore, the thickness of the planar layer 200 may be about 5 μm (micrometers), and the first preset distance may be greater than or equal to 11.5 μm.

[0096] Optionally, the first preset distance may be 11.5 μm.

[0097] Figure 4 shows a partial cross-sectional schematic diagram of another display substrate according to an embodiment of the present application. As shown in Figure 4 , based on the material and process characteristics of the planar layer 200 during its fabrication, the surface of the planar layer 200 facing away from the base substrate 100 can transition from a flat surface to an oblique, curved surface when transitioning from the display area 101 to the isolation area 103. For example, the surface of the planar layer 200 facing away from the base substrate 100 when transitioning to the isolation area 103 can be the first curved surface 201 facing the isolation wall 300.

[0098] In some optional embodiments, the thickness of the planar layer 200 gradually decreases as it extends from the display area 101 to the isolation area 103 .

[0099] Through the above-described embodiment, after the flat layer 200 extends into the isolation region 103, it creates a height difference with the flat layer 200 of the display region 101. This helps reduce or prevent organic adhesive residue from diffusing into the isolation wall 300 when a narrow border design is implemented between the display region 101 and the non-display region 102, thereby ensuring that the isolation wall 300 maintains its ability to block both the water vapor path and the electrical path. In other words, the display substrate in the present embodiment can maintain the isolation wall 300's ability to block both the water vapor path and the electrical path, even in a narrow border design. This reduces or prevents display anomalies at the border of the display region 101. For example, this can prevent the appearance of reliable black spots around the under-display sensor hole, specifically preventing display defects such as a "gourd-shaped black hole" when the hole is in the bright screen state. Furthermore, since the first predetermined distance is maintained between the flat layer 200 of the isolation region 103 and the isolation wall 300, display defects can be further reduced or prevented, enabling a narrow border design or reducing the visual size of the under-display sensor hole, thereby improving the visual quality of the display panel.

[0100] As shown in FIG4 , the flat layer 200 can often be obtained by deposition or photolithography, and during the manufacturing process, a stepped multi-layer sub-flat layer 200 process design can be utilized to make the flat layer 200 slope toward the isolation wall 300. To this end, in an optional embodiment, the present application further provides a display substrate, wherein a first curved surface 201 is provided on the flat layer 200 located in the isolation region 103, facing away from the base substrate 100 and facing the isolation wall 300.

[0101] In an optional example, the first curved surface 201 may include: a convex curved surface.

[0102] In another optional example, the first curved surface 201 may further include: a concave curved surface.

[0103] The orthographic projection of one end of the first curved surface 201 away from the isolation wall 300 on the base substrate 100 overlaps with the boundary between the isolation area 103 and the display area 101 .

[0104] Through the above embodiment, when the flat layer 200 extends from the display area 101 to the isolation area 103, a slope with a gradually narrowing thickness can be formed through the first curved surface 201. That is, the surface of the flat layer 200 facing away from the base substrate 100 is a plane in the display area 101 and an inclined curved surface in the isolation area 103. Such a design helps to facilitate the production of the flat layer 200, ensure the thickness difference between the flat layer 200 in the display area 101 and the flat layer 200 in the isolation area 103, and reduce the organic residual glue that diffuses to the isolation wall 300. Furthermore, it can reduce or avoid the occurrence of poor display such as reliability black spots in the edge area of ​​the display area 101, narrow the border of the display area 101 or reduce the size of the under-screen sensor hole, thereby improving the visual effect of the display panel.

[0105] Figure 5 shows a partial cross-sectional view of another display substrate according to an embodiment of the present application. As shown in Figure 5, the present embodiment can be applied to a display substrate having three sub-planar layers 200. To this end, in an optional embodiment, the present application further provides a display substrate, wherein the planar layer 200 includes: a first sub-planar layer 210, a second sub-planar layer 220, and a third sub-planar layer 230, stacked sequentially along a first direction.

[0106] In some optional embodiments, the thickness of each sub-planar layer 200 , such as the first sub-planar layer 210 , the second sub-planar layer 220 , and the third sub-planar layer 230 , may be between 1 μm and 2 μm.

[0107] Optionally, the thickness of the sub-planarization layer 200 may be about 1.5 μm.

[0108] In the embodiment of the present application, the description of “around” a specific numerical value may be expressed as not exceeding ±10% of the specific data.

[0109] The second sub-planarizing layer 220 covers the surface of the first sub-planarizing layer 210 facing the isolation wall 300 , and the third sub-planarizing layer 230 covers the surface of the second sub-planarizing layer 220 facing the isolation wall 300 .

[0110] In the embodiment of the present application, due to limitations in manufacturing costs and process capabilities, each sub-planar layer 200 is fabricated with a relatively constant thickness across its entire surface. In this embodiment, each stacked sub-planar layer 200 covers the side of the underlying sub-planar layer 200 facing the isolation wall 300. This allows each sub-planar layer 200 to extend from the display area 101 toward the isolation area 103 after covering the side of the underlying sub-planar layer 200, thereby achieving a step-wise thickness design between the planar layer 200 in the display area 101 and the planar layer 200 in the isolation area 103.

[0111] Furthermore, embodiments of the present application can also adjust the length of the inclined curved surface of the tapered flat layer 200 by limiting the distance that each sub-flat layer 200 extends from the display area 101 toward the isolation area 103. To this end, in an optional embodiment, the present application further provides a display substrate, wherein the third sub-flat layer 230 is provided with a first curved surface 201 facing away from the base substrate 100 and toward the isolation wall 300, and the second sub-flat layer 220 is provided with a second curved surface 202 facing away from the base substrate 100 and toward the first curved surface 201.

[0112] The distance between the end of the first curved surface 201 close to the isolation wall 300 and the second sub-flat layer 220 and the distance between the end of the second curved surface 202 close to the isolation wall 300 and the first sub-flat layer 210 are not less than the second preset distance.

[0113] In order to make the manufactured first curved surface 201 more regular and continuous, in some optional embodiments, the distance between the end of the first curved surface 201 close to the isolation wall 300 and the second sub-flat layer 220, and the distance between the end of the second curved surface 202 close to the isolation wall 300 and the first sub-flat layer 210 can be equal.

[0114] In some optional embodiments, the second preset distance may be greater than or equal to twice the thickness of each sub-planarizing layer 200 .

[0115] For example, the thickness of each sub-planarization layer 200 may be 1.5 μm, and the second preset distance may be 3 μm.

[0116] Optionally, the distance between the end of the first curved surface 201 close to the isolation wall 300 and the second sub-planar layer 220 , and the distance between the end of the second curved surface 202 close to the isolation wall 300 and the first sub-planar layer 210 may be 3 μm.

[0117] Figure 6 shows a partial cross-sectional schematic diagram of another display substrate according to an embodiment of the present application. As shown in Figure 6, the present embodiment can also be applied to a display substrate having four sub-planar layers 200. To this end, in an optional embodiment, the present application further provides a display substrate, wherein the planar layer 200 further includes a fourth sub-planar layer 240 located on the side of the third sub-planar layer 230 away from the second sub-planar layer 220. The fourth sub-planar layer 240 covers the surface of the third sub-planar layer 230 facing the isolation wall 300.

[0118] The fourth sub-flat layer 240 is provided with a first curved surface 201 facing away from the base substrate 100 and facing the isolation wall 300, the third sub-flat layer 230 is provided with a second curved surface 202 facing away from the base substrate 100 and facing the first curved surface 201, and the second sub-flat layer 220 is provided with a third curved surface 203 facing away from the base substrate 100 and facing the second curved surface 202.

[0119] The distance between the end of the first curved surface 201 close to the isolation wall 300 and the third sub-flat layer 230, the distance between the end of the second curved surface 202 close to the isolation wall 300 and the second sub-flat layer 220, and the distance between the end of the third curved surface 203 close to the isolation wall 300 and the first sub-flat layer 210 are not less than the second preset distance.

[0120] In order to make the manufactured first curved surface 201 more regular and continuous, in some optional embodiments, the distance between the end of the first curved surface 201 close to the isolation wall 300 and the third sub-flat layer 230, the distance between the end of the second curved surface 202 close to the isolation wall 300 and the second sub-flat layer 220, and the distance between the end of the third curved surface 203 close to the isolation wall 300 and the first sub-flat layer 210 can be equal.

[0121] Exemplarily, the second preset distance may be 3 μm.

[0122] Optionally, the distance between the end of the first curved surface 201 close to the isolation wall 300 and the third sub-flat layer 230, the distance between the end of the second curved surface 202 close to the isolation wall 300 and the second sub-flat layer 220, and the distance between the end of the third curved surface 203 close to the isolation wall 300 and the first sub-flat layer 210 can be 3 μm.

[0123] Figure 7 shows a partial cross-sectional view of another display substrate according to an embodiment of the present application. As shown in Figure 7, the present application also provides a display substrate having four sub-planar layers 200. In an optional embodiment, the present application also provides a display substrate, wherein the planar layer 200 includes: a first sub-planar layer 210, a second sub-planar layer 220, a third sub-planar layer 230, and a fourth sub-planar layer 240, stacked sequentially along a first direction.

[0124] The second sub-planarizing layer 220 covers the surface of the first sub-planarizing layer 210 facing the isolation wall 300 , and the fourth sub-planarizing layer 240 covers the surface of the third sub-planarizing layer 230 facing the isolation wall 300 .

[0125] There is a third preset distance between the first sub-planar layer 210 and the isolation wall 300 , and there is a first preset distance between the third sub-planar layer 230 and the isolation wall 300 . There is a first preset distance between the second sub-planar layer 220 and the isolation wall 300 .

[0126] The third preset distance is greater than the first preset distance.

[0127] For example, the first preset distance may be 11.5 μm, and the third preset distance may be 14.5 μm. That is, the distance between the edges of the first and third sub-planar layers 210 and 230 and the edges of the second and fourth sub-planar layers 220 and 240 may be 3 μm.

[0128] Through the above embodiments, the sub-flat layers 200 of the flat layer 200 in the present application are not coated layer by layer, wherein the third sub-flat layer 230 adopts the same design of being retracted toward the display area 101 as the first sub-flat layer 210, which not only helps to improve the structural stability of the flat layer 200 at the edge of the display area 101, but also can realize the design of a height step difference at the boundary between the display area 101 and the isolation area 103.

[0129] Figure 8 shows a partial cross-sectional schematic diagram of another display substrate in an embodiment provided by this application. As shown in Figure 8 , further, in combination with the above embodiments, this application also considers appropriately retracting the fourth sub-planar layer 240 toward the display area 101, thereby further enhancing the height difference of the planar layer 200 at the boundary between the display area 101 and the isolation area 103, thereby enhancing the protective effect of the isolation area 103. To this end, in an optional embodiment, this application also provides a display substrate in which a fourth predetermined distance is provided between the second sub-planar layer 220 and the isolation wall 300.

[0130] The fourth preset distance is smaller than the third preset distance and larger than the first preset distance.

[0131] For example, the first preset distance may be 11.5 μm, the third preset distance may be 14.5 μm, and the fourth preset distance may be 13 μm. That is, the distance between the edge of the first sub-planar layer 210 and the third sub-planar layer 230 and the edge of the fourth sub-planar layer 240 may be 1.5 μm, and the distance between the edge of the second sub-planar layer 220 and the edge of the fourth sub-planar layer 240 may be 3 μm.

[0132] Figure 9 shows a schematic diagram of a partial cross-sectional structure of another display substrate in an embodiment provided by the present application. As shown in Figure 9, the embodiment of the present application also considers designing a groove at the junction between the display area 101 and the isolation area 103, so that the flat layer 200, in accordance with its manufacturing process, sinks at the groove, reducing the height difference between the flat layer 200 in the isolation area 103 and the surface of the base substrate 100, further reducing or preventing the diffusion of organic residual glue to the isolation wall 300. To this end, in an optional embodiment, the present application also provides a display substrate, wherein a first groove is provided on the surface of the base substrate 100 facing the first direction.

[0133] In some optional embodiments, the first groove may have a surface of the base layer 120 facing the first direction as a bottom.

[0134] The first groove overlaps with the boundary between the display area 101 and the isolation area 103 , and a first preset distance exists between the first groove and the isolation wall 300 .

[0135] In some optional embodiments, the first groove may be provided in the gate insulating layer 110 . Limited by the thickness of the gate insulating layer 110 , the depth of the first groove may be less than the entire thickness of the planar layer 200 .

[0136] The planar layer 200 is partially embedded in the first groove.

[0137] Figure 10 shows a schematic diagram of a partial cross-sectional structure of another display substrate in an embodiment provided by the present application. As shown in Figure 10, the embodiment of the present application also considers raising the surface of the isolation region 103 to reduce the height difference between the flat layer 200 in the isolation region 103 and the surface of the base substrate 100, further reducing or preventing the diffusion of organic residual glue to the isolation wall 300. To this end, in an optional embodiment, the present application also provides a display substrate, wherein the base substrate 100 includes: a gate insulating layer 110 and a base layer 120 located on the side of the gate insulating layer 110 away from the flat layer 200.

[0138] The isolation wall 300 includes a first metal layer 301 and a second metal layer 302 .

[0139] In some optional embodiments, the display substrate can be used as an array circuit substrate for a display panel. To this end, the display substrate can include a first source-drain metal layer (not shown) and a second source-drain metal layer (not shown) in the display area 101 to implement the circuit functions of the display substrate. The first metal layer 301 can be a metal layer manufactured simultaneously with the first source-drain metal layer, and the second metal layer 302 can be a metal layer manufactured simultaneously with the second source-drain metal layer.

[0140] The gate insulating layer 110 includes a first sub-insulating layer, a second sub-insulating layer, and a third sub-insulating layer stacked in sequence along a first direction.

[0141] The gate insulating layer 110 is provided with a second groove in the isolation region 103 . The second groove has a surface of the first sub-insulating layer facing the first direction as a bottom. The isolation wall 300 is partially embedded in the second groove.

[0142] The isolation region 103 further includes a first padding layer 131 located between the gate insulation layer 110 and the base layer 120 .

[0143] In some optional embodiments, the first padding layer 131 may include a shielding metal layer (BSM).

[0144] The distance between the orthographic projection of the planar layer 200 on the base substrate 100 and the first elevated layer 131 is greater than or equal to 0.

[0145] FIG11 shows a schematic diagram of a partial cross-sectional structure of another display substrate in an embodiment provided by the present application. As shown in FIG11 , the embodiment of the present application also considers using a second elevating layer 132 fabricated simultaneously with the first source / drain metal layer to elevate the surface of the isolation region 103. To this end, in an optional embodiment, the present application further provides a display substrate, wherein the base substrate 100 includes: a gate insulating layer 110 and a base layer 120 located on the side of the gate insulating layer 110 away from the flat layer 200. The isolation wall 300 includes: a first metal layer 301.

[0146] The gate insulating layer 110 includes a first sub-insulating layer, a second sub-insulating layer, and a third sub-insulating layer stacked in sequence along a first direction.

[0147] The gate insulating layer 110 is provided with a third groove in the isolation region 103 . The third groove has a surface of the second sub-insulating layer facing the first direction as a bottom. The isolation wall 300 is partially embedded in the third groove.

[0148] The isolation region 103 further includes a second padding layer 132 located between the first sub-gate insulating layer 110 and the second sub-insulating layer.

[0149] In some optional embodiments, the display substrate can be used as an array circuit substrate in a display panel. To this end, the display substrate can include a first source-drain metal layer and a second source-drain metal layer in the display area 101 to implement the circuit functions of the display substrate. The second metal layer 302 can be a metal layer fabricated simultaneously with the second source-drain metal layer, and the second spacer layer 132 can be a metal layer fabricated simultaneously with the first source-drain metal layer.

[0150] The distance between the orthographic projection of the planar layer 200 on the base substrate 100 and the second elevated layer 132 is greater than or equal to 0.

[0151] Figure 12 shows a schematic diagram of a partial cross-sectional structure of another display substrate in an embodiment provided by the present application. As shown in Figure 12, the embodiment of the present application also considers using a second elevating layer 132 produced synchronously with the first source-drain metal layer and a third elevating layer 133 produced synchronously with the second source-drain metal layer to simultaneously elevate the surface of the isolation region 103. To this end, in an optional embodiment, the present application also provides a display substrate, wherein the base substrate 100 includes: a gate insulating layer 110 and a base layer 120 located on the side of the gate insulating layer 110 away from the flat layer 200.

[0152] The gate insulating layer 110 includes a first sub-insulating layer, a second sub-insulating layer, and a third sub-insulating layer stacked in sequence along a first direction.

[0153] The isolation wall 300 is located on a side of the gate insulation layer 110 facing the first direction.

[0154] The isolation region 103 further includes a second raising layer 132 located between the first sub-gate insulating layer 110 and the second sub-insulating layer, and a third raising layer 133 located between the second sub-gate insulating layer 110 and the third sub-insulating layer.

[0155] In some optional embodiments, the display substrate can be used as an array circuit substrate in a display panel. To this end, the display substrate can include a first source-drain metal layer and a second source-drain metal layer in the display area 101 to implement the circuit functions of the display substrate. The second padding layer 132 can be a metal layer fabricated simultaneously with the first source-drain metal layer, and the third padding layer 133 can be a metal layer fabricated simultaneously with the second source-drain metal layer.

[0156] The distance between the orthographic projection of the planar layer 200 on the base substrate 100 and the second elevating layer 132 and the third elevating layer 133 is greater than or equal to 0.

[0157] In some other optional embodiments, in combination with the above embodiments, a first raising layer 131, a second raising layer 132 and a third raising layer 133 can also be set at the same time to further enhance the raising effect of the isolation area 103, further reduce the height difference between the surface of the base substrate 100 of the isolation area 103 and the flat layer 200, and reduce the impact of organic residual glue on the isolation wall 300.

[0158] It should be noted that, unless otherwise specified, the above embodiments can be combined to form a new embodiment combination. For example, in an optional embodiment, the first padding layer 131, the second padding layer 132 and the third padding layer 133 can be used at the same time to raise the surface of the isolation area 103, and the thickness step difference of the flat layer 200 itself at the boundary between the display area 101 and the isolation area 103 can also be used, and the flat layer 200 can also be embedded in the first groove to further reduce the height step difference between the flat layer 200 at the boundary between the display area 101 and the isolation area 103 and the surface of the base substrate 100 facing the first direction. The solution of the embodiment of the present application minimizes the possibility of contact between the organic residual glue and the isolation wall 300 from multiple aspects, and there is no need to widen the boundary of the display area 101, thereby achieving a narrow border of the display screen or minimizing the under-screen sensor hole, while ensuring that the normal display function of the display screen is not affected.

[0159] FIG13 shows a flowchart of a method for manufacturing a display substrate in an embodiment of the present application. As shown in FIG13 , based on the same inventive concept, the present application also provides a method for manufacturing a display substrate, including:

[0160] A base substrate 100 is provided, wherein the base substrate 100 includes a display area 101, a non-display area 102, and an isolation area 103 located between the display area 101 and the non-display area 102;

[0161] A flat layer 200 is formed on one side of the display area 101 along the first direction, and the flat layer 200 extends to one side of the isolation area 103;

[0162] An isolation wall 300 is formed on one side of the isolation region 103 facing the first direction;

[0163] The thickness of the planar layer 200 on the display area 101 side is greater than the thickness of the planar layer 200 on the isolation area 103 side. In addition, a first preset distance is provided between the planar layer 200 and the isolation wall 300.

[0164] In the embodiment of the present application, the thickness step difference of the planar layer 200 itself can be achieved by setting the manufacturing process of each sub-planar layer 200.

[0165] FIG14 shows a schematic diagram of the process structure of a display substrate in one embodiment provided by the present application. As shown in FIG14 , when manufacturing the first sub-flat layer 210, compared to the first sub-flat layer 200 in the related art, the first sub-flat layer 210 can be retracted toward the display area 101, thereby increasing the distance between the first sub-flat layer 210 and the isolation wall 300. However, the second sub-flat layer 220 does not retract, compared to the second sub-flat layer 200 in the related art. As a result, a portion of the second sub-flat layer 220 is fabricated on the surface of the base substrate 100, naturally forming a thickness step. Similarly, the third sub-flat layer 230 can also form a thickness step in this manner, so that the flat layer 200 has a thickness step difference between the display area 101 and the isolation area 103, reducing the possibility of organic adhesive residue contacting the isolation wall 300.

[0166] Compared with the prior art, the method for manufacturing a display substrate provided in the embodiment of the present application has the following advantages:

[0167] (1) The display substrate obtained by this manufacturing method has all the advantages of the display substrate in any of the above embodiments.

[0168] (2) This manufacturing method can obtain a flat layer with thickness step difference by manufacturing sub-flat layers layer by layer, thereby reducing the step difference between the flat layer in the isolation area and the surface of the base substrate, reducing or avoiding the contact between the organic residual glue and the isolation wall, and there is no need to make major changes to the original flat layer manufacturing process, which is conducive to the low-cost and large-scale production of display substrates.

[0169] Based on the same inventive concept, an embodiment of the present application further provides a display device, comprising the display substrate described in any one of the above embodiments or a display substrate prepared using the method of any one of the above embodiments.

[0170] Based on the same inventive concept, an embodiment of the present application further provides an electronic device, comprising: a display device; the display device comprises the display substrate described in any one of the above embodiments or a display substrate prepared using the method of any one of the above embodiments.

[0171] The various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referenced to each other.

[0172] In the description of the present application, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise" and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present application. In addition, the terms "first" and "second" are used for descriptive purposes only and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the said features. In the description of the present application, "multiple" means two or more, unless otherwise clearly and specifically defined.

[0173] In the description of this application, it should be noted that, unless otherwise expressly specified or limited, the terms "installed," "connected," and "connected" should be understood in a broad sense. For example, they can refer to fixed connections, detachable connections, or integral connections; they can refer to mechanical connections, electrical connections, or mutual communication; they can refer to direct connections or indirect connections through an intermediate medium; they can refer to internal communication between two components or the interaction between two components. Those skilled in the art will understand the specific meanings of the above terms in this application based on specific circumstances.

[0174] In this application, unless otherwise expressly specified or limited, a first feature being "above" or "below" a second feature may include the first and second features being in direct contact, or may include the first and second features being in contact not directly but through another feature between them. Moreover, a first feature being "above," "above," and "above" a second feature may include the first feature being directly above or obliquely above the second feature, or may simply mean that the first feature is higher in level than the second feature. A first feature being "below," "below," and "below" a second feature may include the first feature being directly below or obliquely below the second feature, or may simply mean that the first feature is lower in level than the second feature.

[0175] In this application, the terms "comprises," "includes," or any other variations thereof are intended to encompass non-exclusive inclusion, such that a process, method, article, or terminal device that includes a list of elements includes not only those elements but also other elements not explicitly listed, or elements inherent to such process, method, article, or terminal device. In the absence of further limitations, an element defined by the phrase "comprises a ..." does not preclude the presence of additional identical elements in the process, method, article, or terminal device that includes the element.

[0176] In the description of the present application, unless otherwise specified, “plurality” means two or more.

[0177] It should be noted that in the embodiments of this application, words such as "exemplarily" or "for example" are used to indicate examples, illustrations, or explanations. Any embodiment or design described as "exemplary" or "for example" in the embodiments of this application should not be interpreted as being more preferred or more advantageous than other embodiments or designs. Rather, the use of words such as "exemplarily" or "for example" is intended to present the relevant concepts in a concrete manner.

[0178] In the description of this application, unless otherwise specified, "same layer" means that two or more defined objects are in the same layer position in a stacking relationship, or are entirely or partially in the same horizontal plane in the thickness direction of the stacking relationship.

[0179] The term "and / or" in this article is merely a description of the association relationship between associated objects, indicating that three relationships may exist. For example, A and / or B can mean: A exists alone, A and B exist at the same time, and B exists alone.

[0180] Finally, it should be noted that specific examples are used herein to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only intended to help understand the technical solutions and core concepts of the present application. Although preferred embodiments of the present application have been described, those skilled in the art may make additional changes and modifications to these embodiments once they understand the basic creative concepts. Therefore, the appended claims are intended to include the preferred embodiments and all changes and modifications that fall within the scope of the embodiments of the present application.

Claims

1. A display substrate, characterized in that, include: substrate, planarization layer, and isolation walls; The base substrate includes: a display area, a non-display area, and an isolation area located between the display area and the non-display area; The flat layer is located on one side of the display area along a first direction and extends to one side of the isolation area, wherein the first direction is a direction from the surface of the base substrate toward a surface away from the base substrate; The isolation wall is located on one side of the isolation area along the first direction; The thickness of the flat layer located on the display area side is greater than the thickness of the flat layer located on the isolation area side, and a first preset distance exists between the flat layer and the isolation wall.

2. The display substrate according to claim 1, wherein A first curved surface facing away from the base substrate and facing the isolation wall is provided on the flat layer on one side of the isolation area; The orthographic projection of one end of the first curved surface away from the isolation wall on the base substrate overlaps with the boundary between the isolation area and the display area.

3. The display substrate according to claim 1, wherein The planar layer comprises: a first sub-planar layer, a second sub-planar layer and a third sub-planar layer stacked in sequence along the first direction; The second sub-planar layer covers a surface of the first sub-planar layer facing the isolation wall, and the third sub-planar layer covers a surface of the second sub-planar layer facing the isolation wall.

4. The display substrate according to claim 3, wherein: The third sub-flat layer is provided with a first curved surface facing away from the base substrate and facing the isolation wall, and the second sub-flat layer is provided with a second curved surface facing away from the base substrate and facing the first curved surface; The distance between one end of the first curved surface close to the isolation wall and the second sub-flat layer, and the distance between one end of the second curved surface close to the isolation wall and the first sub-flat layer are not less than a second preset distance.

5. The display substrate according to claim 3, wherein The planar layer further includes: a fourth sub-planar layer located on a side of the third sub-planar layer away from the second sub-planar layer, the fourth sub-planar layer covering a surface of the third sub-planar layer facing the isolation wall; The fourth sub-flat layer is provided with a first curved surface facing away from the base substrate and facing the isolation wall, the third sub-flat layer is provided with a second curved surface facing away from the base substrate and facing the first curved surface, and the second sub-flat layer is provided with a third curved surface facing away from the base substrate and facing the second curved surface; The distance between one end of the first curved surface close to the isolation wall and the third sub-flat layer, the distance between one end of the second curved surface close to the isolation wall and the second sub-flat layer, and the distance between one end of the third curved surface close to the isolation wall and the first sub-flat layer are not less than a second preset distance.

6. The display substrate according to claim 1, wherein: The planar layer comprises: a first sub-planar layer, a second sub-planar layer, a third sub-planar layer and a fourth sub-planar layer stacked in sequence along the first direction; The second sub-planar layer covers the surface of the first sub-planar layer facing the isolation wall, and the fourth sub-planar layer covers the surface of the third sub-planar layer facing the isolation wall; There is a third preset distance between the first sub-flat layer and the isolation wall, and there is a third preset distance between the third sub-flat layer and the isolation wall, and there is the first preset distance between the second sub-flat layer and the isolation wall; Wherein, the third preset distance is greater than the first preset distance.

7. The display substrate according to claim 6, wherein: There is a fourth preset distance between the second sub-planar layer and the isolation wall; The fourth preset distance is smaller than the third preset distance and larger than the first preset distance.

8. The display substrate according to claim 1, wherein A first groove is provided on the surface of the base substrate facing the first direction; The first groove overlaps with the boundary between the display area and the isolation area, and the first groove has the first preset distance from the isolation wall; Part of the flat layer is embedded in the first groove.

9. The display substrate according to claim 1, wherein The substrate comprises: a gate insulating layer and a base layer located on a side of the gate insulating layer away from the flat layer; the isolation wall comprises: a first metal layer and a second metal layer; The gate insulating layer comprises: a first sub-insulating layer, a second sub-insulating layer and a third sub-insulating layer stacked in sequence along the first direction; The gate insulating layer is provided with a second groove in the isolation region, the second groove has a surface of the first sub-insulating layer facing the first direction as a bottom, and the isolation wall is partially embedded in the second groove; The isolation region further includes: a first padding layer located between the gate insulating layer and the base layer; Wherein, the distance between the orthographic projection of the flat layer on the base substrate and the first elevated layer is greater than or equal to 0.

10. The display substrate according to claim 1, wherein The substrate includes: a gate insulating layer and a base layer located on a side of the gate insulating layer away from the flat layer; the isolation wall includes: a second metal layer; The gate insulating layer comprises: a first sub-insulating layer, a second sub-insulating layer and a third sub-insulating layer stacked in sequence along the first direction; The gate insulating layer is provided with a third groove in the isolation region, the third groove has a surface of the second sub-insulating layer facing the first direction as a bottom, and the isolation wall is partially embedded in the third groove; The isolation region further includes: a second spacer layer located between the first sub-gate insulating layer and the second sub-insulating layer; Wherein, the distance between the orthographic projection of the flat layer on the base substrate and the second elevated layer is greater than or equal to 0.

11. The display substrate according to claim 1, wherein The substrate comprises: a gate insulating layer and a base layer located on a side of the gate insulating layer away from the planar layer; The gate insulating layer comprises: a first sub-insulating layer, a second sub-insulating layer and a third sub-insulating layer stacked in sequence along the first direction; The isolation wall is located on a side of the gate insulation layer facing the first direction; The isolation region further includes: a second spacer layer located between the first sub-gate insulating layer and the second sub-insulating layer, and a third spacer layer located between the second sub-gate insulating layer and the third sub-insulating layer; Wherein, the distance between the orthographic projection of the flat layer on the base substrate and the second elevated layer and the third elevated layer is greater than or equal to 0.

12. A manufacturing method of a display substrate, characterized in that include: A substrate is provided, which includes: a display area, a non-display area, and an isolation area located between the display area and the non-display area; On one side of the display area along a first direction, a flat layer is fabricated, and the flat layer extends to one side of the isolation area, where the first direction is from the surface of the substrate towards a direction away from the surface of the substrate; On one side of the isolation area facing the first direction, an isolation wall is fabricated; Wherein, the thickness of the flat layer on the side of the display area is greater than the thickness of the flat layer on the side of the isolation area, and there is a first preset distance between the flat layer and the isolation wall.

13. A display device, characterized in that: A display substrate includes the display substrate according to any one of claims 1 to 11 or a display substrate fabricated by using the manufacturing method of the display substrate according to claim 12.

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