The invention discloses a multi-value adiabatic phase inverter based on a transmission gate structure. The multi-value adiabatic phase inverter comprises a transmission gate control circuit and a multi-value adiabatic logic circuit. The transmission gate control circuit comprises a first PMOS transistor, a second PMOS transistor, a third PMOS transistor, a fourth PMOS transistor, a first NMOS transistor, a second NMOS transistor, a third NMOS transistor, a fourth NMOS transistor and a two-input AND gate. The two-input AND gate is equipped with a first input end, a second input end and an output end. The multi-value adiabatic logic circuit comprises a fifth NMOS transistor, a sixth NMOS transistor, a seventh NMOS transistor, an eighth NMOS transistor, a ninth NMOS transistor, a tenth NMOS transistor, a fifth PMOS transistor, a sixth PMOS transistor, a seventh PMOS transistor, an eighth PMOS transistor, a ninth PMOS transistor, a tenth PMOS transistor and three binary phase inverters. The multi-value adiabatic phase inverter has the advantages that no threshold loss exists, an output data error is avoided, the reliability is relatively high, and the power consumption is relatively low.