Transistor device and manufacturing method thereof

A technology of transistors and devices, which is applied in the field of transistor devices and their manufacturing, and can solve problems such as excessive doping

Inactive Publication Date: 2011-05-25
HEWLETT PACKARD DEV CO LP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

The source region is more doped than the lightly doped layer

Method used

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  • Transistor device and manufacturing method thereof
  • Transistor device and manufacturing method thereof
  • Transistor device and manufacturing method thereof

Examples

Experimental program
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Embodiment Construction

[0009] Exemplary embodiments will now be described in detail with reference to the accompanying drawings. Although the drawings illustrate embodiments, the drawings are not necessarily to scale and certain features may be exaggerated to better illustrate and explain innovative aspects of the embodiments. Furthermore, the embodiments described herein are not intended to exclude other embodiments or to be limited to the exact forms and configurations shown in the drawings and described in detail below.

[0010] see Figure 1-3 , where an embodiment of transistor 20 is shown. Transistor 20 is configured as a single finger gate LDMOS transistor. Transistor 20 includes a drain contact 30 , a source tap 32 , a polysilicon gate electrode 34A, and a polysilicon surrounding ring 34B. In addition, a lightly doped well 42 of the first type (N) is arranged in the semiconductor substrate 40 of the second type (P). A second-type (P) body region 44 is disposed in the lightly doped well 4...

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Abstract

A transistor device is provided, including a lightly doped layer (42) of semiconductor material of a first type and a body region (44) of semiconductor material of a second type. A source region (46) of the first type is formed in the body region (44). The source region (46) being more doped than the lightly doped layer. A drain region (50) of the first type is formed in the lightly doped layer (42), the drain region (50) being more doped than the lightly doped layer (42). A drift region (54) of the lightly doped layer (42) is further provided disposed between the body region (44) and the drain region (50). Additionally, a gate electrode is provided surrounding the drain region. The gate electrode (34A) is partially disposed over a thin oxide (36) and partially over a thick oxide (56), wherein the gate electrode (34A) extended over the thick oxide (56) from the thin oxide (36) controls the electric field in the drift region to increase the avalanche breakdown of the drain region (50).

Description

Background technique [0001] Laterally diffused metal oxide semiconductor (LDMOS) transistors are used in a variety of circuit applications. Those skilled in the art know that a typical LDMOS transistor structure uses multi-finger gates. However, for high voltage and low drive current circuit applications, known LDMOS structures include at least a two-finger gate. As a result, such transistors are much larger than needed, and silicon and die space is unnecessarily wasted. [0002] Current LDMOS structures include at least two gates and two drains, with a common source completely surrounded by polysilicon gates. The symmetry of this design structure increases the effective channel width per unit area and has the advantage of reducing the on-resistance of the device. This structure is popular in power circuit applications that require both high drive current and high voltage. However, this dual-gate design limits the minimum device size and does not allow designers to use sma...

Claims

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Application Information

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Patent Type & AuthorityPatents(China)
IPC IPC(8): H01L29/78H01L29/40H01L29/423H01L21/336H01L29/10
CPCH01L29/7816H01L29/4238H01L29/7823H01L29/402H01L29/0696H01L29/66681H01L29/42368
InventorC·黄J·A·欣茨曼D·J·施勒曼H·廖
OwnerHEWLETT PACKARD DEV CO LP