Micro-LED micro display chip and manufacturing method thereof

Abstract

The present invention discloses a Micro-LED micro-display chip and a method for manufacturing the same. The Micro-LED micro-display chip comprises: a substrate; a plurality of LED units arranged in an array, disposed on the substrate, and adjacent LED units can be driven independently; a plurality of bonding metal pads, disposed on the substrate; wherein the substrate comprises a driving circuit, the driving circuit has a plurality of contacts, and each contact is also electrically connected to the LED unit via a bonding metal pad. In a Micro-LED micro-display chip provided by an embodiment of the present invention, the depth of the etched opening is shallower, the process of the exposure and passivation layer opening is easier to control, the flatness of the subsequently formed electrode layer is better, and the undulation of the electrode layer at the corresponding contact is smaller.

Description

Technical Field

[0001] The present invention particularly relates to a Micro-LED micro display chip and a manufacturing method thereof, and belongs to the field of micro display technology. Background Art

[0002] In recent years, LEDs have become popular in lighting applications. As a light source, LEDs have many advantages, including higher light efficiency, lower energy consumption, longer life, smaller size, and faster switching speed.

[0003] Displays with miniature-sized LEDs are called micro-LEDs. Micro-LED displays have arrays of tiny LEDs that form individual pixel elements. A pixel can be a tiny illuminated area on a display screen, and an image can be made up of many pixels. In other words, pixels can be small discrete elements that together make up the image on a display. Pixels are usually arranged in a two-dimensional (2D) matrix and represented using dots, squares, rectangles, or other shapes. A pixel can be the basic unit of a display or digital image and has geometric coordinates.

[0004] Display devices in the field of micro-display are mostly used to produce high-brightness miniature display images, which are projected through an optical system and perceived by the observer. The projection target can be the retina (virtual image) or the projection screen (real image). It can be applied to various aspects such as AR (augmented reality), VR (virtual reality), HUD (car head-up display), etc. The emerging technology is mainly Micro-LED, which has the advantages of fast response, high color gamut, high PPI, and low energy consumption.

[0005] The usual production process of Micro-LED in the prior art is: first form a Micro-LED array, then transfer the Micro-LED array in batches to a circuit substrate (for example, a TFT board or a COMS board, etc.), and finally package it. However, due to the small size of Micro-LED and the high positioning accuracy requirements, how to efficiently and efficiently transfer Micro-LED chips in batches to the circuit substrate has become a technical bottleneck that urgently needs to be broken through in the application of Micro-LED in the field of micro display technology. Summary of the invention

[0006] The main purpose of the present invention is to provide a Micro-LED micro display chip and a method for manufacturing the same, so as to overcome the deficiencies in the prior art and help further expand the application of Micro-LED products in the micro display field.

[0007] In order to achieve the above-mentioned invention object, the technical solution adopted by the present invention includes:

[0008] An embodiment of the present invention provides a Micro-LED micro display chip, including:

[0009] a substrate, the substrate comprising a driving circuit and a plurality of contacts electrically connected to the driving circuit;

[0010] an LED semiconductor layer, arranged on the substrate, the LED semiconductor layer comprising a first doped semiconductor layer, an active layer and a second doped semiconductor layer stacked in sequence on the substrate; the LED semiconductor layer is divided into a plurality of LED units arranged in an array, each contact drives one of the LED units, and adjacent LED units can be driven independently; and

[0011] A bonding layer is arranged between the substrate and the LED semiconductor layer, the bonding layer is electrically connected to the first doped semiconductor layer, the bonding layer also includes a plurality of bonding metal pads, an etched groove is provided between the bonding metal pad and the bonding layer to electrically isolate the two, each bonding metal pad corresponds to at least one contact and is electrically connected to the contact, and the second doped semiconductor layer corresponding to each LED unit is electrically connected to the contact via the bonding metal pad.

[0012] In a specific embodiment, the bonding metal pad is disposed in the orthographic projection area of ​​the contact on the substrate. It can be understood that the bonding metal pad can cover part or all of the contact.

[0013] In a specific embodiment, the Micro-LED micro display chip further includes:

[0014] a passivation layer disposed on the second doped semiconductor layer, the passivation layer having a first opening and a second opening, the first opening exposing the second doped semiconductor layer corresponding to each LED unit, the second opening exposing the bonding metal pad, and the passivation layer also filling the etching groove; and

[0015] An electrode layer is disposed on the passivation layer and covers the first opening and the second opening. The electrode layer is electrically connected to the second doped semiconductor layer from the first opening and is electrically connected to the bonding metal pad from the second opening.

[0016] In a specific embodiment, the LED unit has a step structure, two adjacent LED units are electrically isolated by the step structure, and the adjacent LED units can be driven independently, and the passivation layer also covers the side walls of the step structure; wherein the area of ​​the LED semiconductor layer corresponding to the contact also has an etched hole exposing the bonding metal pad.

[0017] In a specific embodiment, the step structure is formed on the second doped semiconductor layer, and the height of the step structure is not less than the thickness of the second doped semiconductor layer but less than the thickness of the LED semiconductor layer. The step structure at least electrically isolates the second doped semiconductor layers of adjacent LED units.

[0018] In a specific embodiment, the step structure of each LED unit is formed on the second doped semiconductor layer, and the height of the step structure is equal to the thickness of the LED semiconductor layer. The step structure also electrically isolates the active layer and the first doped semiconductor layer of adjacent LED units.

[0019] In a specific embodiment, an isolation material layer is arranged between two adjacent LED units, and the two adjacent LED units are electrically isolated by the isolation material layer, so that the adjacent LED units can be driven independently, wherein the isolation material layer has a through hole exposing the bonding metal pad, the passivation layer also covers the side wall of the through hole, and the bonding metal pad is correspondingly arranged at the bottom of the through hole.

[0020] In a specific embodiment, the isolation material layer is formed in the second doped semiconductor layer, and the thickness of the isolation material layer is not less than the thickness of the second doped semiconductor layer. The isolation material layer at least electrically isolates the second doped semiconductor layers of adjacent LED units.

[0021] In a specific embodiment, the material of the isolation material layer includes ion implantation material, and the ion implantation material includes any one or a combination of two or more of hydrogen, helium, nitrogen, oxygen, fluorine, magnesium, silicon and argon.

[0022] In a specific embodiment, the first doped semiconductor layer of the plurality of LED units is a common first doped semiconductor layer.

[0023] In a specific embodiment, the first doped semiconductor layer is a P-type semiconductor layer, and the second doped semiconductor layer is an N-type semiconductor layer.

[0024] In a specific embodiment, a bonding layer is further disposed between the substrate and the first doped semiconductor layer, and the bonding metal pad is electrically isolated from the bonding layer via the passivation layer.

[0025] An embodiment of the present invention provides a method for manufacturing a Micro-LED micro display chip, comprising:

[0026] providing a second substrate, forming an LED semiconductor layer on the second substrate, wherein the LED semiconductor layer comprises a second doped semiconductor layer, an active layer and a first doped semiconductor layer which are sequentially stacked on the second substrate,

[0027] Providing a first substrate, wherein the first substrate comprises a driving circuit and a plurality of contacts electrically connected to the driving circuit;

[0028] forming a bonding layer on the first doped semiconductor layer and / or the first substrate, and bonding the first doped semiconductor layer to the first substrate, and then removing the second substrate to expose the second doped semiconductor layer;

[0029] The LED semiconductor layer is processed to form a plurality of LED units arranged in an array, and adjacent LED units can be driven independently, and the bonding layer located in a plurality of selected areas is etched away to form a plurality of etching grooves on the bonding layer, and a portion surrounded by an etching groove forms a bonding metal pad electrically isolated from the remaining portion, and the bonding metal pad covers a contact and is electrically connected to the contact, wherein each LED unit is also electrically connected to a contact via the bonding metal pad.

[0030] In a specific embodiment, the production method specifically includes:

[0031] A plurality of step structures are formed on the LED semiconductor layer, and the plurality of step structures separate the LED semiconductor layer into a plurality of LED units arranged in an array, and then an etching hole is formed in the area corresponding to the contact to expose the bonding metal pad.

[0032] In a specific embodiment, the production method specifically includes:

[0033] The second doped semiconductor layer located in multiple selected areas is etched away to form a plurality of step structures, wherein the height of the step structures is not less than the thickness of the second doped semiconductor layer and less than the thickness of the LED semiconductor layer, and the step structures at least isolate the second doped semiconductor layers of adjacent LED units from each other.

[0034] In a specific embodiment, the production method specifically includes:

[0035] The second doped semiconductor layer, the active layer and the first doped semiconductor layer located in a plurality of selected areas are etched away to form a plurality of step structures, wherein the height of the step structures is equal to the thickness of the LED semiconductor layer, and the step structures at least isolate the second doped semiconductor layer, the active layer and the first doped semiconductor layer of adjacent LED units from each other, and the selected areas are areas corresponding to the contacts.

[0036] In a specific embodiment, the production method specifically includes:

[0037] Etching away a portion of the bonding layer in a region corresponding to the etching hole, thereby forming the etching groove and the bonding metal pad, wherein the etching groove is located between the bonding metal pad and the bonding layer and electrically isolates the bonding metal pad from the bonding layer; and

[0038] A passivation layer is formed on the second doped semiconductor layer, and the passivation layer covers the step structure and the bonding metal pad and fills the etching groove.

[0039] In a specific embodiment, the production method specifically includes:

[0040] A plurality of isolation material layers are formed in a plurality of selected regions of the second doped semiconductor layer by ion implantation, and the implantation depth of the ion implanted material is controlled so that the thickness of the isolation material layer is not less than the thickness of the second doped semiconductor layer, and the isolation material layer separates the LED semiconductor layer to form a plurality of LED units arranged in an array,

[0041] A through hole exposing the bonding layer is formed in a region of the isolation material layer corresponding to the contact point, and then the bonding metal pad is formed at the bottom of the through hole.

[0042] In a specific embodiment, the production method specifically includes:

[0043] Etching away a portion of the bonding layer in a region corresponding to the through hole, thereby forming the etching groove and the bonding metal pad, wherein the etching groove is located between the bonding metal pad and the bonding layer, and the bonding metal pad is electrically isolated from the bonding layer;

[0044] A passivation layer is formed on the second doped semiconductor layer, and the passivation layer covers the through hole and the bonding metal pad and fills the etched groove.

[0045] In a specific embodiment, the production method specifically includes:

[0046] forming a first opening on the passivation layer to expose a portion of the second doped semiconductor layer, and forming a second opening on the passivation layer to expose the bonding metal pad;

[0047] An electrode layer is formed on the passivation layer, and the electrode layer is electrically connected to the second doped semiconductor layer through the first opening and is electrically connected to the bonding metal pad through the second opening.

[0048] Compared with the prior art, the present invention has at least the following advantages:

[0049] 1) A Micro-LED micro display chip provided by an embodiment of the present invention retains a bonding layer above the contact, and the height difference between the electrode layer and the second doped semiconductor layer and the contact is smaller. The electrode layer can better electrically connect the second doped semiconductor layer and the contact, and is not prone to breakage of the electrode layer;

[0050] 2) In the method for manufacturing a Micro-LED micro display chip provided in an embodiment of the present invention, the depth of the etched opening is shallower, the process of exposure and passivation layer opening is easier to control, the flatness of the subsequently formed electrode layer is better, and the undulation of the electrode layer at the corresponding contact point is smaller. BRIEF DESCRIPTION OF THE DRAWINGS

[0051] Figure 1a , Figure 1b They are respectively a top view of a Micro-LED micro display chip provided in a typical implementation case of the present invention;

[0052] Figure 2a yes Figure 1a A cross-sectional view of an exemplary Micro-LED micro display chip along line AA;

[0053] Figure 2b yes Figure 1a A cross-sectional view of an exemplary Micro-LED micro display chip along line BB;

[0054] Figure 2c is a cross-sectional view of a Micro-LED micro display chip provided in a typical implementation case of the present invention;

[0055] Figure 3a-Figure 3i It is a schematic diagram of the manufacturing process structure of a Micro-LED micro display chip provided in a typical implementation case of the present invention;

[0056] Figure 4a-4e It is a schematic diagram of a partial manufacturing process structure of a Micro-LED micro display chip provided in a typical implementation case of the present invention. DETAILED DESCRIPTION

[0057] In view of the deficiencies in the prior art, the inventor of this case has proposed the technical solution of the present invention after long-term research and extensive practice. The technical solution, its implementation process and principle will be further explained as follows.

[0058] The present invention aims to break the technical bottleneck of batch transfer of Micro-LED chips, does not adopt the batch transfer method, and provides a new type of Micro-LED micro display chip and its manufacturing method.

[0059] The term "layer" used in the embodiments of the present invention refers to a material portion including an area with a certain thickness. The layer can extend over the entire lower or upper structure, or can have a degree less than the range of the lower or upper structure. In addition, the layer can be a region of a homogeneous or inhomogeneous continuous structure, and its thickness is less than the thickness of the continuous structure. For example, the layer can be located between the top surface and the bottom surface of the continuous structure or between any pair of horizontal planes therebetween. The layer can extend horizontally, vertically and / or along a tapered surface. The second substrate can be a layer, one or more layers can be included therein, and / or one or more layers can be provided thereon, above and / or below. A layer can include multiple layers. For example, the semiconductor layer can include one or more doped or undoped semiconductor layers, and can have the same or different materials.

[0060] The term "second substrate" used in the embodiments of the present invention refers to a material on which a subsequent material layer is added. The second substrate itself can be patterned, and the material added on top of the second substrate can be patterned or can remain unpatterned. In addition, the second substrate can include a variety of semiconductor materials, such as silicon, silicon carbide, gallium nitride, germanium, gallium arsenide, indium phosphide, etc. Alternatively, the second substrate can be made of non-conductive materials, such as glass, plastic or sapphire wafers. The first substrate has a semiconductor device or circuit formed therein, and the drive circuit or semiconductor device can be processed and formed according to specific needs, and is not specifically limited here.

[0061] Example 1

[0062] Figure 1a , Figure 1b 1 shows a top view of an illustrative Micro-LED micro display chip according to some implementations of the present invention, Figure 2a Shows Figure 1a An illustrative cross-sectional view of a Micro-LED microdisplay chip along line AA, Figure 2b Shows Figure 1a A cross-sectional view of an illustrative Micro-LED micro display chip along line BB in the middle.

[0063] See also Figure 1a and Figure 2aA Micro-LED micro display chip is obtained by monolithic integration / wafer level manufacturing process and cutting. The Micro-LED micro display chip includes a first substrate 110 and an LED semiconductor layer formed on the first substrate 110. The first substrate 110 includes a driving circuit and a plurality of contacts 111 electrically connected to the driving circuit. The LED semiconductor layer is fixedly bonded to the first substrate 110 through a bonding layer 160, and the LED semiconductor layer is divided into a plurality of LED units 100 arranged in an array. Each contact 111 drives one of the LED units 100, and adjacent LED units 100 can be driven independently.

[0064] In this embodiment, the bonding layer 160 includes a plurality of bonding metal pads 161, and an etching groove ( Figure 3f 162), each bonding metal pad 161 corresponds to at least one contact 111 and completely covers the contact 111, and each bonding metal pad 161 is also electrically connected to a corresponding contact 11, and the second doped semiconductor layer corresponding to each LED unit 100 is electrically connected to the contact 111 via the bonding metal pad 161.

[0065] In this embodiment, the LED unit 100 also has a step structure 151, which electrically isolates two adjacent LED units 100 so that each LED unit 100 can be driven independently; and the bottom of the step structure 151 and the area corresponding to the contact 111 also have an etched hole exposing the bonding metal pad 161, and each of the LED units 100 is electrically connected to a contact 111 via the electrode layer 180 and the bonding metal pad 161.

[0066] Taking one of the LED units 100 as an example, the LED semiconductor layer includes a first doped semiconductor layer 130, an active layer 140 and a second doped semiconductor layer 150 stacked in sequence on the first substrate 110, wherein the first doped semiconductor layer 130 is fixedly bonded to the first substrate 110 via a bonding layer 160.

[0067] In this embodiment, the first substrate 110 can be made of semiconductor materials such as silicon, silicon carbide, gallium nitride, germanium, gallium arsenide, indium phosphide, etc. Of course, the first substrate 110 can also be made of non-conductive materials such as glass, plastic or sapphire wafer. In this embodiment, the first substrate 110 can be a CMOS backplane or a TFT glass substrate, etc. The driving circuit is used to provide an electrical signal to the LED unit 100 to control the brightness.

[0068] In this embodiment, the driving circuit may include an active matrix driving circuit, wherein each individual LED unit 100 corresponds to an independent driver. In this embodiment, the driving circuit may include a passive matrix driving circuit, wherein a plurality of LED units 100 are distributed in an array and connected to data lines and scan lines driven by the driving circuit.

[0069] In this embodiment, the bonding layer 160 and the bonding metal pad 161 may be formed integrally, and a plurality of etching grooves are disposed on the bonding layer 160 . The portion of the bonding layer 160 surrounded by an etching groove forms a bonding metal pad 161 electrically isolated from the remaining portion.

[0070] In this embodiment, the thickness of the bonding layer 160 is equivalent to the thickness of the second doped semiconductor layer 150, which is about 1 μm. If the bonding layer 160 in the area corresponding to the contact 111 is removed and the contact 111 is exposed, and then the second doped semiconductor layer 150 and the contact 111 are connected with the electrode layer 180, the height difference between the connection area between the second doped semiconductor layer 150 and the electrode layer 180 and the contact 111 is equivalent to the total thickness of the LED semiconductor layer and the bonding layer 160, so that the electrode layer 180 extends longer in the thickness direction of the LED unit 100, and then the electrode layer 180 is more likely to break, while retaining part of the bonding layer in the area corresponding to the contact 111 and forming a bonding metal pad 161 electrically connected to the contact 111, so that the height difference between the second doped semiconductor layer 150 and the contact 111 is smaller, thereby improving the structural stability of the electrode layer 180.

[0071] In this embodiment, the bonding layer 160 may be an adhesive material layer formed on the first substrate 110 to bond the first substrate 110 and the LED semiconductor layer. In this embodiment, the bonding layer 160 and the bonding metal pad 161 are made of the same material, which may be a conductive material such as a metal or a metal alloy. For example, the bonding layer 160 may be made of Au, Sn, In, Cu or Ti, etc., and is not limited thereto.

[0072] It should be understood that the description of the material of the bonding layer 160 is merely illustrative and not restrictive, and those skilled in the art may make changes as required, and all such changes are within the scope of the present application.

[0073] In this embodiment, the first doped semiconductor layer 130, the active layer 140 and the second doped semiconductor layer 150 are stacked in sequence on the bonding layer 160, and the bonding layer 160 is arranged on the first substrate 110. The LED semiconductor layer is electrically connected to the contact 111 located on the first substrate 110 via the electrode layer 180 and the bonding metal pad 161.

[0074] In this embodiment, the active layer 140 is arranged between the first doped semiconductor layer 130 and the second doped semiconductor layer 150 and provides light. The active layer 140 is a layer that recombine holes and electrons provided from the first doped semiconductor layer 130 and the second doped semiconductor layer 150 respectively and outputs light of a specific wavelength, and the active layer 140 can have a single quantum well structure or a multiple quantum well (MQW) structure and alternating stacking of well layers and barrier layers.

[0075] In this embodiment, the step structure 151 is formed on the second doped semiconductor layer 150, and the height of the step structure 151 is not less than the thickness of the second doped semiconductor layer 150 and is less than or equal to the thickness of the LED semiconductor layer. The step structure 151 at least isolates the second doped semiconductor layers 150 of adjacent LED units from each other, that is, part of the step structure 151 penetrates and isolates the second doped semiconductor layer 150 along the thickness direction.

[0076] In this embodiment, the material of the first doped semiconductor layer 130 and the second doped semiconductor layer 150 can be one or more layers formed by II-VI materials (such as ZnSe or ZnO) or III-V nitride materials (such as GaN, AlN, InN, InGaN, GaP, AlInGaP, AlGaAs and their alloys).

[0077] In the present embodiment, the first doped semiconductor layer 130 may be a P-type semiconductor layer extending across a plurality of LED units 100 and forming a common anode of these LED units 100. In the present embodiment, the first doped semiconductor layer 130 extending across the LED units (i.e., the portion located between two LED units) may be relatively thin; the thickness of the first doped semiconductor layer 130 is 0.05 μm-1 μm, preferably 0.05 μm-0.7 μm, and particularly preferably 0.05 μm-0.5 μm.

[0078] In this embodiment, the first doped semiconductor layer 130 may be P-type GaN. In this embodiment, the first doped semiconductor layer 130 may be formed by doping magnesium (Mg) in GaN. In other embodiments, the first doped semiconductor layer 130 may also be P-type InGaN or P-type AlInGaP, etc.

[0079] In the present embodiment, each LED unit 100 has an anode and a cathode connected to a driving circuit, for example, the driving circuit is formed in the first substrate 110 (the driving circuit is not explicitly shown in the figure), for example, each LED unit 100 has an anode connected to a constant voltage source and has a cathode connected to the source / drain of the driving circuit; in other words, by forming a continuous first doped semiconductor layer 130 across each LED unit 100, a plurality of LED units 100 may have a common anode formed by the first doped semiconductor layer 130.

[0080] In this embodiment, the second doped semiconductor layer 150 may be an N-type semiconductor layer and forms a cathode of the LED unit 100 .

[0081] In this embodiment, the second doped semiconductor layer 150 may be N-type GaN, N-type InGaN, N-type AlInGaP, etc.

[0082] In this embodiment, the second doped semiconductor layers 150 of different LED units 100 are electrically isolated, so that each LED unit 100 can have a cathode with a voltage level different from that of other LED units. As a result of the disclosed embodiment, a plurality of individually operable LED units 100 are formed, whose first doped semiconductor layers 130 extend horizontally across adjacent LED units and whose second doped semiconductor layers 150 are electrically isolated between adjacent LED units.

[0083] In this embodiment, the active layer (i.e., MQW layer) 140 is the active region of the LED semiconductor layer. In this embodiment, the thickness of the LED semiconductor layer (first doped semiconductor layer 130, active layer 140, and second doped semiconductor layer 150) is 0.4 μm-4 μm, preferably 0.5 μm-3 μm.

[0084] It should be noted that the first doped semiconductor layer 130 may also be an N-type semiconductor layer. Accordingly, when the first doped semiconductor layer 130 is an N-type semiconductor layer, the second doped semiconductor layer 150 is a P-type semiconductor layer.

[0085] In this embodiment, a step structure 151 is formed on the second doped semiconductor layer 150, that is, part of the step structure penetrates and isolates the second doped semiconductor layer 150 along the thickness direction, and the step surface of the step structure serves as the light-emitting area of ​​the LED semiconductor layer.

[0086] In the present embodiment, an etching hole is further provided at the bottom of the step structure, and the bonding metal pad 161 on the first substrate 110 is exposed from the etching hole, and the bonding metal pad 161 is electrically isolated from the bonding layer 160 by the etching groove 162. It can be understood that the orthographic projection area of ​​the bonding metal pad 161 and the contact 111 on the first substrate 110 is located within the orthographic projection area of ​​the etching hole on the first substrate 110.

[0087] In this embodiment, a passivation layer 170 is formed at least on the second doped semiconductor layer 150 and a portion of the exposed first doped semiconductor layer 130 , the active layer 140 , and the bonding layer 160 . The passivation layer 170 can be used to protect and isolate the LED unit 100 .

[0088] In this embodiment, the passivation layer 170 is disposed on the second doped semiconductor layer 150 , and the passivation layer 170 also covers the sidewalls of the step structure, the etching holes, and the surfaces of the etching grooves.

[0089] In the present embodiment, the material of the passivation layer 170 may be SiO2, Al2O3, SiN or other suitable materials, etc. In the present embodiment, the material of the passivation layer 170 may also be polyimide, SU-8 photoresist or other photo-patternable polymers, etc. The electrode layer 180 is formed on a portion of the passivation layer 170, and a first opening 171 and a second opening 172 are provided on the passivation layer 170, the first opening 171 exposes the second doped semiconductor layer 150, and the second opening 172 exposes the bonding metal pad 161, and the electrode layer 180 is electrically connected to the second doped semiconductor layer 150 through the first opening 171 on the passivation layer 170, and is electrically connected to the bonding metal pad 161 through the second opening 172 on the passivation layer 170.

[0090] In this embodiment, the first opening 171 is arranged in the central area of ​​each LED unit 100 as much as possible. The shape of the first opening 171 can be circular or square, etc. Of course, the first opening 171 can also be other regular or irregular shapes.

[0091] In this embodiment, the material of the electrode layer 180 can be a transparent conductive material. For example, the material of the electrode layer 180 includes a conductive metal oxide such as indium tin oxide (ITO) or zinc oxide (ZnO), or the material of the electrode layer 180 can be a conductive metal material such as Cr, Ti, Pt, Au, Al, Cu, Ge or Ni.

[0092] In this embodiment, the first substrate 110 has a driving circuit formed therein and used to drive the LED unit 100, and the contact 111 is electrically connected to the second doped semiconductor layer 150 through the bonding metal pad 161 and the electrode layer 180; it can be understood that the electrical connection between the second doped semiconductor layer 150 and the contact 111 of the driving circuit is completed by the electrode layer 180 and the bonding metal pad 161.

[0093] In this embodiment, as described above, the second doped semiconductor layer 150 forms the cathode of each LED unit 100 , so the contact 111 provides a driving voltage to the cathode of each LED unit 100 from the driving circuit to the second doped semiconductor layer 150 through the electrode layer 180 .

[0094] Figure 3a-3h A cross-sectional view of an illustrative Micro-LED micro display chip during a manufacturing process according to some embodiments of the present invention is shown.

[0095] See also Figure 3a-3h A method for manufacturing a Micro-LED micro display chip provided by an embodiment of the present invention may include the following steps:

[0096] 1) Please refer to Figure 3a , sequentially forming a second doped semiconductor layer 150, an active layer 140, and a first doped semiconductor layer 130 on a second substrate 120, wherein the second doped semiconductor layer 150, the active layer 140, and the first doped semiconductor layer 130 form an LED semiconductor layer; and providing a first substrate 110, wherein the first substrate 110 includes a driving circuit and a plurality of contacts 111 electrically connected to the driving circuit;

[0097] The second substrate 120 is made of a base material suitable for forming an LED semiconductor layer. For example, the material of the second substrate 120 may be a non-conductive material such as glass, plastic or sapphire wafer, but is not limited thereto. The first substrate 110 may be made of a semiconductor material such as silicon, silicon carbide, gallium nitride, germanium, gallium arsenide, indium phosphide, etc. Of course, the first substrate 110 may also be made of a non-conductive material such as glass, plastic or sapphire wafer. In this embodiment, the first substrate 110 may be a CMOS backplane or a TFT glass substrate. The driving circuit is used to provide an electrical signal to the LED unit 100 to control the brightness. In this embodiment, the driving circuit may include an active matrix driving circuit, wherein each individual LED unit 100 is equivalent to an independent driver. In this embodiment, the driving circuit may include a passive matrix driving circuit, wherein a plurality of LED units 100 are distributed in an array and connected to data lines and scan lines driven by the driving circuit.

[0098] In some specific embodiments, the second doped semiconductor layer 150, the active layer 140, and the first doped semiconductor layer 130 can be formed by processes such as chemical vapor deposition (CVD), physical vapor deposition (PVD), atomic layer deposition (ALD), plasma enhanced CVD (PECVD), and plasma enhanced ALD (PEALD); in this embodiment, the material of the first doped semiconductor layer 130 and the second doped semiconductor layer 150 can be II-VI materials (such as ZnSe or ZnO) or III-V nitride materials (such as GaN, AlN, InN, InGaN, GaP, AlInGaP, AlGaAs and alloys thereof), the first doped semiconductor layer 130 can be a P-type semiconductor layer serving as an anode, and in this embodiment, the thickness of the first doped semiconductor layer 130 is 0.05 μm-1 μm, preferably 0.05 μm-0.7 μm, and particularly preferably 0.05 μm-0.5 μm; in this embodiment, the first doped semiconductor layer 130 can be formed by doping magnesium (Mg) in GaN. In other embodiments, the first doped semiconductor layer 130 can also be P-type InGaN, P-type AlInGaP, etc.; in this embodiment, the second doped semiconductor layer 150 can be an N-type semiconductor layer, and the second doped semiconductor layer 150 serves as the cathode of each LED unit 100; in this embodiment, the second doped semiconductor layer 150 can be N-type GaN, N-type InGaN, N-type AlInGaP, etc.; in this embodiment, the active layer (i.e., MQW layer) 140 is the active region of the LED semiconductor layer. In this embodiment, the thickness of the LED semiconductor layer (the first doped semiconductor layer 130, the MQW layer 140, and the second doped semiconductor layer 150) is 0.4μm-4μm, preferably 0.5μm-3μm; of course, the first doped semiconductor layer 130 It may also be an N-type semiconductor layer. Accordingly, when the first doped semiconductor layer 130 is an N-type semiconductor layer, the second doped semiconductor layer 150 is a P-type semiconductor layer.

[0099] 2) Please refer to Figure 3b and 3c, forming a bonding layer 160 on the first doped semiconductor layer 130 and / or the first substrate 110, and bonding the first substrate 110 to the first doped semiconductor layer 130 through the bonding layer 160, wherein the bonding layer 160 may be a conductive adhesive material layer formed on the first substrate 110 to bond the first substrate 110 and the LED unit 100, and in this embodiment, the material of the bonding layer 160 is a conductive material, such as a metal or a metal alloy, for example, the material of the bonding layer may be Au, Sn, In, Cu or Ti, etc.; it should be understood that the description of the material of the bonding layer 160 is only exemplary, not restrictive, and those skilled in the art may make changes as required, and all these changes are within the scope of the present application;

[0100] 3) Please refer to Figure 3d , removing the second substrate 120, the method of removing the second substrate 120 may be implemented by direct stripping or other methods known to those skilled in the art; of course, after removing the second substrate 120, a thinning operation may be performed on the second doped semiconductor layer 150 to remove a portion of the second doped semiconductor layer 150; in some embodiments, the thinning operation may include a dry etching or a wet etching operation, and in some embodiments, the thinning operation may also include a chemical mechanical polishing (CMP) operation, etc.;

[0101] 4) Please refer to Figure 3e , the second doped semiconductor layer 150 located in the predetermined area can be removed by etching or the like, thereby forming a step structure 151, wherein the step structure 151 separates the second doped semiconductor layer 150 to form a plurality of LED mesas, each LED mesas corresponding to an LED unit; wherein the height of the step structure 151 is not less than the thickness of the second doped semiconductor layer 150 and less than or equal to the thickness of the LED semiconductor layer, and the step structure 151 at least isolates the second doped semiconductor layers 150 of adjacent LED units from each other, wherein the step surface of the step structure 151 serves as the light-emitting area of ​​the LED semiconductor layer;

[0102] It can be understood that the step structure 151 penetrates the second doped semiconductor layer 150 along the thickness direction, thereby isolating the second doped semiconductor layer 150; or, part of the step structure 151 penetrates the second doped semiconductor layer 150 and the active layer 140 along the thickness direction, or part of the step structure 151 penetrates the second doped semiconductor layer 150, the active layer 140 and the first doped semiconductor layer 130 along the thickness direction.

[0103] In the present embodiment, the thickness of the LED semiconductor layer including the first doped semiconductor layer 130, the active layer 140 and the second doped semiconductor layer 150 may be between about 0.3 μm and about 5 μm. In some other embodiments, the thickness of the LED semiconductor layer including the first doped semiconductor layer 130, the active layer 140 and the second doped semiconductor layer 150 may be between about 0.4 μm and about 4 μm. In some alternative embodiments, the thickness of the LED semiconductor layer including the first doped semiconductor layer 130, the active layer 140 and the second doped semiconductor layer 150 may be between about 0.5 μm and about 3 μm.

[0104] 5) Please refer to Figure 3f , removing the bonding layer 160 in the selected area by etching or the like, thereby forming a plurality of etching grooves 162 on the bonding layer 160, and forming a bonding metal pad 161 electrically isolated from the remaining portion of the bonding layer 160 by the portion surrounded by the etching grooves 162, and the bonding metal pad 161 covers a contact 111 and is electrically connected to the contact 111;

[0105] 6) Please refer to Figure 3g and Figure 3h , forming a passivation layer 170 on the surface of the formed device epitaxial structure unit, and processing the passivation layer 170 to form a first opening 171 and a second opening 172, so that a portion of the second doped semiconductor layer 150 is exposed from the first opening 171, and the bonding metal pad 161 is exposed from the second opening 172; it should be noted that, in a specific implementation, the passivation layer 170 can be first formed on the surface of the formed device epitaxial structure unit, and then the first opening 171 and the second opening 172 are formed by etching. Of course, the passivation layer having the first opening 171 and the second opening 172 can also be formed by selective epitaxy;

[0106] In this embodiment, it is only necessary to etch the passivation layer to expose the LED light-emitting surface and the bonding metal pad. Compared with the prior art of etching the passivation layer and the bonding layer to expose the contacts, the depth of the etching and the exposure depth in the embodiment of the present invention are lower, so that the process of opening the passivation layer is easier to control;

[0107] In this embodiment, the material of the passivation layer 170 may be SiO2, Al2O3, SiN or other suitable materials, and the passivation layer 170 may also include polyimide, SU-8 photoresist or other photo-patternable polymers;

[0108] 7) Please refer to Figure 3i, forming a transparent electrode layer 180 on the passivation layer 170, and making the transparent electrode layer 180 electrically connected to the second doped semiconductor layer 150, the bonding metal pad 161 and the contact 111 through the first opening 171 and the second opening 172 respectively, and the driving circuit on the first substrate 110 can control the voltage and current of the second doped semiconductor layer 150 through the transparent electrode layer 180; in this embodiment, the transparent electrode layer 180 is electrically isolated from other structural layers except the second doped semiconductor layer 150 through the passivation layer;

[0109] In this embodiment, the electrode layer 180 is formed on a portion of the passivation layer 170. In this embodiment, the material of the electrode layer 180 can be a conductive material such as indium tin oxide (ITO), Cr, Ti, Pt, Au, Al, Cu, Ge or Ni.

[0110] In a Micro-LED micro display chip provided by an embodiment of the present invention, the depth of the etched opening is shallower and the exposure depth is lower. The process of opening the passivation layer is easier to control, the subsequently formed electrode layer has better flatness, and the electrode layer at the corresponding contact point has smaller fluctuations.

[0111] Example 2

[0112] Figure 2c A cross-sectional view of an illustrative Micro-LED micro display chip in a specific implementation manner in an embodiment of the present invention is shown, a Micro-LED micro display chip comprising a first substrate 110 and an LED semiconductor layer formed on the first substrate 110, the first substrate 110 comprising a driving circuit and a plurality of contacts 111 electrically connected to the driving circuit, the LED semiconductor layer being fixedly bonded to the first substrate 110 via a bonding layer 160, and the LED semiconductor layer being divided into a plurality of LED units 100 arranged in an array, each contact 111 driving one of the LED units 100, and adjacent LED units 100 being able to be driven independently.

[0113] In this embodiment, the bonding layer 160 includes a plurality of bonding metal pads 161, and an etching groove ( Figure 3f 162), each bonding metal pad 161 corresponds to at least one contact 111 and completely covers the contact 111, and each bonding metal pad 161 is also electrically connected to a corresponding contact 11, and the second doped semiconductor layer corresponding to each LED unit 100 is electrically connected to the contact 111 via the bonding metal pad 161.

[0114] In this embodiment, an isolation material layer 190 is arranged between two adjacent LED units 100, and the two adjacent LED units 100 are electrically isolated by the isolation material layer 190, so that each LED unit 100 can be driven independently, and the isolation material layer 191 has a through hole 191 exposing the bonding metal pad 161, and the LED unit 100 is also electrically connected to the bonding metal pad 161 and the contact 111 on the first substrate 110 through the electrode layer 180.

[0115] Taking one of the LED units 100 as an example, the LED semiconductor layer includes a first doped semiconductor layer 130 , an active layer 140 , and a second doped semiconductor layer 150 which are sequentially stacked on the first substrate 110 .

[0116] In this embodiment, a passivation layer 170 is formed on the second doped semiconductor layer 150 and a portion of the exposed first doped semiconductor layer 130, the active layer 140, and the isolation material layer 190. The passivation layer 170 can be used to protect and isolate the LED unit 100. A second opening 172 is opened in the area of ​​the passivation layer 170 corresponding to the through hole exposing the contact 111, and a first opening 171 is opened in the area corresponding to the second doped semiconductor layer 150. The electrode layer 180 is formed on a portion of the passivation layer 170, and the electrode layer 180 is electrically connected to the second doped semiconductor layer 150 through the first opening 171 and the through hole on the passivation layer 170, and is electrically connected to the bonding metal pad 161 and the contact 111 through the second opening 172 on the passivation layer 170.

[0117] In this embodiment, the first opening 171 is preferably disposed in the central area of ​​each LED unit 100 . The shape of the first opening 171 may be circular or square, etc. Of course, the first opening 171 may also be other regular or irregular shapes.

[0118] In this embodiment, the isolation material layer 190 is at least disposed within the second doped semiconductor layer 150, and the thickness of the isolation material layer 190 is not less than the thickness of the second doped semiconductor layer 150, and the isolation material layer 190 at least electrically isolates the second doped semiconductor layers 150 of adjacent LED units 100.

[0119] In this embodiment, the isolation material layer 190 can be formed in the second doped semiconductor layer 150, and its depth is not enough to penetrate the active layer 140. The active layer 140, the first doped semiconductor layer 130 and the bonding layer 160 included in each LED unit can extend horizontally to the adjacent LED unit, or the isolation material layer 190 can be continuously formed in the second doped semiconductor layer 150 and the active layer 140, or the isolation material layer 190 can be continuously formed in the second doped semiconductor layer 150, the active layer 140 and the first doped semiconductor layer 130.

[0120] In this embodiment, the isolation material layer 190 has the physical property of electrical insulation, and the material of the isolation material layer 190 includes ion implantation material, and the ion implantation material includes any one or a combination of two or more of hydrogen, helium, nitrogen, oxygen, fluorine, magnesium, silicon and argon.

[0121] In this embodiment, the materials and structures of the first doped semiconductor layer 130 , the active layer 140 , the second doped semiconductor layer 150 , the bonding layer 160 , the passivation layer 170 and the electrode layer 180 may be substantially the same as those in Embodiment 1 and will not be described in detail herein.

[0122] Figure 4a-4d 1 shows a cross-sectional view of an illustrative Micro-LED micro display chip during a manufacturing process according to some embodiments of the present invention. It should be noted that: Figure 4a-4d Only the manufacturing process after the LED semiconductor layer including the first doped semiconductor layer 130 , the active layer 140 , and the second doped semiconductor layer 150 is transferred from the second substrate 120 to the first substrate 110 is shown.

[0123] See also Figure 4a-4d The present invention provides a method for manufacturing a Micro-LED micro display chip, and its manufacturing process is basically the same as that of Example 1. Therefore, this embodiment only introduces the differences from Example 1, and the remaining same or similar process steps and the limitations on the materials and structures of each epitaxial structure layer therein are not repeated here; the manufacturing method may include the following steps:

[0124] 4) Please refer to Figure 4a An isolation material layer 190 is formed in the second doped semiconductor layer 150 by ion implantation or the like, wherein the thickness of the isolation material layer 190 is not less than the thickness of the second doped semiconductor layer 150, and as a result of the ion implantation, the second doped semiconductor layer 150 is separated into a plurality of LED countertops by the isolation material layer 190, and each LED countertop corresponds to an LED unit.

[0125] In this embodiment, the isolation material layer 190 can be formed by injecting any one ion of H, He, N, O, F, Mg, Si, and Ar or a combination of two or more ions into the second doped type semiconductor layer 150. In this embodiment, the isolation material layer 190 has the physical property of electrical insulation. By injecting ions into a specified area of ​​the second doped semiconductor layer 150, the material of the second doped semiconductor layer 150 in the specified area can be converted into the isolation material layer 190.

[0126] In this embodiment, the isolation material layer 190 can be formed with an ion implantation power of about 10 keV to about 300 keV. In some embodiments, the isolation material layer 190 can be formed with an ion implantation power of about 15 keV to about 250 keV. In some embodiments, the isolation material layer 190 can be formed with an ion implantation power of about 20 keV to about 200 keV.

[0127] In this embodiment, the depth of ion implantation can be controlled so that the formed isolation material layer 190 penetrates the second doped type semiconductor layer 150 along the thickness direction. Of course, the formed isolation material layer 190 can also penetrate the second doped type semiconductor layer 150 and the active layer 140 along the thickness direction. Of course, the formed isolation material layer 190 can also penetrate the second doped type semiconductor layer 150, the active layer 140, and the first doped type semiconductor layer 150 along the thickness direction. It should be understood that the position, shape and depth of the isolation material layer 190 shown in Figure 4a are only illustrative and not restrictive, and those skilled in the art can make changes according to the specific implementation method, all of which are within the scope of the present invention.

[0128] 5) Please refer to Figure 4b , a through hole 191 exposing the bonding layer 160 is formed in the region of the isolation material layer 191 corresponding to the contact 111 by etching or the like, the through hole 191 continuously penetrates the isolation material layer 191, the active layer 140, and the first doped semiconductor layer 130 in the thickness direction, and then the bonding layer 160 in the selected region in the through hole 191 is removed by etching or the like, so as to form a plurality of etching grooves 162 on the bonding layer 160, and the portion of the bonding layer 160 surrounded by the etching grooves 162 forms a bonding metal pad 161 electrically isolated from the rest of the portion, and the bonding metal pad 161 covers a contact 111 and is electrically connected to the contact 111; it should be noted that the contact 111 is located in the orthographic projection region of the through hole 191 on the first substrate 110;

[0129] 6) Please refer to Figure 4c and Figure 4d, forming a passivation layer 170 on the surface of the formed device epitaxial structure unit, and processing the passivation layer 170 to form a first opening 171 and a second opening 172, so that a portion of the second doped semiconductor layer 150 is exposed from the first opening 171, and the bonding metal pad 161 is exposed from the second opening 172;

[0130] 7) Please refer to Figure 4e A transparent electrode layer 180 is formed on the passivation layer 170 , and the transparent electrode layer 180 is electrically connected to the second doped semiconductor layer 150 , the bonding metal pad 161 and the contact 111 through the first opening 171 and the second opening 172 .

[0131] The embodiment of the present invention provides a Micro-LED micro display chip, which retains the bonding layer above the contact instead of etching away the bonding layer above the contact to expose the contact. The height difference between the electrode layer and the second doped semiconductor layer and the contact is smaller, and the electrode layer can better electrically connect the second doped semiconductor layer and the contact, which is not easy to cause the electrode layer to break, and the flatness, connectivity, and coverage of the electrode layer are better. In addition, when etching the passivation layer, the depth of the etching opening of the present invention is shallower, and the process of exposure and passivation layer opening is easier to control.

[0132] It should be understood that the above embodiments are only for illustrating the technical concept and features of the present invention, and their purpose is to enable people familiar with the technology to understand the content of the present invention and implement it accordingly, and they cannot be used to limit the protection scope of the present invention. Any equivalent changes or modifications made according to the spirit of the present invention should be included in the protection scope of the present invention.

Claims

1. A Micro-LED micro display chip, characterized in that include: a substrate, the substrate comprising a driving circuit and a plurality of contacts electrically connected to the driving circuit; An LED semiconductor layer is arranged on the substrate, and the LED semiconductor layer includes a first doped semiconductor layer, an active layer, and a second doped semiconductor layer which are sequentially stacked on the substrate; the LED semiconductor layer is divided into a plurality of LED units arranged in an array, each contact drives one of the LED units, and adjacent LED units can be driven independently; as well as A bonding layer is arranged between the substrate and the LED semiconductor layer. The bonding layer is made of a metal conductive material or a metal alloy conductive material. The bonding layer is electrically connected to the first doped semiconductor layer. A plurality of etching grooves are arranged on the bonding layer. The portion of the bonding layer surrounded by an etching groove forms a bonding metal pad electrically isolated from the remaining portion. Each bonding metal pad corresponds to at least one contact and is electrically connected to the contact. The bonding metal pad is integrally formed with the bonding layer. The upper surface of the bonding metal pad is not higher than the lower surface of the LED semiconductor layer. The bonding metal pad covers at least part of the contact. A passivation layer is disposed on the second doped semiconductor layer, the passivation layer has a first opening and a second opening, the first opening exposes the second doped semiconductor layer corresponding to each LED unit, the second opening exposes the bonding metal pad, and the passivation layer also fills the etching groove; as well as An electrode layer is disposed on the passivation layer and covers the first opening and the second opening. The electrode layer is electrically connected to the second doped semiconductor layer from the first opening and is electrically connected to the bonding metal pad from the second opening.

2. The Micro-LED micro display chip according to claim 1, characterized in that: The bonding metal pad is arranged in the orthographic projection area of ​​the contact on the substrate.

3. The Micro-LED micro display chip according to claim 1, characterized in that: The LED unit has a step structure, and two adjacent LED units are electrically isolated by the step structure, so that adjacent LED units can be driven independently, and the passivation layer also covers the side walls of the step structure; wherein the area of ​​the LED semiconductor layer corresponding to the contact also has an etched hole exposing the bonding metal pad.

4. The Micro-LED micro display chip according to claim 3, characterized in that: The step structure is formed on the second doped semiconductor layer, and the height of the step structure is not less than the thickness of the second doped semiconductor layer but less than the thickness of the LED semiconductor layer. The step structure at least electrically isolates the second doped semiconductor layers of adjacent LED units.

5. The Micro-LED micro display chip according to claim 3, characterized in that: The step structure of each LED unit is formed on the second doped semiconductor layer, and the height of the step structure is equal to the thickness of the LED semiconductor layer. The step structure also electrically isolates the active layer and the first doped semiconductor layer of adjacent LED units.

6. The Micro-LED micro display chip according to claim 1, characterized in that: An isolation material layer is arranged between two adjacent LED units, and the two adjacent LED units are electrically isolated by the isolation material layer, so that the adjacent LED units can be driven independently, wherein the isolation material layer has a through hole exposing the bonding metal pad, the passivation layer also covers the side wall of the through hole, and the bonding metal pad is correspondingly arranged at the bottom of the through hole.

7. The Micro-LED micro display chip according to claim 6, characterized in that: The isolation material layer is formed in the second doped semiconductor layer, and the thickness of the isolation material layer is not less than the thickness of the second doped semiconductor layer. The isolation material layer at least electrically isolates the second doped semiconductor layers of adjacent LED units.

8. The Micro-LED micro display chip according to claim 7, characterized in that: The material of the isolation material layer includes ion implantation material, and the ion implantation material includes any one or a combination of two or more of hydrogen, helium, nitrogen, oxygen, fluorine, magnesium, silicon and argon.

9. The Micro-LED micro display chip according to claim 1, characterized in that: The first doped semiconductor layers of the plurality of LED units are a common first doped semiconductor layer.

10. The Micro-LED micro display chip according to claim 1, characterized in that: The first doped semiconductor layer is a P-type semiconductor layer, and the second doped semiconductor layer is an N-type semiconductor layer.

11. The Micro-LED micro display chip according to claim 1, characterized in that: A bonding layer is further arranged between the substrate and the first doped semiconductor layer, and the bonding metal pad is electrically isolated from the bonding layer via the passivation layer.

12. A method for manufacturing a Micro-LED micro display chip, characterized in that include: providing a second substrate, forming an LED semiconductor layer on the second substrate, wherein the LED semiconductor layer comprises a second doped semiconductor layer, an active layer and a first doped semiconductor layer which are sequentially stacked on the second substrate, Providing a first substrate, wherein the first substrate comprises a driving circuit and a plurality of contacts electrically connected to the driving circuit; forming a bonding layer on the first doped semiconductor layer and / or the first substrate, and bonding the first doped semiconductor layer to the first substrate, and then removing the second substrate to expose the second doped semiconductor layer; Processing the LED semiconductor layer to form a plurality of LED units arranged in an array, and enabling adjacent LED units to be driven independently, and etching away the bonding layer located in a plurality of selected areas, thereby forming a plurality of etching grooves on the bonding layer, wherein a portion surrounded by an etching groove forms a bonding metal pad electrically isolated from the remaining portion, the bonding metal pad covers a contact and is electrically connected to the contact, the bonding metal pad is integrally formed with the bonding layer, and the upper surface of the bonding metal pad is not higher than the lower surface of the LED semiconductor layer, the bonding layer is made of a metal conductive material or a metal alloy conductive material, and the bonding metal pad covers at least a portion of the contact; forming a passivation layer on the second doped semiconductor layer, and making the passivation layer cover the bonding metal pad and fill the etching groove; forming a first opening on the passivation layer to expose a portion of the second doped semiconductor layer, and forming a second opening on the passivation layer to expose the bonding metal pad; An electrode layer is formed on the passivation layer, and the electrode layer is electrically connected to the second doped semiconductor layer through the first opening and to the bonding metal pad through the second opening.

13. The method according to claim 12, characterized in that Specifically include: A plurality of step structures are formed on the LED semiconductor layer, and the plurality of step structures separate the LED semiconductor layer into a plurality of LED units arranged in an array, and then an etching hole is formed in the area corresponding to the contact to expose the bonding metal pad.

14. The method according to claim 13, characterized in that Specifically include: The second doped semiconductor layer located in multiple selected areas is etched away to form a plurality of step structures, wherein the height of the step structures is not less than the thickness of the second doped semiconductor layer and less than the thickness of the LED semiconductor layer, and the step structures at least isolate the second doped semiconductor layers of adjacent LED units from each other.

15. The method according to claim 13, characterized in that Specifically include: The second doped semiconductor layer, the active layer and the first doped semiconductor layer located in a plurality of selected areas are etched away to form a plurality of step structures, wherein the height of the step structures is equal to the thickness of the LED semiconductor layer, and the step structures at least isolate the second doped semiconductor layer, the active layer and the first doped semiconductor layer of adjacent LED units from each other, and the selected areas are areas corresponding to the contacts.

16. The method according to claim 15, characterized in that Specifically include: Etching away a portion of the bonding layer in a region corresponding to the etching hole, thereby forming the etching groove and the bonding metal pad, wherein the etching groove is located between the bonding metal pad and the bonding layer and electrically isolates the bonding metal pad from the bonding layer; and The passivation layer also covers the step structure.

17. The method according to claim 12, characterized in that Specifically include: A plurality of isolation material layers are formed in a plurality of selected regions of the second doped semiconductor layer by ion implantation, and the implantation depth of the ion implanted material is controlled so that the thickness of the isolation material layer is not less than the thickness of the second doped semiconductor layer, and the isolation material layer separates the LED semiconductor layer to form a plurality of LED units arranged in an array, A through hole exposing the bonding layer is formed in a region of the isolation material layer corresponding to the contact point, and then the bonding metal pad is formed at the bottom of the through hole.

18. The method according to claim 17, characterized in that Specifically include: Etching away a portion of the bonding layer in a region corresponding to the through hole, thereby forming the etching groove and the bonding metal pad, wherein the etching groove is located between the bonding metal pad and the bonding layer, and the bonding metal pad is electrically isolated from the bonding layer; The passivation layer also covers the through hole.

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