Single-photon avalanche diode, manufacturing method thereof and single-photon detector

Abstract

The invention discloses a single-photon avalanche diode and a manufacturing method thereof, and a single-photon detector, and relates to the technical field of optical detection, the single-photon avalanche diode comprises a silicon layer and a logic wafer, a filling region is formed at the top of the silicon layer, the filling region is filled with silicon dioxide, and an avalanche region and a PN junction are arranged in the silicon layer; the logic wafer is arranged at the bottom of the silicon layer, the logic wafer and the silicon layer are mutually bonded, the PN junction is arranged close to the logic wafer, and the avalanche region is arranged between the PN junction and the filling region. The filling region is filled with silicon dioxide which does not have near ultraviolet light absorption capability, so that near ultraviolet light is absorbed by the silicon layer to generate electron hole pairs after penetrating through the silicon dioxide and entering the silicon layer, and the distance between the electron hole pairs and the avalanche region is greatly reduced at the moment; therefore, the number of the electron hole pairs compounded in the migration process of the plurality of electron hole pairs is reduced, and the detection efficiency of the whole single-photon avalanche diode is improved.

Description

Technical Field

[0001] The present invention relates to the field of optical detection technology, and in particular to a single-photon avalanche diode and a manufacturing method thereof, and a single-photon detector. Background Art

[0002] The single-photon avalanche diode is a photoelectric detection avalanche diode with weak light detection capability. It is widely used in Raman spectroscopy, positron emission tomography, and fluorescence lifetime imaging due to its advantages of high gain, fast response, and high sensitivity. The working principle of the single-photon avalanche diode for detecting trace photons is as follows: a reverse bias voltage greater than the avalanche breakdown voltage is applied to both ends of the single-photon avalanche diode. When a photon is incident, the valence band electron absorbs the photon and transitions to the conduction band, generating an electron-hole pair. The photogenerated electron-hole pairs are accelerated and gain sufficient energy under the action of an external electric field, and new electron-hole pairs can be formed after colliding with the lattice. As new electrons and holes continue to repeatedly accelerate and collide with the lattice, the electron-hole pairs increase exponentially, and an avalanche multiplication effect occurs. At this time, the number of carriers in the single-photon avalanche diode increases rapidly, the current increases sharply, and the detection efficiency of the instrument is greatly improved.

[0003] Single-photon avalanche diodes have shortcomings in ultraviolet detection. After near-ultraviolet light is absorbed by silicon, the generated electron-hole pairs need to migrate to the avalanche region. During the migration process, electron-hole pairs will recombine, which will lead to reduced detection efficiency.

[0004] Therefore, it is necessary to provide a single-photon avalanche diode and a manufacturing method thereof, and a single-photon detector to solve the above-mentioned technical problems. Summary of the invention

[0005] The main purpose of the present invention is to provide a single-photon avalanche diode and a manufacturing method thereof, and a single-photon detector, aiming to solve the technical problem of low detection efficiency of single-photon avalanche diodes in the prior art.

[0006] To achieve the above object, according to one aspect of the present invention, the present invention provides a single photon avalanche diode, comprising: A silicon layer, a filling region is formed on the top of the silicon layer, the filling region is filled with silicon dioxide, and an avalanche region and a PN junction are arranged in the silicon layer; A logic wafer is provided at the bottom of the silicon layer, and the logic wafer and the silicon layer are bonded to each other, the PN junction is provided close to the logic wafer, and the avalanche region is provided between the PN junction and the filling region.

[0007] In one embodiment, a light trapping structure is formed in the silicon layer, and the light trapping structure is disposed at the bottom of the filling region.

[0008] In one embodiment, there are multiple light-trapping structures, and the multiple light-trapping structures are arranged in an array along the length direction and the width direction of the filling area.

[0009] In one embodiment, the light trapping structure is a conical structure with a tip facing the avalanche region.

[0010] In one embodiment, an opening is formed on the top of the silicon layer, and the opening is connected to the filling region.

[0011] In one embodiment, the single-photon avalanche diode further comprises a microlens, wherein the microlens is disposed on the top of the silicon layer, the microlens covers the opening, and is used to focus incident light through the opening onto the filling region.

[0012] In one embodiment, a groove is formed on the periphery of the silicon layer, and the single-photon avalanche diode further includes an isolation layer, which is disposed in the groove, and the top and bottom of the isolation layer are respectively in contact with the microlens and the logic wafer.

[0013] In one embodiment, the single photon avalanche diode further includes a guard ring, which surrounds the periphery of the avalanche region, the silicon layer is one of P-type and N-type, and the guard ring is the other of P-type and N-type.

[0014] In one embodiment, the filling area is a cylindrical filling area or a cubic filling area.

[0015] According to another aspect of the present invention, the present invention further provides a method for manufacturing a single-photon avalanche diode, the method for manufacturing a single-photon avalanche diode is applied to the single-photon avalanche diode as described above, and the method for manufacturing a single-photon avalanche diode comprises the following steps: Providing the silicon layer and the logic wafer, implanting doping ions into the silicon layer to form the avalanche region and the PN junction, and bonding the silicon layer to the logic wafer; Grinding a side of the silicon layer away from the logic wafer to thin the silicon layer; Etching the filling area in the silicon layer and etching a light trapping structure at the bottom of the filling area, filling the filling area with the silicon dioxide, and flattening the surface of the silicon dioxide; Etching a groove at the periphery of the silicon layer and filling the groove with an isolation layer; Microlenses are machined on top of the silicon layer.

[0016] According to another aspect of the present invention, the present invention further provides a single-photon detector, comprising the single-photon avalanche diode described above.

[0017] In the above scheme, the single-photon avalanche diode includes a silicon layer and a logic wafer, a filling area is formed on the top of the silicon layer, the filling area is filled with silicon dioxide, and an avalanche area and a PN junction are arranged in the silicon layer; the logic wafer is arranged at the bottom of the silicon layer, and the logic wafer and the silicon layer are bonded to each other, the PN junction is arranged close to the logic wafer, and the avalanche area is arranged between the PN junction and the filling area. Specifically, a layer of silicon substrate is first prepared as the silicon bottom, and then doping ions are implanted into the silicon bottom to form a PN junction and an avalanche region. If the silicon bottom is one of the P type and the N type, the avalanche region is the other of the P type and the N type. Then the logic wafer and the silicon layer are bonded to each other, and a filling region is formed on a layer of the silicon layer away from the logic wafer. The filling region is filled with silicon dioxide, and the single-photon avalanche diode is manufactured. When testing, near-ultraviolet light is incident on the silicon dioxide. Since silicon dioxide has no obvious absorption effect on near-ultraviolet light, silicon dioxide can effectively transmit near-ultraviolet light to the silicon layer. The incident light is absorbed in the silicon layer to generate electron-hole pairs. These electron-hole pair carriers will migrate in the silicon layer to the avalanche region. The avalanche region is a highly doped region, which usually has a high electric field strength. When electron-hole pairs enter the avalanche zone, they will be accelerated and collide with other atoms to generate more electron-hole pairs, thereby triggering an avalanche effect, that is, an initial small current is rapidly amplified to a large current, thereby generating a current signal. Since a PN junction is provided between the avalanche zone and the logic wafer, the PN junction plays a role of isolation and control, ensuring that the avalanche process will not affect the normal operation of the logic wafer. The logic wafer obtains the current signal generated by the avalanche effect, and the logic wafer is responsible for processing these current signals and outputting electrical signals, and then realizing spectral detection through the electrical signals. In the present invention, a filling area is formed by processing the silicon layer, and the filling area is filled with silicon dioxide that does not have the ability to absorb near-ultraviolet light. In this way, after the near-ultraviolet light passes through the silicon dioxide and enters the silicon layer, it is absorbed by the silicon layer to generate electron-hole pairs. At this time, the distance between the electron-hole pairs and the avalanche zone is greatly reduced, so that the number of electron-hole pair recombination occurring during the migration of multiple electron-hole pairs will be reduced, thereby increasing the number of effective carriers reaching the avalanche zone, thereby improving the detection efficiency of the entire single-photon avalanche diode. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on the structures shown in these drawings without paying creative work.

[0019] Figure 1 A schematic structural diagram of a first embodiment of a single photon avalanche diode provided by the present invention; Figure 2 A schematic structural diagram of a second embodiment of a single photon avalanche diode provided by the present invention; Figure 3 A schematic structural diagram of a third embodiment of a single photon avalanche diode provided by the present invention; Figure 4 A schematic structural diagram of a fourth embodiment of a single photon avalanche diode provided by the present invention; Figure 5 FIG. 4 is a flow chart of a method for manufacturing a single-photon avalanche diode according to the first embodiment of the present invention.

[0020] Description of Figure Numbers: 100. Single-photon avalanche diode; 1. Silicon layer; 2. Logic wafer; 11. Filling area; 12. Avalanche area; 13. PN junction; 14. Light trapping structure; 15. Opening; 16. Microlens; 17. Groove; 3. Isolation layer.

[0021] The realization of the purpose, functional features and advantages of the present invention will be further explained in conjunction with embodiments and with reference to the accompanying drawings. DETAILED DESCRIPTION

[0022] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0023] It should be noted that if the embodiments of the present invention involve directional indications (such as up, down, left, right, front, back, etc.), the directional indications are only used to explain the relative position relationship, movement status, etc. between the components in a certain specific posture. If the specific posture changes, the directional indication will also change accordingly.

[0024] In addition, if there are descriptions involving "first", "second", etc. in the embodiments of the present invention, the descriptions of "first", "second", etc. are only used for descriptive purposes and cannot be understood as indicating or implying their relative importance or implicitly indicating the number of technical features indicated. Therefore, the features limited to "first" and "second" may explicitly or implicitly include at least one of the features. In addition, if "and / or" or "and / or" appears in the full text, its meaning includes three parallel solutions. Taking "A and / or B" as an example, it includes solution A, solution B, or solutions that satisfy both A and B. In addition, the technical solutions between the various embodiments can be combined with each other, but it must be based on the ability of ordinary technicians in this field to implement. When the combination of technical solutions is contradictory or cannot be implemented, it should be deemed that such combination of technical solutions does not exist and is not within the scope of protection required by the present invention.

[0025] The single-photon avalanche diode is a photoelectric detection avalanche diode with weak light detection capability. It is widely used in Raman spectroscopy, positron emission tomography, and fluorescence lifetime imaging due to its advantages of high gain, fast response, and high sensitivity. The working principle of the single-photon avalanche diode for detecting trace photons is as follows: a reverse bias voltage greater than the avalanche breakdown voltage is applied to both ends of the single-photon avalanche diode. When a photon is incident, the valence band electron absorbs the photon and transitions to the conduction band, generating an electron-hole pair. The photogenerated electron-hole pairs are accelerated and gain sufficient energy under the action of an external electric field, and new electron-hole pairs can be formed after colliding with the lattice. As new electrons and holes continue to repeatedly accelerate and collide with the lattice, the electron-hole pairs increase exponentially, and an avalanche multiplication effect occurs. At this time, the number of carriers in the single-photon avalanche diode increases rapidly, the current increases sharply, and the detection efficiency of the instrument is greatly improved.

[0026] Single-photon avalanche diodes have shortcomings in ultraviolet detection. After near-ultraviolet light is absorbed by silicon, the generated electron-hole pairs need to migrate to the avalanche region. During the migration process, electron-hole pairs will recombine, which will lead to reduced detection efficiency.

[0027] See also Figure 1The single-photon avalanche diode 100 includes a silicon layer 1 and a logic wafer 2. A filling area 11 is formed on the top of the silicon layer 1, and the filling area 11 is filled with silicon dioxide. An avalanche area 12 and a PN junction 13 are arranged in the silicon layer 1; the logic wafer 2 is arranged at the bottom of the silicon layer 1, and the logic wafer 2 and the silicon layer 1 are bonded to each other, the PN junction 13 is arranged close to the logic wafer 2, and the avalanche area 12 is arranged between the PN junction 13 and the filling area 11. Specifically, a layer of silicon substrate is first prepared as the silicon bottom, and then doping ions are implanted into the silicon bottom to form a PN junction 13 and an avalanche region 12. If the silicon bottom is one of the P type and the N type, the avalanche region 12 is the other of the P type and the N type. Then, the logic wafer 2 and the silicon layer 1 are bonded to each other, and a filling region 11 is formed in a layer of the silicon layer 1 away from the logic wafer 2. The filling region 11 is filled with silicon dioxide, and the single-photon avalanche diode 100 is manufactured. When testing, incident near-ultraviolet light is incident on the silicon dioxide. Since silicon dioxide has no obvious absorption effect on near-ultraviolet light, silicon dioxide can effectively transmit near-ultraviolet light to the silicon layer 1. The incident light is absorbed in the silicon layer 1 to generate electron-hole pairs. These electron-hole pair carriers will migrate in the silicon layer 1 to the avalanche region 12. The avalanche region 12 is a highly doped region, which usually has a high electric field strength. When the electron-hole pairs enter the avalanche region 12, they are accelerated and collide with other atoms to generate more electron-hole pairs, thereby triggering an avalanche effect, that is, an initial small current is rapidly amplified to a large current, thereby generating a current signal. Since a PN junction 13 is provided between the avalanche region 12 and the logic wafer 2, the PN junction 13 plays an isolation and control role, ensuring that the avalanche process does not affect the normal operation of the logic wafer 2. The logic wafer 2 obtains the current signal generated by the avalanche effect, and the logic wafer 2 is responsible for processing these current signals and outputting electrical signals, and then passes The electrical signal realizes spectral detection; in this embodiment, a filling area 11 is formed on the silicon layer 1, and the filling area 11 is filled with silicon dioxide that does not have the ability to absorb near-ultraviolet light. In this way, after the near-ultraviolet light passes through the silicon dioxide and enters the silicon layer 1, it is absorbed by the silicon layer 1 to generate electron-hole pairs. At this time, the distance between the electron-hole pairs and the avalanche zone 12 is greatly reduced, so that the number of electron-hole pair recombination that occurs during the migration of multiple electron-hole pairs will be reduced, thereby increasing the number of effective carriers reaching the avalanche zone 12, thereby improving the detection efficiency of the entire single-photon avalanche diode 100.

[0028] See also Figures 2 to 4In one embodiment, a light-trapping structure 14 is formed in the silicon layer 1, and the light-trapping structure 14 is disposed at the bottom of the filling region 11. Specifically, the light-trapping structure 14 is etched at the bottom of the filling region 11; when testing, the incident light of near-ultraviolet light is incident on the silicon dioxide. Since silicon dioxide has no obvious absorption effect on near-ultraviolet light, silicon dioxide can effectively transmit the near-ultraviolet light to the silicon layer 1. The incident light enters the silicon layer 1 from the light-trapping structure 14, and the reflectivity of the incident light is reduced by the light-trapping structure 14, and the optical path of the incident light in the silicon layer 1 is increased, so that the absorption rate of the incident light by the silicon layer 1 can be improved, and the generation of electron-hole pairs can be promoted. These electron-hole pair carriers will migrate to the avalanche region 12 in the silicon layer 1. The avalanche region 12 is a highly doped region, which usually has a high electric field strength. When the electron-hole pairs enter the avalanche region 12, they will be accelerated. And collide with other atoms to generate more electron-hole pairs, thereby triggering an avalanche effect, that is, an initial small current is rapidly amplified into a large current, thereby generating a current signal. Since a PN junction 13 is arranged between the avalanche area 12 and the logic wafer 2, the PN junction 13 plays a role of isolation and control, ensuring that the avalanche process does not affect the normal operation of the logic wafer 2. The logic wafer 2 obtains the current signal generated by the avalanche effect, and the logic wafer 2 is responsible for processing these current signals and outputting them, so that near-ultraviolet light detection can be achieved; in this embodiment, a light-trapping structure 14 is formed at the bottom of the filling area 11, and the reflectivity of the incident light is reduced by the light-trapping structure 14, thereby improving the absorption rate of the silicon layer 1 to the incident light and promoting the generation of electron-hole pairs.

[0029] See also Figures 2 to 4 In one embodiment, the light trapping structure 14 is a conical structure with its tip facing the avalanche region 12. By setting the light trapping structure 14 as a conical structure with its tip facing the avalanche region 12, the reflection loss of light at the bottom of the filling region 11 can be more effectively reduced. After the light enters the filling region 11, it is reflected and refracted multiple times by the conical structure and finally guided to the avalanche region 12, thereby reducing the reflection loss and improving the light absorption rate. The conical structure can also further increase the propagation path of light in the filling region 11. The light is reflected and refracted multiple times inside the conical structure, which prolongs the optical path length of the light in the silicon layer 1, thereby increasing the probability of photons being absorbed.

[0030] In one embodiment, there are multiple light trapping structures 14, and multiple light trapping structures 14 are arranged in an array along the length and width directions of the filling area 11. Multiple conical structures are arranged in an array along the length and width directions of the filling area 11 to form an array structure. This arrangement ensures that light is evenly distributed throughout the filling area 11, reduces local hot spots and uneven light absorption, and improves the uniformity and reliability of photon detection. The design of the conical structure enables more photons to be effectively collected and guided to the avalanche area 12, further improving the photon collection efficiency of the single-photon avalanche diode 100 and further enhancing the overall detection capability.

[0031] See also Figures 1 to 4 In one embodiment, an opening 15 is formed on the top of the silicon layer 1, and the opening 15 is connected to the filling area 11. By forming the opening 15 on the top of the silicon layer 1 and connecting the opening 15 to the filling area 11, it is convenient for operators to fill silicon dioxide into the filling area 11, which greatly reduces the operating difficulty of the operators and improves the operating efficiency.

[0032] See also Figure 3 or Figure 4In one embodiment, the single-photon avalanche diode 100 further includes a microlens 16, which is disposed on the top of the silicon layer 1, and covers the opening 15. The microlens 16 is used to pass the incident light through the opening 15 and focus it to the filling area 11. Specifically, a microlens 16 is disposed on the top of the silicon layer 1, and the microlens 16 covers the opening 15; when detecting, the incident light of the near-ultraviolet light first enters the microlens 16, and the microlens 16 focuses the incident light into the filling area 11. Since the filling area 11 is filled with silicon dioxide, and since silicon dioxide has no obvious absorption effect on near-ultraviolet light, silicon dioxide can effectively transmit the near-ultraviolet light to the silicon layer 1. The incident light enters the silicon layer 1 from the light trapping structure 14, and the incident light is absorbed in the silicon layer 1 to generate electron-hole pairs. These electron-hole pair carriers will migrate to the avalanche area 12 in the silicon layer 1. The avalanche area 12 is a highly doped area, which usually has a high electric field strength. When electron-hole pairs enter the avalanche region 12, they will be accelerated and collide with other atoms to generate more electron-hole pairs, thereby triggering an avalanche effect, that is, an initial small current is rapidly amplified to a large current, thereby generating a current signal. Since a PN junction 13 is arranged between the avalanche region 12 and the logic wafer 2, the PN junction 13 plays a role of isolation and control, ensuring that the avalanche process does not affect the normal operation of the logic wafer 2. The logic wafer 2 obtains the current signal generated by the avalanche effect. The logic wafer 2 is responsible for processing these current signals and outputting them, thereby realizing near-ultraviolet light detection. In this embodiment, a microlens 16 is arranged to focus the incident light on the filling area 11 of the single-photon avalanche diode 100, so that more incident light enters the silicon layer 1, which can improve the light collection efficiency and ensure that more photons can reach the silicon layer 1.

[0033] See also Figure 4In one embodiment, a groove 17 is formed on the periphery of the silicon layer 1, and the single-photon avalanche diode 100 also includes an isolation layer 3, which is arranged in the groove 17, and the top and bottom of the isolation layer 3 are respectively in contact with the microlens 16 and the logic wafer 2. Specifically, a circle of grooves 17 are etched on the periphery of the silicon layer 1, and then an insulating material is filled in the groove 17, so that the isolation layer 3 is formed. The isolation layer 3 acts as a physical barrier to block the light propagation path from one single-photon avalanche diode 100 unit to another single-photon avalanche diode 100 unit, which reduces the mutual interference of optical signals between adjacent single-photon avalanche diode 100 units, thereby reducing optical crosstalk. The isolation layer 3 can reflect or absorb part of the light, further reducing the propagation of light. The arrangement of the groove 17 and the isolation layer 3 can also optimize the electric field distribution and reduce the edge effect. The edge effect may cause edge breakdown and uneven electric field distribution, thereby affecting the performance of the single-photon avalanche diode 100. By reducing the edge effect, it is possible to ensure that the electric field is more uniform inside the single-photon avalanche diode 100, thereby improving the efficiency of the avalanche effect. The isolation layer 3 can also control the propagation path of light and reduce the scattering and refraction of light in the silicon layer 1. This helps to guide the light more effectively to the photosensitive area of ​​the single-photon avalanche diode 100. By reducing scattering and refraction, it is possible to ensure that the optical path length of light in the silicon layer 1 is more controllable, thereby improving the absorption rate of photons.

[0034] Furthermore, the isolation layer 3 includes deep trench isolation, shallow trench isolation, metal isolation and combined isolation layer 3; the deep trench isolation layer 3 is formed by etching deeper trenches 17 on the periphery of the silicon layer 1, and then filling these trenches 17 with insulating materials (such as silicon dioxide). These deep trench isolation layers 3 can effectively isolate adjacent single photon avalanche diode 100 units and reduce optical crosstalk.

[0035] The shallow trench isolation layer 3 is formed by etching shallower trenches 17 on the periphery of the silicon layer 1 and filling these trenches 17 with insulating materials (such as silicon dioxide). Compared with the deep trench isolation layer 3, the shallow trench isolation layer 3 is not as effective in reducing optical crosstalk, but the manufacturing process is relatively simple and the cost is low.

[0036] The metal isolation layer 3 is usually a metal film covering the edge or periphery of the single photon avalanche diode 100. The metal layer can effectively reflect and shield the optical signal and reduce optical crosstalk. The metal isolation layer 3 may affect the electric field distribution and needs to be carefully designed to avoid negative effects.

[0037] The combined isolation layer 3 can be covered with a metal isolation layer 3 on the basis of deep trench isolation to further improve the isolation effect; the combined isolation layer 3 combines the advantages of multiple isolation technologies to provide the best isolation effect. However, the process of the combined isolation layer 3 is more complicated and the cost is higher.

[0038] In one embodiment, the filling area 11 is a cylindrical filling area 11 or a cubic filling area 11. The shape and structure of the filling area 11 have an important influence on the performance of the single-photon avalanche diode 100. The filling area 11 is used to guide light into the single-photon avalanche diode 100, reduce reflection losses, and improve the absorption rate of light. The filling area 11 can be cylindrical or cubic. The cylindrical filling area 11 can more effectively guide light into the single-photon avalanche diode 100, reduce reflection losses, and improve the absorption rate of light. The geometric shape of the cylindrical filling area 11 helps to maintain uniform distribution of light and reduce light scattering and refraction losses. The cubic filling area 11 has a square cross-section and is perpendicular to the surface of the silicon layer 1. The manufacturing process of the cubic filling area 11 is relatively simple and easy to achieve large-scale production. The cubic filling area 11 can make better use of space. The manufacturing process of the cubic filling area 11 is simple and the cost is low, which is suitable for large-scale production and low-cost applications.

[0039] According to another aspect of the present invention, see Figure 5 , Figure 5 1 is a flow chart of a method for manufacturing a single-photon avalanche diode according to a first embodiment of the present invention. The present invention further provides a method for manufacturing a single-photon avalanche diode. The method for manufacturing a single-photon avalanche diode is applied to the single-photon avalanche diode 100 as described above. The method for manufacturing a single-photon avalanche diode comprises the following steps: S1, providing a silicon layer 1 and a logic wafer 2, implanting doping ions into the silicon layer 1 to form an avalanche region 12 and a PN junction 13, and bonding the silicon layer 1 to the logic wafer 2; A silicon layer 1 and a logic wafer 2 are selected, and appropriate doping ions, such as phosphorus, arsenic, boron, etc., are selected. The doping area is defined using photolithography technology, and the injection energy and dosage are adjusted to ensure that the doped ions penetrate the photoresist and enter the silicon layer 1. The injected silicon layer 1 needs to be annealed to activate the doped ions and repair the damage caused during the injection process, so that an avalanche region 12 and a PN junction 13 are gathered in the silicon layer 1. If the silicon layer 1 is one of the P type or N layer, then the avalanche region 12 is the other of the P type or N layer. Then, the bonding surface of the silicon layer 1 and the logic wafer 2 is cleaned to ensure that there is no pollution. The silicon layer 1 and the logic wafer 2 are bonded together using direct bonding, metal bonding and other technologies. After bonding, annealing is performed to enhance the bonding strength.

[0040] S2, grinding the side of the silicon layer 1 away from the logic wafer 2 to thin the silicon layer 1; The silicon layer 1 is ground using a grinder, and the thickness of the silicon layer 1 is controlled during the grinding process to ensure that the design requirements are met. After completion, the surface of the silicon layer 1 needs to be cleaned to remove residues, and the surface of the silicon layer 1 is further flattened using chemical mechanical polishing technology. The polished surface needs to be cleaned to remove residues.

[0041] S3, etching a filling area 11 in the silicon layer 1, and etching a light trapping structure 14 at the bottom of the filling area 11, filling the filling area 11 with silicon dioxide, and flattening the surface of the silicon dioxide; The patterns of the filling area 11 and the light trapping structure 14 are defined in the silicon layer 1 using photolithography technology, photoresist is coated on the surface of the silicon layer 1, the desired pattern is formed through exposure and development, the filling area 11 and the light trapping structure 14 are etched in the silicon layer 1, silicon dioxide is filled in the filling area 11 using chemical vapor deposition or spin coating technology, and then the surface of the silicon dioxide is flattened using chemical mechanical polishing technology. The flattened surface needs to be cleaned to remove residues, and thus the filling area 11 and the light trapping structure 14 are processed.

[0042] S4, etching a groove 17 at the periphery of the silicon layer 1, and filling the groove 17 with an isolation layer 3; The pattern of the groove 17 is defined on the periphery of the silicon layer 1 using photolithography technology, and a photoresist is coated on the surface of the silicon layer 1. The desired pattern is formed by exposure and development, and the groove 17 is etched on the periphery of the silicon layer 1. During the etching process, it is necessary to ensure that the depth and shape of the groove 17 meet the design requirements according to the design, and then fill the groove 17 with isolation material. The surface of the isolation layer 3 is flattened using chemical mechanical polishing technology. The flattened surface needs to be cleaned to remove residues, and thus the isolation layer 3 is processed.

[0043] S5 . Form a microlens 16 on the top of the silicon layer 1 .

[0044] The pattern of the microlens 16 is defined by using photolithography technology, and photoresist is coated on the surface of the silicon layer 1. The desired pattern is formed by exposure and development, and the shape of the microlens 16 is etched. The polymer material is deposited in the microlens 16 area by spin coating technology, and the polymer material is formed into the desired shape of the microlens 16 by heat treatment. The surface after molding needs to be cleaned to remove residues, and the processing of the microlens 16 is completed.

[0045] In this embodiment, a filling area 11 is formed by processing the silicon layer 1, and the filling area 11 is filled with silicon dioxide that does not have the ability to absorb near-ultraviolet light. In this way, after the near-ultraviolet light passes through the silicon dioxide and enters the silicon layer 1, it is absorbed by the silicon layer 1 to generate electron-hole pairs. At this time, the distance between the electron-hole pairs and the avalanche region 12 is greatly reduced, so that the number of electron-hole pair recombination that occurs during the migration of multiple electron-hole pairs will be reduced, thereby increasing the number of effective carriers reaching the avalanche region 12, thereby improving the detection efficiency of the entire single-photon avalanche diode 100.

[0046] According to another aspect of the present invention, the present invention further provides a single-photon detector, including the above-mentioned single-photon avalanche diode 100. Since the single-photon detector includes all implementations of all embodiments of the above-mentioned single-photon avalanche diode 100, it at least has all the beneficial effects brought by all the above-mentioned implementations, which will not be described one by one here.

[0047] The above description is only an exemplary embodiment of the present invention, and does not limit the patent scope of the present invention. All equivalent structural changes made by using the contents of the present invention specification and drawings under the technical concept of the present invention, or directly / indirectly applied in other related technical fields are included in the patent protection scope of the present invention.

Claims

1. A single photon avalanche diode, characterized in that: include: A silicon layer, a filling region is formed on the top of the silicon layer, the filling region is filled with silicon dioxide, and an avalanche region and a PN junction are arranged in the silicon layer; A logic wafer is provided at the bottom of the silicon layer, and the logic wafer and the silicon layer are bonded to each other, the PN junction is provided close to the logic wafer, and the avalanche region is provided between the PN junction and the filling region.

2. The single photon avalanche diode according to claim 1, characterized in that: A light trapping structure is formed in the silicon layer and is arranged at the bottom of the filling area.

3. The single photon avalanche diode according to claim 2, characterized in that: The light trapping structure is a conical structure with a pointed end facing the avalanche region.

4. The single photon avalanche diode according to claim 3, characterized in that: There are multiple light trapping structures, and the multiple light trapping structures are arranged in an array along the length direction and the width direction of the filling area.

5. The single photon avalanche diode according to any one of claims 1 to 4, characterized in that: An opening is formed on the top of the silicon layer, and the opening is communicated with the filling area.

6. The single photon avalanche diode according to claim 5, characterized in that: The single-photon avalanche diode further includes a microlens, which is disposed on the top of the silicon layer and covers the opening. The microlens is used to pass the incident light through the opening and focus it onto the filling area.

7. The single photon avalanche diode according to claim 6, characterized in that: A groove is formed on the periphery of the silicon layer. The single-photon avalanche diode further includes an isolation layer, which is arranged in the groove. The top and bottom of the isolation layer are respectively in contact with the microlens and the logic wafer.

8. The single photon avalanche diode according to claim 6, characterized in that: The filling area is a cylindrical filling area or a cubic filling area.

9. A method for manufacturing a single-photon avalanche diode, wherein the method for manufacturing a single-photon avalanche diode is applied to the single-photon avalanche diode according to any one of claims 1 to 8, characterized in that: The method for manufacturing the single photon avalanche diode comprises the following steps: Providing the silicon layer and the logic wafer, implanting doping ions into the silicon layer to form the avalanche region and the PN junction, and bonding the silicon layer to the logic wafer; Grinding a side of the silicon layer away from the logic wafer to thin the silicon layer; Etching the filling area in the silicon layer and etching a light trapping structure at the bottom of the filling area, filling the filling area with the silicon dioxide, and flattening the surface of the silicon dioxide; Etching a groove at the periphery of the silicon layer and filling the groove with an isolation layer; Microlenses are machined on top of the silicon layer.

10. A single photon detector, characterized in that: A single photon avalanche diode comprising any one of claims 1 to 8.

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