Dynamic reverse bias test method and system for semiconductor power device

Abstract

The invention relates to the technical field of semiconductor power device testing, in particular to a dynamic reverse bias testing method and system for a semiconductor power device, which can accurately evaluate the performance of the device under a dynamic reverse bias condition and improve the testing efficiency and accuracy. The method comprises the following steps: acquiring a plurality of electrical characteristic data of a to-be-detected semiconductor power device to obtain an electrical characteristic data set; inputting the electrical characteristic data set into a dynamic reverse bias test model to obtain a first dynamic reverse bias test result; transmitting a fast changing backward voltage pulse signal to the to-be-detected semiconductor power device to obtain an output signal after the backward voltage pulse signal passes through the to-be-detected semiconductor power device; judging whether the output signal exceeds a preset abnormal threshold value or not; if not, outputting the first dynamic reverse bias test result as a dynamic reverse bias test result of the semiconductor power device; and if yes, extracting the obtained abnormal output signal, and inputting the abnormal output signal into the dynamic reverse bias failure analysis model.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor power device testing, and in particular to a semiconductor power device dynamic reverse bias testing method and system. Background Art

[0002] Semiconductor power devices are required to operate stably under high frequency, high voltage and fast switching conditions in various applications. It is particularly important to ensure that these devices can withstand the stress under dynamic reverse bias conditions.

[0003] Traditional semiconductor power device testing methods mainly focus on performance evaluation under static conditions. However, devices in practical applications often need to frequently undergo rapid switching from forward conduction to reverse blocking. Such rapid changes can cause transient overvoltage and overcurrent phenomena, which may cause changes or damage to the internal microstructure of the device, thereby affecting its long-term reliability and performance. Therefore, a more automated, efficient and easy-to-understand dynamic reverse bias test method for semiconductor power devices is urgently needed. Summary of the invention

[0004] In order to solve the above technical problems, the present invention provides a semiconductor power device dynamic reverse bias testing method that can accurately evaluate the performance of the device under dynamic reverse bias conditions and improve the testing efficiency and accuracy.

[0005] In a first aspect, the present invention provides a method for dynamic reverse bias testing of a semiconductor power device, the method comprising:

[0006] Acquire multiple electrical characteristic data of the semiconductor power device to be tested to obtain an electrical characteristic data set;

[0007] Inputting the electrical characteristic data set into a dynamic reverse bias test model to obtain a first dynamic reverse bias test result;

[0008] Transmitting a rapidly changing reverse voltage pulse signal to the semiconductor power device to be detected, and obtaining an output signal after the reverse voltage pulse signal passes through the semiconductor power device to be detected;

[0009] Determine whether the output signal exceeds a preset abnormal threshold; if not, output the first dynamic reverse bias test result as the dynamic reverse bias test result of the semiconductor power device; if so, extract the obtained abnormal output signal, input the abnormal output signal into the dynamic reverse bias failure analysis model, and obtain the second dynamic reverse bias test result;

[0010] The first dynamic reverse bias test result and the second dynamic reverse bias test result are input into the dynamic reverse bias evaluation space to obtain the dynamic reverse bias test result of the semiconductor power device.

[0011] Furthermore, the method for acquiring the electrical characteristic data set includes:

[0012] Clarify the electrical characteristic parameters required for testing;

[0013] Build a test circuit based on the determined electrical characteristic parameters;

[0014] According to the determined electrical characteristic parameters, a test instrument is selected to measure the electrical characteristic data of the device to be tested;

[0015] After the test circuit and test instrument are ready, the test is performed; during the test, the electrical characteristic data of the device to be tested under various conditions is recorded;

[0016] Process the test data, including data cleaning, filtering and calibration, to eliminate noise and errors in the test process.

[0017] Furthermore, the method for constructing the dynamic reverse bias test model includes:

[0018] Collect electrical characteristic data of the semiconductor power device to be tested;

[0019] Preprocessing the collected electrical characteristic data includes noise removal, standardization and feature extraction;

[0020] Selecting a machine learning model as the infrastructure of the dynamic anti-bias testing model, wherein the machine learning model includes a support vector machine and a neural network;

[0021] Divide the preprocessed data into a training set and a validation set, use the training set to train the model, evaluate its performance and adjust parameters;

[0022] Use the validation set to test the generalization ability of the model; evaluate the prediction performance of the model by comparing it with the actual test results;

[0023] Integrate the verified model into the test system to realize automated testing.

[0024] Furthermore, the method for obtaining the output signal includes:

[0025] Correctly connect the semiconductor power device to be tested to the test circuit;

[0026] Set the pulse generator parameters according to the device specifications and expected operating conditions;

[0027] Perform single pulse testing to observe the device's response to a single, rapidly changing reverse voltage pulse; perform multiple pulse testing to evaluate the device's performance under continuous dynamic reverse bias conditions;

[0028] Use an oscilloscope to record the voltage waveform across the device;

[0029] Storing the collected data in electronic file format;

[0030] The collected data is preprocessed, including removing noise, smoothing curves, and marking key points to improve data quality.

[0031] Furthermore, factors affecting the setting of the preset abnormal threshold include device specifications, pulse waveform frequency, temperature changes, failure modes, damage mechanisms, accuracy of test equipment, resolution of test equipment, safety standards and reliability requirements.

[0032] Furthermore, the structure of the dynamic reverse bias failure analysis model includes:

[0033] Signal processing module: used to pre-process the input abnormal output signal;

[0034] Feature extraction module: used to analyze key information in the signal and extract parameters that can reflect the failure characteristics of the device;

[0035] Failure mode identification module: classifies and identifies the failure mode of the device based on the extracted characteristic parameters;

[0036] Failure cause analysis module: After identifying the failure mode, analyze the specific cause of the failure;

[0037] Result generation module: used to generate detailed second dynamic reverse bias test results.

[0038] Furthermore, a method for obtaining a dynamic reverse bias test result of a semiconductor power device includes:

[0039] Obtain a historical first test result set and a historical second test result set of dynamic reverse bias tests on different semiconductor power devices within a historical period;

[0040] Constructing a two-dimensional evaluation coordinate system according to the historical first test result set and the historical second test result set;

[0041] Inputting the historical first test result and the historical second test result of each device into a two-dimensional evaluation coordinate system to form a plurality of evaluation points;

[0042] Perform cluster analysis on each evaluation point to obtain several groups of cluster results;

[0043] Assign different performance evaluation levels to each clustering result and construct a dynamic anti-bias performance evaluation space;

[0044] Inputting the first dynamic reverse bias test result and the second dynamic reverse bias test result into the dynamic reverse bias performance evaluation space to determine the corresponding current clustering result;

[0045] The performance evaluation level of the current clustering result is output as the final result of the dynamic reverse bias test of the semiconductor power device.

[0046] On the other hand, the present application also provides a semiconductor power device dynamic reverse bias test system, the system comprising:

[0047] A data acquisition module is used to acquire a plurality of electrical characteristic data of the semiconductor power device to be tested, and obtain an electrical characteristic data set;

[0048] A dynamic reverse bias test module, inputting the electrical characteristic data set into a dynamic reverse bias test model to obtain a first dynamic reverse bias test result;

[0049] The signal transmitting and collecting module transmits a rapidly changing reverse voltage pulse signal to the semiconductor power device to be detected, and obtains an output signal after the reverse voltage pulse signal passes through the semiconductor power device to be detected;

[0050] The abnormal signal analysis module determines whether the output signal exceeds a preset abnormal threshold; if not, the first dynamic reverse bias test result is output as the dynamic reverse bias test result of the semiconductor power device; if so, the obtained abnormal output signal is extracted, and the abnormal output signal is input into the dynamic reverse bias failure analysis model to obtain the second dynamic reverse bias test result;

[0051] The comprehensive evaluation module inputs the first dynamic reverse bias test result and the second dynamic reverse bias test result into the dynamic reverse bias evaluation space to obtain the dynamic reverse bias test result of the semiconductor power device.

[0052] In a third aspect, the present application provides an electronic device, comprising a bus, a transceiver, a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the transceiver, the memory, and the processor are connected via the bus, and the computer program, when executed by the processor, implements the steps of any one of the above methods.

[0053] In a fourth aspect, the present application further provides a computer-readable storage medium having a computer program stored thereon, wherein the computer program implements the steps in any one of the above-mentioned methods when executed by a processor.

[0054] Compared with the prior art, the present invention has the following beneficial effects: the method not only considers the performance of semiconductor power devices under static conditions, but also focuses on their performance under dynamic reverse bias conditions; by emitting rapidly changing reverse voltage pulse signals, it can simulate high frequency, high voltage and fast switching conditions in practical applications, thereby more comprehensively evaluating the dynamic performance of the device;

[0055] The entire test process is highly automated, reducing manual intervention and improving test efficiency; this helps shorten product development cycles and reduce test costs; by determining whether the output signal exceeds the preset abnormal threshold, it can promptly detect possible problems with the device under dynamic reverse bias conditions;

[0056] By inputting the first dynamic reverse bias test result and the second dynamic reverse bias test result into the dynamic reverse bias evaluation space, the method can comprehensively consider the performance of the device under different conditions and give a more comprehensive and accurate test result; this helps to more comprehensively evaluate the reliability and performance of the device and provide a scientific basis for the selection and application of the device;

[0057] In summary, this method can accurately evaluate the performance of the device under dynamic reverse bias conditions, improve test efficiency and accuracy, and provide strong support for the research and development and application of semiconductor power devices. BRIEF DESCRIPTION OF THE DRAWINGS

[0058] Figure 1 is a flow chart of the present invention;

[0059] Figure 2 The structure diagram of a semiconductor power device dynamic reverse bias test system. DETAILED DESCRIPTION

[0060] In the description of the present application, those skilled in the art should know that the present application can be implemented as a method, an apparatus, an electronic device, and a computer-readable storage medium. Therefore, the present application can be specifically implemented in the following forms: complete hardware, complete software (including firmware, resident software, microcode, etc.), a combination of hardware and software. In addition, in some embodiments, the present application can also be implemented in the form of a computer program product in one or more computer-readable storage media, and the computer-readable storage medium contains computer program code.

[0061] The above-mentioned computer-readable storage medium may adopt any combination of one or more computer-readable storage media. Computer-readable storage media include: electrical, magnetic, optical, electromagnetic, infrared or semiconductor systems, devices or devices, or any combination of the above. More specific examples of computer-readable storage media include: portable computer disks, hard disks, random access memories, read-only memories, erasable programmable read-only memories, flash memories, optical fibers, optical disc read-only memories, optical storage devices, magnetic storage devices, or any combination of the above. In the present application, computer-readable storage media can be any tangible medium containing or storing a program that can be used by or in conjunction with an instruction execution system, device, or device.

[0062] The acquisition, storage, use, and processing of data in the technical solution of this application comply with the relevant provisions of national laws.

[0063] The present application describes the provided methods, devices, and electronic devices through flowcharts and / or block diagrams.

[0064] It should be understood that each box in the flowchart and / or block diagram and the combination of boxes in the flowchart and / or block diagram can be implemented by computer-readable program instructions. These computer-readable program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer or other programmable data processing device to produce a machine, and these computer-readable program instructions are executed by a computer or other programmable data processing device to produce a device that implements the functions / operations specified by the boxes in the flowchart and / or block diagram.

[0065] These computer-readable program instructions may also be stored in a computer-readable storage medium that enables a computer or other programmable data processing device to work in a specific manner. In this way, the instructions stored in the computer-readable storage medium produce an instruction device product including functions / operations specified in the blocks in the flowchart and / or block diagram.

[0066] Computer-readable program instructions may also be loaded onto a computer, other programmable data processing apparatus, or other device, so that a series of operational steps are performed on the computer, other programmable data processing apparatus, or other device to produce a computer-implemented process, thereby enabling the instructions executed on the computer or other programmable data processing apparatus to provide a process for implementing the functions / operations specified in the blocks in the flowchart and / or block diagram.

[0067] The present application is described below in conjunction with the drawings in the present application.

[0068] Embodiment 1: Figure 1 As shown, a semiconductor power device dynamic reverse bias testing method of the present invention specifically comprises the following steps:

[0069] S1. Acquire multiple electrical characteristic data of the semiconductor power device to be tested to obtain an electrical characteristic data set;

[0070] The method for acquiring the electrical characteristic data set comprises:

[0071] Clearly define the electrical characteristic parameters required for testing; these parameters include the device's rated voltage, rated current, reverse breakdown voltage, forward voltage drop, and switching time;

[0072] According to the determined test parameters, the corresponding test circuit is built; the test circuit can safely and stably provide the required test conditions and accurately measure the electrical characteristic data of the device to be tested; the design of the test circuit takes into account the device packaging form, pin configuration and safety protection measures during the test process;

[0073] According to the determined test parameters, select appropriate test instruments to measure the electrical characteristic data of the device to be tested; the setting of the test instrument should be based on the requirements of the test parameters to ensure the accuracy and reliability of the measurement results;

[0074] After the test circuit and test instrument are ready, the test is performed; during the test, the electrical characteristic data of the device to be tested under various conditions are recorded; the test data should have a high sampling rate and resolution to ensure the accuracy and integrity of the data;

[0075] Process the test data, including data cleaning, filtering and calibration, to eliminate noise and errors in the test process; the processed data will form an electrical characteristic data set for input and analysis of subsequent test models;

[0076] Perform quality checks on the electrical characteristics data set to ensure the accuracy and completeness of the data; during the inspection, focus on outliers and missing values ​​in the data, as well as the logical relationship and consistency between the data.

[0077] Through step S1, multiple electrical characteristic data of the semiconductor power device to be tested can be comprehensively and systematically obtained, providing reliable basic data for the subsequent dynamic reverse bias test model; these data can not only help establish an accurate test model, but also provide a reference during the dynamic reverse bias test process, thereby improving the accuracy and reliability of the test results.

[0078] S2, inputting the electrical characteristic data set into a dynamic reverse bias test model to obtain a first dynamic reverse bias test result;

[0079] The method for constructing the dynamic reverse bias test model comprises:

[0080] Collect electrical characteristic data of the semiconductor power device to be tested;

[0081] Preprocessing the collected electrical characteristic data includes noise removal, standardization and feature extraction;

[0082] Selecting a machine learning model as the infrastructure of the dynamic anti-bias testing model, wherein the machine learning model includes a support vector machine and a neural network;

[0083] Divide the preprocessed data into a training set and a validation set, use the training set to train the model, evaluate its performance and adjust parameters to improve prediction accuracy;

[0084] Use the validation set to test the generalization ability of the model; evaluate the prediction performance of the model by comparing it with the actual test results; ensure the robustness of the model through multiple training and testing;

[0085] Integrate the verified model into the test system to achieve automated testing;

[0086] The dynamic reverse bias test model can predict and evaluate the performance of semiconductor power devices under dynamic reverse bias conditions based on detailed electrical characteristic data; it not only improves the automation level of the test, but also provides an important reference for subsequent actual dynamic tests.

[0087] S3, transmitting a rapidly changing reverse voltage pulse signal to the semiconductor power device to be detected, and obtaining an output signal after the reverse voltage pulse signal passes through the semiconductor power device to be detected;

[0088] The method for obtaining the output signal comprises:

[0089] Select a pulse generator capable of producing fast rise times and high amplitude reverse voltage pulses; the device should have adequate voltage range and precise control capabilities;

[0090] Use a high-voltage probe to connect to an oscilloscope to ensure that high-voltage pulse signals can be measured safely and accurately; the oscilloscope needs to have high bandwidth and high-speed sampling rate to capture transient signals;

[0091] Correctly connect the semiconductor power device to be tested to the test circuit; ensure that all connections are firm and reliable;

[0092] Set the pulse generator parameters according to the device specifications and expected operating conditions; the parameters to be set include pulse amplitude, rise time, duration, and repetition frequency;

[0093] Perform a single pulse test to observe the device's response to a single, rapidly changing reverse voltage pulse.

[0094] Perform multiple pulse tests to evaluate the performance of the device under continuous dynamic reverse bias conditions;

[0095] Use an oscilloscope to record the voltage waveform across the device; including the voltage changes before and after the pulse is applied and any transient overvoltage phenomena that occur;

[0096] Store the collected data in electronic file format for subsequent processing and analysis;

[0097] The collected data is preprocessed, including removing noise, smoothing curves, and marking key points to improve data quality.

[0098] The S3 step can effectively apply rapidly changing reverse voltage pulses and record the device's response under dynamic reverse bias conditions; these data will be used for subsequent abnormal signal detection and failure analysis, thereby comprehensively evaluating the performance and reliability of semiconductor power devices under high frequency, high voltage and fast switching conditions.

[0099] S4, judging whether the output signal exceeds a preset abnormal threshold; if not, outputting the first dynamic reverse bias test result as the dynamic reverse bias test result of the semiconductor power device; if so, extracting the obtained abnormal output signal, inputting the abnormal output signal into the dynamic reverse bias failure analysis model, and obtaining the second dynamic reverse bias test result;

[0100] The factors affecting the setting of the preset abnormal threshold include:

[0101] Device specifications: The rated voltage and current of semiconductor power devices are the basis for setting abnormal thresholds. The abnormal threshold should not exceed the rated voltage and current of the device to ensure that the device will not be damaged by overvoltage or overcurrent during the test. The power consumption of the device during normal operation should be within its maximum allowable power consumption range. Therefore, when setting the abnormal threshold, the power consumption factor needs to be considered to ensure that the device will not fail due to excessive power consumption during the test.

[0102] Pulse waveform frequency: The waveform and frequency of the reverse voltage pulse signal used in the test process will affect the response and output of the device; therefore, when setting the abnormal threshold, it is necessary to consider the impact of the pulse waveform and frequency on the device performance;

[0103] Temperature change: Temperature is one of the important factors affecting the performance of semiconductor power devices. When setting the abnormal threshold, it is necessary to consider the impact of temperature changes on device performance and make adjustments based on actual conditions.

[0104] Failure modes: Failure modes that may occur in semiconductor power devices under dynamic reverse bias conditions include gate oxide breakdown, metallization layer shedding, and cracks caused by thermal stress. When setting abnormal thresholds, it is necessary to understand these failure modes and their corresponding output signal characteristics.

[0105] Damage mechanism: Understanding the damage mechanism of the device under dynamic reverse bias conditions helps to set the abnormal threshold more accurately;

[0106] Accuracy of test equipment: The accuracy of the test equipment directly affects the accuracy of the test results. When setting the abnormal threshold, the accuracy limit of the test equipment needs to be considered to ensure that the abnormal threshold will not be misjudged due to insufficient equipment accuracy.

[0107] Resolution of the test equipment: The resolution of the test equipment determines the minimum signal change that can be detected. When setting the abnormality threshold, the resolution of the test equipment needs to be considered to ensure that the abnormal signal can be accurately captured.

[0108] Safety standards: When setting abnormal thresholds, you need to comply with relevant safety standards and regulations to ensure that the test process does not cause harm to personnel and equipment;

[0109] Reliability requirements: According to the application scenario and reliability requirements, set appropriate abnormal thresholds to ensure that the device can meet the expected reliability and performance requirements in actual use;

[0110] The structure of the dynamic reverse bias failure analysis model includes:

[0111] Signal processing module: used to pre-process the input abnormal output signal, including filtering, amplification, noise reduction and other operations to improve the quality and credibility of the signal;

[0112] Feature extraction module: used to analyze key information in the signal and extract parameters that can reflect the failure characteristics of the device, such as voltage peak, current fluctuation amplitude, power loss, etc.

[0113] Failure mode recognition module: Based on the extracted characteristic parameters, the failure mode recognition module uses machine learning or deep learning algorithms to classify and identify the failure modes of the device; common failure modes may include gate oxide breakdown, metallization layer shedding, cracks caused by thermal stress, etc.

[0114] Failure Cause Analysis Module: After identifying the failure mode, the failure cause analysis module will further analyze the specific causes of the failure, such as material defects, improper processes, design defects, etc. This module usually conducts a comprehensive analysis based on factors such as the device's manufacturing process, material properties, and usage conditions;

[0115] Result generation module: Generates detailed second dynamic reverse bias test results, including failure type, severity and possible impact.

[0116] Step S4 involves abnormal detection and analysis of the output signal; by presetting the abnormal signal type, collecting and processing the output signal, detecting and identifying the abnormal signal, and further analyzing the abnormal signal, the test system can promptly discover potential problems of the device under dynamic reverse bias conditions and provide strong support for subsequent testing, evaluation and repair work.

[0117] S5, inputting the first dynamic reverse bias test result and the second dynamic reverse bias test result into the dynamic reverse bias evaluation space to obtain a dynamic reverse bias test result of the semiconductor power device;

[0118] A method for obtaining dynamic reverse bias test results of a semiconductor power device includes:

[0119] Obtain a historical first test result set and a historical second test result set of dynamic reverse bias tests on different semiconductor power devices within a historical period;

[0120] Constructing a two-dimensional evaluation coordinate system according to the historical first test result set and the historical second test result set;

[0121] Inputting the historical first test result and the historical second test result of each device into a two-dimensional evaluation coordinate system to form a plurality of evaluation points;

[0122] Perform cluster analysis on each evaluation point to obtain several groups of cluster results;

[0123] Assign different performance evaluation levels to each clustering result and construct a dynamic anti-bias performance evaluation space;

[0124] Inputting the first dynamic reverse bias test result and the second dynamic reverse bias test result into the dynamic reverse bias performance evaluation space to determine the corresponding current clustering result;

[0125] The performance evaluation level of the current clustering result is output as the final result of the dynamic reverse bias test of the semiconductor power device.

[0126] In this step, by collecting the historical first test result set and the historical second test result set of dynamic reverse bias tests on different semiconductor power devices in the historical time, a solid foundation is provided for the subsequent cluster analysis and performance evaluation, thereby improving the accuracy and reliability of the test results; a two-dimensional evaluation coordinate system is constructed using the historical test result set, and the historical test results of each device are input into it to form evaluation points, thereby realizing the visualization of the test results; this enables testers to intuitively see the performance of different devices in the dynamic reverse bias test, which facilitates their understanding and analysis of the test results; by clustering the evaluation points, several groups of cluster results are obtained, and different performance evaluation levels are assigned to each cluster result; a scientific evaluation system is provided for the dynamic reverse bias performance of semiconductor power devices, so that testers can evaluate the performance of different devices based on the dynamic reverse bias performance of the semiconductor power devices. The performance of the device is objectively evaluated based on the test results. After the dynamic reverse bias performance evaluation space is constructed, the new first dynamic reverse bias test result and the second dynamic reverse bias test result can be directly input into it to determine the corresponding current clustering result and output the performance evaluation level. The test process is simplified, tedious manual analysis and judgment are avoided, and the test efficiency is improved. Through the dynamic reverse bias performance evaluation space, the performance differences and advantages and disadvantages of different devices in the dynamic reverse bias test can be clearly seen. It provides strong data support for the device R&D team to help them understand the shortcomings of the device and make targeted improvements and optimizations. The S5 step realizes the accurate acquisition and objective evaluation of the dynamic reverse bias test results of semiconductor power devices through a series of scientific methods and processes, providing strong support and guarantee for the R&D, production and use of the device.

[0127] Example 2: If Figure 2 As shown, a semiconductor power device dynamic reverse bias test system of the present invention specifically includes the following modules;

[0128] A data acquisition module is used to acquire a plurality of electrical characteristic data of the semiconductor power device to be tested, and obtain an electrical characteristic data set;

[0129] A dynamic reverse bias test module, inputting the electrical characteristic data set into a dynamic reverse bias test model to obtain a first dynamic reverse bias test result;

[0130] The signal transmitting and collecting module transmits a rapidly changing reverse voltage pulse signal to the semiconductor power device to be detected, and obtains an output signal after the reverse voltage pulse signal passes through the semiconductor power device to be detected;

[0131] The abnormal signal analysis module determines whether the output signal exceeds a preset abnormal threshold; if not, the first dynamic reverse bias test result is output as the dynamic reverse bias test result of the semiconductor power device; if so, the obtained abnormal output signal is extracted, and the abnormal output signal is input into the dynamic reverse bias failure analysis model to obtain the second dynamic reverse bias test result;

[0132] The comprehensive evaluation module inputs the first dynamic reverse bias test result and the second dynamic reverse bias test result into the dynamic reverse bias evaluation space to obtain the dynamic reverse bias test result of the semiconductor power device.

[0133] The system can simulate the high frequency, high voltage and fast switching conditions experienced by semiconductor power devices in real applications; this helps to more accurately evaluate the performance of devices under dynamic reverse bias conditions, which is more reflective of the performance of devices in real applications than traditional static test methods;

[0134] By integrating modules such as data acquisition, dynamic reverse bias test, signal transmission and acquisition, abnormal signal analysis and comprehensive evaluation, the test automation is realized, manual intervention is reduced and test efficiency is improved;

[0135] Data processing and test result generation are all realized through software, which can quickly provide test results and shorten the test cycle; the system adopts modular design to make each test step and result analysis clearer and easier to understand;

[0136] The system is equipped with an abnormal signal analysis module, which can detect anomalies in the output signal in real time, so as to promptly discover possible problems with the device. For the detected abnormal signal, the system can further conduct in-depth analysis through the dynamic reverse bias failure analysis model, and provide more specific failure causes and solutions.

[0137] The system inputs the first dynamic reverse bias test result and the second dynamic reverse bias test result into the dynamic reverse bias evaluation space through the comprehensive evaluation module, and performs comprehensive analysis to obtain a more comprehensive dynamic reverse bias test result of the semiconductor power device;

[0138] In summary, the semiconductor power device dynamic reverse bias test system can more accurately evaluate the performance of the device under dynamic reverse bias conditions, improve test efficiency and accuracy, and provide strong support for the research and development and application of semiconductor power devices.

[0139] The various variations and specific embodiments of the semiconductor power device dynamic reverse bias test method in the aforementioned embodiment 1 are also applicable to the semiconductor power device dynamic reverse bias test system in this embodiment. Through the aforementioned detailed description of the semiconductor power device dynamic reverse bias test method, those skilled in the art can clearly know the implementation method of the semiconductor power device dynamic reverse bias test system in this embodiment, so for the sake of brevity of the specification, it will not be described in detail here.

[0140] In addition, the present application also provides an electronic device, including a bus, a transceiver, a memory, a processor, and a computer program stored in the memory and executable on the processor. The transceiver, the memory, and the processor are respectively connected via a bus. When the computer program is executed by the processor, each process of the above-mentioned method for controlling output data is implemented, and the same technical effect can be achieved. To avoid repetition, it will not be described here.

[0141] The above is only a preferred embodiment of the present invention. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the technical principles of the present invention. These improvements and modifications should also be regarded as the scope of protection of the present invention.

Claims

1. A semiconductor power device dynamic reverse bias test method, characterized in that: The method comprises: Acquire multiple electrical characteristic data of the semiconductor power device to be tested to obtain an electrical characteristic data set; Inputting the electrical characteristic data set into a dynamic reverse bias test model to obtain a first dynamic reverse bias test result; Transmitting a rapidly changing reverse voltage pulse signal to the semiconductor power device to be detected, and obtaining an output signal after the reverse voltage pulse signal passes through the semiconductor power device to be detected; Determine whether the output signal exceeds a preset abnormal threshold; if not, output the first dynamic reverse bias test result as the dynamic reverse bias test result of the semiconductor power device; if so, extract the obtained abnormal output signal, input the abnormal output signal into the dynamic reverse bias failure analysis model, and obtain the second dynamic reverse bias test result; The first dynamic reverse bias test result and the second dynamic reverse bias test result are input into the dynamic reverse bias evaluation space to obtain the dynamic reverse bias test result of the semiconductor power device.

2. A semiconductor power device dynamic reverse bias testing method as claimed in claim 1, characterized in that: The method for acquiring the electrical characteristic data set comprises: Clarify the electrical characteristic parameters required for testing; Build a test circuit based on the determined electrical characteristic parameters; According to the determined electrical characteristic parameters, a test instrument is selected to measure the electrical characteristic data of the device to be tested; After the test circuit and test instrument are ready, the test is performed; during the test, the electrical characteristic data of the device to be tested under various conditions is recorded; Process the test data, including data cleaning, filtering and calibration, to eliminate noise and errors in the test process.

3. A semiconductor power device dynamic reverse bias testing method as claimed in claim 1, characterized in that: The method for constructing the dynamic reverse bias test model comprises: Collect electrical characteristic data of the semiconductor power device to be tested; Preprocessing the collected electrical characteristic data includes noise removal, standardization and feature extraction; Selecting a machine learning model as the infrastructure of the dynamic anti-bias testing model, wherein the machine learning model includes a support vector machine and a neural network; Divide the preprocessed data into a training set and a validation set, use the training set to train the model, evaluate its performance and adjust parameters; Use the validation set to test the generalization ability of the model; evaluate the prediction performance of the model by comparing it with the actual test results; Integrate the verified model into the test system to realize automated testing.

4. A semiconductor power device dynamic reverse bias testing method as claimed in claim 1, characterized in that: The method for obtaining the output signal comprises: Correctly connect the semiconductor power device to be tested to the test circuit; Set the pulse generator parameters according to the device specifications and expected operating conditions; Perform single pulse testing to observe the device's response to a single, rapidly changing reverse voltage pulse; perform multiple pulse testing to evaluate the device's performance under continuous dynamic reverse bias conditions; Use an oscilloscope to record the voltage waveform across the device; Storing the collected data in electronic file format; The collected data is preprocessed, including removing noise, smoothing curves, and marking key points to improve data quality.

5. A semiconductor power device dynamic reverse bias testing method as claimed in claim 1, characterized in that: The factors affecting the setting of the preset abnormal threshold include device specifications, pulse waveform frequency, temperature changes, failure modes, damage mechanisms, accuracy of test equipment, resolution of test equipment, safety standards and reliability requirements.

6. A semiconductor power device dynamic reverse bias testing method as claimed in claim 1, characterized in that: The structure of the dynamic reverse bias failure analysis model includes: Signal processing module: used to pre-process the input abnormal output signal; Feature extraction module: used to analyze key information in the signal and extract parameters that can reflect the failure characteristics of the device; Failure mode identification module: classifies and identifies the failure mode of the device based on the extracted characteristic parameters; Failure cause analysis module: After identifying the failure mode, analyze the specific cause of the failure; Result generation module: used to generate detailed second dynamic reverse bias test results.

7. A semiconductor power device dynamic reverse bias testing method as claimed in claim 1, characterized in that: A method for obtaining dynamic reverse bias test results of a semiconductor power device includes: Obtain a historical first test result set and a historical second test result set of dynamic reverse bias tests on different semiconductor power devices within a historical period; Constructing a two-dimensional evaluation coordinate system according to the historical first test result set and the historical second test result set; Inputting the historical first test result and the historical second test result of each device into a two-dimensional evaluation coordinate system to form a plurality of evaluation points; Perform cluster analysis on each evaluation point to obtain several groups of cluster results; Assign different performance evaluation levels to each clustering result and construct a dynamic anti-bias performance evaluation space; Inputting the first dynamic reverse bias test result and the second dynamic reverse bias test result into the dynamic reverse bias performance evaluation space to determine the corresponding current clustering result; The performance evaluation level of the current clustering result is output as the final result of the dynamic reverse bias test of the semiconductor power device.

8. A semiconductor power device dynamic reverse bias test system, characterized in that: The system comprises: A data acquisition module is used to acquire a plurality of electrical characteristic data of the semiconductor power device to be tested, and obtain an electrical characteristic data set; A dynamic reverse bias test module, inputting the electrical characteristic data set into a dynamic reverse bias test model to obtain a first dynamic reverse bias test result; The signal transmitting and collecting module transmits a rapidly changing reverse voltage pulse signal to the semiconductor power device to be detected, and obtains an output signal after the reverse voltage pulse signal passes through the semiconductor power device to be detected; The abnormal signal analysis module determines whether the output signal exceeds a preset abnormal threshold; if not, the first dynamic reverse bias test result is output as the dynamic reverse bias test result of the semiconductor power device; if so, the obtained abnormal output signal is extracted, and the abnormal output signal is input into the dynamic reverse bias failure analysis model to obtain the second dynamic reverse bias test result; The comprehensive evaluation module inputs the first dynamic reverse bias test result and the second dynamic reverse bias test result into the dynamic reverse bias evaluation space to obtain the dynamic reverse bias test result of the semiconductor power device.

9. An electronic device for dynamic reverse bias testing of semiconductor power devices, comprising a bus, a transceiver, a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the transceiver, the memory, and the processor are connected via the bus, and characterized in that: When the computer program is executed by the processor, the steps in the method according to any one of claims 1 to 7 are implemented.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps in the method according to any one of claims 1 to 7 are implemented.

Images