Buried resistor, manufacturing method thereof and printed circuit board

Abstract

The invention provides a buried resistor, a manufacturing method thereof and a printed circuit board. The manufacturing method comprises the following steps: providing an inner-layer substrate; cutting the inner-layer substrate, laminating a thin dry film on the surface of one side of the copper layer of the inner-layer substrate, performing first patterning treatment, etching to remove the copper layer and the resistive layer which are not protected by the thin dry film after the first patterning treatment, and stripping the thin dry film to obtain a first semi-finished product; pressing a thick dry film on the surface of one side of the copper layer of the first semi-finished product, then carrying out second patterning treatment, then etching to remove the copper layer which is not protected by the thick dry film after the second patterning treatment, and stripping the thick dry film to obtain a second semi-finished product; and depositing a layer of solder resist ink at the etched part of the copper layer of the second semi-finished product to enable the solder resist ink to cover the exposed resistive layer, then performing resistance inspection, and then laminating a high-frequency material layer on the surface of the solder resist ink to obtain the buried resistor. According to the invention, the protection of the buried resistor and the effective control of the resistance value of the buried resistor are realized.

Description

Technical Field

[0001] The invention belongs to the technical field of printed circuit board processing, and in particular relates to an embedded resistor and a manufacturing method thereof, and a printed circuit board. Background Art

[0002] As electronic products continue to move towards miniaturization and multifunctionality, the size of PCB boards (printed circuit boards) continues to decrease, which means that the number of passive components assembled on PCB boards must also be reduced. However, in order to increase the functionality of PCBs and improve the reliability and electrical performance of PCBs, a large number of embedded passive components must be embedded in PCBs. As one of the most commonly used components, resistors occupy a large amount of space on the PCB surface. In addition, considering the reliability of PCB assembly, the stability and electrical performance of resistor components, the integration of resistor components is very necessary. Therefore, the use of embedded resistor technology can solve the above problems well. However, the existing embedded resistor technology has the following problems:

[0003] 1) The resistive film substrate is easily damaged after etching;

[0004] 2) The resistance value of the inner layer buried resistor is difficult to control.

[0005] Therefore, how to prevent the resistive film substrate from being damaged after etching while effectively controlling the resistance value of the inner buried resistor is a technical problem that needs to be solved urgently. Summary of the invention

[0006] In view of the shortcomings of the prior art, the purpose of the present invention is to provide a buried resistor and a method for making the same, and a printed circuit board. After the buried resistor is etched, the present invention does not perform AOI scanning, but performs solder mask processing. Through the protection of solder mask ink, the risk of resistor damage caused by AOI scanning, browning solution and improper operation of employees is eliminated, and the protection of the buried resistor is achieved; at the same time, by determining the change in the resistance value of the buried resistor before and after the high-frequency material layer is pressed, the resistance value of the inner layer buried resistor after pressing is effectively controlled.

[0007] In order to achieve the purpose of the invention, the present invention adopts the following technical solutions:

[0008] In a first aspect, the present invention provides a method for manufacturing a buried resistor, the manufacturing method comprising the following steps:

[0009] An inner substrate is provided. The inner substrate comprises an insulating substrate, a resistor layer and a copper layer which are stacked.

[0010] The inner substrate is cut, and then a thin dry film is pressed on the surface of one side of the copper layer of the inner substrate, and then a first patterning process is performed, and then the copper layer and the resistor layer that are not protected by the thin dry film after the first patterning process are etched away, and the thin dry film is peeled off to obtain a first semi-finished product.

[0011] A thick dry film is laminated on one side surface of the copper layer of the first semi-finished product, and then a second patterning process is performed, and then the copper layer not protected by the thick dry film after the second patterning process is etched away, and the thick dry film is peeled off to obtain a second semi-finished product.

[0012] A layer of solder resist ink is deposited at the etched portion of the copper layer of the second semi-finished product, and then a resistance test is performed. Subsequently, a high-frequency material layer is pressed on the surface of the solder resist ink to obtain the buried resistor.

[0013] After the buried resistor etching is completed, the present invention does not perform AOI (automatic optical inspection scanning. When inspecting the PCB (printed circuit board), the AOI system will scan each solder joint and component on the PCB, and compare the actual image with the preset standard image to determine whether there are defects) scanning, but performs solder mask processing. Through the protection of solder mask ink, the risk of resistor damage caused by AOI scanning, browning solution and improper operation of employees is eliminated, thereby achieving the protection of the buried resistor; at the same time, by determining the change in the resistance value of the buried resistor before and after the high-frequency material layer is pressed, the effective control of the resistance value of the inner layer buried resistor after pressing is achieved.

[0014] It should be noted that the inner substrate provided by the present invention has stable performance.

[0015] It should be noted that the present invention does not limit the material of the insulating substrate. For example, it can be a high-frequency material composed of PTFE resin + glass fiber cloth + ceramic filler.

[0016] It should be noted that cutting has the following specific meanings: 1) Cutting the substrate material according to the design requirements. For example, according to the required size specifications of the product, a large piece of board is cut into rectangular plates of appropriate size; 2) Determining the initial specifications. Through the cutting operation, the initial length, width, thickness and other specification parameters of the substrate are determined.

[0017] The present invention does not limit the thickness of the inner substrate. For example, it may be 0.254 mm or 0.508 mm.

[0018] In the present invention, the reason for laminating a thin dry film is that the thin dry film has a strong exposure resolution capability and can be used to transfer patterns with small line width and line spacing.

[0019] In the present invention, the reason for laminating the thick dry film is that the thick dry film has a strong bonding force with the copper surface and a strong alkali corrosion resistance, which can protect the pattern and prevent warping and biting during the alkaline etching process, resulting in excessive etching.

[0020] The present invention does not limit the specific materials of the thin dry film and the thick dry film. For example, the thin dry film may be a material composed of a photopolymerizable monomer, a binder, and a photoinitiator.

[0021] Preferably, the thickness of the resistance layer is 0.1-0.3 μm, for example, 0.1 μm, 0.2 μm or 0.3 μm.

[0022] Preferably, the material of the resistance layer includes any one of nickel-phosphorus-copper alloy, nickel-chromium alloy or metal ceramic.

[0023] Preferably, the copper layer has a thickness of 12-18 μm, for example, 12 μm, 13 μm, 14 μm, 15 μm, 16 μm, 17 μm or 18 μm.

[0024] Preferably, the thickness of the thin dry film is 30-50 μm, for example, 30 μm, 35 μm, 40 μm, 45 μm or 50 μm.

[0025] Preferably, the first patterning process includes exposure and development.

[0026] In the present invention, the first patterning process is performed to form a circuit pattern and expose the inner substrate that needs to be etched away.

[0027] Preferably, the specific steps of etching include:

[0028] The patterned inner substrate is subjected to acid etching and then placed in an etching solution for immersion etching.

[0029] In the present invention, the excess copper and the resistance film can be fully removed by acid etching and immersion etching, thereby forming a circuit.

[0030] Preferably, in the acid etching process, the acids used include hydrochloric acid and sodium hypochlorite.

[0031] Preferably, components of the etching solution include copper sulfate and sulfuric acid.

[0032] Preferably, the immersion etching temperature is 80-85°C, for example, 80°C, 81°C, 82°C, 83°C, 84°C or 85°C.

[0033] Preferably, the immersion etching time is 3-5 minutes, for example, 3 minutes, 4 minutes or 5 minutes.

[0034] Preferably, before the thick dry film lamination, the inner substrate is pre-treated, and the specific steps of the pre-treatment include degreasing, primary water washing, micro-etching, secondary water washing, acid washing, tertiary water washing and drying.

[0035] Preferably, the thickness of the thick dry film is 70-80 μm, for example, 70 μm, 75 μm or 80 μm.

[0036] Preferably, the second patterning process includes exposure and development.

[0037] In the present invention, the purpose of performing the second patterning process is to expose the copper at the position where the resistor is formed, and then subsequently etch it away by alkaline etching to expose the resistor layer.

[0038] Preferably, the etching is alkaline etching.

[0039] Preferably, in the alkaline etching process, the alkaline etching solution used includes ammonium chloride and ammonia water.

[0040] Preferably, the thickness of the solder resist ink is 15-30 μm, for example, 15 μm, 20 μm, 25 μm or 30 μm.

[0041] In the present invention, the solder resist ink with a suitable thickness is helpful to protect the resistor layer, and prevent the resistor from being damaged in subsequent production, thereby affecting the resistance value.

[0042] Preferably, the solder resist ink comprises a main agent and a hardener. Exemplarily, the main agent is a main resin, such as epoxy resin or acrylic resin, and the hardener may be, for example, an amine curing agent.

[0043] In the present invention, the solder resist ink can prevent the buried resistor from being oxidized, corroded and mechanically damaged during processing and use, which helps to extend the service life of the printed circuit board and improve its reliability.

[0044] It should be noted that the inner substrate is not welded.

[0045] Preferably, the steps of preparing the solder resist ink include pre-treatment, solder resist silk screen printing, solder resist pre-baking, solder resist exposure, solder resist development and solder resist curing performed in sequence.

[0046] Preferably, the high-frequency material layer is made of polypropylene (PP).

[0047] In the present invention, the purpose of providing the high-frequency material layer is to help improve the high-frequency signal transmission performance and reduce signal interference.

[0048] Preferably, the production method comprises the following steps:

[0049] (1) An inner substrate is provided, wherein the inner substrate includes an insulating base material, a resistor layer, and a copper layer which are stacked.

[0050] The thickness of the resistance layer is 0.1-0.3 μm, and the thickness of the copper layer is 12-18 μm.

[0051] (2) Cutting the inner substrate, and then laminating a thin dry film with a thickness of 30-50 μm on the surface of one side of the copper layer of the inner substrate, and then performing a first patterning process through exposure and development, and then performing acid etching to remove the copper layer not protected by the thin dry film after the first patterning process, and then placing it in an etching solution for immersion etching to remove the resistance layer not protected by the thin dry film, and then peeling off the thin dry film to obtain a first semi-finished product.

[0052] (3) Pre-treating the first semi-finished product, and then laminating a thick dry film with a thickness of 70-80 μm on one surface of the copper layer of the first semi-finished product, and then performing a second patterning process by exposure and development, followed by alkaline etching to remove the copper layer that is not protected by the thick dry film after the second patterning process, and peeling off the thick dry film to obtain a second semi-finished product.

[0053] (4) A layer of solder resist ink with a thickness of 15-30 μm is deposited on the etched portion of the copper layer of the second semi-finished product, and then a resistance test is performed to control the resistance of the buried resistor before laminating the high-frequency material layer to be 107.5±8%Ω (it should be noted that the 8% mentioned here refers to 8% of 107.5, and the same applies below, for example, it can be 98.9Ω, 99Ω, 100Ω, 102Ω, 104Ω, 110Ω or 116.1Ω, etc.).

[0054] (5) Punching rivet holes, browning, riveting and laminating are performed on the surface of the solder resist ink in sequence, and then the high-frequency material layer is pressed, so that the change value of the buried resistor before and after pressing is 7-8Ω, and then the outer layer is produced to obtain the buried resistor.

[0055] It should be noted that the outer layer is manufactured by conventional methods in the prior art, such as comprising the following steps:

[0056] According to the circuit design requirements, the multilayer board after the high-frequency material layer is laminated is subjected to the processes of drilling, copper deposition, full-board electroplating, outer layer graphic design, solder mask design, surface treatment, testing and inspection, and molding in sequence.

[0057] In a second aspect, the present invention provides a buried resistor, wherein the buried resistor is manufactured by the manufacturing method described in the first aspect;

[0058] The resistance value of the buried resistor is 100±10%Ω, for example, it can be 90Ω, 95Ω, 100Ω, 105Ω or 110Ω.

[0059] Preferably, the inner layer structure of the buried resistor includes:

[0060] Insulating substrate.

[0061] The resistance layer is patterned and distributed on the surface of one side of the insulating substrate.

[0062] The copper layer is patterned and distributed on the outer surface of the resistor layer.

[0063] The solder resist ink is uniformly covered on the surface of the exposed resistor layer in the patterned copper layer.

[0064] The high-frequency material layer is pressed onto the surfaces of the insulating substrate, the copper layer and the solder resist ink.

[0065] Preferably, in the inner layer structure of the buried resistor, the width of the resistor layer area not covered by the copper layer is 0.3±0.03 mm, for example, 0.27 mm, 0.3 mm or 0.33 mm.

[0066] In a third aspect, the present invention provides a printed circuit board, wherein the printed circuit board comprises the embedded resistor as described in the second aspect.

[0067] In a fourth aspect, the present invention provides an application of the printed circuit board as described in the third aspect in the field of high-frequency applications.

[0068] The numerical range described in the present invention not only includes the point values ​​listed above, but also includes any point values ​​between the above numerical ranges that are not listed. Due to space limitations and for the sake of simplicity, the present invention no longer exhaustively lists the specific point values ​​included in the range.

[0069] Compared with the prior art, the present invention has the following beneficial effects:

[0070] The present invention does not perform AOI scanning after the buried resistor etching is completed, but performs solder mask treatment. Through the protection of solder mask ink, the risk of resistor damage caused by AOI scanning, browning solution and improper operation of employees is eliminated, thereby achieving the protection of the buried resistor; at the same time, by determining the change in the resistance value of the buried resistor before and after the high-frequency material layer is laminated, effective control of the resistance value of the inner layer buried resistor after lamination is achieved. BRIEF DESCRIPTION OF THE DRAWINGS

[0071] Figure 1 This is a schematic diagram of the cross-sectional structure of a partially buried resistor provided in Example 1 of the present invention.

[0072] Figure 2 This is a schematic diagram of the top view of the partially buried resistor provided in Example 1 of the present invention.

[0073] Among them, 1-insulating substrate; 2-resistance layer; 3-copper layer; 4-solder resist ink. DETAILED DESCRIPTION

[0074] The technical solution of the present invention is further described below by specific implementation methods. It should be understood by those skilled in the art that the embodiments are only to help understand the present invention and should not be regarded as specific limitations of the present invention.

[0075] Example 1

[0076] This embodiment provides a method for manufacturing a buried resistor, the manufacturing method comprising the following steps:

[0077] (1) An inner substrate is provided, wherein the inner substrate includes an insulating base material, a resistor layer, and a copper layer which are stacked.

[0078] The material of the insulating substrate is a high-frequency material composed of PTFE resin + glass fiber cloth + ceramic filler; the material of the resistance layer is nickel-phosphorus-copper alloy with a thickness of 0.2 μm; and the thickness of the copper layer is 15 μm.

[0079] (2) The inner substrate is cut, and then a thin dry film with a thickness of 40 μm is pressed on the surface of one side of the copper layer of the inner substrate, and then a first patterning process is performed through exposure and development, followed by acid etching (the acid used in the etching process is hydrochloric acid) to remove the copper layer not protected by the thin dry film after the first patterning process, and then placed in an etching solution (components include copper sulfate and sulfuric acid) at 82° C. for immersion etching for 4 minutes to remove the resistor layer not protected by the thin dry film, and then the thin dry film is peeled off to obtain a first semi-finished product.

[0080] (3) Pre-treating the first semi-finished product, and then laminating a thick dry film with a thickness of 75 μm on the surface of one side of the copper layer of the first semi-finished product, and then performing a second patterning process through exposure and development, followed by alkaline etching (the alkaline etching solution used in the process includes ammonium chloride and ammonia water), removing the copper layer that is not protected by the thick dry film after the second patterning process, and peeling off the thick dry film to obtain a second semi-finished product.

[0081] (4) Pretreatment, solder resist screen printing, solder resist pre-baking, solder resist exposure, solder resist development and solder resist curing are sequentially performed on the etched portion of the copper layer of the second semi-finished product to prepare a solder resist ink (components including epoxy resin and amine curing agent) with a thickness of 20 μm, and then a resistance test is performed, which is recorded as the first resistance.

[0082] (5) Punching rivet holes, browning, riveting and laminating are performed on the surface of the solder resist ink in sequence, and then the high-frequency PP layer is pressed, and then the outer layer is produced. The specific steps include:

[0083] According to the circuit design requirements, the milling, drilling, copper plating, full-board electroplating, outer layer graphic design, outer layer AOI, solder mask silk screen, solder mask exposure, solder mask inspection, inkjet printing, solder mask post-curing, chemical nickel gold, surface treatment inspection, flying probe test, molding and packaging are carried out in sequence; among them, the outer layer AOI includes checking whether there are defects in the outer layer graphics; and measuring the resistance value of the buried resistor, recorded as the second resistor; the flying probe test includes testing the connectivity and insulation of the product.

[0084] The buried resistor is obtained.

[0085] Figure 1 and Figure 2 The cross-sectional structure schematic diagram of a partially buried resistor provided in this embodiment and the corresponding top view structural schematic diagram are respectively shown. As can be seen from the figure, the inner layer structure of the buried resistor includes:

[0086] Insulating substrate 1.

[0087] The resistor layer 2 is patterned and distributed on one surface of the insulating substrate 1 .

[0088] The copper layer 3 is distributed in a pattern on the outer surface of the resistor layer 2 .

[0089] The solder resist ink 4 is uniformly covered on the surface of the exposed resistor layer 2 in the patterned copper layer 3 .

[0090] Example 2

[0091] This embodiment provides a method for manufacturing a buried resistor, the manufacturing method comprising the following steps:

[0092] (1) An inner substrate is provided, wherein the inner substrate includes an insulating base material, a resistor layer, and a copper layer which are stacked.

[0093] The material of the insulating substrate is a high-frequency material composed of PTFE resin + glass fiber cloth + ceramic filler; the material of the resistance layer is nickel-phosphorus-copper alloy with a thickness of 0.2 μm; and the thickness of the copper layer is 15 μm.

[0094] (2) The inner substrate is cut, and then a thin dry film with a thickness of 40 μm is pressed on the surface of one side of the copper layer of the inner substrate, and then a first patterning process is performed by exposure and development, followed by acid etching (the acid used in the etching process is hydrochloric acid) to remove the copper layer not protected by the thin dry film after the first patterning process, and then placed in an etching solution (components include copper sulfate and sulfuric acid) at 85° C. for immersion etching for 3 minutes to remove the resistor layer not protected by the thin dry film, and then the thin dry film is peeled off to obtain a first semi-finished product.

[0095] (3) Pre-treating the first semi-finished product, and then laminating a thick dry film with a thickness of 75 μm on the surface of one side of the copper layer of the first semi-finished product, and then performing a second patterning process through exposure and development, followed by alkaline etching (the alkaline etching solution used in the process includes ammonium chloride and ammonia water), removing the copper layer that is not protected by the thick dry film after the second patterning process, and peeling off the thick dry film to obtain a second semi-finished product.

[0096] (4) Pretreatment, solder resist screen printing, solder resist pre-baking, solder resist exposure, solder resist development and solder resist curing are sequentially performed on the etched portion of the copper layer of the second semi-finished product to prepare a solder resist ink (components including epoxy resin and amine curing agent) with a thickness of 15 μm, and then a resistance test is performed, which is recorded as the first resistance.

[0097] (5) Punching rivet holes, browning, riveting and laminating are performed on the surface of the solder resist ink in sequence, and then the high-frequency PP layer is pressed, and then the outer layer is produced. The specific steps include:

[0098] According to the circuit design requirements, the milling, drilling, copper plating, full-board electroplating, outer layer graphic design, outer layer AOI, solder mask silk screen, solder mask exposure, solder mask inspection, inkjet printing, solder mask post-curing, chemical nickel gold, surface treatment inspection, flying probe test, molding and packaging are carried out in sequence; among them, the outer layer AOI includes checking whether there are defects in the outer layer graphics; and measuring the resistance value of the buried resistor, recorded as the second resistor; the flying probe test includes testing the connectivity and insulation of the product.

[0099] The buried resistor is obtained.

[0100] Example 3

[0101] This embodiment provides a method for manufacturing a buried resistor, the manufacturing method comprising the following steps:

[0102] (1) An inner substrate is provided, wherein the inner substrate includes an insulating base material, a resistor layer, and a copper layer which are stacked.

[0103] The material of the insulating substrate is a high-frequency material composed of PTFE resin + glass fiber cloth + ceramic filler; the material of the resistance layer is nickel-phosphorus-copper alloy with a thickness of 0.2 μm; and the thickness of the copper layer is 15 μm.

[0104] (2) The inner substrate is cut, and then a thin dry film with a thickness of 40 μm is pressed on the surface of one side of the copper layer of the inner substrate, and then a first patterning process is performed through exposure and development, followed by acid etching (the acid used in the etching process is hydrochloric acid) to remove the copper layer not protected by the thin dry film after the first patterning process, and then placed in an etching solution (components include copper sulfate and sulfuric acid) at 80° C. for immersion etching for 5 minutes to remove the resistance layer not protected by the thin dry film, and then the thin dry film is peeled off to obtain a first semi-finished product.

[0105] (3) Pre-treating the first semi-finished product, and then laminating a thick dry film with a thickness of 75 μm on the surface of one side of the copper layer of the first semi-finished product, and then performing a second patterning process through exposure and development, followed by alkaline etching (the alkaline etching solution used in the process includes ammonium chloride and ammonia water), removing the copper layer that is not protected by the thick dry film after the second patterning process, and peeling off the thick dry film to obtain a second semi-finished product.

[0106] (4) Pretreatment, solder resist screen printing, solder resist pre-baking, solder resist exposure, solder resist development and solder resist curing are sequentially performed on the etched portion of the copper layer of the second semi-finished product to prepare a solder resist ink (components including epoxy resin and amine curing agent) with a thickness of 30 μm, and then a resistance test is performed, which is recorded as the first resistance.

[0107] (5) Punching rivet holes, browning, riveting and laminating are performed on the surface of the solder resist ink in sequence, and then the high-frequency PP layer is pressed, and then the outer layer is produced. The specific steps include:

[0108] According to the circuit design requirements, the milling, drilling, copper plating, full-board electroplating, outer layer graphic design, outer layer AOI, solder mask silk screen, solder mask exposure, solder mask inspection, inkjet printing, solder mask post-curing, chemical nickel gold, surface treatment inspection, flying probe test, molding and packaging are carried out in sequence; among them, the outer layer AOI includes checking whether there are defects in the outer layer graphics; and measuring the resistance value of the buried resistor, recorded as the second resistor; the flying probe test includes testing the connectivity and insulation of the product.

[0109] The buried resistor is obtained.

[0110] Example 4

[0111] The difference between this embodiment and embodiment 1 is that the temperature of the immersion etching is 70°C.

[0112] The rest of the preparation methods and parameters are the same as those in Example 1.

[0113] Example 5

[0114] The difference between this embodiment and embodiment 1 is that the temperature of the immersion etching is 90°C.

[0115] The rest of the preparation methods and parameters are the same as those in Example 1.

[0116] Comparative Example 1

[0117] The difference between this comparative example and Example 1 is that the thin dry film lamination is not performed.

[0118] The rest of the preparation methods and parameters are the same as those in Example 1.

[0119] Comparative Example 2

[0120] The difference between this comparative example and Example 1 is that the lamination of the thick dry film is not performed.

[0121] The rest of the preparation methods and parameters are the same as those in Example 1.

[0122] Comparative Example 3

[0123] The difference between this comparative example and Example 1 is that no solder resist ink is provided.

[0124] The rest of the preparation methods and parameters are the same as those in Example 1.

[0125] Performance Testing

[0126] The first resistor and the second resistor recorded in the above embodiment and the comparative example are counted, and the resistance difference between the two is calculated.

[0127] The statistical results are shown in Table 1.

[0128] Table 1

[0129]

[0130]

[0131] analyze:

[0132] It can be seen from the above table that the present invention does not perform AOI scanning after the buried resistor etching is completed, but performs solder mask treatment. Through the protection of solder mask ink, the risk of resistor damage caused by AOI scanning, browning solution and improper operation of employees is eliminated, thereby achieving the protection of the buried resistor; at the same time, by determining the change in the resistance value of the buried resistor before and after the high-frequency material layer is laminated, effective control of the resistance value of the inner layer buried resistor after lamination is achieved.

[0133] It can be seen from Examples 1 and 4-5 that if the immersion etching temperature is too low, the etching rate will be reduced, the resistor film will not be completely etched, and the resistance value will be low; if the immersion etching temperature is too high, the etching rate will be accelerated, the resistor film will be over-etched, and the resistance value will be high.

[0134] It can be seen from Example 1 and Comparative Examples 1-2 that if the thin dry film is not pressed, the copper layer and the resistor film will be completely etched, and there will be no resistance; if the thick dry film is not pressed, the copper surface will be completely etched, and the resistor film will remain.

[0135] It can be seen from Example 1 and Comparative Example 3 that if solder resist ink is not provided, the resistor film will be attacked by the solution during browning, which will affect the resistance value.

[0136] The applicant declares that the present invention illustrates the process method of the present invention through the above-mentioned embodiments, but the present invention is not limited to the above-mentioned process steps, that is, it does not mean that the present invention must rely on the above-mentioned process steps to be implemented. Those skilled in the art should understand that any improvement of the present invention, equivalent replacement of the raw materials selected by the present invention, addition of auxiliary components, selection of specific methods, etc., all fall within the protection scope and disclosure scope of the present invention.

Claims

1. A method for manufacturing a buried resistor, characterized in that: The production method comprises the following steps: Providing an inner substrate, the inner substrate comprising an insulating substrate, a resistor layer and a copper layer stacked in layers; The inner substrate is cut, and then a thin dry film is pressed on the surface of one side of the copper layer of the inner substrate, and then a first patterning process is performed, and then the copper layer and the resistance layer that are not protected by the thin dry film after the first patterning process are etched away, and the thin dry film is peeled off to obtain a first semi-finished product; Laminating a thick dry film on one side surface of the copper layer of the first semi-finished product, and then performing a second patterning process, and then etching away the copper layer that is not protected by the thick dry film after the second patterning process, and peeling off the thick dry film to obtain a second semi-finished product; A layer of solder resist ink is deposited at the etched copper layer of the second semi-finished product so that the solder resist ink covers the exposed resistor layer, and then a resistance test is performed, and then a high-frequency material layer is pressed on the surface of the solder resist ink to obtain the buried resistor.

2. The method according to claim 1, characterized in that: The thickness of the resistance layer is 0.1-0.3 μm; Preferably, the material of the resistance layer includes any one of nickel-phosphorus-copper alloy, nickel-chromium alloy or metal ceramic; Preferably, the copper layer has a thickness of 12-18 μm.

3. The production method according to claim 1 or 2, characterized in that: The thickness of the thin dry film is 30-50 μm; Preferably, the first patterning process includes exposure and development.

4. The production method according to any one of claims 1 to 3, characterized in that: The specific steps of etching include: Acid etching is performed on the patterned inner substrate, and then the substrate is placed in an etching solution for immersion etching; Preferably, in the acid etching process, the acid used includes hydrochloric acid and sodium hypochlorite; Preferably, the components of the etching solution include copper sulfate and sulfuric acid; Preferably, the immersion etching temperature is 80-85°C; Preferably, the immersion etching time is 3-5 minutes.

5. The production method according to any one of claims 1 to 4, characterized in that: Before the thick dry film lamination, the inner substrate is pre-treated, and the specific steps of the pre-treatment include degreasing, primary water washing, micro-etching, secondary water washing, acid washing, tertiary water washing and drying in sequence: Preferably, the thickness of the thick dry film is 70-80 μm; Preferably, the second patterning process comprises exposure and development; Preferably, the etching is alkaline etching; Preferably, in the alkaline etching process, the alkaline etching solution used includes ammonium chloride and ammonia water.

6. The production method according to any one of claims 1 to 5, characterized in that: The thickness of the solder resist ink is 15-30 μm; Preferably, the steps of preparing the solder resist ink include pre-treatment, solder resist silk screen printing, solder resist pre-baking, solder resist exposure, solder resist development and solder resist curing performed in sequence.

7. The production method according to any one of claims 1 to 6, characterized in that: The material of the high-frequency material layer includes polypropylene.

8. The production method according to any one of claims 1 to 7, characterized in that: The production method comprises the following steps: (1) providing an inner substrate, the inner substrate comprising an insulating substrate, a resistor layer, and a copper layer stacked in layers; The thickness of the resistor layer is 0.1-0.3 μm, and the thickness of the copper layer is 12-18 μm; (2) cutting the inner substrate, and then laminating a thin dry film with a thickness of 30-50 μm on the surface of one side of the copper layer of the inner substrate, and then performing a first patterning process by exposure and development, and then performing acid etching to remove the copper layer not protected by the thin dry film after the first patterning process, and then placing it in an etching solution for immersion etching to remove the resistance layer not protected by the thin dry film, and then peeling off the thin dry film to obtain a first semi-finished product; (3) performing pre-treatment on the first semi-finished product, and then laminating a thick dry film with a thickness of 70-80 μm on the surface of one side of the copper layer of the first semi-finished product, and then performing a second patterning treatment by exposure and development, and then performing alkaline etching to remove the copper layer that is not protected by the thick dry film after the second patterning treatment, and peeling off the thick dry film to obtain a second semi-finished product; (4) depositing a layer of solder resist ink with a thickness of 15-30 μm at the etched portion of the copper layer of the second semi-finished product so that the solder resist ink covers the exposed resistor layer, and then performing a resistance test so that the buried resistor before laminating the high-frequency material layer is controlled to have a resistance value of 107.5±8%Ω; (5) Punching rivet holes, browning, riveting and laminating are performed on the surface of the solder resist ink in sequence, and then the high-frequency material layer is pressed, so that the change value of the buried resistor before and after pressing is 7-8Ω, and then the outer layer is produced to obtain the buried resistor.

9. A buried resistor, characterized in that: The buried resistor is manufactured by the manufacturing method according to any one of claims 1 to 8; The resistance value of the buried resistor is 100±10%Ω.

10. A printed circuit board, characterized in that: The printed circuit board includes the embedded resistor as claimed in claim 9.

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