Backboard, hard disk backboard and server

Abstract

The invention provides a backboard, a hard disk backboard and a server, and relates to the technical field of server design, the backboard is applied to the server, the backboard comprises at least one circuit board, at least one hard disk connector and at least one signal cable, and the at least one hard disk connector and the at least one signal cable are arranged on each circuit board; the signal cable is used for transmitting PCIe signals, one end of the signal cable is connected with at least one hard disk connector through PCB routing, and the other end of the signal cable is used for being connected with a cable connector on a mainboard. According to the technical scheme, the flexibility of configuring the number of the hard disks can be improved.

Description

Technical Field

[0001] The present application relates to the technical field of server design, and in particular to a circuit board, a hard disk backplane and a server. Background Art

[0002] Non-Volatile Memory Express (NVMe) is a solid-state drive logical interface specification that uses the Peripheral Component Interconnect Express (PCIe) bus interface. It has the characteristics of low latency, low power consumption, and parallelism, and has been widely used in server interfaces and host communication technologies.

[0003] In servers, PCIeNVMe backplanes are usually configured with 8, 12, and 24 disks. The hard disk configuration of this PCIeNVMe backplane is relatively fixed. When meeting customers' configuration requirements for different numbers of hard disks, re-adaptation and performance testing are required, and the configuration flexibility is poor. Summary of the invention

[0004] In view of this, the present application provides a circuit board, a hard disk backplane and a server for improving the flexibility of configuring the number of hard disks.

[0005] In order to achieve the above-mentioned object, in a first aspect, an embodiment of the present application provides a backplane, which is applied to a server, and the backplane includes: at least one circuit board, at least one hard disk connector arranged on each circuit board, and at least one signal cable;

[0006] The signal cable is used to transmit PCIe signals. One end of the signal cable is connected to at least one hard disk connector through a PCB trace, and the other end is used to connect to a cable connector on a mainboard.

[0007] In a possible implementation of the first aspect, the signal cable includes a high-speed signal line, which is used to transmit the PCIe signal, one end of the high-speed signal line is connected to the high-speed signal pin of the PCB trace, and the other end is connected to the high-speed signal pin of the cable connector.

[0008] In a possible implementation of the first aspect, the signal cable also includes a power cable, which is used to provide power to the hard disk connector, one end of the power cable is connected to the power connector of the mainboard, and the other end is connected to the power pin of the PCB trace.

[0009] In a possible implementation manner of the first aspect, the signal cable is welded to the PCB wiring board.

[0010] In a possible implementation of the first aspect, the signal cable is a PCIe x8 cable.

[0011] In a possible implementation manner of the first aspect, each of the signal cables is connected to two hard disk connectors.

[0012] In a possible implementation manner of the first aspect, a signal cable is disposed on the circuit board.

[0013] In a possible implementation of the first aspect, the hard disk connector is used to plug in an NVMe hard disk.

[0014] In a second aspect, an embodiment of the present application provides a hard disk backplane, which includes: a backplane as described in the first aspect or any implementation scheme of the first aspect and a hard disk plugged into the backplane.

[0015] In a third aspect, an embodiment of the present application provides a server, comprising: a hard disk backplane as described in the second aspect and a mainboard connected to the hard disk backplane.

[0016] The backplane provided in the embodiment of the present application is applied to a server, and the backplane includes: at least one circuit board, at least one hard disk connector arranged on each circuit board, and at least one signal cable; the signal cable is used to transmit PCIe signals, one end of the signal cable is connected to at least one hard disk connector through PCB routing, and the other end is used to connect to the cable connector on the mainboard. In this solution, the backplane is disassembled into one or more sub-backplanes (i.e., circuit boards), and one end of the signal cable is connected to at least one hard disk connector through PCB routing, and the other end can be directly connected to the cable connector on the mainboard, which can reduce the use of cable connectors on the circuit board and improve the flexibility of the backplane hard disk configuration. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 A schematic diagram of the structure of the first backplane provided in an embodiment of the present application;

[0018] Figure 2 A schematic diagram of the structure of a second backplane provided in an embodiment of the present application;

[0019] Figure 3 A schematic diagram of the structure of a third backplane provided in an embodiment of the present application;

[0020] Figure 4 A schematic diagram of the structure of a hard disk backplane provided in an embodiment of the present application;

[0021] Figure 5 A schematic diagram of the structure of a server provided in an embodiment of the present application.

[0022] Description of reference numerals:

[0023] 10-circuit board; 11-hard disk connector; 12-signal cable; 121-high-speed signal line; 122-power line;

[0024] 20-mainboard; 21-cable connector; 22-power connector;

[0025] 100-hard disk backplane; 110-backplane; 120-hard disk. DETAILED DESCRIPTION

[0026] The embodiments of the present application are described below in conjunction with the drawings in the embodiments of the present application. The terms used in the implementation method section of the embodiments of the present application are only used to explain the specific embodiments of the present application, and are not intended to limit the present application. The following specific embodiments can be combined with each other, and the same or similar concepts or processes may not be repeated in some embodiments.

[0027] As one of the core infrastructures of Information Technology (IT), storage technology is also evolving with the explosion of global data brought by the digital economy to meet the needs of users in the digital economy era for large-capacity, high-performance, high-reliability and high-security storage. Among them, the solid-state drive (SSD), a semiconductor with flash memory as the storage medium, has been increasing in shipments and has gradually become the mainstream storage hard drive in the market. As a result, the interface and host communication technology have also been transformed from the traditional serial hard drive (Serial Advanced Technology Attachment, SATA) and advanced host controller interface (Advanced Host Controller Interface, AHCI) to PCIe and NVMe.

[0028] As the requirements for high-speed transmission continue to increase, the PCIeNVMe protocol standard (or specification) is also constantly updated and iterated, resulting in the emergence of interfaces based on PCIeGen4 and PCIeGen5. Compared with PCIeGen4, the theoretical maximum transmission rate of PCIeGen5 has doubled, supporting more concurrent data streams and lower latency, which means that PCIeGen5 has faster data transmission speeds and better scalability.

[0029] Currently, the physical forms of the PCIeNVMe backplanes of servers have also become diverse due to the different forms of the overall chassis system and the different needs of customers, such as 2U 8 small disks, 2U 24 small disks, 2U 25 small disks, and 2U 12 large disks. The hard disk configuration of this PCIeNVMe backplane is relatively fixed. When meeting the configuration requirements of customers for different numbers of hard disks, re-adaptation and performance testing are required, and the configuration flexibility is poor.

[0030] In view of this, an embodiment of the present application provides a backplane, which may include at least one circuit board, at least one hard disk connector disposed on each circuit board, and at least one signal cable. The embodiment of the present application can improve the flexibility of configuring the number of hard disks.

[0031] The signal cable is used to transmit PCIe signals. One end of the signal cable is connected to at least one hard disk connector through a printed circuit board (PCB) routing, and the other end is used to connect to the cable connector on the motherboard.

[0032] Figure 1 This is a schematic diagram of the structure of the first backplane provided in the embodiment of the present application. Figure 1 As shown, the backplane includes a circuit board 10, and each circuit board 10 includes multiple (here, two for example) hard disk connectors 11. One end of the signal cable 12 is connected to the two hard disk connectors 11 through a PCB trace (not shown in the figure), and the other end is used to connect to the cable connector 21 on the motherboard 20. The signal cable 12 can effectively reduce the attenuation of signal transmission, thereby improving the signal quality of PCIe to meet higher signal requirements.

[0033] The signal cable 12 and the cable connector 21 can be connected by plugging and unplugging. For example, the end of the signal cable 12 connected to the cable connector 21 can be called the first end, and the end of the signal cable 12 connected to the PCB trace can be called the second end, wherein the first end of the signal cable 12 can be a female end, and one end of the cable connector 21 can be a male end. Of course, the second end of the signal cable 12 can also be a male end, and one end of the cable connector 21 can be a female end, and the present application does not specifically limit this. The second end of the signal cable 12 can be welded to the PCB trace, thereby improving the connection reliability between the signal cable 12 and the PCB trace.

[0034] The hard disk connector 11 can be used to connect storage devices such as solid-state hard disks to facilitate data reading and writing. In the backplane, the PCB traces can be used for the transfer of the signal cable 12, so as to connect the hard disk connector 11 on the circuit board 10 with the signal cable 12 to achieve signal transmission and control. In some embodiments, the PCB traces can be located on the circuit board 10, so that the structure of the backplane can be simplified. In other embodiments, a PCB board can also be set to connect the pins of the PCB board and the hard disk connector 11, and the signal cable 12 is connected to the PCB traces on the PCB board, and each PCB board can correspond to at least one hard disk connector 11.

[0035] In a possible implementation, a processor (not shown) may be provided on the mainboard 20. The processor may include a central processing unit (CPU) and a digital signal processor (DSP), etc., and the present application does not specifically limit the type of the processor. The signal cable 12 may be used to transmit PCIe signals (also referred to as high-speed differential signals) between the processor and the hard disk connector 11 to achieve high-speed interconnection.

[0036] In order to improve the signal transmission speed between the circuit board 10 and the mainboard 20, the signal cable 12 may include a high-speed signal line 121. Exemplarily, the high-speed signal line 121 may be used to transmit PCIe signals. In the prior art, a connector for connecting cables is usually also provided on the circuit board 10. Considering that the connector may cause PCIe signal attenuation, the embodiment of the present application may connect one end of the high-speed signal line 121 to the high-speed signal pin of the PCB trace, and the other end to the high-speed signal pin of the cable connector 21. This not only improves the quality of the transmitted signal, but also reduces the restrictions of the connector on the circuit board 10 on the backplane structure, and reduces the difficulty of changing the backplane structure and quantity.

[0037] Moreover, due to the reduction of connectors, the difficulty of signal testing of the backplane is also reduced. The extension of the transmission distance of the signal cable 12 can also increase the transmission speed of the PCIe signal, thereby improving the response speed of the overall server system.

[0038] In addition, by connecting the high-speed signal line 121 to the high-speed signal pin of the PCB trace, impedance control can also be performed through the PCB trace to reduce signal distortion caused by signal reflection.

[0039] In a possible implementation, the high-speed signal line 121 may also be directly connected to the high-speed signal pin corresponding to the hard disk connector 11 to reduce the attenuation of the transmission signal caused by the PCB wiring.

[0040] In some embodiments, the signal cable 12 may also include a low-speed signal line. The low-speed signal line may be connected to a low-speed signal pin of a PCB trace to transmit a low-speed signal.

[0041] Each cable connector 21 can be connected to at least one hard disk connector 11 via a signal cable 12, and the specific number of connections may be related to the processing power of the processor, the motherboard design, and the performance of the signal cable 12. That is, as the number of hard disk connectors 11 increases, the number of signal cables 12 and the number of cable connectors 21 may also increase in a positive correlation. In actual operation, the number of hard disk connectors 11 connected to each signal cable 12 may be set according to actual needs.

[0042] Through the above implementation, the number of signal cables 12 used can be reduced, the wiring of the backplane can be facilitated, and the space occupied by the signal cables 12 on the server can be reduced, so that the server can have more cooling ducts, thereby improving the cooling efficiency.

[0043] In some embodiments, the number of circuit boards 10 may also include multiple ones, so that manufacturers can reduce the cost of separate design and testing when meeting customers' requirements for different numbers of hard disks. Figure 2 A schematic diagram of the structure of the second backplane provided in the embodiment of the present application is shown in FIG. Figure 2 As shown, a signal cable 12 can be provided on each circuit board 10, and each signal cable 12 can be connected to two hard disk connectors 11. Specifically, the signal cable 12 can be a PCIe x8 cable, and when the backplane is a hard disk backplane, the hard disk connector 11 can be used to plug in an NVMe hard disk. That is, each circuit board 10 corresponds to two hard disk connectors 11, and two NVMe hard disks can be plugged in.

[0044] For example, if a customer needs to configure a server with four NVMe hard disks, according to the backplane described in the embodiment of the present application, only two circuit boards 10 need to be configured to meet the customer's needs, without the need to re-produce a circuit board that can plug in four hard disks, which can not only reduce production costs but also improve configuration efficiency. Multiple circuit boards 10 can be fixed by structural members or by other means, and this application does not specifically limit this.

[0045] In addition, since the cable connector 21 is connected to the hard disk connector 11 via the signal cable 12, this allows for flexible configuration of the number of NVME hard disks and reduces the difficulty of structural adjustment, allowing the hard disk to be plugged vertically or horizontally, so that manufacturers can change the installation method and quantity of the backplane according to actual usage environment and customer requirements, reducing the difficulty of backplane adaptation and signal testing, thereby reducing the R&D cycle and cost of the backplane.

[0046] Figure 3A schematic diagram of the structure of the third backplane provided in the embodiment of the present application is shown in FIG. Figure 3 As shown, the main difference between the backplane described in this embodiment and the backplane described in the previous embodiment is that the signal cable 12 can also include a power line 122, and the power line 122 is used to provide a power signal to the hard disk connector 11. One end of the power line 122 is connected to the power connector 22 of the motherboard 20, and the other end is connected to the power pin of the PCB trace.

[0047] It can be understood that the signal transmission line of the backplane in the embodiment of the present application is not limited to the above-mentioned high-speed signal line 121 and power line 122. For example, the circuit board 10 may also include a clock signal line for transmitting a clock signal, etc., and the present application does not make any special limitations on this.

[0048] The backplane provided in the embodiment of the present application is applied to a server, and the backplane includes: a circuit board, at least one hard disk connector arranged on the circuit board, and at least one signal cable; the signal cable is used to transmit PCIe signals, and one end of the signal cable is connected to at least one hard disk connector through a PCB trace, and the other end is used to connect to the cable connector on the mainboard. In this way, the design flexibility of the number of hard disk configurations can be improved, and the R&D cycle and cost of the backplane can be reduced.

[0049] Based on the same inventive concept, the embodiment of the present application also provides a hard disk backplane. Figure 4 A schematic diagram of the structure of the hard disk backplane provided in the embodiment of the present application is shown in FIG. Figure 4 As shown, the hard disk backplane may include the backplane 110 described in the above embodiment and a hard disk 120 plugged into the backplane 110 .

[0050] Since the hard disk backplane in this embodiment includes the backplane in the above embodiment, that is, the hard disk backplane in this embodiment has all the technical features and technical effects of the above backplane embodiments, specific reference is made to the above embodiment and no further details will be given here.

[0051] The embodiment of the present application also provides a server, Figure 5 A schematic diagram of the structure of the server provided in the embodiment of the present application, such as Figure 5 As shown, the server includes the hard disk backplane 100 described in the above embodiment and a mainboard 20 connected to the hard disk backplane 100 .

[0052] Since the server in this embodiment includes the hard disk backplane in the above embodiment, that is, the server in this embodiment has all the technical features and technical effects of the above hard disk backplane embodiment, please refer to the above embodiment for details and will not be repeated here.

[0053] The above disclosure is only part of the embodiments of the present application, which certainly cannot be used to limit the scope of rights of the present application. Ordinary technicians in this field can understand that all or part of the processes of implementing the above embodiments and equivalent changes made according to the claims of the present application are still within the scope covered by the present application.

[0054] It should be understood that in the description of the present application specification and the appended claims, the terms "include", "comprises", "has" and any variations thereof are intended to cover non-exclusive inclusions and mean "including but not limited to", unless otherwise specifically emphasized.

[0055] In the description of this application, unless otherwise specified, " / " indicates that the objects associated with each other are in an "or" relationship. For example, A / B can represent A or B. "And / or" in this application is used to describe the association relationship between associated objects, indicating that three relationships may exist. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone, where A and B can be singular or plural.

[0056] Furthermore, in the description of the present application, unless otherwise specified, "plurality" refers to two or more than two. "At least one of the following" or similar expressions refers to any combination of these items, including any combination of single or plural items.

[0057] In addition, in the description of the present application, it should be understood that the terms "longitudinal", "horizontal", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "vertical", "top", "bottom", "inside", "outside", "axial", "radial", "circumferential" and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the referred device or element must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the present application.

[0058] In the present application, unless otherwise clearly specified and limited, the terms "connection", "connected", etc. should be understood in a broad sense. For example, it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium. It can be the internal connection of two elements or the interaction relationship between two elements. Unless otherwise clearly defined, ordinary technicians in this field can understand the specific meanings of the above terms in this application according to the specific circumstances.

[0059] In addition, in the description of the present specification and the appended claims, the terms "first", "second", etc. are used to distinguish similar objects, but not necessarily to describe a specific order or sequence, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments described herein can be implemented in an order other than that illustrated or described herein; the features defined as "first" or "second" may explicitly or implicitly include at least one of the features.

[0060] In the embodiments of the present application, the words "exemplarily" or "for example" are used to indicate examples, illustrations or explanations. Any embodiment or design described as "exemplarily" or "for example" in the embodiments of the present application should not be interpreted as being more preferred or more advantageous than other embodiments or designs. Specifically, the use of words such as "exemplarily" or "for example" is intended to present related concepts in a specific way.

[0061] References to "one embodiment" or "some embodiments" etc. described in the specification of this application mean that one or more embodiments of the present application include specific features, structures or characteristics described in conjunction with the embodiment. Therefore, the phrases "in one embodiment", "in some embodiments", "in some other embodiments", "in some other embodiments", etc. appearing in different places in this specification do not necessarily refer to the same embodiment, but mean "one or more but not all embodiments", unless otherwise specifically emphasized in other ways.

[0062] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit it. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A backplane, characterized in that: Applied to a server, the backplane comprises: at least one circuit board, at least one hard disk connector arranged on each circuit board, and at least one signal cable; The signal cable is used to transmit PCIe signals. One end of the signal cable is connected to at least one hard disk connector through a PCB trace, and the other end is used to connect to a cable connector on a mainboard.

2. The back plate according to claim 1, characterized in that: The signal cable includes a high-speed signal line, which is used to transmit the PCIe signal. One end of the high-speed signal line is connected to the high-speed signal pin of the PCB trace, and the other end is connected to the high-speed signal pin of the cable connector.

3. The back plate according to claim 2, characterized in that: The signal cable also includes a power line, which is used to provide power to the hard disk connector. One end of the power line is connected to the power connector of the mainboard, and the other end is connected to the power pin of the PCB trace.

4. The back plate according to claim 1, characterized in that: The signal cable is welded to the PCB trace.

5. The back plate according to claim 1, characterized in that: The signal cable is a PCIe x8 cable.

6. The back plate according to claim 1, characterized in that: Each of the signal cables is connected to two hard disk connectors.

7. The back plate according to claim 1, characterized in that: A signal cable is arranged on the circuit board.

8. The back plate according to any one of claims 1 to 7, characterized in that: The hard disk connector is used to plug in the NVMe hard disk.

9. A hard disk backplane, characterized in that: include: A backplane as described in any one of claims 1 to 8 and a hard disk connected to the backplane.

10. A server, characterized in that: include: A hard disk backplane as claimed in claim 9 and a mainboard connected to the hard disk backplane.

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