Engine monitoring device based on multi-core processor

Abstract

The invention discloses an engine monitoring device based on a multi-core processor. The engine monitoring device comprises a hardware layer, a core operating system layer, a partition operating system layer and an application layer. Wherein the hardware layer adopts a heterogeneous multi-core processor as a processor, virtualization platform software of the core operating system layer is utilized to partition computing resources provided by the heterogeneous multi-core processor, and then different types of operating systems are deployed on constructed partitions through the partition operating system layer. The different types of operating systems are used for developing EMU applications with different airworthiness safety levels for the engine monitoring device, so that various functions of the engine monitoring device are realized.

Description

Technical Field

[0001] The present invention relates to the field of engine monitoring, and in particular to an engine monitoring device based on a multi-core processor. Background Art

[0002] The purpose of civil engine health management is to collect, record and process data in flight and ground tests to assist engine design, management, safe use, maintenance and logistics support. In the engine health management system, the engine monitoring device, as the core of its airborne part, mainly plays the role of collecting engine signals and performing real-time processing, transmission and recording of data. However, the current engine monitoring device faces the following problems:

[0003] 1. With the continuous understanding of engine characteristics, in order to know the health status of the engine more quickly, more and more engine health diagnosis and prediction algorithms are integrated into the onboard engine monitoring device, which challenges the existing onboard software architecture. And due to the application of a large number of new onboard software functions, the existing software architecture and computing resources cannot meet the integration and processing of a large number of advanced algorithms, so the engine monitoring device needs more and more powerful processors.

[0004] 2. Different business departments have different requirements for engine health status. These advanced diagnostic algorithms are often developed by different business departments. When considering how to easily integrate the algorithms into the engine monitoring device, it is often necessary to provide a familiar development platform to speed up the iteration of the algorithm and improve work efficiency. However, the current development of engine monitoring devices is relatively closed and cannot meet this requirement.

[0005] 3. The utilization rate of onboard computer hardware resources is not high. At present, the processing capacity of onboard computer hardware has been greatly increased by applying multi-core processor technology, but in actual use, a single core is still used for processing and calculation, and the processing capacity still needs to be improved. In addition, due to the use of a completely static configuration method, the excess computing power and storage, IO and other resources outside the configuration cannot be used, which leads to low hardware resource utilization.

[0006] 4. As commercial aircraft engines still face the issue of airworthiness certification, the existing EMU airborne software architecture faces high airworthiness costs. Therefore, when considering the issue of airworthiness costs, it is necessary to solve the isolation and interaction between C-level software functions and E-level software functions. However, the existing airborne software architecture is difficult to solve the impact and interference of E-level software on C-level software, and it is difficult to realize the development of software functions according to different safety levels. Summary of the invention

[0007] A brief summary of one or more aspects is given below to provide a basic understanding of these aspects. This summary is not an exhaustive overview of all conceived aspects, and is neither intended to identify the key or critical elements of all aspects nor to define the scope of any or all aspects. Its only purpose is to give some concepts of one or more aspects in a simplified form as a prelude to a more detailed description that will be given later.

[0008] The purpose of the present invention is to solve the above-mentioned problem and provide an engine monitoring device based on a multi-core processor. The engine monitoring device adopts a heterogeneous multi-core processor as a processor, and uses virtualization platform software to allocate the computing resources provided by the heterogeneous multi-core processor, construct a plurality of partitions, and then respectively deploy different types of operating systems on the constructed partitions. These different types of operating systems are used to develop EMU applications with different airworthiness safety levels for the engine monitoring device, thereby realizing various functions of the engine monitoring device.

[0009] The technical solution of the present invention is:

[0010] The present invention provides an engine monitoring device based on a multi-core processor, comprising a hardware layer, a core operating system layer, a partition operating system layer and an application layer; wherein:

[0011] The hardware layer is used to configure multi-core processors that provide computing resources;

[0012] The core operating system layer is used to manage the computing resources provided by the hardware layer and construct multiple partitions;

[0013] The partition operating system layer deploys multiple operating systems based on the partitions constructed by the core operating layer, and binds the partition operating system to the specified hardware core. ;

[0014] The application layer develops EMU applications based on the platform provided by the partition operating system layer to realize the various functions of the engine monitoring device.

[0015] According to an embodiment of the engine monitoring device based on a multi-core processor of the present invention, the hardware layer adopts a heterogeneous multi-core SOC as a multi-core processor, and provides a plurality of flexibly assignable computing cores for the engine monitoring device through the heterogeneous multi-core SOC.

[0016] According to one embodiment of the engine monitoring device based on a multi-core processor of the present invention, the heterogeneous multi-core SOC includes four computing cores with the same computing power. The engine monitoring device provides computing resources for EMU applications with different airworthiness safety levels in a flexible manner by allocating or combining the computing cores provided by the multi-core SOC.

[0017] According to one embodiment of the engine monitoring device based on a multi-core processor of the present invention, the core operating system layer allocates the computing resources provided by the hardware layer through the virtualization platform software to construct multiple partitions; wherein each partition is bound to a corresponding computing core according to the operating system to be deployed, thereby physically isolating the operating systems from each other.

[0018] According to an embodiment of the engine monitoring device based on a multi-core processor of the present invention, after the partition operating system completes the operating system deployment, the deployed operating system is used to develop EMU applications of different airworthiness safety levels.

[0019] According to an embodiment of the engine monitoring device based on a multi-core processor of the present invention, the partition operating system also includes an APEX interface and a peripheral driver interface; wherein,

[0020] The APEX interface is used to provide a callable application executable interface for the application layer.

[0021] The peripheral drive interface is used to provide a drive interface suitable for the engine monitoring device to the outside.

[0022] According to an embodiment of the engine monitoring device based on a multi-core processor of the present invention, the partition operating system uses a partition communication technology based on the ARINC653 standard to perform inter-partition communication.

[0023] Compared with the prior art, the present invention has the following beneficial effects: in order to deploy and develop EMU applications of different airworthiness safety levels on a unified hardware platform, the present invention adopts a heterogeneous multi-core processor as a processor of the hardware layer, allocates the computing resources of the hardware layer through the virtualization platform software of the core operating system layer, and binds each partition to multiple computing cores provided by the multi-core processor, thereby obtaining multiple partitions, and then deploys different types of operating systems on the constructed partitions through the partition operating system layer, and uses these different types of operating systems to develop EMU applications of different airworthiness safety levels for the engine monitoring device, thereby realizing various functions of the engine monitoring device. Compared with the prior art, the present invention can deploy the development and application of EMU applications of different airworthiness safety levels on the same hardware platform, which not only improves the integration of the engine monitoring device, but also solves the isolation and interaction relationship between EMU applications of different airworthiness safety levels, and at the same time provides a unified development platform for the development of EMU applications, greatly improving the development efficiency of EMU applications. In addition, the present invention adopts a heterogeneous multi-core processor as a hardware layer processor, and provides multiple computing cores for the engine monitoring device through the heterogeneous multi-core processor, which greatly improves the hardware processing capacity of the engine monitoring device. At the same time, the present invention configures the resources of each partition on the virtualization platform according to user needs through the partition static configuration mode, thereby avoiding the waste of hardware resources and improving the utilization rate of hardware resources. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] The above features and advantages of the present invention can be better understood after reading the detailed description of the embodiments of the present disclosure in conjunction with the following drawings. In the drawings, the components are not necessarily drawn to scale, and components with similar related properties or features may have the same or similar reference numerals.

[0025] Figure 1 1 is an architectural diagram showing an embodiment of an engine monitoring device based on a multi-core processor according to the present invention.

[0026] Figure 2 It is a configuration diagram showing an embodiment of multi-core processor partitioning based on HVP of the present invention.

[0027] Figure 3 is an architectural diagram showing an embodiment of the intra-partition communication architecture of the present invention.

[0028] Figure 4 It is a data flow diagram showing an embodiment of message transmission based on queue ports of the present invention. DETAILED DESCRIPTION

[0029] The present invention is described in detail below in conjunction with the accompanying drawings and specific embodiments. Note that the aspects described below in conjunction with the accompanying drawings and specific embodiments are only exemplary and should not be construed as limiting the scope of protection of the present invention in any way.

[0030] Disclosed herein is an embodiment of an engine monitoring device based on a multi-core processor (hereinafter sometimes referred to as an engine monitoring device). Figure 1 FIG. 1 is an architecture diagram showing an embodiment of an engine monitoring device based on a multi-core processor of the present invention. Figure 1 As shown, in this embodiment, the engine monitoring device is composed of a hardware layer, a core operating system layer (CoreOS layer), a partition operating system layer (PartitionOS), and an application layer from bottom to top. Among them, the hardware layer is configured with a multi-core processor to provide computing resources for the engine monitoring device. The core operating system layer is used to partition and manage the computing resources provided by the hardware layer, thereby constructing multiple partitions. The partition operating layer deploys multiple operating systems according to the partitions constructed by the core operating system layer, and binds the partition operating system to the specified hardware core. . The application layer develops EMU applications based on the platform provided by the partition operating system layer to realize the various functions of the engine monitoring device.

[0031] Specifically, in this embodiment, the hardware layer uses a heterogeneous multi-core SOC (System On Chip) as a multi-core processor of the engine monitoring device. The hardware layer provides four computing cores with the same computing power for the engine monitoring device through the heterogeneous multi-core SOC.

[0032] In addition, in this embodiment, in order to develop EMU applications with different airworthiness safety levels on a heterogeneous multi-core SOC, the virtualization platform software deployed on the core operating system layer is used to allocate the computing resources provided by the hardware layer, construct multiple partitions, and then deploy different types of operating systems on each partition. Different types of operating systems are used to develop EMU applications with different airworthiness safety levels, thereby integrating high airworthiness safety-critical applications and non-safety-critical applications on one hardware platform, and realizing unified integrated development and deployment of EMU applications with different airworthiness safety levels.

[0033] In one implementation, the engine monitoring device uses ZYNQ UltraScale SOC as a multi-core processor and uses Hypervisor as virtualization platform software to perform partition management on ZYNQ UltraScale SOC. The following takes ZYNQ UltraScale SOC+Hypervisor as an example to further illustrate this embodiment.

[0034] In this embodiment, the ZYNQ UltraScale SOC of the hardware layer integrates Cortex-A53MPCore quad-core processors, namely Core 0, Core 1, Core 2 and Core 3. The engine monitoring device allocates the hardware resources of the ZYNQ UltraScale SOC through the core operating system layer to obtain multiple partitions.

[0035] Specifically, during the development of the engine monitoring device, in order to achieve the coexistence of software with different security levels and different platforms in a hardware system, partitioning is used to limit EMU applications with different functions to their scope of activities so as not to affect other functions. Partitions include physical partitions and logical partitions. Physical partitions involve the allocation of software components on hardware. Only components with similar functions or the same security level can be allocated to the same hardware area. Logical partitioning refers to the isolation of components at the software level. Logical partitioning allows a component or functional application to run safely within a relatively independent logical scope.

[0036] In this embodiment, the core operating system layer adopts the OS architecture of hypervisor (virtual machine manager) + AMP (Asymmetric Multi-processing) and uses the hypervisor virtualization technology to run HVP (Helix Virtualization Platform) on the SOC, thereby generating multiple PartitionOS virtual machines deployed on the partition operating system layer. Among them, each PartitionOS virtual machine corresponds to a partition, and the engine monitoring device deploys various types of operating systems through the virtual machines deployed on the partition operating system layer, thereby developing EMU applications with different airworthiness safety levels. Figure 2 This is a configuration diagram showing an embodiment of the present invention for partitioning a multi-core processor based on HVP. Figure 2 , this embodiment is described in detail.

[0037] Specifically, in this embodiment, in order to deploy two different security levels of EMU software in three different virtual operating systems, the core operating system layer is configured as follows: Figure 2 The HVP partition configuration diagram shown binds each VM to a specified hardware core. Each VM corresponds to a partition, and an operating system is deployed on each partition. The engine monitoring device develops EMU applications of different security levels through the operating systems running on VM0, VM1 and VM2.

[0038] In addition, when allocating resources to the hardware layer, the core operating system layer uses a partition static configuration method to ensure spatial isolation, functional determinism, and partition behavior determinism between partitions. The hardware layer computing resources are partitioned through the partition resource configuration, partition loading, partition booting, partition scheduling, time management, and partition communication management functions provided by HVP. The partition physical address, partition virtual address start address and size, partition running memory size, communication port, partition peripheral interface, etc. of each partition are set through HVP to obtain virtual machines VM0, VM1, and VM2. Then VM0 is bound to Core0, VM1 to Core1, and VM2 to Core2 and Core3, thereby achieving physical isolation between partitions. This partitioning method greatly improves the safety and robustness of the system while meeting the requirements of DO-178B / C airworthiness standards.

[0039] In this embodiment, EMU applications are divided into high-security level applications and low-security level applications. In order to realize the coexistence of software of different security levels and different platforms in a set of hardware systems, the partition operating system layer uses VM0, VM1 and VM2 to deploy different virtual operating systems respectively. Among them, VM0 is used to deploy the certified VxWorks Cert operating system, VM1 is used to deploy the ordinary VxWorks operating system, and VM2 is used to deploy the Linux operating system. The partition operating system layer uses the VxWorks Cert operating system, VxWorks operating system and Linux operating system to develop and deploy high-security applications (AS1), low-security level software that has been developed for the previous VxWorks operating system (AS2) and low-security level advanced engine fault diagnosis software (AS3...ASn).

[0040] In addition, in this embodiment, in addition to deploying multiple PartitionOS virtual machines, the partition operating system layer also includes an APEX (APplication Executive, application executable program) interface that provides upper-layer applications and a user-customized peripheral driver interface encapsulated in the form of a device tree. Among them, the APEX interface is used to implement functions such as process management, time management, process communication within a partition, and port communication between partitions, while the peripheral driver interface is used to implement main functions such as internal hardware operation, communication, input peripherals, and built-in self-test. The partition operating system layer implements system management and system input and output through the APEX interface and the peripheral driver interface.

[0041] Taking process management as an example, refer to Figure 3In the process scheduling steps shown, when a partition uses the process management service provided by the APEX interface to perform periodic task scheduling, the user first needs to define the process attribute entity, including the process name NAME, the function entry address ENTRY_POINT, the stack size STACK_SIZE, the process priority BASE_PRIORITY, the process execution period PERIOD, etc., and then create the corresponding process based on the created process attribute entity. When process management is required, start the created real-time process, then set the current partition operation mode, and start real-time process management. In this embodiment, all functional modules and interface modules in the partition use the process attribute ENTRY_POINT as the entry to perform process management on the functional modules and interface modules.

[0042] In addition, since the partitions are physically isolated from each other, in order to exchange information between the partitions, HVP adopts the partition communication technology based on the ARINC653 standard to realize communication between the partitions, thereby ensuring that the EMU applications of different security levels will not affect each other after integration.

[0043] Specifically, in this embodiment, according to the data transmission type, the data communication between the engine monitoring devices is divided into intra-partition communication and inter-partition communication. Intra-partition communication refers to the communication between processes in a partition, and inter-partition communication refers to the communication between two or more partitions in the same system.

[0044] Specifically, in this implementation, for intra-partition communication, the PartitionOS virtual machine uses a method based on shared memory and data bus to centrally manage the input and output data of each module in the partition, obtain and refresh the data on the bus through the interface module provided by the data bus, and realize data interaction between modules in the partition.

[0045] Among them, when designing the modules in the partition, the software modules are decoupled and classified according to their functions into two categories: functional modules and interface modules. Figure 3 The intra-partition communication architecture shown in the figure connects the functional modules with each other and the functional modules with the interface modules through the data bus, thereby realizing the intra-partition communication. When classifying the software, the software in the partition is classified according to the following classification principles:

[0046] 1. For a process, if its input signal does not come directly from the outside, and its output signal is not directly output to the outside, it is defined as a functional module, and its main function is to realize logical calculation.

[0047] 2. For a process, if its input or output is directly connected to the outside, it is defined as an interface module, and its main function is to realize input and output.

[0048] 3. For the interface module, complex processing should be avoided as much as possible, and it should only be responsible for collecting signals and performing simple signal conversion.

[0049] 4. For a functional module, its output must have specific physical meaning. For example, a general algorithm cannot be called a functional module. It must be combined with a specific signal to be called a functional module.

[0050] Thus, the classification of software within the partition is completed through the above classification rules. In addition, in the present embodiment, when designing the functional model and the interface module, the corresponding design logic must be followed to realize intra-partition communication through the data bus. Among them, for the functional module, each function is composed of at least four independent functions, including an initialization function, an input processing function (for docking with the data bus), a logic processing function (for calling the model) and an output processing function (for docking with the data bus). For the interface module, each type of input or output is an independent function, and each function is composed of at least three independent functions, including an initialization function, an interface package or unpacking function (for docking with the data bus) and a processing function (for calling the AS / OS interface).

[0051] In addition, in this embodiment, for inter-partition communication, inter-partition communication is carried out through channels, ports and messages to ensure the integrity and consistency of the interactive data between partitions. Among them, the channel is a mapping of partition to partition. After completing the construction of each partition, the partition operating system layer defines the corresponding pipelines and corresponding interfaces based on the constructed partition environment, and then receives and sends messages between the operating systems of each partition through the configured pipelines and interfaces, thereby realizing inter-partition communication. Figure 4 This is a data flow diagram showing an embodiment of the present invention for message transmission based on a queue port. Figure 4 , further illustrating this embodiment.

[0052] like Figure 4 As shown, in this embodiment, when a user sends a message through a queue port, if the sending port does not have an idle buffer, the process will be blocked on the waiting queue of the sending process. If the port has an idle buffer, it will be handed over to the channel control program through a system call. At this time, the message to be sent will obtain a buffer from the system's message buffer, copy the message to the system buffer, and then insert the pointer of the system buffer into the message queue of the source port. The channel control program will insert the pointer of the buffer into the message queue of the destination port based on the interconnection relationship between the ports. If the destination port is empty, the destination partition will be notified that a message has arrived. This method of operating the buffer pointer can greatly reduce the number of data copies and improve the efficiency of data operations.

[0053] In addition, in this embodiment, after the partition operating system layer obtains EMU applications of different security levels through each operating system, the EMU applications provided by each partition are comprehensively applied through the application layer to realize the specific functions of the engine monitoring device, including signal processing (ISM), fault diagnosis processing (FD), state statistics processing (SC) and data storage processing (DS), etc.

[0054] The previous description of the disclosure is provided to enable any person skilled in the art to make or use the disclosure. Various modifications to the disclosure will be apparent to those skilled in the art, and the general principles defined herein may be applied to other variations without departing from the spirit or scope of the disclosure. Thus, the disclosure is not intended to be limited to the examples and designs described herein, but should be granted the widest scope consistent with the principles and novel features disclosed herein.

[0055] Those skilled in the art will further appreciate that the various illustrative logic blocks, modules, circuits, and algorithm steps described in conjunction with the embodiments disclosed herein may be implemented as electronic hardware, computer software, or a combination of the two. To clearly illustrate this interchangeability of hardware and software, various illustrative components, blocks, modules, circuits, and steps are generally described above in terms of their functionality. Whether such functionality is implemented as hardware or software depends on the specific application and the design constraints imposed on the overall system. The technician may implement the described functionality in different ways for each specific application, but such implementation decisions should not be interpreted as resulting in a departure from the scope of the present invention.

[0056] The various illustrative logic blocks, modules, and circuits described in conjunction with the embodiments disclosed herein may be implemented or performed with a general purpose processor, a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic device, discrete gate or transistor logic, discrete hardware components, or any combination thereof designed to perform the functions described herein. A general purpose processor may be a microprocessor, but in the alternative, the processor may be any conventional processor, controller, microcontroller, or state machine. The processor may also be implemented as a combination of computing devices, such as a combination of a DSP and a microprocessor, a plurality of microprocessors, one or more microprocessors in cooperation with a DSP core, or any other such configuration.

[0057] The steps of the method or algorithm described in conjunction with the embodiments disclosed herein may be embodied directly in hardware, in a software module executed by a processor, or in a combination of the two. The software module may reside in a RAM memory, a flash memory, a ROM memory, an EPROM memory, an EEPROM memory, a register, a hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art. An exemplary storage medium is coupled to a processor so that the processor can read and write information from / to the storage medium. In an alternative, a storage medium may be integrated into a processor. The processor and the storage medium may reside in an ASIC. The ASIC may reside in a user terminal. In an alternative, the processor and the storage medium may reside in a user terminal as discrete components.

[0058] In one or more exemplary embodiments, the functions described may be implemented in hardware, software, firmware, or any combination thereof. If implemented as a computer program product in software, each function may be stored on or transmitted by a computer-readable medium as one or more instructions or codes. Computer-readable media include both computer storage media and communication media, including any medium that facilitates the transfer of a computer program from one place to another. Storage media may be any available medium that can be accessed by a computer. As an example and not limitation, such a computer-readable medium may include RAM, ROM, EEPROM, CD-ROM or other optical disk storage, disk storage or other magnetic storage device, or any other medium that can be used to carry or store the desired program code in the form of an instruction or data structure and can be accessed by a computer. Any connection is also properly referred to as a computer-readable medium. For example, if the software is transmitted from a website, a server, or other remote source using a coaxial cable, a fiber optic cable, a twisted pair, a digital subscriber line (DSL), or wireless technologies such as infrared, radio, and microwaves, the coaxial cable, fiber optic cable, twisted pair, DSL, or wireless technologies such as infrared, radio, and microwaves are included in the definition of the medium. Disk and disc as used herein include compact disc (CD), laser disc, optical disc, digital versatile disc (DVD), floppy disk and Blu-ray disc, wherein disk often reproduces data magnetically, while disc reproduces data optically with lasers. Combinations of the above should also be included within the scope of computer-readable media.

Claims

1. An engine monitoring device based on a multi-core processor, characterized in that: It includes hardware layer, core operating system layer, partition operating system layer and application layer; among them, The hardware layer is used to configure multi-core processors that provide computing resources; The core operating system layer is used to manage the computing resources provided by the hardware layer and construct multiple partitions; The partition operating system layer has multiple partition operating systems deployed according to the partitions constructed by the core operating layer, and binds the partition operating system to the specified hardware core. ; The application layer develops EMU applications based on the platform provided by the partition operating system layer to realize the various functions of the engine monitoring device.

2. The engine monitoring device based on a multi-core processor according to claim 1, characterized in that: The hardware layer adopts a heterogeneous multi-core SOC as a multi-core processor, and provides a plurality of flexibly assignable computing cores for the engine monitoring device through the heterogeneous multi-core SOC.

3. The engine monitoring device based on a multi-core processor according to claim 2, characterized in that: The heterogeneous multi-core SOC includes four computing cores with the same computing power. The engine monitoring device provides computing resources for EMU applications with different airworthiness safety levels in a flexible allocation or combination manner through the computing cores provided by the multi-core SOC.

4. The engine monitoring device based on a multi-core processor according to claim 1, characterized in that: The core operating system layer allocates computing resources provided by the hardware layer through the virtualization platform software to construct multiple partitions; wherein each partition is bound to a corresponding computing core according to the operating system to be deployed, thereby physically isolating the operating systems from each other.

5. The engine monitoring device based on a multi-core processor according to claim 1, characterized in that: After the partition operating system completes the operating system deployment, the deployed operating system is used to develop EMU applications with different airworthiness safety levels.

6. The engine monitoring device based on a multi-core processor according to claim 5, characterized in that: The partition operating system also includes an APEX interface and a peripheral driver interface; wherein, The APEX interface is used to provide a callable application executable interface for the application layer. The peripheral drive interface is used to provide a drive interface suitable for the engine monitoring device to the outside.

7. The engine monitoring device based on a multi-core processor according to claim 1, characterized in that: The partition operating system uses a partition communication technology based on the ARINC653 standard to carry out inter-partition communication.

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