Residual current signal generator circuit

By designing a residual current signal generator circuit including DC-DC power supply circuit, microcontroller, external crystal oscillator circuit, signal amplification and driving circuit, the problem of the inability of the existing technology to effectively generate smooth DC leakage signals and oscillation frequency is solved, and effective monitoring and alarm of residual current during charging of electric vehicles is achieved.

CN119534953APending Publication Date: 2025-02-28SHENZHEN SENSE TECH DEV CO LTD
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Patent Information

Application Number
CN202411713037.9
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-11-26
Publication Date
2025-02-28

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Abstract

The invention discloses a residual current signal generator circuit, a microcontroller and an external crystal oscillator circuit comprise a microcontroller U7, a pin PB15 of the microcontroller U7 is used for receiving a command, the microcontroller U7 runs a residual current waveform generation program specified by the command, an input 12-bit digital analog signal is converted, output and expanded into 16-bit digital analog signals, and the output of the 12-bit digital analog signals is converted into the output of the external crystal oscillator circuit. High 12 bits of the waveform digital quantity are converted into analog voltage signals to be output through a pin PA4 of the microcontroller U7, and low 4 bits of the waveform digital quantity are respectively output through a pin PA0, a pin PA1, a pin PA2 and a pin PA3 of the microcontroller U7. And the microcontroller generates a B-type residual current waveform by running a residual current waveform generation program specified by the command. Therefore, the waveform meeting the detection requirement of the new national standard GB / T18487.1-2023 on the residual current sensor can be generated.
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Description

Technical Field

[0001] The present invention relates to the technical field of residual current signal generators, and more specifically, to a residual current signal generator circuit. Background Art

[0002] Residual current refers to the current in the low-voltage distribution line whose current vector sum is not zero, usually called leakage. There are different types of residual current, such as sinusoidal AC, pulsating DC, and smooth DC. Among them, smooth DC leakage is particularly common in the charging process of electric vehicles, mainly due to the discontinuity of the protective ground wire and the damage of the cable insulation layer.

[0003] In order to monitor residual current and realize functions such as alarm triggering, a residual current sensor is needed. At present, most domestic charging piles use type A residual current sensors, and there is no protection requirement for smooth DC residual current. Accordingly, most existing signal generators for generating simulated residual current can only generate type A or AC residual current.

[0004] Secondly, the existing A / AC type residual current generator generally uses a sinusoidal wave oscillation circuit to generate signals, and the frequency selection part is composed of resistors and capacitors, which are easily affected by external factors and easily lead to unstable oscillation frequency. Summary of the invention

[0005] In order to overcome the deficiencies of the prior art, the present invention provides a residual current signal generator circuit, which not only has the ability to generate a variety of residual current waveforms, but also can ensure the stability of the oscillation frequency.

[0006] The technical solution of the present invention is as follows: a residual current signal generator circuit, including a DC-DC power supply circuit, a microcontroller and an external crystal oscillator circuit and a signal amplification and drive circuit, wherein the DC-DC power supply circuit converts an input voltage into a 3.3V DC output voltage to power the microcontroller and the external crystal oscillator circuit, and the microcontroller and the external crystal oscillator circuit are used to convert the upper 12 bits of the waveform digital quantity into an analog voltage signal to output a voltage to the signal amplification and drive circuit, and the signal amplification and drive circuit processes the input voltage to drive the external resistor H10 to generate a corresponding residual current signal in the loop;

[0007] The microcontroller and the external crystal oscillator circuit include a microcontroller U7, wherein the pin PB15 of the microcontroller U7 is used to receive commands, and the microcontroller U7 runs the residual current waveform generation program specified by the command, and converts the input 12-bit digital analog signal into a 16-bit signal, and converts the high 12 bits of the waveform digital quantity into an analog voltage signal to be output through the pin PA4 of the microcontroller U7, and the low 4 bits of the waveform digital quantity are output through the pins PA0, PA1, PA2, and PA3 of the microcontroller U7, respectively.

[0008] Furthermore, the DC-DC power supply circuit includes a DC-DC conversion module U2, a first capacitor group, and a second capacitor group. The ADJ pin of the DC-DC conversion module U2 is grounded, and the VOUT pin of the DC-DC conversion module U2 is connected to the TAB pin of the DC-DC conversion module U2 to output a +3.3V power supply voltage; the TAB pin of the DC-DC conversion module U2 is grounded through the second capacitor group; the VIN pin of the DC-DC conversion module U2 is connected to the +5V voltage terminal, and the VIN pin of the DC-DC conversion module U2 is grounded through the first capacitor group.

[0009] Furthermore, the first capacitor group includes a capacitor C1 and a capacitor C2, one end of the capacitor C1 and one end of the capacitor C2 are respectively connected to the VIN pin of the DC-DC conversion module U2, and the other end of the capacitor C1 and the other end of the capacitor C2 are grounded.

[0010] Furthermore, the second capacitor group includes a capacitor C36 and a capacitor C37, one end of the capacitor C36 and one end of the capacitor C37 are respectively connected to the TAB pin of the DC-DC conversion module U2, and the other end of the capacitor C36 and the other end of the capacitor C37 are grounded.

[0011] Furthermore, the microcontroller and the external crystal oscillator circuit also include an external crystal oscillator X2, a GND pin of the external crystal oscillator X2 is grounded, a VDD pin of the external crystal oscillator X2 and a VDD pin of the microcontroller U7 are connected to a +3.3V power supply voltage terminal, and an OUTPUT pin of the external crystal oscillator X2 and a PH0-OSC_IN pin of the microcontroller U7 are connected.

[0012] Furthermore, the signal amplification and driving circuit includes an output voltage buffer unit, a voltage amplification unit, an operational amplifier buffer unit and a current driving unit. The output voltage buffer unit is used to buffer the output voltage of pin PA4 of the microcontroller U7, and the voltage amplification unit is used to amplify the output voltage by two times; the operational amplifier buffer unit is used to perform two-stage operational amplifier buffering on the voltage signal output by the voltage amplification unit, and the current driving unit is used to increase the current driving capability to drive the external resistor H10 to generate a residual current signal in the loop.

[0013] Furthermore, the output voltage buffer unit includes an operational amplifier U8.1, a resistor R17, a resistor R18, a resistor R20, a resistor R28, a resistor R29, a resistor R34, a resistor R35, a resistor R36, a resistor R37, a resistor R38 and a resistor R39, the non-inverting input terminal of the operational amplifier U8.1 is connected to the pin PA4 of the microcontroller U7, the inverting input terminal of the operational amplifier U8.1 and the output terminal of the operational amplifier U8.1 are both connected to the voltage amplification unit through the resistor R17, the +Vcc terminal of the operational amplifier U8.1 is connected to the +5V power supply voltage terminal, and the +Vcc terminal of the operational amplifier U8.1 is grounded through the capacitor C50; the -Vcc terminal of the operational amplifier U8.1 is connected to the -5V power supply voltage terminal, and the -Vcc terminal of the operational amplifier U8.1 is connected to the ground through the capacitor C50; The capacitor C51 is grounded, the resistor R18 is connected to the pin PA0 of the microcontroller U7, the resistor R20 is connected to the pin PA1 of the microcontroller U7, the resistor R28 is connected to the pin PA2 of the microcontroller U7, the resistor R29 is connected to the pin PA3 of the microcontroller U7, the resistor R18 is grounded through the resistor R34, one end of the resistor R35 is connected to the resistor R18, the other end of the resistor R35 is connected to the resistor R20, one end of the resistor R36 is connected to the resistor R20, the other end of the resistor R36 is connected to the resistor R28, one end of the resistor R37 is connected to the resistor R28, the other end of the resistor R37 is connected to the resistor R29 and the resistor R38, and the resistor R38 is connected to the voltage amplification unit through the resistor R39.

[0014] Furthermore, the voltage amplification unit includes an operational amplifier U8.2, a resistor R46 and a capacitor C58, the non-phase input terminal of the operational amplifier U8.2 is connected to the output terminal of the operational amplifier U8.1 through the resistor R17, the non-phase input terminal of the operational amplifier U8.2 is connected to the resistor R38 through the resistor R39, the inverting input terminal of the operational amplifier U8.2 is connected through the resistor R45, one end of the resistor R46 is connected to the inverting input terminal of the operational amplifier U8.2, the other end of the resistor R46 is connected to the output terminal of the operational amplifier U8.2, one end of the capacitor C58 is connected to the inverting input terminal of the operational amplifier U8.2, the other end of the capacitor C58 is connected to the output terminal of the operational amplifier U8.2, and the output terminal of the operational amplifier U8.2 is connected to the operational amplifier buffer unit through the resistor R44.

[0015] Furthermore, the operational amplifier buffer unit includes an operational amplifier U9.1 and an operational amplifier U9.2, the non-phase input terminal of the operational amplifier U9.1 is connected to the resistor R44 through a resistor R40, the inverting input terminal of the operational amplifier U9.1 and the output terminal of the operational amplifier U9.1 are both connected to the non-phase input terminal of the operational amplifier U9.2 through a resistor R42, and the output terminal of the operational amplifier U9.1 is connected to the resistor R44 through a capacitor C55; the inverting input terminal of the operational amplifier U9.2 is connected to the output terminal of the operational amplifier U9.2 through a capacitor C53, and the output terminal of the operational amplifier U9.2 is connected to the current driving unit.

[0016] Further, the current driving unit includes a transistor Q3, a transistor Q4, a capacitor C54 and a current output module H8, the base of the transistor Q3 is connected to the output end of the operational amplifier U9.2, the emitter of the transistor Q3 is connected to the emitter of the transistor Q4, the collector of the transistor Q3 is connected to the -5V power supply voltage end, one end of the capacitor C54 is respectively connected to the base of the transistor Q3 and the base of the transistor Q4, the other end of the capacitor C54 is respectively connected to the emitter of the transistor Q3 and the emitter of the transistor Q4, the collector of the transistor Q4 is connected to the +5V power supply voltage end, the first pin of the current output module H8 is respectively connected to the emitter of the transistor Q3 and the emitter of the transistor Q4, the second pin of the current output module H8 is connected to the first pin of the external resistor H10, and the second pin of the external resistor H10 is grounded.

[0017] The present invention according to the above scheme has the following beneficial effects:

[0018] (1) A residual current signal generator circuit provided by the present invention includes a DC-DC power supply circuit, a microcontroller and an external crystal oscillator circuit and a signal amplification and driving circuit, wherein the microcontroller and the external crystal oscillator circuit include a microcontroller U7, wherein the pin PB15 of the microcontroller U7 is used to receive commands, and the microcontroller U7 runs the residual current waveform generation program specified by the command, converts the input 12-bit digital analog signal into a 16-bit digital analog signal, converts the high 12 bits of the waveform digital quantity into an analog voltage signal to be output through the pin PA4 of the microcontroller U7, and outputs the low 4 bits of the waveform digital quantity through the pins PA0, PA1, PA2, and PA3 of the microcontroller U7. The microcontroller generates a B-type residual current waveform by running the residual current waveform generation program specified by the command, which includes not only the A-type residual current waveform, but also typical B-type current waveforms, such as the F-type composite wave, the pulsating DC waveform of the double-pulse bridge rectifier, the pulsating DC waveform of the 6-pulse bridge rectifier, and the smooth DC waveform. Therefore, a waveform that meets the new national standard GB / T18487.1-2023 for residual current sensor detection can be generated.

[0019] (2) The present invention provides a residual current signal generator circuit, wherein the microcontroller adopts a microcontroller of the model STM32H750VBT6ARM, has a built-in high-performance digital-to-analog converter (DAC), and supports high sampling rate conversion. In this circuit, the 20KHz high sampling rate DAC can ensure the high smoothness of the output waveform, and by accurately controlling the conversion of digital signals into analog voltage signals, the DAC can output a sine wave or other waveform close to the ideal state, thereby meeting various application requirements.

[0020] (3) A residual current signal generator circuit provided by the present invention, the microcontroller and the external crystal oscillator circuit further include an external crystal oscillator X2, the GND pin of the external crystal oscillator X2 is grounded, the VDD pin of the external crystal oscillator X2 and the VDD pin of the microcontroller U7 are connected to the +3.3V power supply voltage terminal, and the OUTPUT pin of the external crystal oscillator X2 is connected to the PH0-OSC_IN pin of the microcontroller U7. The OUTPUT pin of the external crystal oscillator X2 outputs a stable clock signal, which is input into the microcontroller through the PH0-OSC_IN pin as the clock source of the microcontroller, ensuring that the microcontroller can run at a stable frequency. The external crystal oscillator X2 generates a clock pulse with a stable frequency, so that the frequency of the output signal is almost unaffected by environmental changes. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0022] Figure 1 is a structural block diagram of a residual current signal generator circuit in an embodiment of the present invention;

[0023] Figure 2 is a connection block diagram of a residual current signal generator circuit in an embodiment of the present invention;

[0024] Figure 3 is a circuit diagram of a DC-DC power supply circuit in an embodiment of the present invention;

[0025] Figure 4 is a circuit diagram of a microcontroller and an external crystal oscillator circuit in an embodiment of the present invention;

[0026] Figure 5 FIG. 4 is a circuit diagram of a signal amplifying and driving circuit in an embodiment of the present invention.

[0027] In the figure, 100 is an output voltage buffer unit; 101 is a voltage amplifying unit; 102 is an operational amplifier buffer unit; and 103 is a current driving unit. DETAILED DESCRIPTION

[0028] The following detailed description of the embodiments of the present invention is provided in conjunction with the accompanying drawings and examples. The following detailed description of the embodiments and the accompanying drawings are used to illustrate the principles of the present invention, but cannot be used to limit the scope of the present invention, that is, the present invention is not limited to the described embodiments.

[0029] In order to better understand the present invention, the present invention is further described below in conjunction with the accompanying drawings and embodiments:

[0030] See also Figure 1-2 and Figure 4 As shown, a residual current signal generator circuit provided in this embodiment includes a DC-DC power supply circuit, a microcontroller and an external crystal oscillator circuit and a signal amplification and drive circuit. The DC-DC power supply circuit converts the input voltage into a 3.3V DC output voltage to power the microcontroller and the external crystal oscillator circuit. The microcontroller and the external crystal oscillator circuit are used to convert the upper 12 bits of the waveform digital quantity into an analog voltage signal to output the voltage to the signal amplification and drive circuit. The signal amplification and drive circuit processes the input voltage to drive the external resistor H10 to generate a corresponding residual current signal in the loop.

[0031] In this embodiment, the DC-DC power supply circuit converts the input +5V voltage into a +3.3V DC output voltage to power the microcontroller and the external crystal oscillator circuit.

[0032] Specifically, the microcontroller and the external crystal oscillator circuit include a microcontroller U7, and the pin PB15 of the microcontroller U7 is used to receive commands. The microcontroller U7 runs the residual current waveform generation program specified by the command, and the input 12-bit digital analog signal conversion output is expanded to 16 bits, and the high 12 bits of the waveform digital quantity are converted into analog voltage signals to be output through the pin PA4 of the microcontroller U7, and the low 4 bits of the waveform digital quantity are respectively output through the pins PA0, PA1, PA2, and PA3 of the microcontroller U7. The microcontroller generates a type B residual current waveform by running the residual current waveform generation program specified by the command, which includes not only the type A residual current waveform, but also typical type B current waveforms, such as F-type composite wave, pulsating DC waveform of double-pulse bridge rectification, pulsating DC waveform of 6-pulse bridge rectification, and smooth DC waveform. Therefore, it can generate a waveform that meets the detection requirements of the new national standard GB / T18487.1-2023 for residual current sensors.

[0033] In this embodiment, the microcontroller adopts a microcontroller of model STM32H750VBT6ARM, which has a built-in high-performance digital-to-analog converter (DAC) and supports high sampling rate conversion. In this circuit, the 20KHz high sampling rate DAC can ensure the high smoothness of the output waveform. By accurately controlling the conversion of digital signals into analog voltage signals, the DAC can output a sine wave or other waveform close to the ideal state, thereby meeting various application requirements.

[0034] See also Figure 3 As shown, the DC-DC power supply circuit includes a DC-DC conversion module U2, a first capacitor group, and a second capacitor group. The ADJ pin of the DC-DC conversion module U2 is grounded, and the VOUT pin of the DC-DC conversion module U2 is connected to the TAB pin of the DC-DC conversion module U2 to output a +3.3V power supply voltage; the TAB pin of the DC-DC conversion module U2 is grounded through the second capacitor group; the VIN pin of the DC-DC conversion module U2 is connected to the +5V voltage terminal, and the VIN pin of the DC-DC conversion module U2 is grounded through the first capacitor group.

[0035] In this embodiment, the first capacitor group includes capacitor C1 and capacitor C2, one end of capacitor C1 and one end of capacitor C2 are respectively connected to the VIN pin of the DC-DC conversion module U2, and the other end of capacitor C1 and the other end of capacitor C2 are grounded.

[0036] In this embodiment, the second capacitor group includes capacitor C36 and capacitor C37, one end of capacitor C36 and one end of capacitor C37 are respectively connected to the TAB pin of the DC-DC conversion module U2, and the other end of capacitor C36 and the other end of capacitor C37 are grounded.

[0037] Specifically, capacitor C1 and capacitor C2 are used to smooth the input voltage, reduce voltage fluctuations, and improve the stability of the power supply. When the +5V DC voltage is input to the DC-DC power supply circuit through the input port, it is first filtered and smoothed by capacitors C1, C2 and other components to reduce voltage fluctuations and noise. The filtered +5V voltage is input to the "VIN" pin of the DC-DC conversion module U2, and the DC-DC conversion module U2 converts the input +5V voltage into a stable +3.3V output voltage.

[0038] Among them, the conversion process involves complex circuit designs and algorithms such as switching power supply technology and PWM control. This embodiment does not involve the circuit design inside the DC-DC conversion module U2 and the corresponding algorithm improvement. Therefore, this embodiment does not elaborate on this.

[0039] The converted +3.3V output voltage is output to the microcontroller and the external crystal oscillator circuit through the "VOUT(TAB)" pin of the DC-DC converter module U2. At the same time, it is filtered and smoothed by capacitors C36 and C37 to ensure the stability of the output voltage.

[0040] See also Figure 4 As shown, the microcontroller and the external crystal oscillator circuit also include an external crystal oscillator X2, the GND pin of the external crystal oscillator X2 is grounded, the VDD pin of the external crystal oscillator X2 and the VDD pin of the microcontroller U7 are connected to the +3.3V power supply voltage terminal, and the OUTPUT pin of the external crystal oscillator X2 is connected to the PH0-OSC_IN pin of the microcontroller U7. The OUTPUT pin of the external crystal oscillator X2 outputs a stable clock signal, which is input into the microcontroller through the PH0-OSC_IN pin as the clock source of the microcontroller, ensuring that the microcontroller can run at a stable frequency. The external crystal oscillator X2 generates a clock pulse with a stable frequency, so that the frequency of the output signal is almost unaffected by environmental changes.

[0041] See also Figure 5As shown, the signal amplification and driving circuit includes an output voltage buffer unit 100, a voltage amplification unit 101, an operational amplifier buffer unit 102 and a current driving unit 103. The output voltage buffer unit 100 is used to buffer the output voltage of the pin PA4 of the microcontroller U7, and the voltage amplification unit 101 is used to amplify the output voltage by two times; the operational amplifier buffer unit 102 is used to perform two-stage operational amplifier buffering on the voltage signal output by the voltage amplification unit 101, and the current driving unit 103 is used to increase the current driving capability to drive the external resistor H10 to generate a residual current signal in the loop.

[0042] Specifically, the output voltage buffer unit 100 includes an operational amplifier U8.1, a resistor R17, a resistor R18, a resistor R20, a resistor R28, a resistor R29, a resistor R34, a resistor R35, a resistor R36, a resistor R37, a resistor R38 and a resistor R39, a non-inverting input terminal of the operational amplifier U8.1 is connected to the pin PA4 of the microcontroller U7, an inverting input terminal of the operational amplifier U8.1 and an output terminal of the operational amplifier U8.1 are both connected to the voltage amplification unit 101 through the resistor R17, a +Vcc terminal of the operational amplifier U8.1 is connected to the +5V power supply voltage terminal, and the +Vcc terminal of the operational amplifier U8.1 is grounded through the capacitor C50; a -Vcc terminal of the operational amplifier U8.1 is connected to the -5V power supply voltage terminal, and The -Vcc terminal of the operational amplifier U8.1 is grounded through the capacitor C51, the resistor R18 is connected to the pin PA0 of the microcontroller U7, the resistor R20 is connected to the pin PA1 of the microcontroller U7, the resistor R28 is connected to the pin PA2 of the microcontroller U7, the resistor R29 is connected to the pin PA3 of the microcontroller U7, the resistor R18 is grounded through the resistor R34, one end of the resistor R35 is connected to the resistor R18, the other end of the resistor R35 is connected to the resistor R20, one end of the resistor R36 is connected to the resistor R20, the other end of the resistor R36 is connected to the resistor R28, one end of the resistor R37 is connected to the resistor R28, the other end of the resistor R37 is connected to the resistor R29 and the resistor R38, and the resistor R38 is connected to the voltage amplification unit 101 through the resistor R39.

[0043] In this embodiment, the voltage amplification unit 101 includes an operational amplifier U8.2, a resistor R46 and a capacitor C58. The non-inverting input terminal of the operational amplifier U8.2 is connected to the output terminal of the operational amplifier U8.1 through the resistor R17, the non-inverting input terminal of the operational amplifier U8.2 is connected to the resistor R38 through the resistor R39, the inverting input terminal of the operational amplifier U8.2 is connected through the resistor R45, one end of the resistor R46 is connected to the inverting input terminal of the operational amplifier U8.2, the other end of the resistor R46 is connected to the output terminal of the operational amplifier U8.2, one end of the capacitor C58 is connected to the inverting input terminal of the operational amplifier U8.2, the other end of the capacitor C58 is connected to the output terminal of the operational amplifier U8.2, and the output terminal of the operational amplifier U8.2 is connected to the operational amplifier buffer unit 102 through the resistor R44.

[0044] In this embodiment, the operational amplifier buffer unit 102 includes an operational amplifier U9.1 and an operational amplifier U9.2, the non-inverting input terminal of the operational amplifier U9.1 is connected through resistor R40 and resistor R44, the inverting input terminal of the operational amplifier U9.1 and the output terminal of the operational amplifier U9.1 are both connected to the non-inverting input terminal of the operational amplifier U9.2 through resistor R42, and the output terminal of the operational amplifier U9.1 is connected to the resistor R44 through capacitor C55; the inverting input terminal of the operational amplifier U9.2 is connected to the output terminal of the operational amplifier U9.2 through capacitor C53, and the output terminal of the operational amplifier U9.2 is connected to the current driving unit 103.

[0045] In this embodiment, the current driving unit 103 includes a transistor Q3, a transistor Q4, a capacitor C54 and a current output module H8. The base of the transistor Q3 is connected to the output end of the operational amplifier U9.2, the emitter of the transistor Q3 is connected to the emitter of the transistor Q4, the collector of the transistor Q3 is connected to the -5V power supply voltage end, one end of the capacitor C54 is respectively connected to the base of the transistor Q3 and the base of the transistor Q4, the other end of the capacitor C54 is respectively connected to the emitter of the transistor Q3 and the emitter of the transistor Q4, the collector of the transistor Q4 is connected to the +5V power supply voltage end, the first pin of the current output module H8 is respectively connected to the emitter of the transistor Q3 and the emitter of the transistor Q4, the second pin of the current output module H8 is connected to the first pin of the external resistor H10, and the second pin of the external resistor H10 is grounded.

[0046] In this embodiment, operational amplifier U8.1, operational amplifier U8.2, operational amplifier U9.1 and operational amplifier U9.2 are all operational amplifiers of model TL082IDR, which have the characteristics of low offset voltage, low offset voltage drift, low noise, etc., so that they can accurately and stably amplify voltage signals and improve the signal-to-noise ratio of the residual current output signal.

[0047] In this embodiment, the transistor Q3 and the transistor Q4 are both transistors of model NSS60601MZ4T1G, and the maximum collector current thereof is 6A, which can drive a residual current signal with a wide amplitude range.

[0048] It should be understood that those skilled in the art can make improvements or changes based on the above description, and all these improvements and changes should fall within the scope of protection of the appended claims of the present invention.

[0049] The above is an exemplary description of the present invention in conjunction with the accompanying drawings. It is obvious that the implementation of the present invention is not limited to the above-mentioned method. As long as various improvements are made by adopting the method concept and technical solution of the present invention, or the concept and technical solution of the present invention are directly applied to other occasions without improvement, they are all within the protection scope of the present invention.

Claims

1. A residual current signal generator circuit, comprising a DC-DC power supply circuit, a microcontroller, an external crystal oscillator circuit and a signal amplification and driving circuit, characterized in that: The DC-DC power supply circuit converts the input voltage into a 3.3V DC output voltage to power the microcontroller and the external crystal oscillator circuit, and the microcontroller and the external crystal oscillator circuit are used to convert the upper 12 bits of the waveform digital quantity into an analog voltage signal to output a voltage to the signal amplification and drive circuit, and the signal amplification and drive circuit processes the input voltage to drive the external resistor H10 to generate a corresponding residual current signal in the loop; The microcontroller and the external crystal oscillator circuit include a microcontroller U7, wherein the pin PB15 of the microcontroller U7 is used to receive commands, and the microcontroller U7 runs the residual current waveform generation program specified by the command, and converts the input 12-bit digital analog signal into a 16-bit signal, and converts the high 12 bits of the waveform digital quantity into an analog voltage signal to be output through the pin PA4 of the microcontroller U7, and the low 4 bits of the waveform digital quantity are output through the pins PA0, PA1, PA2, and PA3 of the microcontroller U7, respectively.

2. A residual current signal generator circuit as claimed in claim 1, characterized in that: The DC-DC power supply circuit includes a DC-DC conversion module U2, a first capacitor group, and a second capacitor group. The ADJ pin of the DC-DC conversion module U2 is grounded, and the VOUT pin of the DC-DC conversion module U2 is connected to the TAB pin of the DC-DC conversion module U2 to output a +3.3V power supply voltage; the TAB pin of the DC-DC conversion module U2 is grounded through the second capacitor group; the VIN pin of the DC-DC conversion module U2 is connected to the +5V voltage terminal, and the VIN pin of the DC-DC conversion module U2 is grounded through the first capacitor group.

3. A residual current signal generator circuit as claimed in claim 2, characterized in that: The first capacitor group includes a capacitor C1 and a capacitor C2. One end of the capacitor C1 and one end of the capacitor C2 are respectively connected to the VIN pin of the DC-DC conversion module U2, and the other end of the capacitor C1 and the other end of the capacitor C2 are grounded.

4. A residual current signal generator circuit as claimed in claim 2, characterized in that: The second capacitor group includes a capacitor C36 and a capacitor C37, one end of the capacitor C36 and one end of the capacitor C37 are respectively connected to the TAB pin of the DC-DC conversion module U2, and the other end of the capacitor C36 and the other end of the capacitor C37 are grounded.

5. A residual current signal generator circuit as claimed in claim 4, characterized in that: The microcontroller and external crystal oscillator circuit also include an external crystal oscillator X2, a GND pin of the external crystal oscillator X2 is grounded, a VDD pin of the external crystal oscillator X2 and a VDD pin of the microcontroller U7 are connected to a +3.3V power supply voltage terminal, and an OUTPUT pin of the external crystal oscillator X2 is connected to a PH0-OSC_IN pin of the microcontroller U7.

6. A residual current signal generator circuit as claimed in claim 5, characterized in that: The signal amplification and driving circuit includes an output voltage buffer unit, a voltage amplification unit, an operational amplifier buffer unit and a current driving unit. The output voltage buffer unit is used to buffer the output voltage of pin PA4 of the microcontroller U7, and the voltage amplification unit is used to amplify the output voltage by two times; the operational amplifier buffer unit is used to perform two-stage operational amplifier buffering on the voltage signal output by the voltage amplification unit, and the current driving unit is used to increase the current driving capability to drive the external resistor H10 to generate a residual current signal in the loop.

7. A residual current signal generator circuit as claimed in claim 6, characterized in that: The output voltage buffer unit includes an operational amplifier U8.1, a resistor R17, a resistor R18, a resistor R20, a resistor R28, a resistor R29, a resistor R34, a resistor R35, a resistor R36, a resistor R37, a resistor R38 and a resistor R39. The non-inverting input terminal of the operational amplifier U8.1 is connected to the pin PA4 of the microcontroller U7, the inverting input terminal of the operational amplifier U8.1 and the output terminal of the operational amplifier U8.1 are both connected to the voltage amplification unit through the resistor R17, the +Vcc terminal of the operational amplifier U8.1 is connected to the +5V power supply voltage terminal, and the +Vcc terminal of the operational amplifier U8.1 is grounded through a capacitor C50; the -Vcc terminal of the operational amplifier U8.1 is connected to the -5V power supply voltage terminal, and the -Vcc terminal of the operational amplifier U8.1 is grounded through a capacitor C50. C51 is grounded, the resistor R18 is connected to the pin PA0 of the microcontroller U7, the resistor R20 is connected to the pin PA1 of the microcontroller U7, the resistor R28 is connected to the pin PA2 of the microcontroller U7, the resistor R29 is connected to the pin PA3 of the microcontroller U7, the resistor R18 is grounded through the resistor R34, one end of the resistor R35 is connected to the resistor R18, the other end of the resistor R35 is connected to the resistor R20, one end of the resistor R36 is connected to the resistor R20, the other end of the resistor R36 is connected to the resistor R28, one end of the resistor R37 is connected to the resistor R28, the other end of the resistor R37 is connected to the resistor R29 and the resistor R38, and the resistor R38 is connected to the voltage amplification unit through the resistor R39.

8. A residual current signal generator circuit as claimed in claim 7, characterized in that: The voltage amplification unit includes an operational amplifier U8.2, a resistor R46 and a capacitor C58. The non-phase input terminal of the operational amplifier U8.2 is connected to the output terminal of the operational amplifier U8.1 through the resistor R17, the non-phase input terminal of the operational amplifier U8.2 is connected to the resistor R38 through the resistor R39, the inverting input terminal of the operational amplifier U8.2 is connected through the resistor R45, one end of the resistor R46 is connected to the inverting input terminal of the operational amplifier U8.2, the other end of the resistor R46 is connected to the output terminal of the operational amplifier U8.2, one end of the capacitor C58 is connected to the inverting input terminal of the operational amplifier U8.2, the other end of the capacitor C58 is connected to the output terminal of the operational amplifier U8.2, and the output terminal of the operational amplifier U8.2 is connected to the operational amplifier buffer unit through the resistor R44.

9. A residual current signal generator circuit as claimed in claim 8, characterized in that: The operational amplifier buffer unit includes an operational amplifier U9.1 and an operational amplifier U9.

2. The non-inverting input terminal of the operational amplifier U9.1 is connected to the resistor R44 via a resistor R40. The inverting input terminal of the operational amplifier U9.1 and the output terminal of the operational amplifier U9.1 are both connected to the non-inverting input terminal of the operational amplifier U9.2 via a resistor R42. The output terminal of the operational amplifier U9.1 is connected to the resistor R44 via a capacitor C55. The inverting input terminal of the operational amplifier U9.2 is connected to the output terminal of the operational amplifier U9.2 via a capacitor C53. The output terminal of the operational amplifier U9.2 is connected to the current driving unit.

10. A residual current signal generator circuit as claimed in claim 9, characterized in that: The current driving unit includes a transistor Q3, a transistor Q4, a capacitor C54 and a current output module H8. The base of the transistor Q3 is connected to the output end of the operational amplifier U9.2, the emitter of the transistor Q3 is connected to the emitter of the transistor Q4, the collector of the transistor Q3 is connected to the -5V power supply voltage end, one end of the capacitor C54 is respectively connected to the base of the transistor Q3 and the base of the transistor Q4, the other end of the capacitor C54 is respectively connected to the emitter of the transistor Q3 and the emitter of the transistor Q4, the collector of the transistor Q4 is connected to the +5V power supply voltage end, the first pin of the current output module H8 is respectively connected to the emitter of the transistor Q3 and the emitter of the transistor Q4, the second pin of the current output module H8 is connected to the first pin of the external resistor H10, and the second pin of the external resistor H10 is grounded.